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Update RTL8723BS wifi driver

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1.Refine IQK handle
2.Fix RX error handle to avoid system hang problem
3.Fix IQK restore fail issue
4.Fix running out of RX resource in some case
5.Fix HiddenAP still in driver scan queue after disconnect
This commit is contained in:
xxh 2015-03-10 12:35:45 +08:00 committed by xxh
parent bcd5b6de91
commit c2902a0c6f
168 changed files with 48397 additions and 8031 deletions
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236
drivers/net/wireless/rockchip_wlan/rtl8723bs/Makefile
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@ -1,5 +1,5 @@
EXTRA_CFLAGS += $(USER_EXTRA_CFLAGS)
EXTRA_CFLAGS += -O1 -Wframe-larger-than=1200
EXTRA_CFLAGS += -O1
#EXTRA_CFLAGS += -O3
#EXTRA_CFLAGS += -Wall
#EXTRA_CFLAGS += -Wextra
@ -53,19 +53,26 @@ CONFIG_TRAFFIC_PROTECT = y
CONFIG_LOAD_PHY_PARA_FROM_FILE = y
CONFIG_CALIBRATE_TX_POWER_BY_REGULATORY = n
CONFIG_CALIBRATE_TX_POWER_TO_MAX = n
CONFIG_ODM_ADAPTIVITY = n
CONFIG_RTW_ADAPTIVITY_EN = disable
CONFIG_RTW_ADAPTIVITY_MODE = normal
CONFIG_SKIP_SIGNAL_SCALE_MAPPING = n
CONFIG_80211W = n
CONFIG_REDUCE_TX_CPU_LOADING = n
CONFIG_BR_EXT = y
CONFIG_ANTENNA_DIVERSITY = n
######################## Wake On Lan ##########################
CONFIG_WOWLAN = y
CONFIG_GPIO_WAKEUP = y
CONFIG_WOWLAN = n
CONFIG_GPIO_WAKEUP = n
CONFIG_WAKEUP_GPIO_IDX = default
CONFIG_PNO_SUPPORT = n
CONFIG_PNO_SET_DEBUG = n
CONFIG_AP_WOWLAN = n
######### Notify SDIO Host Keep Power During Syspend ##########
CONFIG_RTW_SDIO_PM_KEEP_POWER = y
###################### Platform Related #######################
CONFIG_PLATFORM_I386_PC = n
CONFIG_PLATFORM_I386_PC = y
CONFIG_PLATFORM_ANDROID_X86 = n
CONFIG_PLATFORM_ANDROID_INTEL_X86 = n
CONFIG_PLATFORM_JB_X86 = n
CONFIG_PLATFORM_ARM_S3C2K4 = n
CONFIG_PLATFORM_ARM_PXA2XX = n
@ -92,7 +99,6 @@ CONFIG_PLATFORM_ARM_URBETTER = n
CONFIG_PLATFORM_ARM_TI_PANDA = n
CONFIG_PLATFORM_MIPS_JZ4760 = n
CONFIG_PLATFORM_DMP_PHILIPS = n
CONFIG_PLATFORM_TI_DM365 = n
CONFIG_PLATFORM_MSTAR_TITANIA12 = n
CONFIG_PLATFORM_MSTAR = n
CONFIG_PLATFORM_SZEBOOK = n
@ -106,6 +112,9 @@ CONFIG_PLATFORM_ARM_RTD299X = n
CONFIG_PLATFORM_ARM_SPREADTRUM_6820 = n
CONFIG_PLATFORM_ARM_SPREADTRUM_8810 = n
CONFIG_PLATFORM_ARM_WMT = n
CONFIG_PLATFORM_TI_DM365 = n
CONFIG_PLATFORM_MOZART = n
CONFIG_PLATFORM_RTK119X = n
###############################################################
CONFIG_DRVEXT_MODULE = n
@ -139,6 +148,7 @@ _OS_INTFS_FILES := os_dep/osdep_service.o \
os_dep/linux/mlme_linux.o \
os_dep/linux/recv_linux.o \
os_dep/linux/ioctl_cfg80211.o \
os_dep/linux/rtw_cfgvendor.o \
os_dep/linux/wifi_regd.o \
os_dep/linux/rtw_android.o \
os_dep/linux/rtw_proc.o
@ -158,24 +168,29 @@ _HAL_INTFS_FILES := hal/hal_intf.o \
hal/hal_com.o \
hal/hal_com_phycfg.o \
hal/hal_phy.o \
hal/hal_dm.o \
hal/hal_btcoex.o \
hal/hal_hci/hal_$(HCI_NAME).o \
hal/led/hal_$(HCI_NAME)_led.o
_OUTSRC_FILES := hal/OUTSRC/odm_debug.o \
hal/OUTSRC/odm_AntDiv.o\
hal/OUTSRC/odm_interface.o\
hal/OUTSRC/odm_HWConfig.o\
hal/OUTSRC/odm.o\
_OUTSRC_FILES := hal/OUTSRC/phydm_debug.o \
hal/OUTSRC/phydm_AntDiv.o\
hal/OUTSRC/phydm_interface.o\
hal/OUTSRC/phydm_HWConfig.o\
hal/OUTSRC/phydm.o\
hal/OUTSRC/HalPhyRf.o\
hal/OUTSRC/odm_EdcaTurboCheck.o\
hal/OUTSRC/odm_DIG.o\
hal/OUTSRC/odm_PathDiv.o\
hal/OUTSRC/odm_DynamicBBPowerSaving.o\
hal/OUTSRC/odm_DynamicTxPower.o\
hal/OUTSRC/odm_CfoTracking.o\
hal/OUTSRC/odm_NoiseMonitor.o
hal/OUTSRC/phydm_EdcaTurboCheck.o\
hal/OUTSRC/phydm_DIG.o\
hal/OUTSRC/phydm_PathDiv.o\
hal/OUTSRC/phydm_RaInfo.o\
hal/OUTSRC/phydm_DynamicBBPowerSaving.o\
hal/OUTSRC/phydm_PowerTracking.o\
hal/OUTSRC/phydm_DynamicTxPower.o\
hal/OUTSRC/PhyDM_Adaptivity.o\
hal/OUTSRC/phydm_CfoTracking.o\
hal/OUTSRC/phydm_NoiseMonitor.o\
hal/OUTSRC/phydm_ACS.o
EXTRA_CFLAGS += -I$(src)/platform
_PLATFORM_FILES := platform/platform_ops.o
@ -192,10 +207,11 @@ _OUTSRC_FILES += hal/OUTSRC-BTCoexist/HalBtc8188c2Ant.o \
hal/OUTSRC-BTCoexist/HalBtc8812a1Ant.o \
hal/OUTSRC-BTCoexist/HalBtc8812a2Ant.o \
hal/OUTSRC-BTCoexist/HalBtc8821a1Ant.o \
hal/OUTSRC-BTCoexist/HalBtc8821a2Ant.o
hal/OUTSRC-BTCoexist/HalBtc8821a2Ant.o \
hal/OUTSRC-BTCoexist/HalBtc8821aCsr2Ant.o
endif
########### HAL_RTL8192C #################################
########### HAL_RTL8192C #################################
ifeq ($(CONFIG_RTL8192C), y)
RTL871X = rtl8192c
@ -220,7 +236,7 @@ _HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \
hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \
hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_led.o \
hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_xmit.o \
hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o
hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o
_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o
@ -229,7 +245,7 @@ ifeq ($(CONFIG_MP_INCLUDED), y)
_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_mp.o
endif
_OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/odm_RTL8192C.o\
_OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/phydm_RTL8192C.o\
hal/OUTSRC/$(RTL871X)/HalDMOutSrc8192C_CE.o
ifeq ($(CONFIG_USB_HCI), y)
@ -277,10 +293,10 @@ ifeq ($(CONFIG_MP_INCLUDED), y)
_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_mp.o
endif
_OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/odm_RTL8192D.o\
_OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/phydm_RTL8192D.o\
hal/OUTSRC/$(RTL871X)/HalDMOutSrc8192D_CE.o
ifeq ($(CONFIG_USB_HCI), y)
_OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/Hal8192DUFWImg_CE.o \
hal/OUTSRC/$(RTL871X)/Hal8192DUPHYImg_CE.o \
@ -317,7 +333,7 @@ _HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \
hal/$(RTL871X)/Hal8723PwrSeq.o\
hal/$(RTL871X)/$(RTL871X)_xmit.o \
hal/$(RTL871X)/$(RTL871X)_sreset.o
_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \
hal/$(RTL871X)/$(RTL871X)_phycfg.o \
hal/$(RTL871X)/$(RTL871X)_rf6052.o \
@ -328,7 +344,7 @@ _HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \
hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_led.o \
hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_xmit.o \
hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o
ifeq ($(CONFIG_SDIO_HCI), y)
_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o
else
@ -363,7 +379,7 @@ endif
_OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/HalHWImg8723A_BB.o\
hal/OUTSRC/$(RTL871X)/HalHWImg8723A_MAC.o\
hal/OUTSRC/$(RTL871X)/HalHWImg8723A_RF.o\
hal/OUTSRC/$(RTL871X)/odm_RegConfig8723A.o
hal/OUTSRC/$(RTL871X)/phydm_RegConfig8723A.o
_OUTSRC_FILES += hal/OUTSRC/rtl8192c/HalDMOutSrc8192C_CE.o
@ -379,6 +395,10 @@ ifeq ($(CONFIG_SDIO_HCI), y)
MODULE_NAME = 8189es
endif
ifeq ($(CONFIG_GSPI_HCI), y)
MODULE_NAME = 8189es
endif
ifeq ($(CONFIG_USB_HCI), y)
MODULE_NAME = 8188eu
endif
@ -416,7 +436,7 @@ endif
ifeq ($(CONFIG_MP_INCLUDED), y)
_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_mp.o
endif
endif
#hal/OUTSRC/$(RTL871X)/Hal8188EFWImg_CE.o
_OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/HalHWImg8188E_MAC.o\
@ -424,9 +444,9 @@ _OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/HalHWImg8188E_MAC.o\
hal/OUTSRC/$(RTL871X)/HalHWImg8188E_RF.o\
hal/OUTSRC/$(RTL871X)/HalHWImg8188E_FW.o\
hal/OUTSRC/$(RTL871X)/HalPhyRf_8188e.o\
hal/OUTSRC/$(RTL871X)/odm_RegConfig8188E.o\
hal/OUTSRC/$(RTL871X)/phydm_RegConfig8188E.o\
hal/OUTSRC/$(RTL871X)/Hal8188ERateAdaptive.o\
hal/OUTSRC/$(RTL871X)/odm_RTL8188E.o
hal/OUTSRC/$(RTL871X)/phydm_RTL8188E.o
endif
@ -482,8 +502,8 @@ _OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/HalHWImg8192E_MAC.o\
hal/OUTSRC/$(RTL871X)/HalHWImg8192E_RF.o\
hal/OUTSRC/$(RTL871X)/HalHWImg8192E_FW.o\
hal/OUTSRC/$(RTL871X)/HalPhyRf_8192e.o\
hal/OUTSRC/$(RTL871X)/odm_RegConfig8192E.o\
hal/OUTSRC/$(RTL871X)/odm_RTL8192E.o
hal/OUTSRC/$(RTL871X)/phydm_RegConfig8192E.o\
hal/OUTSRC/$(RTL871X)/phydm_RTL8192E.o
endif
@ -540,8 +560,8 @@ _OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/HalHWImg8812A_FW.o\
hal/OUTSRC/$(RTL871X)/HalHWImg8812A_BB.o\
hal/OUTSRC/$(RTL871X)/HalHWImg8812A_RF.o\
hal/OUTSRC/$(RTL871X)/HalPhyRf_8812A.o\
hal/OUTSRC/$(RTL871X)/odm_RegConfig8812A.o\
hal/OUTSRC/$(RTL871X)/odm_RTL8812A.o
hal/OUTSRC/$(RTL871X)/phydm_RegConfig8812A.o\
hal/OUTSRC/$(RTL871X)/phydm_RTL8812A.o
endif
ifeq ($(CONFIG_RTL8821A), y)
@ -568,9 +588,10 @@ _OUTSRC_FILES += hal/OUTSRC/rtl8821a/HalHWImg8821A_FW.o\
hal/OUTSRC/rtl8821a/HalHWImg8821A_RF.o\
hal/OUTSRC/rtl8812a/HalPhyRf_8812A.o\
hal/OUTSRC/rtl8821a/HalPhyRf_8821A.o\
hal/OUTSRC/rtl8821a/odm_RegConfig8821A.o\
hal/OUTSRC/rtl8821a/odm_RTL8821A.o
endif
hal/OUTSRC/rtl8821a/phydm_RegConfig8821A.o\
hal/OUTSRC/rtl8821a/phydm_RTL8821A.o\
hal/OUTSRC/rtl8821a/PhyDM_IQK_8821A.o
endif
endif
@ -601,7 +622,7 @@ _HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \
hal/$(RTL871X)/$(RTL871X)_dm.o \
hal/$(RTL871X)/$(RTL871X)_rxdesc.o \
hal/$(RTL871X)/$(RTL871X)_cmd.o \
_HAL_INTFS_FILES += \
hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \
@ -624,20 +645,20 @@ _OUTSRC_FILES += hal/OUTSRC/$(RTL871X)/HalHWImg8723B_BB.o\
hal/OUTSRC/$(RTL871X)/HalHWImg8723B_RF.o\
hal/OUTSRC/$(RTL871X)/HalHWImg8723B_FW.o\
hal/OUTSRC/$(RTL871X)/HalHWImg8723B_MP.o\
hal/OUTSRC/$(RTL871X)/odm_RegConfig8723B.o\
hal/OUTSRC/$(RTL871X)/phydm_RegConfig8723B.o\
hal/OUTSRC/$(RTL871X)/HalPhyRf_8723B.o\
hal/OUTSRC/$(RTL871X)/odm_RTL8723B.o
hal/OUTSRC/$(RTL871X)/phydm_RTL8723B.o
endif
########### AUTO_CFG #################################
########### AUTO_CFG #################################
ifeq ($(CONFIG_AUTOCFG_CP), y)
ifeq ($(CONFIG_MULTIDRV), y)
ifeq ($(CONFIG_MULTIDRV), y)
$(shell cp $(TopDIR)/autoconf_multidrv_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h)
else
ifeq ($(CONFIG_RTL8188E)$(CONFIG_SDIO_HCI),yy)
ifeq ($(CONFIG_RTL8188E)$(CONFIG_SDIO_HCI),yy)
$(shell cp $(TopDIR)/autoconf_rtl8189e_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h)
else
$(shell cp $(TopDIR)/autoconf_$(RTL871X)_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h)
@ -693,6 +714,8 @@ ifeq ($(CONFIG_EFUSE_CONFIG_FILE), y)
EXTRA_CFLAGS += -DCONFIG_EFUSE_CONFIG_FILE
ifeq ($(MODULE_NAME), 8189es)
EXTRA_CFLAGS += -DEFUSE_MAP_PATH=\"/system/etc/wifi/wifi_efuse_8189e.map\"
else ifeq ($(MODULE_NAME), 8723bs)
EXTRA_CFLAGS += -DEFUSE_MAP_PATH=\"/system/etc/wifi/wifi_efuse_8723bs.map\"
else
EXTRA_CFLAGS += -DEFUSE_MAP_PATH=\"/system/etc/wifi/wifi_efuse_$(MODULE_NAME).map\"
endif
@ -709,6 +732,8 @@ endif
ifeq ($(CONFIG_LOAD_PHY_PARA_FROM_FILE), y)
EXTRA_CFLAGS += -DCONFIG_LOAD_PHY_PARA_FROM_FILE
#EXTRA_CFLAGS += -DREALTEK_CONFIG_PATH=\"/lib/firmware/\"
EXTRA_CFLAGS += -DREALTEK_CONFIG_PATH=\"\"
endif
ifeq ($(CONFIG_CALIBRATE_TX_POWER_BY_REGULATORY), y)
@ -719,14 +744,26 @@ ifeq ($(CONFIG_CALIBRATE_TX_POWER_TO_MAX), y)
EXTRA_CFLAGS += -DCONFIG_CALIBRATE_TX_POWER_TO_MAX
endif
ifeq ($(CONFIG_ODM_ADAPTIVITY), y)
EXTRA_CFLAGS += -DCONFIG_ODM_ADAPTIVITY
ifeq ($(CONFIG_RTW_ADAPTIVITY_EN), disable)
EXTRA_CFLAGS += -DCONFIG_RTW_ADAPTIVITY_EN=0
else ifeq ($(CONFIG_RTW_ADAPTIVITY_EN), enable)
EXTRA_CFLAGS += -DCONFIG_RTW_ADAPTIVITY_EN=1
endif
ifeq ($(CONFIG_RTW_ADAPTIVITY_MODE), normal)
EXTRA_CFLAGS += -DCONFIG_RTW_ADAPTIVITY_MODE=0
else ifeq ($(CONFIG_RTW_ADAPTIVITY_MODE), carrier_sense)
EXTRA_CFLAGS += -DCONFIG_RTW_ADAPTIVITY_MODE=1
endif
ifeq ($(CONFIG_SKIP_SIGNAL_SCALE_MAPPING), y)
EXTRA_CFLAGS += -DCONFIG_SKIP_SIGNAL_SCALE_MAPPING
endif
ifeq ($(CONFIG_80211W), y)
EXTRA_CFLAGS += -DCONFIG_IEEE80211W
endif
ifeq ($(CONFIG_WOWLAN), y)
EXTRA_CFLAGS += -DCONFIG_WOWLAN
ifeq ($(CONFIG_SDIO_HCI), y)
@ -752,14 +789,36 @@ ifeq ($(CONFIG_GPIO_WAKEUP), y)
EXTRA_CFLAGS += -DCONFIG_GPIO_WAKEUP
endif
ifneq ($(CONFIG_WAKEUP_GPIO_IDX), default)
EXTRA_CFLAGS += -DWAKEUP_GPIO_IDX=$(CONFIG_WAKEUP_GPIO_IDX)
endif
ifeq ($(CONFIG_RTW_SDIO_PM_KEEP_POWER), y)
ifeq ($(CONFIG_SDIO_HCI), y)
EXTRA_CFLAGS += -DCONFIG_RTW_SDIO_PM_KEEP_POWER
endif
endif
ifeq ($(CONFIG_REDUCE_TX_CPU_LOADING), y)
EXTRA_CFLAGS += -DCONFIG_REDUCE_TX_CPU_LOADING
endif
ifeq ($(CONFIG_BR_EXT), y)
BR_NAME = br0
EXTRA_CFLAGS += -DCONFIG_BR_EXT
EXTRA_CFLAGS += '-DCONFIG_BR_EXT_BRNAME="'$(BR_NAME)'"'
endif
ifeq ($(CONFIG_ANTENNA_DIVERSITY), y)
EXTRA_CFLAGS += -DCONFIG_ANTENNA_DIVERSITY
endif
ifeq ($(CONFIG_PLATFORM_I386_PC), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT
EXTRA_CFLAGS += -DCONFIG_P2P_IPS
SUBARCH := $(shell uname -m | sed -e s/i.86/i386/)
ARCH ?= $(SUBARCH)
CROSS_COMPILE ?=
@ -813,6 +872,19 @@ KSRC := /media/DATA-2/android-x86/ics-x86_20120130/out/target/product/generic_x8
MODULE_NAME :=wlan
endif
ifeq ($(CONFIG_PLATFORM_ANDROID_INTEL_X86), y)
EXTRA_CFLAGS += -DCONFIG_PLATFORM_ANDROID_INTEL_X86
EXTRA_CFLAGS += -DCONFIG_PLATFORM_INTEL_BYT
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ANDROID
EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT
EXTRA_CFLAGS += -DCONFIG_P2P_IPS
EXTRA_CFLAGS += -DCONFIG_SKIP_SIGNAL_SCALE_MAPPING
ifeq ($(CONFIG_SDIO_HCI), y)
EXTRA_CFLAGS += -DCONFIG_RESUME_IN_WORKQUEUE
endif
endif
ifeq ($(CONFIG_PLATFORM_JB_X86), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
@ -925,7 +997,7 @@ KSRC ?= /lib/modules/2.6.31-770-g0e46b52/source
endif
ifeq ($(CONFIG_PLATFORM_FS_MX61), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
ARCH := arm
CROSS_COMPILE := /home/share/CusEnv/FreeScale/arm-eabi-4.4.3/bin/arm-eabi-
KSRC ?= /home/share/CusEnv/FreeScale/FS_kernel_env
@ -944,10 +1016,23 @@ endif
ifeq ($(CONFIG_PLATFORM_TI_DM365), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_TI_DM365
EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_RX
EXTRA_CFLAGS += -DCONFIG_SINGLE_XMIT_BUF -DCONFIG_SINGLE_RECV_BUF
ARCH := arm
CROSS_COMPILE := /home/cnsd4/Appro/mv_pro_5.0/montavista/pro/devkit/arm/v5t_le/bin/arm_v5t_le-
#CROSS_COMPILE := /home/cnsd4/Appro/mv_pro_5.0/montavista/pro/devkit/arm/v5t_le/bin/arm_v5t_le-
#KSRC := /home/cnsd4/Appro/mv_pro_5.0/montavista/pro/devkit/lsp/ti-davinci/linux-dm365
CROSS_COMPILE := /opt/montavista/pro5.0/devkit/arm/v5t_le/bin/arm-linux-
KSRC:= /home/vivotek/lsp/DM365/kernel_platform/kernel/linux-2.6.18
KERNELOUTPUT := ${PRODUCTDIR}/tmp
KVER := 2.6.18
KSRC := /home/cnsd4/Appro/mv_pro_5.0/montavista/pro/devkit/lsp/ti-davinci/linux-dm365
endif
ifeq ($(CONFIG_PLATFORM_MOZART), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MOZART
ARCH := arm
CROSS_COMPILE := /home/vivotek/lsp/mozart3v2/Mozart3e_Toolchain/build_arm_nofpu/usr/bin/arm-linux-
KVER := $(shell uname -r)
KSRC:= /opt/Vivotek/lsp/mozart3v2/kernel_platform/kernel/mozart_kernel-1.17
KERNELOUTPUT := /home/pink/sample/ODM/IP8136W-VINT/tmp/kernel
endif
ifeq ($(CONFIG_PLATFORM_TEGRA3_CARDHU), y)
@ -1023,12 +1108,13 @@ EXTRA_CFLAGS += -DRTW_SUPPORT_PLATFORM_SHUTDOWN
# default setting for Special function
EXTRA_CFLAGS += -DCONFIG_P2P_IPS
ARCH := arm
CROSS_COMPILE := /home/android_sdk/Rockchip/Rk3188/prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/bin/arm-eabi-
KSRC := /home/android_sdk/Rockchip/Rk3188/kernel
CROSS_COMPILE := /home/xxh/work/rk3288_lollipop_develop/prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/bin/arm-eabi-
KSRC := /home/xxh/work/rk3288_lollipop_develop/kernel
MODULE_NAME := 8723bs
endif
ifeq ($(CONFIG_PLATFORM_ARM_RK3066), y)
EXTRA_CFLAGS += -DCONFIG_PLATFORM_ARM_RK3066
EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
@ -1073,7 +1159,7 @@ endif
ifeq ($(CONFIG_PLATFORM_SZEBOOK), y)
EXTRA_CFLAGS += -DCONFIG_BIG_ENDIAN
ARCH:=arm
CROSS_COMPILE:=/opt/crosstool2/bin/armeb-unknown-linux-gnueabi-
CROSS_COMPILE:=/opt/crosstool2/bin/armeb-unknown-linux-gnueabi-
KVER:= 2.6.31.6
KSRC:= ../code/linux-2.6.31.6-2020/
endif
@ -1207,6 +1293,7 @@ endif
ifeq ($(CONFIG_PLATFORM_ACTIONS_ATV5201), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ACTIONS_ATV5201
EXTRA_CFLAGS += -DCONFIG_SDIO_DISABLE_RXFIFO_POLLING_LOOP
ARCH := mips
CROSS_COMPILE := mipsel-linux-gnu-
KVER := $(KERNEL_VER)
@ -1266,7 +1353,39 @@ KSRC := /home/android_sdk/WonderMedia/wm8880-android4.4/kernel4.4/
MODULE_NAME :=8189es_kk
endif
ifeq ($(CONFIG_MULTIDRV), y)
ifeq ($(CONFIG_PLATFORM_RTK119X), y)
EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN
#EXTRA_CFLAGS += -DCONFIG_PLATFORM_ARM_SUN7I
EXTRA_CFLAGS += -DCONFIG_TRAFFIC_PROTECT
# default setting for Android 4.1, 4.2
EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT
#EXTRA_CFLAGS += -DCONFIG_P2P_IPS -DCONFIG_QOS_OPTIMIZATION
EXTRA_CFLAGS += -DCONFIG_QOS_OPTIMIZATION
#EXTRA_CFLAGS += -DCONFIG_#PLATFORM_OPS
ifeq ($(CONFIG_USB_HCI), y)
EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX
#_PLATFORM_FILES += platform/platform_ARM_SUNxI_usb.o
endif
ifeq ($(CONFIG_SDIO_HCI), y)
_PLATFORM_FILES += platform/platform_ARM_SUNnI_sdio.o
endif
ARCH := arm
# ==== Cross compile setting for Android 4.4 SDK =====
#CROSS_COMPILE := arm-linux-gnueabihf-
KVER := 3.10.24
#KSRC :=/home/android_sdk/Allwinner/a20/android-kitkat44/lichee/linux-3.4
CROSS_COMPILE := /home/realtek/software_phoenix/phoenix/toolchain/usr/local/arm-2013.11/bin/arm-linux-gnueabihf-
KSRC := /home/realtek/software_phoenix/linux-kernel
MODULE_NAME := 8192eu
endif
ifeq ($(CONFIG_MULTIDRV), y)
ifeq ($(CONFIG_SDIO_HCI), y)
MODULE_NAME := rtw_sdio
@ -1283,6 +1402,7 @@ endif
endif
USER_MODULE_NAME ?=
ifneq ($(USER_MODULE_NAME),)
MODULE_NAME := $(USER_MODULE_NAME)
endif
@ -1322,7 +1442,7 @@ $(MODULE_NAME)-$(CONFIG_INTEL_WIDI) += core/rtw_intel_widi.o
$(MODULE_NAME)-$(CONFIG_WAPI_SUPPORT) += core/rtw_wapi.o \
core/rtw_wapi_sms4.o
$(MODULE_NAME)-y += $(_OS_INTFS_FILES)
$(MODULE_NAME)-y += $(_HAL_INTFS_FILES)
$(MODULE_NAME)-y += $(_OUTSRC_FILES)
@ -1372,7 +1492,7 @@ config_r:
clean:
cd hal/OUTSRC/ ; rm -fr */*.mod.c */*.mod */*.o */.*.cmd */*.ko
cd hal/OUTSRC/ ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko
cd hal/OUTSRC/ ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko
cd hal/led ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko
cd hal ; rm -fr */*/*.mod.c */*/*.mod */*/*.o */*/.*.cmd */*/*.ko
cd hal ; rm -fr */*.mod.c */*.mod */*.o */.*.cmd */*.ko

0
drivers/net/wireless/rockchip_wlan/rtl8723bs/Module.symvers Normal file
View File

75
drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_ap.c
View File

@ -71,9 +71,9 @@ void free_mlme_ap_info(_adapter *padapter)
//free bc/mc sta_info
psta = rtw_get_bcmc_stainfo(padapter);
_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
//_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
rtw_free_stainfo(padapter, psta);
_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
//_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
_rtw_spinlock_free(&pmlmepriv->bcn_update_lock);
@ -405,9 +405,9 @@ void expire_timeout_chk(_adapter *padapter)
_exit_critical_bh(&pstapriv->auth_list_lock, &irqL);
_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
//_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
rtw_free_stainfo(padapter, psta);
_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
//_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
_enter_critical_bh(&pstapriv->auth_list_lock, &irqL);
}
@ -877,8 +877,6 @@ void update_bmc_sta(_adapter *padapter)
if(psta)
{
psta->aid = 0;//default set to 0
//psta->mac_id = psta->aid+4;
psta->mac_id = psta->aid + 1;//mac_id=1 for bc/mc stainfo
pmlmeinfo->FW_sta_info[psta->mac_id].psta = psta;
@ -1031,7 +1029,7 @@ void update_sta_info_apmode(_adapter *padapter, struct sta_info *psta)
// B0 Config LDPC Coding Capability
if (TEST_FLAG(phtpriv_ap->ldpc_cap, LDPC_HT_ENABLE_TX) &&
GET_HT_CAPABILITY_ELE_LDPC_CAP((u8 *)(&phtpriv_sta->ht_cap)))
GET_HT_CAP_ELE_LDPC_CAP((u8 *)(&phtpriv_sta->ht_cap)))
{
SET_FLAG(cur_ldpc_cap, (LDPC_HT_ENABLE_TX | LDPC_HT_CAP_TX));
DBG_871X("Enable HT Tx LDPC for STA(%d)\n",psta->aid);
@ -1039,7 +1037,7 @@ void update_sta_info_apmode(_adapter *padapter, struct sta_info *psta)
// B7 B8 B9 Config STBC setting
if (TEST_FLAG(phtpriv_ap->stbc_cap, STBC_HT_ENABLE_TX) &&
GET_HT_CAPABILITY_ELE_RX_STBC((u8 *)(&phtpriv_sta->ht_cap)))
GET_HT_CAP_ELE_RX_STBC((u8 *)(&phtpriv_sta->ht_cap)))
{
SET_FLAG(cur_stbc_cap, (STBC_HT_ENABLE_TX | STBC_HT_CAP_TX) );
DBG_871X("Enable HT Tx STBC for STA(%d)\n",psta->aid);
@ -1733,9 +1731,14 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len)
if(p && ie_len>0)
{
u8 rf_type=0;
u8 max_rx_ampdu_factor=0;
HT_CAP_AMPDU_FACTOR max_rx_ampdu_factor=MAX_AMPDU_FACTOR_64K;
struct rtw_ieee80211_ht_cap *pht_cap = (struct rtw_ieee80211_ht_cap *)(p+2);
if (0) {
DBG_871X(FUNC_ADPT_FMT" HT_CAP_IE from upper layer:\n", FUNC_ADPT_ARG(padapter));
dump_ht_cap_ie_content(RTW_DBGDUMP, p+2, ie_len);
}
pHT_caps_ie=p;
ht_cap = _TRUE;
@ -1743,6 +1746,7 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len)
rtw_ht_use_default_setting(padapter);
/* Update HT Capabilities Info field */
if (pmlmepriv->htpriv.sgi_20m == _FALSE)
pht_cap->cap_info &= ~(IEEE80211_HT_CAP_SGI_20);
@ -1764,8 +1768,9 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len)
pht_cap->cap_info &= ~(IEEE80211_HT_CAP_RX_STBC_3R);
}
/* Update A-MPDU Parameters field */
pht_cap->ampdu_params_info &= ~(IEEE80211_HT_CAP_AMPDU_FACTOR|IEEE80211_HT_CAP_AMPDU_DENSITY);
if((psecuritypriv->wpa_pairwise_cipher & WPA_CIPHER_CCMP) ||
(psecuritypriv->wpa2_pairwise_cipher & WPA_CIPHER_CCMP))
{
@ -1779,11 +1784,25 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len)
rtw_hal_get_def_var(padapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor);
pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_FACTOR & max_rx_ampdu_factor); //set Max Rx AMPDU size to 64K
rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
if(rf_type == RF_1T1R)
{
pht_cap->supp_mcs_set[0] = 0xff;
pht_cap->supp_mcs_set[1] = 0x0;
/* Update Supported MCS Set field */
{
int i;
rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
/* RX MCS Bitmask */
switch(rf_type)
{
case RF_1T1R:
case RF_1T2R: //?
set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_1R);
break;
case RF_2T2R:
default:
set_mcs_rate_by_mask(HT_CAP_ELE_RX_MCS_MAP(pht_cap), MCS_RATE_2R);
}
for (i = 0; i < 10; i++)
*(HT_CAP_ELE_RX_MCS_MAP(pht_cap)+i) &= padapter->mlmeextpriv.default_supported_mcs_set[i];
}
#ifdef CONFIG_BEAMFORMING
@ -1813,7 +1832,11 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len)
#endif //CONFIG_BEAMFORMING
_rtw_memcpy(&pmlmepriv->htpriv.ht_cap, p+2, ie_len);
if (0) {
DBG_871X(FUNC_ADPT_FMT" HT_CAP_IE driver masked:\n", FUNC_ADPT_ARG(padapter));
dump_ht_cap_ie_content(RTW_DBGDUMP, p+2, ie_len);
}
}
//parsing HT_INFO_IE
@ -2376,7 +2399,7 @@ static void update_bcn_vendor_spec_ie(_adapter *padapter, u8*oui)
}
void update_beacon(_adapter *padapter, u8 ie_id, u8 *oui, u8 tx)
void _update_beacon(_adapter *padapter, u8 ie_id, u8 *oui, u8 tx, const char *tag)
{
_irqL irqL;
struct mlme_priv *pmlmepriv;
@ -2454,6 +2477,8 @@ void update_beacon(_adapter *padapter, u8 ie_id, u8 *oui, u8 tx)
if(tx)
{
//send_beacon(padapter);//send_beacon must execute on TSR level
if (0)
DBG_871X(FUNC_ADPT_FMT" ie_id:%u - %s\n", FUNC_ADPT_ARG(padapter), ie_id, tag);
set_tx_beacon_cmd(padapter);
}
#else
@ -2929,9 +2954,9 @@ u8 ap_free_sta(_adapter *padapter, struct sta_info *psta, bool active, u16 reaso
beacon_updated = bss_cap_update_on_sta_leave(padapter, psta);
_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
//_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
rtw_free_stainfo(padapter, psta);
_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
//_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
return beacon_updated;
@ -2986,12 +3011,10 @@ int rtw_sta_flush(_adapter *padapter)
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff};
DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(padapter->pnetdev));
if((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE)
return ret;
DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(padapter->pnetdev));
_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL);
phead = &pstapriv->asoc_list;
plist = get_next(phead);
@ -3192,13 +3215,14 @@ void start_ap_mode(_adapter *padapter)
for(i=0; i<NUM_STA; i++)
pstapriv->sta_aid[i] = NULL;
/* to avoid memory leak issue, don't set to NULL directly
pmlmepriv->wps_beacon_ie = NULL;
pmlmepriv->wps_probe_resp_ie = NULL;
pmlmepriv->wps_assoc_resp_ie = NULL;
pmlmepriv->p2p_beacon_ie = NULL;
pmlmepriv->p2p_probe_resp_ie = NULL;
*/
//for ACL
_rtw_init_listhead(&(pacl_list->acl_node_q.queue));
@ -3226,6 +3250,7 @@ void stop_ap_mode(_adapter *padapter)
pmlmepriv->update_bcn = _FALSE;
pmlmeext->bstart_bss = _FALSE;
padapter->netif_up = _FALSE;
//_rtw_spinlock_free(&pmlmepriv->bcn_update_lock);
//reset and init security priv , this can refine with rtw_reset_securitypriv
@ -3261,9 +3286,9 @@ void stop_ap_mode(_adapter *padapter)
rtw_free_all_stainfo(padapter);
psta = rtw_get_bcmc_stainfo(padapter);
_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
//_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
rtw_free_stainfo(padapter, psta);
_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
//_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
rtw_init_bcmc_stainfo(padapter);

4
drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_beamforming.c
View File

@ -330,7 +330,7 @@ BOOLEAN issue_ht_ndpa_packet(PADAPTER Adapter, u8 *ra, CHANNEL_WIDTH bw, u8 qidx
update_mgntframe_attrib(Adapter, pattrib);
if (qidx == BCN_QUEUE_INX)
pattrib->qsel = 0x10;
pattrib->qsel = QSLT_BEACON;
pattrib->rate = MGN_MCS8;
pattrib->bwmode = bw;
pattrib->order = 1;
@ -412,7 +412,7 @@ BOOLEAN issue_vht_ndpa_packet(PADAPTER Adapter, u8 *ra, u16 aid, CHANNEL_WIDTH b
update_mgntframe_attrib(Adapter, pattrib);
if (qidx == BCN_QUEUE_INX)
pattrib->qsel = 0x10;
pattrib->qsel = QSLT_BEACON;
pattrib->rate = MGN_VHT2SS_MCS0;
pattrib->bwmode = bw;
pattrib->subtype = WIFI_NDPA;

77
drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_br_ext.c
View File

@ -247,7 +247,7 @@ static int update_nd_link_layer_addr(unsigned char *data, int len, unsigned char
if (len >= 8) {
mac = scan_tlv(&data[8], len-8, 1, 1);
if (mac) {
_DEBUG_INFO("Router Solicitation, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
DBG_871X("Router Solicitation, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0],mac[1],mac[2],mac[3],mac[4],mac[5],
replace_mac[0],replace_mac[1],replace_mac[2],replace_mac[3],replace_mac[4],replace_mac[5]);
memcpy(mac, replace_mac, 6);
@ -259,7 +259,7 @@ static int update_nd_link_layer_addr(unsigned char *data, int len, unsigned char
if (len >= 16) {
mac = scan_tlv(&data[16], len-16, 1, 1);
if (mac) {
_DEBUG_INFO("Router Advertisement, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
DBG_871X("Router Advertisement, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0],mac[1],mac[2],mac[3],mac[4],mac[5],
replace_mac[0],replace_mac[1],replace_mac[2],replace_mac[3],replace_mac[4],replace_mac[5]);
memcpy(mac, replace_mac, 6);
@ -271,7 +271,7 @@ static int update_nd_link_layer_addr(unsigned char *data, int len, unsigned char
if (len >= 24) {
mac = scan_tlv(&data[24], len-24, 1, 1);
if (mac) {
_DEBUG_INFO("Neighbor Solicitation, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
DBG_871X("Neighbor Solicitation, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0],mac[1],mac[2],mac[3],mac[4],mac[5],
replace_mac[0],replace_mac[1],replace_mac[2],replace_mac[3],replace_mac[4],replace_mac[5]);
memcpy(mac, replace_mac, 6);
@ -283,7 +283,7 @@ static int update_nd_link_layer_addr(unsigned char *data, int len, unsigned char
if (len >= 24) {
mac = scan_tlv(&data[24], len-24, 2, 1);
if (mac) {
_DEBUG_INFO("Neighbor Advertisement, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
DBG_871X("Neighbor Advertisement, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0],mac[1],mac[2],mac[3],mac[4],mac[5],
replace_mac[0],replace_mac[1],replace_mac[2],replace_mac[3],replace_mac[4],replace_mac[5]);
memcpy(mac, replace_mac, 6);
@ -295,7 +295,7 @@ static int update_nd_link_layer_addr(unsigned char *data, int len, unsigned char
if (len >= 40) {
mac = scan_tlv(&data[40], len-40, 2, 1);
if (mac) {
_DEBUG_INFO("Redirect, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
DBG_871X("Redirect, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0],mac[1],mac[2],mac[3],mac[4],mac[5],
replace_mac[0],replace_mac[1],replace_mac[2],replace_mac[3],replace_mac[4],replace_mac[5]);
memcpy(mac, replace_mac, 6);
@ -439,7 +439,7 @@ static int __nat25_db_network_lookup_and_replace(_adapter *priv,
atomic_inc(&db->use_count);
#ifdef CL_IPV6_PASS
DEBUG_INFO("NAT25: Lookup M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x"
DBG_871X("NAT25: Lookup M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x"
"%02x%02x%02x%02x%02x%02x\n",
db->macAddr[0],
db->macAddr[1],
@ -465,7 +465,7 @@ static int __nat25_db_network_lookup_and_replace(_adapter *priv,
db->networkAddr[15],
db->networkAddr[16]);
#else
DEBUG_INFO("NAT25: Lookup M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
DBG_871X("NAT25: Lookup M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
db->macAddr[0],
db->macAddr[1],
db->macAddr[2],
@ -815,7 +815,7 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
//in class A, B, C, host address is all zero or all one is illegal
if (iph->saddr == 0)
return 0;
DEBUG_INFO("NAT25: Insert IP, SA=%08x, DA=%08x\n", iph->saddr, iph->daddr);
DBG_871X("NAT25: Insert IP, SA=%08x, DA=%08x\n", iph->saddr, iph->daddr);
__nat25_generate_ipv4_network_addr(networkAddr, &iph->saddr);
//record source IP address and , source mac address into db
__nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr);
@ -826,7 +826,7 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
case NAT25_LOOKUP:
{
DEBUG_INFO("NAT25: Lookup IP, SA=%08x, DA=%08x\n", iph->saddr, iph->daddr);
DBG_871X("NAT25: Lookup IP, SA=%08x, DA=%08x\n", iph->saddr, iph->daddr);
#ifdef SUPPORT_TX_MCAST2UNI
if (priv->pshare->rf_ft_var.mc2u_disable ||
((((OPMODE & (WIFI_STATION_STATE|WIFI_ASOC_STATE))
@ -840,12 +840,12 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
if (!__nat25_db_network_lookup_and_replace(priv, skb, networkAddr)) {
if (*((unsigned char *)&iph->daddr + 3) == 0xff) {
// L2 is unicast but L3 is broadcast, make L2 bacome broadcast
DEBUG_INFO("NAT25: Set DA as boardcast\n");
DBG_871X("NAT25: Set DA as boardcast\n");
memset(skb->data, 0xff, ETH_ALEN);
}
else {
// forward unknow IP packet to upper TCP/IP
DEBUG_INFO("NAT25: Replace DA with BR's MAC\n");
DBG_871X("NAT25: Replace DA with BR's MAC\n");
if ( (*(u32 *)priv->br_mac) == 0 && (*(u16 *)(priv->br_mac+4)) == 0 ) {
void netdev_br_init(struct net_device *netdev);
printk("Re-init netdev_br_init() due to br_mac==0!\n");
@ -885,7 +885,7 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
case NAT25_INSERT:
{
DEBUG_INFO("NAT25: Insert ARP, MAC=%02x%02x%02x%02x%02x%02x\n", arp_ptr[0],
DBG_871X("NAT25: Insert ARP, MAC=%02x%02x%02x%02x%02x%02x\n", arp_ptr[0],
arp_ptr[1], arp_ptr[2], arp_ptr[3], arp_ptr[4], arp_ptr[5]);
// change to ARP sender mac address to wlan STA address
@ -904,7 +904,7 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
case NAT25_LOOKUP:
{
DEBUG_INFO("NAT25: Lookup ARP\n");
DBG_871X("NAT25: Lookup ARP\n");
arp_ptr += arp->ar_hln;
sender = (unsigned int *)arp_ptr;
@ -930,8 +930,9 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
/*---------------------------------------------------*/
/* Handle IPX and Apple Talk frame */
/*---------------------------------------------------*/
else if((protocol == __constant_htons(ETH_P_IPX)) ||
(protocol <= __constant_htons(ETH_FRAME_LEN)))
else if((protocol == __constant_htons(ETH_P_IPX)) ||
(protocol == __constant_htons(ETH_P_ATALK)) ||
(protocol == __constant_htons(ETH_P_AARP)))
{
unsigned char ipx_header[2] = {0xFF, 0xFF};
struct ipxhdr *ipx = NULL;
@ -941,14 +942,14 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
if(protocol == __constant_htons(ETH_P_IPX))
{
DEBUG_INFO("NAT25: Protocol=IPX (Ethernet II)\n");
DBG_871X("NAT25: Protocol=IPX (Ethernet II)\n");
ipx = (struct ipxhdr *)framePtr;
}
else if(protocol <= __constant_htons(ETH_FRAME_LEN))
else //if(protocol <= __constant_htons(ETH_FRAME_LEN))
{
if(!memcmp(ipx_header, framePtr, 2))
{
DEBUG_INFO("NAT25: Protocol=IPX (Ethernet 802.3)\n");
DBG_871X("NAT25: Protocol=IPX (Ethernet 802.3)\n");
ipx = (struct ipxhdr *)framePtr;
}
else
@ -968,7 +969,7 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
{
framePtr += 5; // eliminate the SNAP header
DEBUG_INFO("NAT25: Protocol=IPX (Ethernet SNAP)\n");
DBG_871X("NAT25: Protocol=IPX (Ethernet SNAP)\n");
ipx = (struct ipxhdr *)framePtr;
}
else if(!memcmp(aarp_snap_id, framePtr, 5))
@ -996,18 +997,14 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
if(!memcmp(ipx_header, framePtr, 2))
{
DEBUG_INFO("NAT25: Protocol=IPX (Ethernet 802.2)\n");
DBG_871X("NAT25: Protocol=IPX (Ethernet 802.2)\n");
ipx = (struct ipxhdr *)framePtr;
}
else
return -1;
}
else
return -1;
}
}
else
return -1;
/* IPX */
if(ipx != NULL)
@ -1017,14 +1014,14 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
case NAT25_CHECK:
if(!memcmp(skb->data+ETH_ALEN, ipx->ipx_source.node, ETH_ALEN))
{
DEBUG_INFO("NAT25: Check IPX skb_copy\n");
DBG_871X("NAT25: Check IPX skb_copy\n");
return 0;
}
return -1;
case NAT25_INSERT:
{
DEBUG_INFO("NAT25: Insert IPX, Dest=%08x,%02x%02x%02x%02x%02x%02x,%04x Source=%08x,%02x%02x%02x%02x%02x%02x,%04x\n",
DBG_871X("NAT25: Insert IPX, Dest=%08x,%02x%02x%02x%02x%02x%02x,%04x Source=%08x,%02x%02x%02x%02x%02x%02x,%04x\n",
ipx->ipx_dest.net,
ipx->ipx_dest.node[0],
ipx->ipx_dest.node[1],
@ -1044,7 +1041,7 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
if(!memcmp(skb->data+ETH_ALEN, ipx->ipx_source.node, ETH_ALEN))
{
DEBUG_INFO("NAT25: Use IPX Net, and Socket as network addr\n");
DBG_871X("NAT25: Use IPX Net, and Socket as network addr\n");
__nat25_generate_ipx_network_addr_with_socket(networkAddr, &ipx->ipx_source.net, &ipx->ipx_source.sock);
@ -1066,7 +1063,7 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
{
if(!memcmp(GET_MY_HWADDR(priv), ipx->ipx_dest.node, ETH_ALEN))
{
DEBUG_INFO("NAT25: Lookup IPX, Modify Destination IPX Node addr\n");
DBG_871X("NAT25: Lookup IPX, Modify Destination IPX Node addr\n");
__nat25_generate_ipx_network_addr_with_socket(networkAddr, &ipx->ipx_dest.net, &ipx->ipx_dest.sock);
@ -1109,7 +1106,7 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
// change to AARP source mac address to wlan STA address
memcpy(ea->hw_src, GET_MY_HWADDR(priv), ETH_ALEN);
DEBUG_INFO("NAT25: Insert AARP, Source=%d,%d Destination=%d,%d\n",
DBG_871X("NAT25: Insert AARP, Source=%d,%d Destination=%d,%d\n",
ea->pa_src_net,
ea->pa_src_node,
ea->pa_dst_net,
@ -1125,7 +1122,7 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
case NAT25_LOOKUP:
{
DEBUG_INFO("NAT25: Lookup AARP, Source=%d,%d Destination=%d,%d\n",
DBG_871X("NAT25: Lookup AARP, Source=%d,%d Destination=%d,%d\n",
ea->pa_src_net,
ea->pa_src_node,
ea->pa_dst_net,
@ -1155,7 +1152,7 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
case NAT25_INSERT:
{
DEBUG_INFO("NAT25: Insert DDP, Source=%d,%d Destination=%d,%d\n",
DBG_871X("NAT25: Insert DDP, Source=%d,%d Destination=%d,%d\n",
ddp->deh_snet,
ddp->deh_snode,
ddp->deh_dnet,
@ -1171,7 +1168,7 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
case NAT25_LOOKUP:
{
DEBUG_INFO("NAT25: Lookup DDP, Source=%d,%d Destination=%d,%d\n",
DBG_871X("NAT25: Lookup DDP, Source=%d,%d Destination=%d,%d\n",
ddp->deh_snet,
ddp->deh_snode,
ddp->deh_dnet,
@ -1248,7 +1245,7 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
if(__nat25_add_pppoe_tag(skb, tag) < 0)
return -1;
DEBUG_INFO("NAT25: Insert PPPoE, forward %s packet\n",
DBG_871X("NAT25: Insert PPPoE, forward %s packet\n",
(ph->code == PADI_CODE ? "PADI" : "PADR"));
}
else { // not add relay tag
@ -1269,7 +1266,7 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
}
else // session phase
{
DEBUG_INFO("NAT25: Insert PPPoE, insert session packet to %s\n", skb->dev->name);
DBG_871X("NAT25: Insert PPPoE, insert session packet to %s\n", skb->dev->name);
__nat25_generate_pppoe_network_addr(networkAddr, skb->data, &(ph->sid));
@ -1327,7 +1324,7 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
if (offset > 0)
tag->tag_len = htons(tagLen-MAGIC_CODE_LEN-RTL_RELAY_TAG_LEN);
DEBUG_INFO("NAT25: Lookup PPPoE, forward %s Packet from %s\n",
DBG_871X("NAT25: Lookup PPPoE, forward %s Packet from %s\n",
(ph->code == PADO_CODE ? "PADO" : "PADS"), skb->dev->name);
}
else { // not add relay tag
@ -1342,7 +1339,7 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
else {
if(ph->sid != 0)
{
DEBUG_INFO("NAT25: Lookup PPPoE, lookup session packet from %s\n", skb->dev->name);
DBG_871X("NAT25: Lookup PPPoE, lookup session packet from %s\n", skb->dev->name);
__nat25_generate_pppoe_network_addr(networkAddr, skb->data+ETH_ALEN, &(ph->sid));
__nat25_db_network_lookup_and_replace(priv, skb, networkAddr);
@ -1426,7 +1423,7 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
case NAT25_INSERT:
{
DEBUG_INFO("NAT25: Insert IP, SA=%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x,"
DBG_871X("NAT25: Insert IP, SA=%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x,"
" DA=%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x\n",
iph->saddr.s6_addr16[0],iph->saddr.s6_addr16[1],iph->saddr.s6_addr16[2],iph->saddr.s6_addr16[3],
iph->saddr.s6_addr16[4],iph->saddr.s6_addr16[5],iph->saddr.s6_addr16[6],iph->saddr.s6_addr16[7],
@ -1455,7 +1452,7 @@ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method)
return 0;
case NAT25_LOOKUP:
DEBUG_INFO("NAT25: Lookup IP, SA=%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x,"
DBG_871X("NAT25: Lookup IP, SA=%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x,"
" DA=%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x\n",
iph->saddr.s6_addr16[0],iph->saddr.s6_addr16[1],iph->saddr.s6_addr16[2],iph->saddr.s6_addr16[3],
iph->saddr.s6_addr16[4],iph->saddr.s6_addr16[5],iph->saddr.s6_addr16[6],iph->saddr.s6_addr16[7],
@ -1571,7 +1568,7 @@ void mac_clone(_adapter *priv, unsigned char *addr)
struct sockaddr sa;
memcpy(sa.sa_data, addr, ETH_ALEN);
DEBUG_INFO("MAC Clone: Addr=%02x%02x%02x%02x%02x%02x\n",
DBG_871X("MAC Clone: Addr=%02x%02x%02x%02x%02x%02x\n",
addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]);
rtl8192cd_set_hwaddr(priv->dev, &sa);
}
@ -1650,7 +1647,7 @@ void dhcp_flag_bcast(_adapter *priv, struct sk_buff *skb)
{
register int sum = 0;
DEBUG_INFO("DHCP: change flag of DHCP request to broadcast.\n");
DBG_871X("DHCP: change flag of DHCP request to broadcast.\n");
// or BROADCAST flag
dhcph->flags |= htons(BROADCAST_FLAG);
// recalculate checksum

6
drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_bt_mp.c
View File

@ -107,10 +107,6 @@ mptbt_CheckC2hFrame(
return c2hStatus;
}
#if defined(CONFIG_RTL8723A)
extern s32 FillH2CCmd(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer);
#endif
BT_CTRL_STATUS
mptbt_SendH2c(
PADAPTER Adapter,
@ -140,7 +136,7 @@ mptbt_SendH2c(
pMptCtx->MptBtC2hEvent = _FALSE;
#if defined(CONFIG_RTL8723A)
FillH2CCmd(Adapter, 70, h2cCmdLen, (pu1Byte)pH2c);
rtw_hal_fill_h2c_cmd(Adapter, 70, h2cCmdLen, (pu1Byte)pH2c);
#elif defined(CONFIG_RTL8723B)
rtl8723b_set_FwBtMpOper_cmd(Adapter, pH2c->opCode, pH2c->opCodeVer, pH2c->reqNum, pH2c->buf);
#endif

50
drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_btcoex.c
View File

@ -33,6 +33,11 @@ void rtw_btcoex_PowerOnSetting(PADAPTER padapter)
hal_btcoex_PowerOnSetting(padapter);
}
void rtw_btcoex_PreLoadFirmware(PADAPTER padapter)
{
hal_btcoex_PreLoadFirmware(padapter);
}
void rtw_btcoex_HAL_Initialize(PADAPTER padapter, u8 bWifiOnly)
{
hal_btcoex_InitHwConfig(padapter, bWifiOnly);
@ -301,16 +306,53 @@ u8 rtw_btcoex_IsBtLinkExist(PADAPTER padapter)
void rtw_btcoex_RejectApAggregatedPacket(PADAPTER padapter, u8 enable)
{
struct mlme_ext_info *pmlmeinfo;
struct sta_info *psta;
pmlmeinfo = &padapter->mlmeextpriv.mlmext_info;
psta = rtw_get_stainfo(&padapter->stapriv, get_bssid(&padapter->mlmepriv));
if (_TRUE == enable)
{
struct sta_info *psta = NULL;
pmlmeinfo->bAcceptAddbaReq = _FALSE;
if (psta)
send_delba(padapter, 0, psta->hwaddr);
if ((pmlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE) {
psta = rtw_get_stainfo(&padapter->stapriv, get_bssid(&padapter->mlmepriv));
if (psta)
send_delba(padapter, 0, psta->hwaddr);
} else if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) {
_irqL irqL;
_list *phead, *plist;
u8 peer_num = 0;
char peers[NUM_STA];
struct sta_priv *pstapriv = &padapter->stapriv;
int i;
_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL);
phead = &pstapriv->asoc_list;
plist = get_next(phead);
while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) {
int stainfo_offset;
psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list);
plist = get_next(plist);
stainfo_offset = rtw_stainfo_offset(pstapriv, psta);
if (stainfo_offset_valid(stainfo_offset))
peers[peer_num++] = stainfo_offset;
}
_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL);
if (peer_num) {
for (i = 0; i < peer_num; i++) {
psta = rtw_get_stainfo_by_offset(pstapriv, peers[i]);
if (psta)
send_delba(padapter, 0, psta->hwaddr);
}
}
}
}
else
{

220
drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_cmd.c
View File

@ -209,6 +209,9 @@ since only spin_lock is used.
ISR/Call-Back functions can't call this sub-function.
*/
#ifdef DBG_CMD_QUEUE
extern u8 dump_cmd_id;
#endif
sint _rtw_enqueue_cmd(_queue *queue, struct cmd_obj *obj)
{
@ -219,11 +222,52 @@ _func_enter_;
if (obj == NULL)
goto exit;
if(obj->cmdsz > MAX_CMDSZ ){
DBG_871X("%s failed due to obj->cmdsz(%d) > MAX_CMDSZ(%d) \n",__FUNCTION__, obj->cmdsz,MAX_CMDSZ);
goto exit;
}
//_enter_critical_bh(&queue->lock, &irqL);
_enter_critical(&queue->lock, &irqL);
rtw_list_insert_tail(&obj->list, &queue->queue);
#ifdef DBG_CMD_QUEUE
if(dump_cmd_id){
printk("%s===> cmdcode:0x%02x\n",__FUNCTION__,obj->cmdcode);
if(obj->cmdcode == GEN_CMD_CODE(_Set_MLME_EVT)){
if(obj->parmbuf){
struct C2HEvent_Header *pc2h_evt_hdr = (struct C2HEvent_Header *)(obj->parmbuf);
printk("pc2h_evt_hdr->ID:0x%02x(%d)\n",pc2h_evt_hdr->ID,pc2h_evt_hdr->ID);
}
}
if(obj->cmdcode == GEN_CMD_CODE(_Set_Drv_Extra)){
if(obj->parmbuf){
struct drvextra_cmd_parm *pdrvextra_cmd_parm =(struct drvextra_cmd_parm*)(obj->parmbuf);
printk("pdrvextra_cmd_parm->ec_id:0x%02x\n",pdrvextra_cmd_parm->ec_id);
}
}
}
if (queue->queue.prev->next != &queue->queue)
{
DBG_871X("[%d] head %p, tail %p, tail->prev->next %p[tail], tail->next %p[head]\n", __LINE__,
&queue->queue, queue->queue.prev, queue->queue.prev->prev->next, queue->queue.prev->next);
DBG_871X("==========%s============\n",__FUNCTION__);
DBG_871X("head:%p,obj_addr:%p\n",&queue->queue,obj);
DBG_871X("padapter: %p\n",obj->padapter);
DBG_871X("cmdcode: 0x%02x\n",obj->cmdcode);
DBG_871X("res: %d\n",obj->res);
DBG_871X("parmbuf: %p\n",obj->parmbuf);
DBG_871X("cmdsz: %d\n",obj->cmdsz);
DBG_871X("rsp: %p\n",obj->rsp);
DBG_871X("rspsz: %d\n",obj->rspsz);
DBG_871X("sctx: %p\n",obj->sctx);
DBG_871X("list->next: %p\n",obj->list.next);
DBG_871X("list->prev: %p\n",obj->list.prev);
}
#endif //DBG_CMD_QUEUE
//_exit_critical_bh(&queue->lock, &irqL);
_exit_critical(&queue->lock, &irqL);
@ -243,11 +287,51 @@ _func_enter_;
//_enter_critical_bh(&(queue->lock), &irqL);
_enter_critical(&queue->lock, &irqL);
if (rtw_is_list_empty(&(queue->queue)))
#ifdef DBG_CMD_QUEUE
if (queue->queue.prev->next != &queue->queue)
{
DBG_871X("[%d] head %p, tail %p, tail->prev->next %p[tail], tail->next %p[head]\n", __LINE__,
&queue->queue, queue->queue.prev, queue->queue.prev->prev->next, queue->queue.prev->next);
}
#endif //DBG_CMD_QUEUE
if (rtw_is_list_empty(&(queue->queue))){
obj = NULL;
}
else
{
obj = LIST_CONTAINOR(get_next(&(queue->queue)), struct cmd_obj, list);
#ifdef DBG_CMD_QUEUE
if (queue->queue.prev->next != &queue->queue){
DBG_871X("==========%s============\n",__FUNCTION__);
DBG_871X("head:%p,obj_addr:%p\n",&queue->queue,obj);
DBG_871X("padapter: %p\n",obj->padapter);
DBG_871X("cmdcode: 0x%02x\n",obj->cmdcode);
DBG_871X("res: %d\n",obj->res);
DBG_871X("parmbuf: %p\n",obj->parmbuf);
DBG_871X("cmdsz: %d\n",obj->cmdsz);
DBG_871X("rsp: %p\n",obj->rsp);
DBG_871X("rspsz: %d\n",obj->rspsz);
DBG_871X("sctx: %p\n",obj->sctx);
DBG_871X("list->next: %p\n",obj->list.next);
DBG_871X("list->prev: %p\n",obj->list.prev);
}
if(dump_cmd_id){
DBG_871X("%s===> cmdcode:0x%02x\n",__FUNCTION__,obj->cmdcode);
if(obj->cmdcode == GEN_CMD_CODE(_Set_Drv_Extra)){
if(obj->parmbuf){
struct drvextra_cmd_parm *pdrvextra_cmd_parm =(struct drvextra_cmd_parm*)(obj->parmbuf);
printk("pdrvextra_cmd_parm->ec_id:0x%02x\n",pdrvextra_cmd_parm->ec_id);
}
}
}
#endif //DBG_CMD_QUEUE
rtw_list_delete(&obj->list);
}
@ -404,14 +488,16 @@ _func_exit_;
void rtw_free_cmd_obj(struct cmd_obj *pcmd)
{
struct drvextra_cmd_parm *extra_parm = NULL;
_func_enter_;
if((pcmd->cmdcode!=_JoinBss_CMD_) &&(pcmd->cmdcode!= _CreateBss_CMD_))
{
//free parmbuf in cmd_obj
rtw_mfree((unsigned char*)pcmd->parmbuf, pcmd->cmdsz);
}
if(pcmd->parmbuf != NULL){
if((pcmd->cmdcode!=_JoinBss_CMD_) &&(pcmd->cmdcode!= _CreateBss_CMD_))
{
//free parmbuf in cmd_obj
rtw_mfree((unsigned char*)pcmd->parmbuf, pcmd->cmdsz);
}
}
if(pcmd->rsp!=NULL)
{
if(pcmd->rspsz!= 0)
@ -452,7 +538,7 @@ thread_return rtw_cmd_thread(thread_context context)
PADAPTER padapter = (PADAPTER)context;
struct cmd_priv *pcmdpriv = &(padapter->cmdpriv);
struct drvextra_cmd_parm *extra_parm = NULL;
_irqL irqL;
_func_enter_;
thread_enter("RTW_CMD_THREAD");
@ -485,11 +571,14 @@ _func_enter_;
break;
}
_enter_critical(&pcmdpriv->cmd_queue.lock, &irqL);
if(rtw_is_list_empty(&(pcmdpriv->cmd_queue.queue)))
{
//DBG_871X("%s: cmd queue is empty!\n", __func__);
_exit_critical(&pcmdpriv->cmd_queue.lock, &irqL);
continue;
}
_exit_critical(&pcmdpriv->cmd_queue.lock, &irqL);
#ifdef CONFIG_LPS_LCLK
if (rtw_register_cmd_alive(padapter) != _SUCCESS)
@ -520,6 +609,11 @@ _func_enter_;
if( _FAIL == rtw_cmd_filter(pcmdpriv, pcmd) )
{
pcmd->res = H2C_DROPPED;
if (pcmd->cmdcode == GEN_CMD_CODE(_Set_Drv_Extra)) {
extra_parm = (struct drvextra_cmd_parm *)pcmd->parmbuf;
if (extra_parm && extra_parm->pbuf && extra_parm->size > 0)
rtw_mfree(extra_parm->pbuf, extra_parm->size);
}
goto post_process;
}
@ -527,6 +621,10 @@ _func_enter_;
pcmd->cmdsz = _RND4((pcmd->cmdsz));//_RND4
if(pcmd->cmdsz > MAX_CMDSZ ){
DBG_871X("%s cmdsz:%d > MAX_CMDSZ:%d\n",__FUNCTION__,pcmd->cmdsz,MAX_CMDSZ);
}
_rtw_memcpy(pcmdbuf, pcmd->parmbuf, pcmd->cmdsz);
if(pcmd->cmdcode < (sizeof(wlancmds) /sizeof(struct cmd_hdl)))
@ -618,7 +716,6 @@ _func_enter_;
#endif
break;
}
//DBG_871X("%s: leaving... drop cmdcode:%u size:%d\n", __FUNCTION__, pcmd->cmdcode, pcmd->cmdsz);
if (pcmd->cmdcode == GEN_CMD_CODE(_Set_Drv_Extra)) {
@ -1345,6 +1442,8 @@ _func_enter_;
}
}
pmlmeinfo->assoc_AP_vendor = check_assoc_AP(pnetwork->network.IEs, pnetwork->network.IELength);
psecnetwork=(WLAN_BSSID_EX *)&psecuritypriv->sec_bss;
if(psecnetwork==NULL)
{
@ -1416,7 +1515,7 @@ _func_enter_;
{
rtw_ht_use_default_setting(padapter);
rtw_build_wmm_ie_ht(padapter, &psecnetwork->IEs[12], &psecnetwork->IELength);
rtw_build_wmm_ie_ht(padapter, &psecnetwork->IEs[0], &psecnetwork->IELength);
//rtw_restructure_ht_ie
rtw_restructure_ht_ie(padapter, &pnetwork->network.IEs[12], &psecnetwork->IEs[0],
@ -1437,8 +1536,6 @@ _func_enter_;
#endif //CONFIG_80211N_HT
pmlmeinfo->assoc_AP_vendor = check_assoc_AP(pnetwork->network.IEs, pnetwork->network.IELength);
#if 0
psecuritypriv->supplicant_ie[0]=(u8)psecnetwork->IELength;
@ -2104,15 +2201,11 @@ _func_enter_;
else
{
//no need to enqueue, do the cmd hdl directly and free cmd parameter
if( H2C_SUCCESS !=set_chplan_hdl(padapter, (unsigned char *)setChannelPlan_param) )
if( H2C_SUCCESS != set_chplan_hdl(padapter, (unsigned char *)setChannelPlan_param) )
res = _FAIL;
rtw_mfree((u8 *)setChannelPlan_param, sizeof(struct SetChannelPlan_param));
}
//do something based on res...
if(res == _SUCCESS)
padapter->mlmepriv.ChannelPlan = chplan;
exit:
@ -2286,6 +2379,7 @@ static void collect_traffic_statistics(_adapter *padapter)
pdvobjpriv->traffic_stat.cur_rx_tp = (u32)(pdvobjpriv->traffic_stat.cur_rx_bytes *8/2/1024/1024);
}
//from_timer == 1 means driver is in LPS
u8 traffic_status_watchdog(_adapter *padapter, u8 from_timer)
{
u8 bEnterPS = _FALSE;
@ -2376,11 +2470,16 @@ u8 traffic_status_watchdog(_adapter *padapter, u8 from_timer)
#ifdef CONFIG_LPS
// check traffic for powersaving.
if( ((pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod + pmlmepriv->LinkDetectInfo.NumTxOkInPeriod) > 8 ) ||
(pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod > 2) )
#ifdef CONFIG_LPS_SLOW_TRANSITION
(pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod > 2)
#else //CONFIG_LPS_SLOW_TRANSITION
(pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod > 4)
#endif //CONFIG_LPS_SLOW_TRANSITION
)
{
//DBG_871X("(-)Tx = %d, Rx = %d \n",pmlmepriv->LinkDetectInfo.NumTxOkInPeriod,pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod);
bEnterPS= _FALSE;
#ifdef CONFIG_LPS_SLOW_TRANSITION
if(bBusyTraffic == _TRUE)
{
if(pmlmepriv->LinkDetectInfo.TrafficTransitionCount <= 4)
@ -2395,11 +2494,13 @@ u8 traffic_status_watchdog(_adapter *padapter, u8 from_timer)
pmlmepriv->LinkDetectInfo.TrafficTransitionCount = 30;
}
}
#endif //CONFIG_LPS_SLOW_TRANSITION
}
else
{
//DBG_871X("(+)Tx = %d, Rx = %d \n",pmlmepriv->LinkDetectInfo.NumTxOkInPeriod,pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod);
#ifdef CONFIG_LPS_SLOW_TRANSITION
if(pmlmepriv->LinkDetectInfo.TrafficTransitionCount>=2)
pmlmepriv->LinkDetectInfo.TrafficTransitionCount -=2;
else
@ -2407,6 +2508,9 @@ u8 traffic_status_watchdog(_adapter *padapter, u8 from_timer)
if(pmlmepriv->LinkDetectInfo.TrafficTransitionCount == 0)
bEnterPS= _TRUE;
#else //CONFIG_LPS_SLOW_TRANSITION
bEnterPS= _TRUE;
#endif //CONFIG_LPS_SLOW_TRANSITION
}
#ifdef CONFIG_DYNAMIC_DTIM
@ -2498,28 +2602,6 @@ u8 traffic_status_watchdog(_adapter *padapter, u8 from_timer)
}
//To avoid RX affect TX throughput
void dm_DynamicUsbTxAgg(_adapter *padapter, u8 from_timer)
{
struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
if(IS_HARDWARE_TYPE_8821U(padapter) || IS_HARDWARE_TYPE_8192EU(padapter))
{
if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)
{
if(pdvobjpriv->traffic_stat.cur_tx_tp > 2 && pdvobjpriv->traffic_stat.cur_rx_tp < 30)
rtw_write16(padapter, REG_RXDMA_AGG_PG_TH,0x1010);
else
rtw_write16(padapter, REG_RXDMA_AGG_PG_TH,0x2005); //dmc agg th 20K
//DBG_871X("TX_TP=%u, RX_TP=%u \n", pdvobjpriv->traffic_stat.cur_tx_tp, pdvobjpriv->traffic_stat.cur_rx_tp);
}
}
}
void dynamic_chk_wk_hdl(_adapter *padapter)
{
struct mlme_priv *pmlmepriv;
@ -2545,7 +2627,7 @@ void dynamic_chk_wk_hdl(_adapter *padapter)
//if(check_fwstate(pmlmepriv, _FW_UNDER_LINKING|_FW_UNDER_SURVEY)==_FALSE)
{
linked_status_chk(padapter);
linked_status_chk(padapter, 0);
traffic_status_watchdog(padapter, 0);
dm_DynamicUsbTxAgg(padapter, 0);
}
@ -2640,6 +2722,16 @@ _func_enter_;
break;
case LPS_CTRL_TRAFFIC_BUSY:
LPS_Leave(padapter, "LPS_CTRL_TRAFFIC_BUSY");
break;
case LPS_CTRL_TX_TRAFFIC_LEAVE:
LPS_Leave(padapter, "LPS_CTRL_TX_TRAFFIC_LEAVE");
break;
case LPS_CTRL_RX_TRAFFIC_LEAVE:
LPS_Leave(padapter, "LPS_CTRL_RX_TRAFFIC_LEAVE");
break;
case LPS_CTRL_ENTER:
LPS_Enter(padapter, "TRAFFIC_IDLE_1");
break;
default:
break;
}
@ -3069,8 +3161,6 @@ _func_exit_;
#ifdef CONFIG_AP_MODE
extern u32 g_wait_hiq_empty;
static void rtw_chk_hi_queue_hdl(_adapter *padapter)
{
struct sta_info *psta_bmc;
@ -3084,7 +3174,7 @@ static void rtw_chk_hi_queue_hdl(_adapter *padapter)
rtw_hal_get_hwreg(padapter, HW_VAR_CHK_HI_QUEUE_EMPTY, &empty);
while(_FALSE == empty && rtw_get_passing_time_ms(start) < g_wait_hiq_empty)
while(_FALSE == empty && rtw_get_passing_time_ms(start) < rtw_get_wait_hiq_empty_ms())
{
rtw_msleep_os(100);
rtw_hal_get_hwreg(padapter, HW_VAR_CHK_HI_QUEUE_EMPTY, &empty);
@ -3103,7 +3193,7 @@ static void rtw_chk_hi_queue_hdl(_adapter *padapter)
pstapriv->sta_dz_bitmap &= ~BIT(0);
if (update_tim == _TRUE)
update_beacon(padapter, _TIM_IE_, NULL, _TRUE);
_update_beacon(padapter, _TIM_IE_, NULL, _TRUE, "bmc sleepq and HIQ empty");
}
else //re check again
{
@ -3364,6 +3454,42 @@ u8 rtw_c2h_wk_cmd(PADAPTER padapter, u8 *c2h_evt)
}
//#endif //CONFIG_C2H_PACKET_EN
u8 rtw_run_in_thread_cmd(PADAPTER padapter, void (*func)(void*), void* context)
{
struct cmd_priv *pcmdpriv;
struct cmd_obj *ph2c;
struct RunInThread_param *parm;
s32 res = _SUCCESS;
_func_enter_;
pcmdpriv = &padapter->cmdpriv;
ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj));
if (NULL == ph2c) {
res = _FAIL;
goto exit;
}
parm = (struct RunInThread_param*)rtw_zmalloc(sizeof(struct RunInThread_param));
if (NULL == parm) {
rtw_mfree((u8*)ph2c, sizeof(struct cmd_obj));
res = _FAIL;
goto exit;
}
parm->func = func;
parm->context = context;
init_h2fwcmd_w_parm_no_rsp(ph2c, parm, GEN_CMD_CODE(_RunInThreadCMD));
res = rtw_enqueue_cmd(pcmdpriv, ph2c);
exit:
_func_exit_;
return res;
}
s32 c2h_evt_hdl(_adapter *adapter, u8 *c2h_evt, c2h_id_filter filter)
{
s32 ret = _FAIL;

343
drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_debug.c
View File

@ -151,6 +151,51 @@ void rf_reg_dump(void *sel, _adapter *adapter)
}
}
static u8 fwdl_test_chksum_fail = 0;
static u8 fwdl_test_wintint_rdy_fail = 0;
bool rtw_fwdl_test_trigger_chksum_fail()
{
if (fwdl_test_chksum_fail) {
DBG_871X_LEVEL(_drv_always_, "fwdl test case: trigger chksum_fail\n");
fwdl_test_chksum_fail--;
return _TRUE;
}
return _FALSE;
}
bool rtw_fwdl_test_trigger_wintint_rdy_fail()
{
if (fwdl_test_wintint_rdy_fail) {
DBG_871X_LEVEL(_drv_always_, "fwdl test case: trigger wintint_rdy_fail\n");
fwdl_test_wintint_rdy_fail--;
return _TRUE;
}
return _FALSE;
}
static u32 g_wait_hiq_empty_ms = 0;
u32 rtw_get_wait_hiq_empty_ms()
{
return g_wait_hiq_empty_ms;
}
void rtw_sink_rtp_seq_dbg( _adapter *adapter,_pkt *pkt)
{
struct recv_priv *precvpriv = &(adapter->recvpriv);
if( precvpriv->sink_udpport > 0)
{
if(*((u16*)((pkt->data)+0x24)) == cpu_to_be16(precvpriv->sink_udpport))
{
precvpriv->pre_rtp_rxseq= precvpriv->cur_rtp_rxseq;
precvpriv->cur_rtp_rxseq = be16_to_cpu(*((u16*)((pkt->data)+0x2C)));
if( precvpriv->pre_rtp_rxseq+1 != precvpriv->cur_rtp_rxseq)
DBG_871X("%s : RTP Seq num from %d to %d\n",__FUNCTION__,precvpriv->pre_rtp_rxseq,precvpriv->cur_rtp_rxseq);
}
}
}
#ifdef CONFIG_PROC_DEBUG
ssize_t proc_set_write_reg(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
{
@ -471,8 +516,10 @@ int proc_get_survey_info(struct seq_file *m, void *v)
_enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
phead = get_list_head(queue);
if(!phead)
return 0;
plist = get_next(phead);
if ((!phead) || (!plist))
if (!plist)
return 0;
DBG_871X_SEL_NL(m, "%5s %-17s %3s %-3s %-4s %-4s %5s %s\n","index", "bssid", "ch", "RSSI", "SdBm", "Noise", "age", "ssid");
@ -591,6 +638,8 @@ int proc_get_trx_info(struct seq_file *m, void *v)
struct recv_priv *precvpriv = &padapter->recvpriv;
struct hw_xmit *phwxmit;
dump_os_queue(m, padapter);
DBG_871X_SEL_NL(m, "free_xmitbuf_cnt=%d, free_xmitframe_cnt=%d\n"
, pxmitpriv->free_xmitbuf_cnt, pxmitpriv->free_xmitframe_cnt);
DBG_871X_SEL_NL(m, "free_ext_xmitbuf_cnt=%d, free_xframe_ext_cnt=%d\n"
@ -605,21 +654,60 @@ int proc_get_trx_info(struct seq_file *m, void *v)
}
#ifdef CONFIG_USB_HCI
DBG_871X_SEL_NL(m, "rx_urb_pending_cn=%d\n", precvpriv->rx_pending_cnt);
DBG_871X_SEL_NL(m, "rx_urb_pending_cn=%d\n", ATOMIC_READ(&(precvpriv->rx_pending_cnt)));
#endif
return 0;
}
int proc_get_dis_pwt(struct seq_file *m, void *v)
{
struct net_device *dev = m->private;
_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
u8 dis_pwt = 0;
rtw_hal_get_def_var(padapter, HAL_DEF_DBG_DIS_PWT, &(dis_pwt));
DBG_871X_SEL_NL(m, " Tx Power training mode:%s \n",(dis_pwt==_TRUE)?"Disable":"Enable");
return 0;
}
ssize_t proc_set_dis_pwt(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
{
struct net_device *dev = data;
_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
char tmp[4]={0};
u8 dis_pwt = 0;
if (count < 1)
return -EFAULT;
if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) {
int num = sscanf(tmp, "%hhx", &dis_pwt);
DBG_871X("Set Tx Power training mode:%s \n",(dis_pwt==_TRUE)?"Disable":"Enable");
if (num >= 1)
rtw_hal_set_def_var(padapter, HAL_DEF_DBG_DIS_PWT, &(dis_pwt));
}
return count;
}
int proc_get_rate_ctl(struct seq_file *m, void *v)
{
struct net_device *dev = m->private;
int i;
_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
u8 data_rate = 0, sgi=0, data_fb = 0;
if (adapter->fix_rate != 0xff) {
DBG_871X_SEL_NL(m, "FIX\n");
DBG_871X_SEL_NL(m, "0x%02x\n", adapter->fix_rate);
data_rate = adapter->fix_rate & 0x7F;
sgi = adapter->fix_rate >>7;
data_fb = adapter->data_fb?1:0;
DBG_871X_SEL_NL(m, "FIXED %s%s%s\n"
, HDATA_RATE(data_rate)
, sgi?" SGI":" LGI"
, data_fb?" FB":""
);
DBG_871X_SEL_NL(m, "0x%02x %u\n", adapter->fix_rate, adapter->data_fb);
} else {
DBG_871X_SEL_NL(m, "RA\n");
}
@ -633,24 +721,24 @@ ssize_t proc_set_rate_ctl(struct file *file, const char __user *buffer, size_t c
_adapter *adapter = (_adapter *)rtw_netdev_priv(dev);
char tmp[32];
u8 fix_rate;
u8 data_fb;
if (count < 1)
return -EFAULT;
if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) {
int num = sscanf(tmp, "%hhx", &fix_rate);
int num = sscanf(tmp, "%hhx %hhu", &fix_rate, &data_fb);
if (num >= 1)
adapter->fix_rate = fix_rate;
if (num >= 2)
adapter->data_fb = data_fb?1:0;
}
return count;
}
u8 g_fwdl_chksum_fail = 0;
u8 g_fwdl_wintint_rdy_fail = 0;
ssize_t proc_set_fwdl_test_case(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
{
struct net_device *dev = data;
@ -661,14 +749,12 @@ ssize_t proc_set_fwdl_test_case(struct file *file, const char __user *buffer, si
return -EFAULT;
if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) {
int num = sscanf(tmp, "%hhu %hhu", &g_fwdl_chksum_fail, &g_fwdl_wintint_rdy_fail);
int num = sscanf(tmp, "%hhu %hhu", &fwdl_test_chksum_fail, &fwdl_test_wintint_rdy_fail);
}
return count;
}
u32 g_wait_hiq_empty = 0;
ssize_t proc_set_wait_hiq_empty(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
{
struct net_device *dev = data;
@ -679,7 +765,7 @@ ssize_t proc_set_wait_hiq_empty(struct file *file, const char __user *buffer, si
return -EFAULT;
if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) {
int num = sscanf(tmp, "%u", &g_wait_hiq_empty);
int num = sscanf(tmp, "%u", &g_wait_hiq_empty_ms);
}
return count;
@ -987,6 +1073,19 @@ int proc_get_int_logs(struct seq_file *m, void *v)
#endif // CONFIG_DBG_COUNTER
int proc_get_hw_status(struct seq_file *m, void *v)
{
struct net_device *dev = m->private;
_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
struct dvobj_priv *dvobj = padapter->dvobj;
struct debug_priv *pdbgpriv = &dvobj->drv_dbg;
DBG_871X_SEL_NL(m, "RX FIFO full count: last_time=%lld, current_time=%lld, differential=%lld\n"
, pdbgpriv->dbg_rx_fifo_last_overflow, pdbgpriv->dbg_rx_fifo_curr_overflow, pdbgpriv->dbg_rx_fifo_diff_overflow);
return 0;
}
int proc_get_rx_signal(struct seq_file *m, void *v)
{
struct net_device *dev = m->private;
@ -1005,20 +1104,6 @@ int proc_get_rx_signal(struct seq_file *m, void *v)
return 0;
}
int proc_get_hw_status(struct seq_file *m, void *v)
{
struct net_device *dev = m->private;
_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
struct dvobj_priv *dvobj = padapter->dvobj;
struct debug_priv *pdbgpriv = &dvobj->drv_dbg;
DBG_871X_SEL_NL(m, "RX FIFO full count: last_time=%lld, current_time=%lld, differential=%lld\n"
, pdbgpriv->dbg_rx_fifo_last_overflow, pdbgpriv->dbg_rx_fifo_curr_overflow, pdbgpriv->dbg_rx_fifo_diff_overflow);
return 0;
}
ssize_t proc_set_rx_signal(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
{
struct net_device *dev = data;
@ -1082,10 +1167,10 @@ ssize_t proc_set_ht_enable(struct file *file, const char __user *buffer, size_t
int num = sscanf(tmp, "%d ", &mode);
if( pregpriv && mode >= 0 && mode < 2 )
if( pregpriv && mode < 2 )
{
pregpriv->ht_enable= mode;
printk("ht_enable=%d\n", pregpriv->ht_enable);
DBG_871X("ht_enable=%d\n", pregpriv->ht_enable);
}
}
@ -1205,7 +1290,7 @@ ssize_t proc_set_rx_ampdu(struct file *file, const char __user *buffer, size_t c
int num = sscanf(tmp, "%d ", &mode);
if( pregpriv && mode >= 0 && mode < 2 )
if( pregpriv && mode < 2 )
{
pmlmeinfo->bAcceptAddbaReq = mode;
DBG_871X("pmlmeinfo->bAcceptAddbaReq=%d \n",pmlmeinfo->bAcceptAddbaReq);
@ -1220,7 +1305,135 @@ ssize_t proc_set_rx_ampdu(struct file *file, const char __user *buffer, size_t c
return count;
}
int proc_get_rx_ampdu_factor(struct seq_file *m, void *v)
{
struct net_device *dev = m->private;
_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
if(padapter)
{
DBG_871X_SEL_NL(m,"rx ampdu factor = %x\n",padapter->driver_rx_ampdu_factor);
}
return 0;
}
ssize_t proc_set_rx_ampdu_factor(struct file *file, const char __user *buffer
, size_t count, loff_t *pos, void *data)
{
struct net_device *dev = data;
_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
char tmp[32];
u32 factor;
if (count < 1)
return -EFAULT;
if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp)))
{
int num = sscanf(tmp, "%d ", &factor);
if( padapter && (num == 1) )
{
DBG_871X("padapter->driver_rx_ampdu_factor = %x\n", factor);
if(factor > 0x03)
padapter->driver_rx_ampdu_factor = 0xFF;
else
padapter->driver_rx_ampdu_factor = factor;
}
}
return count;
}
int proc_get_rx_ampdu_density(struct seq_file *m, void *v)
{
struct net_device *dev = m->private;
_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
if(padapter)
{
DBG_871X_SEL_NL(m,"rx ampdu densityg = %x\n",padapter->driver_rx_ampdu_spacing);
}
return 0;
}
ssize_t proc_set_rx_ampdu_density(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
{
struct net_device *dev = data;
_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
char tmp[32];
u32 density;
if (count < 1)
return -EFAULT;
if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp)))
{
int num = sscanf(tmp, "%d ", &density);
if( padapter && (num == 1) )
{
DBG_871X("padapter->driver_rx_ampdu_spacing = %x\n", density);
if(density > 0x07)
padapter->driver_rx_ampdu_spacing = 0xFF;
else
padapter->driver_rx_ampdu_spacing = density;
}
}
return count;
}
int proc_get_tx_ampdu_density(struct seq_file *m, void *v)
{
struct net_device *dev = m->private;
_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
if(padapter)
{
DBG_871X_SEL_NL(m,"tx ampdu density = %x\n",padapter->driver_ampdu_spacing);
}
return 0;
}
ssize_t proc_set_tx_ampdu_density(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
{
struct net_device *dev = data;
_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
char tmp[32];
u32 density;
if (count < 1)
return -EFAULT;
if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp)))
{
int num = sscanf(tmp, "%d ", &density);
if( padapter && (num == 1) )
{
DBG_871X("padapter->driver_ampdu_spacing = %x\n", density);
if(density > 0x07)
padapter->driver_ampdu_spacing = 0xFF;
else
padapter->driver_ampdu_spacing = density;
}
}
return count;
}
#endif //CONFIG_80211N_HT
int proc_get_en_fwps(struct seq_file *m, void *v)
@ -1255,7 +1468,7 @@ ssize_t proc_set_en_fwps(struct file *file, const char __user *buffer, size_t co
int num = sscanf(tmp, "%d ", &mode);
if( pregpriv && mode >= 0 && mode < 2 )
if( pregpriv && mode < 2 )
{
pregpriv->check_fw_ps = mode;
DBG_871X("pregpriv->check_fw_ps=%d \n",pregpriv->check_fw_ps);
@ -1319,13 +1532,14 @@ ssize_t proc_set_rx_stbc(struct file *file, const char __user *buffer, size_t co
}
#endif //CONFIG_80211N_HT
int proc_get_rssi_disp(struct seq_file *m, void *v)
/*int proc_get_rssi_disp(struct seq_file *m, void *v)
{
struct net_device *dev = m->private;
return 0;
}
*/
ssize_t proc_set_rssi_disp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
/*ssize_t proc_set_rssi_disp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
{
struct net_device *dev = data;
_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
@ -1364,7 +1578,7 @@ ssize_t proc_set_rssi_disp(struct file *file, const char __user *buffer, size_t
}
*/
#ifdef CONFIG_AP_MODE
int proc_get_all_sta_info(struct seq_file *m, void *v)
@ -1479,7 +1693,7 @@ int proc_get_best_channel(struct seq_file *m, void *v)
index_5G = i;
}
for (i=0; pmlmeext->channel_set[i].ChannelNum !=0; i++) {
for (i=0; (i < MAX_CHANNEL_NUM) && (pmlmeext->channel_set[i].ChannelNum !=0) ; i++) {
// 2.4G
if ( pmlmeext->channel_set[i].ChannelNum == 6 ) {
if ( pmlmeext->channel_set[i].rx_count < pmlmeext->channel_set[index_24G].rx_count ) {
@ -1766,8 +1980,65 @@ int proc_get_tx_ring(struct seq_file *m, void *v)
return 0;
}
#endif
#ifdef CONFIG_P2P_WOWLAN
int proc_get_p2p_wowlan_info(struct seq_file *m, void *v)
{
struct net_device *dev = m->private;
_adapter *padapter = (_adapter *)rtw_netdev_priv(dev);
struct wifidirect_info *pwdinfo = &( padapter->wdinfo );
struct p2p_wowlan_info peerinfo = pwdinfo->p2p_wow_info;
if(_TRUE == peerinfo.is_trigger)
{
DBG_871X_SEL_NL(m,"is_trigger: TRUE\n");
switch(peerinfo.wowlan_recv_frame_type)
{
case P2P_WOWLAN_RECV_NEGO_REQ:
DBG_871X_SEL_NL(m,"Frame Type: Nego Request\n");
break;
case P2P_WOWLAN_RECV_INVITE_REQ:
DBG_871X_SEL_NL(m,"Frame Type: Invitation Request\n");
break;
case P2P_WOWLAN_RECV_PROVISION_REQ:
DBG_871X_SEL_NL(m,"Frame Type: Provision Request\n");
break;
default:
break;
}
DBG_871X_SEL_NL(m,"Peer Addr: "MAC_FMT"\n", MAC_ARG(peerinfo.wowlan_peer_addr));
DBG_871X_SEL_NL(m,"Peer WPS Config: %x\n", peerinfo.wowlan_peer_wpsconfig);
DBG_871X_SEL_NL(m,"Persistent Group: %d\n", peerinfo.wowlan_peer_is_persistent);
DBG_871X_SEL_NL(m,"Intivation Type: %d\n", peerinfo.wowlan_peer_invitation_type);
}
else
{
DBG_871X_SEL_NL(m,"is_trigger: False\n");
}
return 0;
}
#endif /* CONFIG_P2P_WOWLAN */
int proc_get_new_bcn_max(struct seq_file *m, void *v)
{
extern int new_bcn_max;
DBG_871X_SEL_NL(m, "%d", new_bcn_max);
return 0;
}
ssize_t proc_set_new_bcn_max(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data)
{
char tmp[32];
extern int new_bcn_max;
if(count < 1)
return -EFAULT;
if(buffer && !copy_from_user(tmp, buffer, sizeof(tmp)))
sscanf(tmp, "%d ", &new_bcn_max);
return count;
}
#endif

163
drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_ieee80211.c
View File

@ -19,6 +19,9 @@
******************************************************************************/
#define _IEEE80211_C
#ifdef CONFIG_PLATFORM_INTEL_BYT
#include <linux/fs.h>
#endif
#include <drv_types.h>
@ -150,7 +153,6 @@ u8 *rtw_set_ie
uint *frlen //frame length
)
{
_func_enter_;
*pbuf = (u8)index;
*(pbuf + 1) = (u8)len;
@ -161,7 +163,6 @@ _func_enter_;
*frlen = *frlen + (len + 2);
return (pbuf + len + 2);
_func_exit_;
}
inline u8 *rtw_set_ie_ch_switch(u8 *buf, u32 *buf_len, u8 ch_switch_mode,
@ -1112,7 +1113,7 @@ static int rtw_ieee802_11_parse_vendor_specific(u8 *pos, uint elen,
elems->wme_tspec_len = elen;
break;
default:
DBG_871X("unknown WME "
DBG_871X_LEVEL(_drv_warning_, "unknown WME "
"information element ignored "
"(subtype=%d len=%lu)\n",
pos[4], (unsigned long) elen);
@ -1125,7 +1126,7 @@ static int rtw_ieee802_11_parse_vendor_specific(u8 *pos, uint elen,
elems->wps_ie_len = elen;
break;
default:
DBG_871X("Unknown Microsoft "
DBG_871X_LEVEL(_drv_warning_, "Unknown Microsoft "
"information element ignored "
"(type=%d len=%lu)\n",
pos[3], (unsigned long) elen);
@ -1140,7 +1141,7 @@ static int rtw_ieee802_11_parse_vendor_specific(u8 *pos, uint elen,
elems->vendor_ht_cap_len = elen;
break;
default:
DBG_871X("Unknown Broadcom "
DBG_871X_LEVEL(_drv_warning_, "Unknown Broadcom "
"information element ignored "
"(type=%d len=%lu)\n",
pos[3], (unsigned long) elen);
@ -1149,7 +1150,7 @@ static int rtw_ieee802_11_parse_vendor_specific(u8 *pos, uint elen,
break;
default:
DBG_871X("unknown vendor specific information "
DBG_871X_LEVEL(_drv_warning_, "unknown vendor specific information "
"element ignored (vendor OUI %02x:%02x:%02x "
"len=%lu)\n",
pos[0], pos[1], pos[2], (unsigned long) elen);
@ -1290,9 +1291,10 @@ ParseRes rtw_ieee802_11_parse_elems(u8 *start, uint len,
unknown++;
if (!show_errors)
break;
DBG_871X("IEEE 802.11 element parse "
"ignored unknown element (id=%d elen=%d)\n",
id, elen);
DBG_871X_LEVEL(_drv_warning_,
"IEEE 802.11 element parse "
"ignored unknown element (id=%d elen=%d)\n",
id, elen);
break;
}
@ -1347,12 +1349,45 @@ u8 convert_ip_addr(u8 hch, u8 mch, u8 lch)
return ((key_char2num(hch) * 100) + (key_char2num(mch) * 10 ) + key_char2num(lch));
}
#ifdef CONFIG_PLATFORM_INTEL_BYT
#define MAC_ADDRESS_LEN 12
int rtw_get_mac_addr_intel(unsigned char *buf)
{
int ret = 0;
int i;
struct file *fp = NULL;
mm_segment_t oldfs;
unsigned char c_mac[MAC_ADDRESS_LEN];
char fname[]="/config/wifi/mac.txt";
int jj,kk;
DBG_871X("%s Enter\n", __FUNCTION__);
ret = rtw_retrive_from_file(fname, c_mac, MAC_ADDRESS_LEN);
if(ret < MAC_ADDRESS_LEN)
{
return -1;
}
for( jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 2 )
{
buf[jj] = key_2char2num(c_mac[kk], c_mac[kk+ 1]);
}
DBG_871X("%s: read from file mac address: "MAC_FMT"\n",
__FUNCTION__, MAC_ARG(buf));
return 0;
}
#endif //CONFIG_PLATFORM_INTEL_BYT
extern char* rtw_initmac;
extern int rockchip_wifi_mac_addr(unsigned char *buf);
void rtw_macaddr_cfg(u8 *mac_addr)
{
u8 mac[ETH_ALEN];
u8 macbuf[30] = {0};
u8 macbuf[30] = {0};
if(mac_addr == NULL) return;
if ( rtw_initmac )
@ -1365,23 +1400,29 @@ void rtw_macaddr_cfg(u8 *mac_addr)
}
_rtw_memcpy(mac_addr, mac, ETH_ALEN);
}
#ifdef CONFIG_PLATFORM_INTEL_BYT
else if (0 == rtw_get_mac_addr_intel(mac))
{
_rtw_memcpy(mac_addr, mac, ETH_ALEN);
}
#endif //CONFIG_PLATFORM_INTEL_BYT
else
{
printk("Wifi Efuse Mac => %02x:%02x:%02x:%02x:%02x:%02x\n", mac_addr[0], mac_addr[1],
{ // Use the mac address stored in the Efuse
printk("Wifi Efuse Mac => %02x:%02x:%02x:%02x:%02x:%02x\n", mac_addr[0], mac_addr[1],
mac_addr[2], mac_addr[3], mac_addr[4], mac_addr[5]);
if (!rockchip_wifi_mac_addr(macbuf)) {
if (!rockchip_wifi_mac_addr(macbuf)) {
int jj,kk;
printk("=========> get mac address from flash %s\n", macbuf);
for( jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3 )
{
mac[jj] = key_2char2num(macbuf[kk], macbuf[kk+ 1]);
}
_rtw_memcpy(mac_addr, mac, ETH_ALEN);
} else {
// Use the mac address stored in the Efuse
_rtw_memcpy(mac, mac_addr, ETH_ALEN);
}
}
for( jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3 )
{
mac[jj] = key_2char2num(macbuf[kk], macbuf[kk+ 1]);
}
_rtw_memcpy(mac_addr, mac, ETH_ALEN);
}else{
// Use the mac address stored in the Efuse
_rtw_memcpy(mac, mac_addr, ETH_ALEN);
};
}
if (((mac[0]==0xff) &&(mac[1]==0xff) && (mac[2]==0xff) &&
(mac[3]==0xff) && (mac[4]==0xff) &&(mac[5]==0xff)) ||
@ -1402,21 +1443,56 @@ void rtw_macaddr_cfg(u8 *mac_addr)
DBG_871X("rtw_macaddr_cfg MAC Address = "MAC_FMT"\n", MAC_ARG(mac_addr));
}
void dump_ies(u8 *buf, u32 buf_len)
#ifdef CONFIG_80211N_HT
void dump_ht_cap_ie_content(void *sel, u8 *buf, u32 buf_len)
{
if (buf_len != 26) {
DBG_871X_SEL_NL(sel, "Invalid HT capability IE len:%d != %d\n", buf_len, 26);
return;
}
DBG_871X_SEL_NL(sel, "HT Capabilities Info:%02x%02x\n", *(buf), *(buf+1));
DBG_871X_SEL_NL(sel, "A-MPDU Parameters:"HT_AMPDU_PARA_FMT"\n"
, HT_AMPDU_PARA_ARG(HT_CAP_ELE_AMPDU_PARA(buf)));
DBG_871X_SEL_NL(sel, "Supported MCS Set:"HT_SUP_MCS_SET_FMT"\n"
, HT_SUP_MCS_SET_ARG(HT_CAP_ELE_SUP_MCS_SET(buf)));
}
void dump_ht_cap_ie(void *sel, u8 *ie, u32 ie_len)
{
u8* pos = (u8*)ie;
u16 id;
u16 len;
u8 *ht_cap_ie;
sint ht_cap_ielen;
ht_cap_ie = rtw_get_ie(ie, _HT_CAPABILITY_IE_, &ht_cap_ielen, ie_len);
if(!ie || ht_cap_ie != ie)
return;
dump_ht_cap_ie_content(sel, ht_cap_ie+2, ht_cap_ielen);
}
#endif /* CONFIG_80211N_HT */
void dump_ies(void *sel, u8 *buf, u32 buf_len)
{
u8* pos = (u8*)buf;
u8 id, len;
while(pos-buf<=buf_len){
while(pos-buf+1<buf_len){
id = *pos;
len = *(pos+1);
DBG_871X("%s ID:%u, LEN:%u\n", __FUNCTION__, id, len);
dump_wps_ie(pos, len);
DBG_871X_SEL_NL(sel, "%s ID:%u, LEN:%u\n", __FUNCTION__, id, len);
#ifdef CONFIG_80211N_HT
dump_ht_cap_ie(sel, pos, len);
#endif
dump_wps_ie(sel, pos, len);
#ifdef CONFIG_P2P
dump_p2p_ie(pos, len);
dump_p2p_ie(sel, pos, len);
#ifdef CONFIG_WFD
dump_wfd_ie(pos, len);
dump_wfd_ie(sel, pos, len);
#endif
#endif
@ -1424,7 +1500,7 @@ void dump_ies(u8 *buf, u32 buf_len)
}
}
void dump_wps_ie(u8 *ie, u32 ie_len)
void dump_wps_ie(void *sel, u8 *ie, u32 ie_len)
{
u8* pos = (u8*)ie;
u16 id;
@ -1442,7 +1518,7 @@ void dump_wps_ie(u8 *ie, u32 ie_len)
id = RTW_GET_BE16(pos);
len = RTW_GET_BE16(pos + 2);
DBG_871X("%s ID:0x%04x, LEN:%u\n", __FUNCTION__, id, len);
DBG_871X_SEL_NL(sel, "%s ID:0x%04x, LEN:%u\n", __FUNCTION__, id, len);
pos+=(4+len);
}
@ -1520,7 +1596,7 @@ int rtw_p2p_merge_ies(u8 *in_ie, u32 in_len, u8 *merge_ie)
return 0;
}
void dump_p2p_ie(u8 *ie, u32 ie_len) {
void dump_p2p_ie(void *sel, u8 *ie, u32 ie_len) {
u8* pos = (u8*)ie;
u8 id;
u16 len;
@ -1537,7 +1613,7 @@ void dump_p2p_ie(u8 *ie, u32 ie_len) {
id = *pos;
len = RTW_GET_LE16(pos+1);
DBG_871X("%s ID:%u, LEN:%u\n", __FUNCTION__, id, len);
DBG_871X_SEL_NL(sel, "%s ID:%u, LEN:%u\n", __FUNCTION__, id, len);
pos+=(3+len);
}
@ -1741,7 +1817,7 @@ static uint rtw_p2p_attr_remove(u8 *ie, uint ielen_ori, u8 attr_id)
{
u8 *next_attr = target_attr+target_attr_len;
uint remain_len = ielen-(next_attr-ie);
//dump_ies(ie, ielen);
//dump_ies(RTW_DBGDUMP, ie, ielen);
#if 0
DBG_871X("[%d] ie:%p, ielen:%u\n"
"target_attr:%p, target_attr_len:%u\n"
@ -1762,7 +1838,7 @@ static uint rtw_p2p_attr_remove(u8 *ie, uint ielen_ori, u8 attr_id)
else
{
//if(index>0)
// dump_ies(ie, ielen);
// dump_ies(RTW_DBGDUMP, ie, ielen);
break;
}
}
@ -1778,12 +1854,11 @@ void rtw_WLAN_BSSID_EX_remove_p2p_attr(WLAN_BSSID_EX *bss_ex, u8 attr_id)
if( (p2p_ie=rtw_get_p2p_ie(bss_ex->IEs+_FIXED_IE_LENGTH_, bss_ex->IELength-_FIXED_IE_LENGTH_, NULL, &p2p_ielen_ori)) )
{
#if 0
if (0)
if(rtw_get_p2p_attr(p2p_ie, p2p_ielen_ori, attr_id, NULL, NULL)) {
DBG_871X("rtw_get_p2p_attr: GOT P2P_ATTR:%u!!!!!!!!\n", attr_id);
dump_ies(bss_ex->IEs+_FIXED_IE_LENGTH_, bss_ex->IELength-_FIXED_IE_LENGTH_);
dump_ies(RTW_DBGDUMP, bss_ex->IEs+_FIXED_IE_LENGTH_, bss_ex->IELength-_FIXED_IE_LENGTH_);
}
#endif
p2p_ielen=rtw_p2p_attr_remove(p2p_ie, p2p_ielen_ori, attr_id);
if(p2p_ielen != p2p_ielen_ori) {
@ -1796,10 +1871,10 @@ void rtw_WLAN_BSSID_EX_remove_p2p_attr(WLAN_BSSID_EX *bss_ex, u8 attr_id)
_rtw_memset(next_ie+remain_len, 0, p2p_ielen_ori-p2p_ielen);
bss_ex->IELength -= p2p_ielen_ori-p2p_ielen;
#if 0
DBG_871X("remove P2P_ATTR:%u!\n", attr_id);
dump_ies(bss_ex->IEs+_FIXED_IE_LENGTH_, bss_ex->IELength-_FIXED_IE_LENGTH_);
#endif
if (0) {
DBG_871X("remove P2P_ATTR:%u!\n", attr_id);
dump_ies(RTW_DBGDUMP, bss_ex->IEs+_FIXED_IE_LENGTH_, bss_ex->IELength-_FIXED_IE_LENGTH_);
}
}
}
}
@ -1807,7 +1882,7 @@ void rtw_WLAN_BSSID_EX_remove_p2p_attr(WLAN_BSSID_EX *bss_ex, u8 attr_id)
#endif //CONFIG_P2P
#ifdef CONFIG_WFD
void dump_wfd_ie(u8 *ie, u32 ie_len)
void dump_wfd_ie(void *sel, u8 *ie, u32 ie_len)
{
u8* pos = (u8*)ie;
u8 id;
@ -1824,7 +1899,7 @@ void dump_wfd_ie(u8 *ie, u32 ie_len)
id = *pos;
len = RTW_GET_BE16(pos+1);
DBG_871X("%s ID:%u, LEN:%u\n", __FUNCTION__, id, len);
DBG_871X_SEL_NL(sel, "%s ID:%u, LEN:%u\n", __FUNCTION__, id, len);
pos+=(3+len);
}

4
drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_iol.c
View File

@ -50,7 +50,7 @@ struct xmit_frame *rtw_IOL_accquire_xmit_frame(ADAPTER *adapter)
pattrib = &xmit_frame->attrib;
update_mgntframe_attrib(adapter, pattrib);
pattrib->qsel = 0x10;//Beacon
pattrib->qsel = QSLT_BEACON;//Beacon
pattrib->subtype = WIFI_BEACON;
pattrib->pktlen = pattrib->last_txcmdsz = 0;
@ -62,7 +62,7 @@ struct xmit_frame *rtw_IOL_accquire_xmit_frame(ADAPTER *adapter)
else {
pattrib = &xmit_frame->attrib;
update_mgntframe_attrib(adapter, pattrib);
pattrib->qsel = 0x10;
pattrib->qsel = QSLT_BEACON;
pattrib->pktlen = pattrib->last_txcmdsz = 0;
}
#endif

186
drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_mlme.c
View File

@ -155,7 +155,10 @@ void rtw_free_mlme_priv_ie_data(struct mlme_priv *pmlmepriv)
void _rtw_free_mlme_priv (struct mlme_priv *pmlmepriv)
{
_func_enter_;
if (NULL == pmlmepriv){
rtw_warn_on(1);
goto exit;
}
rtw_free_mlme_priv_ie_data(pmlmepriv);
if(pmlmepriv){
@ -165,6 +168,7 @@ _func_enter_;
rtw_vmfree(pmlmepriv->free_bss_buf, MAX_BSS_CNT * sizeof(struct wlan_network));
}
}
exit:
_func_exit_;
}
@ -863,7 +867,9 @@ void rtw_update_scanned_network(_adapter *adapter, WLAN_BSSID_EX *target)
ULONG bssid_ex_sz;
struct mlme_priv *pmlmepriv = &(adapter->mlmepriv);
struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv);
struct wifidirect_info *pwdinfo= &(adapter->wdinfo);
#ifdef CONFIG_P2P
struct wifidirect_info *pwdinfo= &(adapter->wdinfo);
#endif // CONFIG_P2P
_queue *queue = &(pmlmepriv->scanned_queue);
struct wlan_network *pnetwork = NULL;
struct wlan_network *oldest = NULL;
@ -891,7 +897,7 @@ _func_enter_;
rtw_bug_check(pnetwork, pnetwork, pnetwork, pnetwork);
#ifdef CONFIG_P2P
if (!rtw_p2p_chk_state(&(adapter->wdinfo), P2P_STATE_NONE) &&
if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) &&
(_rtw_memcmp(pnetwork->network.MacAddress, target->MacAddress, ETH_ALEN) == _TRUE))
{
target_find = 1;
@ -1489,16 +1495,16 @@ _func_enter_;
rtw_tdls_cmd(adapter, myid(&(adapter->eeprompriv)), TDLS_RS_RCR);
rtw_reset_tdls_info(adapter);
rtw_free_all_stainfo(adapter);
_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
//_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
}
else
#endif //CONFIG_TDLS
{
_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
//_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
rtw_free_stainfo(adapter, psta);
}
_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
//_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
}
@ -1509,46 +1515,28 @@ _func_enter_;
rtw_free_all_stainfo(adapter);
psta = rtw_get_bcmc_stainfo(adapter);
_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
//_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
rtw_free_stainfo(adapter, psta);
_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
//_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
rtw_init_bcmc_stainfo(adapter);
}
if(lock_scanned_queue)
_enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
pwlan = rtw_find_network(&pmlmepriv->scanned_queue, tgt_network->network.MacAddress);
pwlan = _rtw_find_same_network(&pmlmepriv->scanned_queue, tgt_network);
if(pwlan)
{
pwlan->fixed = _FALSE;
DBG_871X("free disconnecting network\n");
rtw_free_network_nolock(adapter, pwlan);
#ifdef CONFIG_P2P
if(!rtw_p2p_chk_state(&adapter->wdinfo, P2P_STATE_NONE))
{
u32 p2p_ielen=0;
u8 *p2p_ie;
//u16 capability;
u8 *pcap = NULL;
u32 capability_len=0;
//DBG_871X("free disconnecting network\n");
//rtw_free_network_nolock(pmlmepriv, pwlan);
if((p2p_ie=rtw_get_p2p_ie(pwlan->network.IEs+_FIXED_IE_LENGTH_, pwlan->network.IELength-_FIXED_IE_LENGTH_, NULL, &p2p_ielen)))
{
pcap = rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, NULL, &capability_len);
if(pcap && capability_len==2)
{
u16 cap = *(u16*)pcap ;
*(u16*)pcap = cap&0x00ff;//clear group capability when free this network
}
}
rtw_set_scan_deny(adapter, 2000);
//rtw_clear_scan_deny(adapter);
//rtw_clear_scan_deny(adapter);
}
#endif //CONFIG_P2P
}
@ -1644,6 +1632,8 @@ void rtw_indicate_disconnect( _adapter *padapter )
WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network);
struct sta_info *psta;
struct sta_priv *pstapriv = &padapter->stapriv;
u8 *wps_ie=NULL;
uint wpsie_len=0;
_func_enter_;
@ -1651,6 +1641,22 @@ _func_enter_;
_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING|WIFI_UNDER_WPS);
// force to clear cur_network_scanned's SELECTED REGISTRAR
if (pmlmepriv->cur_network_scanned) {
WLAN_BSSID_EX *current_joined_bss = &(pmlmepriv->cur_network_scanned->network);
if (current_joined_bss) {
wps_ie=rtw_get_wps_ie(current_joined_bss->IEs +_FIXED_IE_LENGTH_,
current_joined_bss->IELength-_FIXED_IE_LENGTH_, NULL, &wpsie_len);
if (wps_ie && wpsie_len>0) {
u8 *attr = NULL;
u32 attr_len;
attr=rtw_get_wps_attr(wps_ie, wpsie_len, WPS_ATTR_SELECTED_REGISTRAR,
NULL, &attr_len);
if (attr)
*(attr + 4) = 0;
}
}
}
//DBG_871X("clear wps when %s\n", __func__);
if(rtw_to_roam(padapter) > 0)
@ -2039,9 +2045,9 @@ _func_enter_;
pcur_sta = rtw_get_stainfo(pstapriv, cur_network->network.MacAddress);
if(pcur_sta){
_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL2);
//_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL2);
rtw_free_stainfo(adapter, pcur_sta);
_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL2);
//_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL2);
}
ptarget_wlan = rtw_find_network(&pmlmepriv->scanned_queue, pnetwork->network.MacAddress);
@ -2487,6 +2493,7 @@ _func_enter_;
rtw_free_assoc_resources(adapter, 1);
rtw_indicate_disconnect(adapter);
rtw_free_mlme_priv_ie_data(pmlmepriv);
_enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
// remove the network entry in scanned_queue
@ -2509,9 +2516,9 @@ _func_enter_;
check_fwstate(pmlmepriv,WIFI_ADHOC_STATE))
{
_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
//_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
rtw_free_stainfo(adapter, psta);
_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
//_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
if(adapter->stapriv.asoc_sta_count== 1) //a sta + bc/mc_stainfo (not Ibss_stainfo)
{
@ -2838,7 +2845,7 @@ void rtw_dynamic_check_timer_handlder(_adapter *adapter)
{
u8 bEnterPS;
linked_status_chk(adapter);
linked_status_chk(adapter, 1);
bEnterPS = traffic_status_watchdog(adapter, 1);
if(bEnterPS)
@ -3506,22 +3513,67 @@ static int SecIsInPMKIDList(_adapter *Adapter, u8 *bssid)
// 13th element in the array is the IE length
//
static int rtw_append_pmkid(_adapter *Adapter,int iEntry, u8 *ie, uint ie_len)
static int rtw_append_pmkid(_adapter *adapter,int iEntry, u8 *ie, uint ie_len)
{
struct security_priv *psecuritypriv=&Adapter->securitypriv;
struct security_priv *sec=&adapter->securitypriv;
if(ie[13]<=20){
// The RSN IE didn't include the PMK ID, append the PMK information
ie[ie_len]=1;
ie_len++;
ie[ie_len]=0; //PMKID count = 0x0100
ie_len++;
_rtw_memcpy( &ie[ie_len], &psecuritypriv->PMKIDList[iEntry].PMKID, 16);
ie_len+=16;
ie[13]+=18;//PMKID length = 2+16
if (ie[13] > 20) {
int i;
u16 pmkid_cnt = RTW_GET_LE16(ie+14+20);
if (pmkid_cnt == 1 && _rtw_memcmp(ie+14+20+2, &sec->PMKIDList[iEntry].PMKID, 16)) {
DBG_871X(FUNC_ADPT_FMT" has carried the same PMKID:"KEY_FMT"\n"
, FUNC_ADPT_ARG(adapter), KEY_ARG(&sec->PMKIDList[iEntry].PMKID));
goto exit;
}
DBG_871X(FUNC_ADPT_FMT" remove original PMKID, count:%u\n"
, FUNC_ADPT_ARG(adapter), pmkid_cnt);
for (i=0;i<pmkid_cnt;i++)
DBG_871X(" "KEY_FMT"\n", KEY_ARG(ie+14+20+2+i*16));
ie_len -= 2+pmkid_cnt*16;
ie[13] = 20;
}
if (ie[13] <= 20) {
/* The RSN IE didn't include the PMK ID, append the PMK information */
DBG_871X(FUNC_ADPT_FMT" append PMKID:"KEY_FMT"\n"
, FUNC_ADPT_ARG(adapter), KEY_ARG(&sec->PMKIDList[iEntry].PMKID));
RTW_PUT_LE16(&ie[ie_len], 1);
ie_len += 2;
_rtw_memcpy(&ie[ie_len], &sec->PMKIDList[iEntry].PMKID, 16);
ie_len += 16;
ie[13] += 18;//PMKID length = 2+16
}
exit:
return (ie_len);
}
static int rtw_remove_pmkid(_adapter *adapter, u8 *ie, uint ie_len)
{
struct security_priv *sec=&adapter->securitypriv;
int i;
u16 pmkid_cnt = RTW_GET_LE16(ie+14+20);
if (ie[13] <= 20)
goto exit;
DBG_871X(FUNC_ADPT_FMT" remove original PMKID, count:%u\n"
, FUNC_ADPT_ARG(adapter), pmkid_cnt);
for (i=0;i<pmkid_cnt;i++)
DBG_871X(" "KEY_FMT"\n", KEY_ARG(ie+14+20+2+i*16));
ie_len -= 2+pmkid_cnt*16;
ie[13] = 20;
exit:
return (ie_len);
}
@ -3581,14 +3633,13 @@ _func_enter_;
iEntry = SecIsInPMKIDList(adapter, pmlmepriv->assoc_bssid);
if(iEntry<0)
{
return ielength;
if(authmode == _WPA2_IE_ID_)
ielength = rtw_remove_pmkid(adapter, out_ie, ielength);
}
else
{
if(authmode == _WPA2_IE_ID_)
{
ielength=rtw_append_pmkid(adapter, iEntry, out_ie, ielength);
}
}
_func_exit_;
@ -3712,17 +3763,10 @@ void rtw_joinbss_reset(_adapter *padapter)
{
u8 threshold;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
#ifdef CONFIG_80211N_HT
struct ht_priv *phtpriv = &pmlmepriv->htpriv;
#endif
//todo: if you want to do something io/reg/hw setting before join_bss, please add code here
#ifdef CONFIG_80211N_HT
#ifdef CONFIG_80211N_HT
struct ht_priv *phtpriv = &pmlmepriv->htpriv;
pmlmepriv->num_FortyMHzIntolerant = 0;
@ -3746,9 +3790,9 @@ void rtw_joinbss_reset(_adapter *padapter)
threshold = 1;
rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold));
}
#endif
#endif//#if defined( CONFIG_USB_HCI) || defined (CONFIG_SDIO_HCI)
#endif
#endif//#ifdef CONFIG_80211N_HT
}
@ -3980,16 +4024,22 @@ unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, ui
if(padapter->driver_rx_ampdu_factor != 0xFF)
max_rx_ampdu_factor = (HT_CAP_AMPDU_FACTOR)padapter->driver_rx_ampdu_factor;
else
rtw_hal_get_def_var(padapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor);
rtw_hal_get_def_var(padapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor);
//rtw_hal_get_def_var(padapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor);
ht_capie.ampdu_params_info = (max_rx_ampdu_factor&0x03);
if(padapter->securitypriv.dot11PrivacyAlgrthm == _AES_ )
ht_capie.ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY&(0x07<<2));
if(padapter->driver_rx_ampdu_spacing != 0xFF)
{
ht_capie.ampdu_params_info |= (( padapter->driver_rx_ampdu_spacing&0x07) <<2);
}
else
ht_capie.ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY&0x00);
{
if(padapter->securitypriv.dot11PrivacyAlgrthm == _AES_ )
ht_capie.ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY&(0x07<<2));
else
ht_capie.ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY&0x00);
}
#ifdef CONFIG_BEAMFORMING
ht_capie.tx_BF_cap_info = 0;

452
drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_mlme_ext.c
View File

@ -171,7 +171,7 @@ static RT_CHANNEL_PLAN_5G RTW_ChannelPlan5G[RT_CHANNEL_DOMAIN_5G_MAX] = {
{{56,60,64,149,153,157,161,165},8}, // 0x10, RT_CHANNEL_DOMAIN_5G_NCC2
{{149,153,157,161,165},5}, // 0x11, RT_CHANNEL_DOMAIN_5G_NCC3
{{36,40,44,48},4}, // 0x12, RT_CHANNEL_DOMAIN_5G_ETSI4
{{36,40,44,48,52,56,60,64,100,104,108,112,116,136,140,149,153,157,161,165},20}, // 0x13, RT_CHANNEL_DOMAIN_5G_ETSI5
{{36,40,44,48,52,56,60,64,100,104,108,112,116,132,136,140,149,153,157,161,165},21}, // 0x13, RT_CHANNEL_DOMAIN_5G_ETSI5
{{149,153,157,161},4}, // 0x14, RT_CHANNEL_DOMAIN_5G_FCC8
{{36,40,44,48,52,56,60,64},8}, // 0x15, RT_CHANNEL_DOMAIN_5G_ETSI6
{{36,40,44,48,52,56,60,64,149,153,157,161,165},13}, // 0x16, RT_CHANNEL_DOMAIN_5G_ETSI7
@ -181,14 +181,17 @@ static RT_CHANNEL_PLAN_5G RTW_ChannelPlan5G[RT_CHANNEL_DOMAIN_5G_MAX] = {
{{36,40,44,48,52,56,60,64,132,136,140,149,153,157,161,165},16}, // 0x1A, RT_CHANNEL_DOMAIN_5G_ETSI11
{{52,56,60,64,100,104,108,112,116,132,136,140,149,153,157,161,165},17}, // 0x1B, RT_CHANNEL_DOMAIN_5G_NCC4
{{149,153,157,161},4}, // 0x1C, RT_CHANNEL_DOMAIN_5G_ETSI12
{{36,40,44,48,100,104,108,112,116,132,136,140,149,153,157,161,165},17}, // 0x1D, RT_CHANNEL_DOMAIN_5G_FCC9
{{36,40,44,48,100,104,108,112,116,132,136,140},12}, // 0x1E, RT_CHANNEL_DOMAIN_5G_ETSI13
{{36,40,44,48,52,56,60,64,100,104,108,112,116,132,136,140,149,153,157,161},20}, // 0x1F, RT_CHANNEL_DOMAIN_5G_FCC10
{{36,40,44,48,52,56,60,64,100,104,108,112,116,132,136,140,149,153,157,161,165},21}, // 0x1D, RT_CHANNEL_DOMAIN_5G_FCC9
{{36,40,44,48,52,56,60,64,100,104,108,112,116,132,136,140},16}, // 0x1E, RT_CHANNEL_DOMAIN_5G_ETSI13
{{36,40,44,48,52,56,60,64,100,104,108,112,116,132,136,140,149,153,157,161},20}, // 0x1F, RT_CHANNEL_DOMAIN_5G_FCC10
{{36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,149,153,157,161},19}, // 0x20, RT_CHANNEL_DOMAIN_5G_KCC2
{{36,40,44,48,52,56,60,64,100,104,108,112,116,132,136,140,149,153,157,161,165},21}, // 0x21, RT_CHANNEL_DOMAIN_5G_FCC11
{{56,60,64,100,104,108,112,116,132,136,140,149,153,157,161,165},16}, // 0x22, RT_CHANNEL_DOMAIN_5G_NCC5
{{36,40,44,48},4}, // 0x23, RT_CHANNEL_DOMAIN_5G_MKK4
//===== Driver self defined for old channel plan Compatible ,Remember to modify if have new channel plan definition =====
{{36,40,44,48,52,56,60,64,100,104,108,112,116,132,136,140,149,153,157,161,165},21}, // 0x20, RT_CHANNEL_DOMAIN_5G_FCC
{{36,40,44,48},4}, // 0x21, RT_CHANNEL_DOMAIN_5G_JAPAN_NO_DFS
{{36,40,44,48,149,153,157,161},8}, // 0x22, RT_CHANNEL_DOMAIN_5G_FCC4_NO_DFS
{{36,40,44,48,52,56,60,64,100,104,108,112,116,132,136,140,149,153,157,161,165},21}, // 0x30, RT_CHANNEL_DOMAIN_5G_FCC
{{36,40,44,48},4}, // 0x31, RT_CHANNEL_DOMAIN_5G_JAPAN_NO_DFS
{{36,40,44,48,149,153,157,161},8}, // 0x32, RT_CHANNEL_DOMAIN_5G_FCC4_NO_DFS
};
static RT_CHANNEL_PLAN_MAP RTW_ChannelPlanMap[RT_CHANNEL_DOMAIN_MAX] = {
@ -234,7 +237,7 @@ static RT_CHANNEL_PLAN_MAP RTW_ChannelPlanMap[RT_CHANNEL_DOMAIN_MAX] = {
{0x02,0x04}, //0x25, RT_CHANNEL_DOMAIN_FCC1_FCC1
{0x00,0x01}, //0x26, RT_CHANNEL_DOMAIN_WORLD_ETSI1
{0x03,0x0C}, //0x27, RT_CHANNEL_DOMAIN_MKK1_MKK1
{0x00,0x0B}, //0x28, RT_CHANNEL_DOMAIN_WORLD_KCC1
{0x00,0x20}, //0x28, RT_CHANNEL_DOMAIN_5G_KCC2
{0x00,0x05}, //0x29, RT_CHANNEL_DOMAIN_WORLD_FCC2
{0x00,0x00}, //0x2A,
{0x00,0x00}, //0x2B,
@ -246,12 +249,12 @@ static RT_CHANNEL_PLAN_MAP RTW_ChannelPlanMap[RT_CHANNEL_DOMAIN_MAX] = {
{0x00,0x07}, //0x31, RT_CHANNEL_DOMAIN_WORLD_FCC4
{0x00,0x08}, //0x32, RT_CHANNEL_DOMAIN_WORLD_FCC5
{0x00,0x09}, //0x33, RT_CHANNEL_DOMAIN_WORLD_FCC6
{0x02,0x0A}, //0x34, RT_CHANNEL_DOMAIN_FCC1_FCC7
{0x02,0x21}, //0x34, RT_CHANNEL_DOMAIN_5G_FCC11
{0x00,0x02}, //0x35, RT_CHANNEL_DOMAIN_WORLD_ETSI2
{0x00,0x03}, //0x36, RT_CHANNEL_DOMAIN_WORLD_ETSI3
{0x03,0x0D}, //0x37, RT_CHANNEL_DOMAIN_MKK1_MKK2
{0x03,0x0E}, //0x38, RT_CHANNEL_DOMAIN_MKK1_MKK3
{0x02,0x0F}, //0x39, RT_CHANNEL_DOMAIN_FCC1_NCC1
{0x02,0x22}, //0x39, RT_CHANNEL_DOMAIN_5G_NCC5
{0x00,0x00}, //0x3A,
{0x00,0x00}, //0x3B,
{0x00,0x00}, //0x3C,
@ -268,6 +271,12 @@ static RT_CHANNEL_PLAN_MAP RTW_ChannelPlanMap[RT_CHANNEL_DOMAIN_MAX] = {
{0x00,0x15}, //0x47, RT_CHANNEL_DOMAIN_WORLD_ETSI6
{0x00,0x16}, //0x48, RT_CHANNEL_DOMAIN_WORLD_ETSI7
{0x00,0x17}, //0x49, RT_CHANNEL_DOMAIN_WORLD_ETSI8
{0x00,0x00}, //0x4A,
{0x00,0x00}, //0x4B,
{0x00,0x00}, //0x4C,
{0x00,0x00}, //0x4D,
{0x00,0x00}, //0x4E,
{0x00,0x00}, //0x4F,
{0x00,0x18}, //0x50, RT_CHANNEL_DOMAIN_WORLD_ETSI9
{0x00,0x19}, //0x51, RT_CHANNEL_DOMAIN_WORLD_ETSI10
{0x00,0x1A}, //0x52, RT_CHANNEL_DOMAIN_WORLD_ETSI11
@ -276,9 +285,10 @@ static RT_CHANNEL_PLAN_MAP RTW_ChannelPlanMap[RT_CHANNEL_DOMAIN_MAX] = {
{0x02,0x1D}, //0x55, RT_CHANNEL_DOMAIN_FCC1_FCC9
{0x00,0x1E}, //0x56, RT_CHANNEL_DOMAIN_WORLD_ETSI13
{0x02,0x1F}, //0x57, RT_CHANNEL_DOMAIN_FCC1_FCC10
{0x01,0x23}, //0x58, RT_CHANNEL_DOMAIN_WORLD_MKK4
};
static RT_CHANNEL_PLAN_MAP RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE = {0x03,0x02}; //use the conbination for max channel numbers
static RT_CHANNEL_PLAN_MAP RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE = {0x01,0x02}; //use the conbination for max channel numbers
/*
* Search the @param ch in given @param ch_set
@ -341,7 +351,7 @@ void init_mlme_default_rate_set(_adapter* padapter)
unsigned char mixed_datarate[NumRates] = {_1M_RATE_, _2M_RATE_, _5M_RATE_, _11M_RATE_, _6M_RATE_,_9M_RATE_, _12M_RATE_, _18M_RATE_, _24M_RATE_, _36M_RATE_, _48M_RATE_, _54M_RATE_, 0xff};
unsigned char mixed_basicrate[NumRates] ={_1M_RATE_, _2M_RATE_, _5M_RATE_, _11M_RATE_, _6M_RATE_, _12M_RATE_, _24M_RATE_, 0xff,};
unsigned char supported_mcs_set[16] = {0xff, 0xff, 0x00, 0x00, 0x01, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0};
unsigned char supported_mcs_set[16] = {0xff, 0xff, 0x00, 0x00, 0x00, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0};
_rtw_memcpy(pmlmeext->datarate, mixed_datarate, NumRates);
_rtw_memcpy(pmlmeext->basicrate, mixed_basicrate, NumRates);
@ -480,14 +490,13 @@ static u8 init_channel_set(_adapter* padapter, u8 ChannelPlan, RT_CHANNEL_INFO *
u8 b5GBand = _FALSE, b2_4GBand = _FALSE;
u8 Index2G = 0, Index5G=0;
_rtw_memset(channel_set, 0, sizeof(RT_CHANNEL_INFO)*MAX_CHANNEL_NUM);
if(ChannelPlan >= RT_CHANNEL_DOMAIN_MAX && ChannelPlan != RT_CHANNEL_DOMAIN_REALTEK_DEFINE)
{
if (!rtw_is_channel_plan_valid(ChannelPlan)) {
DBG_871X("ChannelPlan ID %x error !!!!!\n",ChannelPlan);
return chanset_size;
}
_rtw_memset(channel_set, 0, sizeof(RT_CHANNEL_INFO)*MAX_CHANNEL_NUM);
if(IsSupported24G(padapter->registrypriv.wireless_mode))
{
b2_4GBand = _TRUE;
@ -572,6 +581,8 @@ static u8 init_channel_set(_adapter* padapter, u8 ChannelPlan, RT_CHANNEL_INFO *
}
}
Hal_ChannelPlanToRegulation(padapter, ChannelPlan);
DBG_871X("%s ChannelPlan ID %x Chan num:%d \n",__FUNCTION__,ChannelPlan,chanset_size);
return chanset_size;
}
@ -911,12 +922,13 @@ unsigned int OnProbeReq(_adapter *padapter, union recv_frame *precv_frame)
// Commented by Kurt 2012/10/16
// IOT issue: Google Nexus7 use 1M rate to send p2p_probe_req after GO nego completed and Nexus7 is client
#ifdef CONFIG_WIFI_TEST
if ( pattrib->data_rate <= 3 )
{
wifi_test_chk_rate = 0;
}
#endif //CONFIG_WIFI_TEST
if (padapter->registrypriv.wifi_spec == 1)
{
if ( pattrib->data_rate <= 3 )
{
wifi_test_chk_rate = 0;
}
}
if( wifi_test_chk_rate == 1 )
{
@ -1283,8 +1295,23 @@ unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame)
pbss = (WLAN_BSSID_EX*)rtw_malloc(sizeof(WLAN_BSSID_EX));
if (pbss) {
if (collect_bss_info(padapter, precv_frame, pbss) == _SUCCESS) {
struct beacon_keys recv_beacon;
update_network(&(pmlmepriv->cur_network.network), pbss, padapter, _TRUE);
rtw_get_bcn_info(&(pmlmepriv->cur_network));
// update bcn keys
if (rtw_get_bcn_keys(padapter, pframe, len, &recv_beacon) == _TRUE) {
DBG_871X("%s: beacon keys ready\n", __func__);
_rtw_memcpy(&pmlmepriv->cur_beacon_keys,
&recv_beacon, sizeof(recv_beacon));
pmlmepriv->new_beacon_cnts = 0;
}
else {
DBG_871X_LEVEL(_drv_err_, "%s: get beacon keys failed\n", __func__);
_rtw_memset(&pmlmepriv->cur_beacon_keys, 0, sizeof(recv_beacon));
pmlmepriv->new_beacon_cnts = 0;
}
}
rtw_mfree((u8*)pbss, sizeof(WLAN_BSSID_EX));
}
@ -6534,14 +6561,14 @@ void update_mgntframe_attrib(_adapter *padapter, struct pkt_attrib *pattrib)
{
u8 wireless_mode;
struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
//_rtw_memset((u8 *)(pattrib), 0, sizeof(struct pkt_attrib));
pattrib->hdrlen = 24;
pattrib->nr_frags = 1;
pattrib->priority = 7;
pattrib->mac_id = 0;
pattrib->qsel = 0x12;
pattrib->qsel = QSLT_MGNT;
pattrib->pktlen = 0;
@ -6566,6 +6593,7 @@ void update_mgntframe_attrib(_adapter *padapter, struct pkt_attrib *pattrib)
pattrib->retry_ctrl = _TRUE;
pattrib->mbssid = 0;
pattrib->hw_ssn_sel = pxmitpriv->hw_ssn_seq_no;
}
@ -6741,7 +6769,7 @@ void issue_beacon(_adapter *padapter, int timeout_ms)
//update attribute
pattrib = &pmgntframe->attrib;
update_mgntframe_attrib(padapter, pattrib);
pattrib->qsel = 0x10;
pattrib->qsel = QSLT_BEACON;
#ifdef CONFIG_CONCURRENT_MODE
if(padapter->iface_type == IFACE_PORT1)
pattrib->mbssid = 1;
@ -8001,21 +8029,20 @@ void issue_assocreq(_adapter *padapter)
#endif
#endif // Check if the AP's supported rates are also supported by STA.
if (bssrate_len == 0) {
if ((bssrate_len == 0) && (pmlmeinfo->network.SupportedRates[0] != 0)) {
rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf);
rtw_free_xmitframe(pxmitpriv, pmgntframe);
goto exit; //don't connect to AP if no joint supported rate
}
if (bssrate_len > 8)
{
if (bssrate_len > 8) {
pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , 8, bssrate, &(pattrib->pktlen));
pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_ , (bssrate_len - 8), (bssrate + 8), &(pattrib->pktlen));
}
else
{
} else if (bssrate_len > 0) {
pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , bssrate_len , bssrate, &(pattrib->pktlen));
} else {
DBG_871X("%s: Connect to AP without 11b and 11g data rate!\n", __FUNCTION__);
}
//vendor specific IE, such as WPA, WMM, WPS
@ -8441,7 +8468,7 @@ int issue_nulldata(_adapter *padapter, unsigned char *da, unsigned int power_mod
* The null data packet would be sent without power bit,
* and not guarantee success.
*/
s32 issue_nulldata_in_interrupt(PADAPTER padapter, u8 *da)
s32 issue_nulldata_in_interrupt(PADAPTER padapter, u8 *da, unsigned int power_mode)
{
int ret;
struct mlme_ext_priv *pmlmeext;
@ -8455,7 +8482,7 @@ s32 issue_nulldata_in_interrupt(PADAPTER padapter, u8 *da)
if (da == NULL)
da = get_my_bssid(&(pmlmeinfo->network));
ret = _issue_nulldata(padapter, da, 0, _FALSE);
ret = _issue_nulldata(padapter, da, power_mode, _FALSE);
return ret;
}
@ -8867,6 +8894,7 @@ void issue_action_BA(_adapter *padapter, unsigned char *raddr, unsigned char act
u16 BA_timeout_value;
u16 BA_starting_seqctrl;
HT_CAP_AMPDU_FACTOR max_rx_ampdu_factor;
u8 ba_rxbuf_sz;
struct xmit_frame *pmgntframe;
struct pkt_attrib *pattrib;
u8 *pframe;
@ -8880,7 +8908,6 @@ void issue_action_BA(_adapter *padapter, unsigned char *raddr, unsigned char act
struct registry_priv *pregpriv = &padapter->registrypriv;
#ifdef CONFIG_80211N_HT
DBG_871X("%s, category=%d, action=%d, status=%d\n", __FUNCTION__, category, action, status);
if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
{
@ -8927,28 +8954,12 @@ void issue_action_BA(_adapter *padapter, unsigned char *raddr, unsigned char act
} while (pmlmeinfo->dialogToken == 0);
pframe = rtw_set_fixed_ie(pframe, 1, &(pmlmeinfo->dialogToken), &(pattrib->pktlen));
#ifdef CONFIG_BT_COEXIST
if (rtw_btcoex_IsBTCoexCtrlAMPDUSize(padapter) == _TRUE)
{
// A-MSDU NOT Supported
BA_para_set = 0;
// immediate Block Ack
BA_para_set |= (1 << 1) & IEEE80211_ADDBA_PARAM_POLICY_MASK;
// TID
BA_para_set |= (status << 2) & IEEE80211_ADDBA_PARAM_TID_MASK;
// max buffer size is 8 MSDU
BA_para_set |= (8 << 6) & RTW_IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK;
}
else
#endif
{
#if defined(CONFIG_RTL8188E) && defined(CONFIG_SDIO_HCI)
BA_para_set = (0x0802 | ((status & 0xf) << 2)); //immediate ack & 16 buffer size
#else
BA_para_set = (0x1002 | ((status & 0xf) << 2)); //immediate ack & 64 buffer size
#endif
}
//sys_mib.BA_para_set = 0x0802; //immediate ack & 32 buffer size
#if defined(CONFIG_RTL8188E) && defined(CONFIG_SDIO_HCI)
BA_para_set = (0x0802 | ((status & 0xf) << 2)); //immediate ack & 16 buffer size
#else
BA_para_set = (0x1002 | ((status & 0xf) << 2)); //immediate ack & 64 buffer size
#endif
BA_para_set = cpu_to_le16(BA_para_set);
pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(BA_para_set)), &(pattrib->pktlen));
@ -8971,58 +8982,57 @@ void issue_action_BA(_adapter *padapter, unsigned char *raddr, unsigned char act
BA_starting_seqctrl = cpu_to_le16(BA_starting_seqctrl);
pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(BA_starting_seqctrl)), &(pattrib->pktlen));
DBG_871X("%s, category=%d, action=%d, status=%d\n", __FUNCTION__, category, action, status);
break;
case 1: //ADDBA rsp
pframe = rtw_set_fixed_ie(pframe, 1, &(pmlmeinfo->ADDBA_req.dialog_token), &(pattrib->pktlen));
pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&status), &(pattrib->pktlen));
/*
//BA_para_set = cpu_to_le16((le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set) & 0x3f) | 0x1000); //64 buffer size
#if defined(CONFIG_RTL8188E )&& defined (CONFIG_SDIO_HCI)
BA_para_set = ((le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set) & 0x3f) | 0x0800); //32buffer size
#else
BA_para_set = ((le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set) & 0x3f) | 0x1000); //64 buffer size
#endif
*/
BA_para_set = le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set);
if(padapter->driver_rx_ampdu_factor != 0xFF)
max_rx_ampdu_factor = (HT_CAP_AMPDU_FACTOR)padapter->driver_rx_ampdu_factor;
else
rtw_hal_get_def_var(padapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor);
rtw_hal_get_def_var(padapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor);
if(MAX_AMPDU_FACTOR_64K == max_rx_ampdu_factor)
BA_para_set = ((le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set) & 0x3f) | 0x1000); //64 buffer size
ba_rxbuf_sz = 64;
else if(MAX_AMPDU_FACTOR_32K == max_rx_ampdu_factor)
BA_para_set = ((le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set) & 0x3f) | 0x0800); //32 buffer size
ba_rxbuf_sz = 32;
else if(MAX_AMPDU_FACTOR_16K == max_rx_ampdu_factor)
BA_para_set = ((le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set) & 0x3f) | 0x0400); //16 buffer size
ba_rxbuf_sz = 16;
else if(MAX_AMPDU_FACTOR_8K == max_rx_ampdu_factor)
BA_para_set = ((le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set) & 0x3f) | 0x0200); //8 buffer size
ba_rxbuf_sz = 8;
else
BA_para_set = ((le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set) & 0x3f) | 0x1000); //64 buffer size
ba_rxbuf_sz = 64;
#ifdef CONFIG_BT_COEXIST
if (rtw_btcoex_IsBTCoexCtrlAMPDUSize(padapter) == _TRUE &&
padapter->driver_rx_ampdu_factor == 0xFF)
{
// max buffer size is 8 MSDU
BA_para_set &= ~RTW_IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK;
BA_para_set |= (8 << 6) & RTW_IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK;
#ifdef CONFIG_BT_COEXIST
if (rtw_btcoex_IsBTCoexCtrlAMPDUSize(padapter) == _TRUE)
ba_rxbuf_sz = rtw_btcoex_GetAMPDUSize(padapter);
#endif
if (padapter->fix_ba_rxbuf_bz != 0xFF)
ba_rxbuf_sz = padapter->fix_ba_rxbuf_bz;
if (ba_rxbuf_sz > 127)
ba_rxbuf_sz = 127;
BA_para_set &= ~RTW_IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK;
BA_para_set |= (ba_rxbuf_sz << 6) & RTW_IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK;
if (!padapter->registrypriv.wifi_spec) {
if(pregpriv->ampdu_amsdu==0)//disabled
BA_para_set &= ~BIT(0);
else if(pregpriv->ampdu_amsdu==1)//enabled
BA_para_set |= BIT(0);
}
#endif
if(pregpriv->ampdu_amsdu==0)//disabled
BA_para_set = cpu_to_le16(BA_para_set & ~BIT(0));
else if(pregpriv->ampdu_amsdu==1)//enabled
BA_para_set = cpu_to_le16(BA_para_set | BIT(0));
else //auto
BA_para_set = cpu_to_le16(BA_para_set);
//set amsdu_ampdu to auto during wifi logo test
if (padapter->registrypriv.wifi_spec)
BA_para_set = cpu_to_le16(BA_para_set);
BA_para_set = cpu_to_le16(BA_para_set);
pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(BA_para_set)), &(pattrib->pktlen));
pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(pmlmeinfo->ADDBA_req.BA_timeout_value)), &(pattrib->pktlen));
DBG_871X("%s, category=%d, action=%d, status=%d, rxbuf_sz=%u\n", __FUNCTION__, category, action, status, ba_rxbuf_sz);
break;
case 2://DELBA
BA_para_set = (status & 0x1F) << 3;
@ -9032,6 +9042,7 @@ void issue_action_BA(_adapter *padapter, unsigned char *raddr, unsigned char act
reason_code = 37;//Requested from peer STA as it does not want to use the mechanism
reason_code = cpu_to_le16(reason_code);
pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(reason_code)), &(pattrib->pktlen));
DBG_871X("%s, category=%d, action=%d, status=%d\n", __FUNCTION__, category, action, status);
break;
default:
break;
@ -9202,6 +9213,140 @@ static void issue_action_BSSCoexistPacket(_adapter *padapter)
#endif //CONFIG_80211N_HT
}
// Spatial Multiplexing Powersave (SMPS) action frame
int _issue_action_SM_PS(_adapter *padapter , unsigned char *raddr , u8 NewMimoPsMode , u8 wait_ack)
{
int ret=0;
unsigned char category = RTW_WLAN_CATEGORY_HT;
u8 action = RTW_WLAN_ACTION_HT_SM_PS;
u8 sm_power_control=0;
struct xmit_frame *pmgntframe;
struct pkt_attrib *pattrib;
unsigned char *pframe;
struct rtw_ieee80211_hdr *pwlanhdr;
unsigned short *fctrl;
struct xmit_priv *pxmitpriv = &(padapter->xmitpriv);
struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
if(NewMimoPsMode==WLAN_HT_CAP_SM_PS_DISABLED)
{
sm_power_control = sm_power_control & ~(BIT(0)); // SM Power Save Enable = 0 SM Power Save Disable
}
else if(NewMimoPsMode==WLAN_HT_CAP_SM_PS_STATIC)
{
sm_power_control = sm_power_control | BIT(0); // SM Power Save Enable = 1 SM Power Save Enable
sm_power_control = sm_power_control & ~(BIT(1)); // SM Mode = 0 Static Mode
}
else if(NewMimoPsMode==WLAN_HT_CAP_SM_PS_DYNAMIC)
{
sm_power_control = sm_power_control | BIT(0); // SM Power Save Enable = 1 SM Power Save Enable
sm_power_control = sm_power_control | BIT(1); // SM Mode = 1 Dynamic Mode
}
else
return ret;
DBG_871X("%s, sm_power_control=%u, NewMimoPsMode=%u\n", __FUNCTION__ , sm_power_control , NewMimoPsMode );
if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL)
return ret;
//update attribute
pattrib = &pmgntframe->attrib;
update_mgntframe_attrib(padapter, pattrib);
_rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET);
pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
fctrl = &(pwlanhdr->frame_ctl);
*(fctrl) = 0;
_rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); /* RA */
_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); /* TA */
_rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); /* DA = RA */
SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq);
pmlmeext->mgnt_seq++;
SetFrameSubType(pframe, WIFI_ACTION);
pframe += sizeof(struct rtw_ieee80211_hdr_3addr);
pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr);
/* category, action */
pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen));
pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen));
pframe = rtw_set_fixed_ie(pframe, 1, &(sm_power_control), &(pattrib->pktlen));
pattrib->last_txcmdsz = pattrib->pktlen;
if(wait_ack)
{
ret = dump_mgntframe_and_wait_ack(padapter, pmgntframe);
}
else
{
dump_mgntframe(padapter, pmgntframe);
ret = _SUCCESS;
}
if (ret != _SUCCESS)
DBG_8192C("%s, ack to\n", __func__);
return ret;
}
int issue_action_SM_PS_wait_ack(_adapter *padapter, unsigned char *raddr, u8 NewMimoPsMode, int try_cnt, int wait_ms)
{
int ret = 0;
int i = 0;
u32 start = rtw_get_current_time();
do {
ret = _issue_action_SM_PS(padapter, raddr, NewMimoPsMode , wait_ms>0?_TRUE:_FALSE );
i++;
if (padapter->bDriverStopped || padapter->bSurpriseRemoved)
break;
if(i < try_cnt && wait_ms > 0 && ret==_FAIL)
rtw_msleep_os(wait_ms);
}while((i<try_cnt) && ((ret==_FAIL)||(wait_ms==0)));
if (ret != _FAIL) {
ret = _SUCCESS;
#ifndef DBG_XMIT_ACK
goto exit;
#endif
}
if (try_cnt && wait_ms) {
if (raddr)
DBG_871X(FUNC_ADPT_FMT" to "MAC_FMT", %s , %d/%d in %u ms\n",
FUNC_ADPT_ARG(padapter), MAC_ARG(raddr),
ret==_SUCCESS?", acked":"", i, try_cnt, rtw_get_passing_time_ms(start));
else
DBG_871X(FUNC_ADPT_FMT", %s , %d/%d in %u ms\n",
FUNC_ADPT_ARG(padapter),
ret==_SUCCESS?", acked":"", i, try_cnt, rtw_get_passing_time_ms(start));
}
exit:
return ret;
}
int issue_action_SM_PS(_adapter *padapter , unsigned char *raddr , u8 NewMimoPsMode )
{
DBG_871X("%s to "MAC_FMT"\n", __func__, MAC_ARG(raddr));
return _issue_action_SM_PS(padapter, raddr, NewMimoPsMode , _FALSE );
}
unsigned int send_delba(_adapter *padapter, u8 initiator, u8 *addr)
{
struct sta_priv *pstapriv = &padapter->stapriv;
@ -9273,13 +9418,16 @@ unsigned int send_beacon(_adapter *padapter)
//#endif
#ifdef CONFIG_PCI_HCI
//DBG_871X("%s\n", __FUNCTION__);
rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL);
/* 8192EE Port select for Beacon DL */
rtw_hal_set_hwreg(padapter, HW_VAR_DL_BCN_SEL, NULL);
issue_beacon(padapter, 0);
return _SUCCESS;
#endif
#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
@ -9625,12 +9773,13 @@ void site_survey(_adapter *padapter)
rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_LISTEN);
pmlmeext->sitesurvey_res.state = SCAN_DISABLE;
initialgain = 0xff; //restore RX GAIN
rtw_hal_set_hwreg(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain));
//turn on dynamic functions
//turn on phy-dynamic functions
Restore_DM_Func_Flag(padapter);
//Switch_DM_Func(padapter, DYNAMIC_FUNC_DIG|DYNAMIC_FUNC_HP|DYNAMIC_FUNC_SS, _TRUE);
initialgain = 0xff; //restore RX GAIN
rtw_hal_set_hwreg(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain));
_set_timer( &pwdinfo->find_phase_timer, ( u32 ) ( ( u32 ) ( pwdinfo->listen_dwell ) * 100 ) );
}
else
@ -9705,11 +9854,13 @@ void site_survey(_adapter *padapter)
//config MSR
Set_MSR(padapter, (pmlmeinfo->state & 0x3));
initialgain = 0xff; //restore RX GAIN
rtw_hal_set_hwreg(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain));
//turn on dynamic functions
//turn on phy-dynamic functions
Restore_DM_Func_Flag(padapter);
//Switch_DM_Func(padapter, DYNAMIC_ALL_FUNC_ENABLE, _TRUE);
initialgain = 0xff; //restore RX GAIN
rtw_hal_set_hwreg(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain));
if (is_client_associated_to_ap(padapter) == _TRUE)
{
@ -10090,6 +10241,7 @@ void start_clnt_join(_adapter* padapter)
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network));
int beacon_timeout;
u8 ASIX_ID[]= {0x00, 0x0E, 0xC6};
//update wireless mode
update_wireless_mode(padapter);
@ -10097,6 +10249,12 @@ void start_clnt_join(_adapter* padapter)
//udpate capability
caps = rtw_get_capability((WLAN_BSSID_EX *)pnetwork);
update_capinfo(padapter, caps);
//check if sta is ASIX peer and fix IOT issue if it is.
if (_rtw_memcmp(get_my_bssid(&pmlmeinfo->network) ,ASIX_ID ,3)) {
u8 iot_flag = _TRUE;
rtw_hal_set_hwreg(padapter, HW_VAR_ASIX_IOT, (u8 *)(&iot_flag));
}
if (caps&cap_ESS)
{
Set_MSR(padapter, WIFI_FW_STATION_STATE);
@ -11042,6 +11200,7 @@ static void rtw_mlmeext_disconnect(_adapter *padapter)
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network));
u8 state_backup = (pmlmeinfo->state&0x03);
u8 ASIX_ID[]= {0x00, 0x0E, 0xC6};
//set_opmode_cmd(padapter, infra_client_with_mlme);
@ -11067,6 +11226,11 @@ static void rtw_mlmeext_disconnect(_adapter *padapter)
//set MSR to no link state -> infra. mode
Set_MSR(padapter, _HW_STATE_STATION_);
//check if sta is ASIX peer and fix IOT issue if it is.
if (_rtw_memcmp(get_my_bssid(&pmlmeinfo->network) ,ASIX_ID ,3)) {
u8 iot_flag = _FALSE;
rtw_hal_set_hwreg(padapter, HW_VAR_ASIX_IOT, (u8 *)(&iot_flag));
}
pmlmeinfo->state = WIFI_FW_NULL_STATE;
if(state_backup == WIFI_FW_STATION_STATE)
@ -11321,10 +11485,10 @@ void _linked_info_dump(_adapter *padapter)
{
int i;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
u8 mac_id;
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
int UndecoratedSmoothedPWDB;
struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter);
struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj);
if(padapter->bLinkInfoDump){
@ -11359,13 +11523,13 @@ void _linked_info_dump(_adapter *padapter)
_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL);
}
for(i=0; i<NUM_STA; i++)
for(i=0; i<macid_ctl->num; i++)
{
if(pdvobj->macid[i] == _TRUE)
{
if(i !=1) //skip bc/mc sta
//============ tx info ============
rtw_hal_get_def_var(padapter, HW_DEF_RA_INFO_DUMP, &i);
if(rtw_macid_is_used(macid_ctl, i)
&& !rtw_macid_is_bmc(macid_ctl, i) /* skip bc/mc sta */
) {
//============ tx info ============
rtw_hal_get_def_var(padapter, HW_DEF_RA_INFO_DUMP, &i);
}
}
rtw_hal_set_def_var(padapter, HAL_DEF_DBG_RX_INFO_DUMP, NULL);
@ -11529,7 +11693,8 @@ struct candidate_pool{
}
#endif //CONFIG_TDLS
void linked_status_chk(_adapter *padapter)
//from_timer == 1 means driver is in LPS
void linked_status_chk(_adapter *padapter, u8 from_timer)
{
u32 i;
struct sta_info *psta;
@ -11556,10 +11721,20 @@ void linked_status_chk(_adapter *padapter)
#endif
#ifdef CONFIG_P2P
if (!rtw_p2p_chk_state(&padapter->wdinfo, P2P_STATE_NONE))
link_count_limit = 3; // 8 sec
{
if(!from_timer)
link_count_limit = 3; // 8 sec
else
link_count_limit = 15; // 32 sec
}
else
#endif // CONFIG_P2P
link_count_limit = 7; // 16 sec
{
if(!from_timer)
link_count_limit = 7; // 16 sec
else
link_count_limit = 29; // 60 sec
}
// Marked by Kurt 20130715
// For WiDi 3.5 and latered on, they don't ask WiDi sink to do roaming, so we could not check rx limit that strictly.
@ -11623,9 +11798,9 @@ void linked_status_chk(_adapter *padapter)
if (tx_chk != _SUCCESS && pmlmeinfo->link_count++ == link_count_limit) {
#ifdef DBG_EXPIRATION_CHK
DBG_871X("%s issue_nulldata 0\n", __FUNCTION__);
DBG_871X("%s issue_nulldata(%d)\n", __FUNCTION__, from_timer?1:0);
#endif
tx_chk = issue_nulldata_in_interrupt(padapter, NULL);
tx_chk = issue_nulldata_in_interrupt(padapter, NULL, from_timer?1:0);
}
}
@ -11849,7 +12024,7 @@ void link_timer_hdl(_adapter *padapter)
{
if (tx_cnt == pxmitpriv->tx_pkts)
{
issue_nulldata_in_interrupt(padapter, NULL);
issue_nulldata_in_interrupt(padapter, NULL, 0);
}
tx_cnt = pxmitpriv->tx_pkts;
@ -12140,14 +12315,14 @@ u8 createbss_hdl(_adapter *padapter, u8 *pbuf)
pmlmeinfo->agg_enable_bitmap = 0;
pmlmeinfo->candidate_tid_bitmap = 0;
//disable dynamic functions, such as high power, DIG
Save_DM_Func_Flag(padapter);
Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE);
//config the initial gain under linking, need to write the BB registers
//initialgain = 0x1E;
//rtw_hal_set_hwreg(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain));
//disable dynamic functions, such as high power, DIG
Save_DM_Func_Flag(padapter);
Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE);
//cancel link timer
_cancel_timer_ex(&pmlmeext->link_timer);
@ -12651,10 +12826,6 @@ u8 sitesurvey_cmd_hdl(_adapter *padapter, u8 *pbuf)
#endif
#endif /* CONFIG_FIND_BEST_CHANNEL */
//disable dynamic functions, such as high power, DIG
Save_DM_Func_Flag(padapter);
Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE);
//config the initial gain under scaning, need to write the BB registers
#ifdef CONFIG_P2P
#ifdef CONFIG_IOCTL_CFG80211
@ -12669,6 +12840,10 @@ u8 sitesurvey_cmd_hdl(_adapter *padapter, u8 *pbuf)
initialgain = 0x1e;
rtw_hal_set_hwreg(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain));
//disable dynamic functions, such as high power, DIG
Save_DM_Func_Flag(padapter);
Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE);
//set MSR to no link state
Set_MSR(padapter, _HW_STATE_NOLINK_);
@ -13018,7 +13193,7 @@ u8 chk_bmc_sleepq_hdl(_adapter *padapter, unsigned char *pbuf)
pxmitframe->attrib.triggered=1;
if (xmitframe_hiq_filter(pxmitframe) == _TRUE)
pxmitframe->attrib.qsel = 0x11;//HIQ
pxmitframe->attrib.qsel = QSLT_HIGH;//HIQ
#if 0
_exit_critical_bh(&psta_bmc->sleep_q.lock, &irqL);
@ -14218,23 +14393,27 @@ u8 set_ch_hdl(_adapter *padapter, u8 *pbuf)
u8 set_chplan_hdl(_adapter *padapter, unsigned char *pbuf)
{
struct SetChannelPlan_param *setChannelPlan_param;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_priv *mlme = &padapter->mlmepriv;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
if(!pbuf)
return H2C_PARAMETERS_ERROR;
setChannelPlan_param = (struct SetChannelPlan_param *)pbuf;
if(!rtw_is_channel_plan_valid(setChannelPlan_param->channel_plan)) {
return H2C_PARAMETERS_ERROR;
}
mlme->ChannelPlan = setChannelPlan_param->channel_plan;
pmlmeext->max_chan_nums = init_channel_set(padapter, setChannelPlan_param->channel_plan, pmlmeext->channel_set);
init_channel_list(padapter, pmlmeext->channel_set, pmlmeext->max_chan_nums, &pmlmeext->channel_list);
rtw_hal_set_odm_var(padapter,HAL_ODM_REGULATION,NULL,_TRUE);
#ifdef CONFIG_IOCTL_CFG80211
if ((padapter->rtw_wdev != NULL) && (padapter->rtw_wdev->wiphy)) {
struct regulatory_request request;
request.initiator = NL80211_REGDOM_SET_BY_DRIVER;
rtw_reg_notifier(padapter->rtw_wdev->wiphy, &request);
}
rtw_reg_notify_by_driver(padapter);
#endif //CONFIG_IOCTL_CFG80211
return H2C_SUCCESS;
@ -14500,3 +14679,18 @@ u8 tdls_hdl(_adapter *padapter, unsigned char *pbuf)
}
u8 run_in_thread_hdl(_adapter *padapter, u8 *pbuf)
{
struct RunInThread_param *p;
if (NULL == pbuf)
return H2C_PARAMETERS_ERROR;
p = (struct RunInThread_param*)pbuf;
if (p->func)
p->func(p->context);
return H2C_SUCCESS;
}

282
drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_mp.c
View File

@ -25,7 +25,7 @@
#include <sys/unistd.h> /* for RFHIGHPID */
#endif
#include "../hal/OUTSRC/odm_precomp.h"
#include "../hal/OUTSRC/phydm_precomp.h"
#if defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8821A)
#include <rtw_bt_mp.h>
#endif
@ -292,7 +292,7 @@ s32 init_mp_priv(PADAPTER padapter)
pmppriv->tx.stop = 1;
pmppriv->bSetTxPower=0; //for manually set tx power
pmppriv->bTxBufCkFail=_FALSE;
pmppriv->pktInterval=1;
pmppriv->pktInterval=0;
mp_init_xmit_attrib(&pmppriv->tx, padapter);
@ -423,7 +423,7 @@ void mpt_InitHWConfig(PADAPTER Adapter)
#define PHY_IQCalibrate(_Adapter, b) \
IS_HARDWARE_TYPE_8812(_Adapter) ? PHY_IQCalibrate_8812A(_Adapter, b) : \
IS_HARDWARE_TYPE_8821(_Adapter) ? PHY_IQCalibrate_8821A(_Adapter, b) : \
IS_HARDWARE_TYPE_8821(_Adapter) ? PHY_IQCalibrate_8821A(&(GET_HAL_DATA(_Adapter)->odmpriv), b) : \
PHY_IQCalibrate_default(_Adapter, b)
#define PHY_LCCalibrate(_Adapter) \
@ -449,17 +449,13 @@ static void PHY_IQCalibrate(PADAPTER padapter, u8 bReCovery)
u8 b2ant; //false:1ant, true:2-ant
u8 RF_Path; //0:S1, 1:S0
pHalData = GET_HAL_DATA(padapter);
b2ant = pHalData->EEPROMBluetoothAntNum==Ant_x2?_TRUE:_FALSE;
RF_Path = 0;
#ifdef CONFIG_USB_HCI
RF_Path = 1;
#endif
PHY_IQCalibrate_8723B(padapter, bReCovery, _FALSE, b2ant, RF_Path);
PHY_IQCalibrate_8723B(padapter, bReCovery, _FALSE, b2ant, pHalData->ant_path);
}
#define PHY_LCCalibrate(a) PHY_LCCalibrate_8723B(&(GET_HAL_DATA(a)->odmpriv))
#define PHY_SetRFPathSwitch(a,b) PHY_SetRFPathSwitch_8723B(a,b)
#endif
@ -690,7 +686,7 @@ void MPT_PwrCtlDM(PADAPTER padapter, u32 bstart)
struct dm_priv *pdmpriv = &pHalData->dmpriv;
PDM_ODM_T pDM_Odm = &pHalData->odmpriv;
if (bstart==1){
if (bstart==1){
DBG_871X("in MPT_PwrCtlDM start \n");
Switch_DM_Func(padapter, DYNAMIC_RF_TX_PWR_TRACK, _TRUE);
pdmpriv->InitODMFlag |= ODM_RF_TX_PWR_TRACK ;
@ -798,7 +794,7 @@ u32 mp_join(PADAPTER padapter,u8 mode)
res = _FAIL;
goto end_of_mp_start_test;
}
set_fwstate(pmlmepriv,WIFI_ADHOC_MASTER_STATE);
//3 3. join psudo AdHoc
tgt_network->join_res = 1;
tgt_network->aid = psta->aid = 1;
@ -806,6 +802,7 @@ u32 mp_join(PADAPTER padapter,u8 mode)
rtw_indicate_connect(padapter);
_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
set_fwstate(pmlmepriv,_FW_LINKED);
end_of_mp_start_test:
@ -1268,7 +1265,7 @@ static thread_return mp_xmit_packet_thread(thread_context context)
goto exit;
}
else {
rtw_usleep_os(100);
rtw_usleep_os(10);
continue;
}
}
@ -1468,8 +1465,15 @@ void fill_tx_desc_8192e(PADAPTER padapter)
offset = TXDESC_SIZE + OFFSET_SZ;
SET_TX_DESC_OFFSET_92E(pDesc, offset);
#if defined(CONFIG_PCI_HCI) //8192EE
SET_TX_DESC_OFFSET_92E(pDesc, offset+8); //work around
SET_TX_DESC_PKT_OFFSET_92E(pDesc, 0); /* 8192EE pkt_offset is 0 */
#else //8192EU 8192ES
SET_TX_DESC_OFFSET_92E(pDesc, offset);
SET_TX_DESC_PKT_OFFSET_92E(pDesc, 1);
#endif
if (bmcast) {
SET_TX_DESC_BMC_92E(pDesc, 1);
@ -1483,7 +1487,8 @@ void fill_tx_desc_8192e(PADAPTER padapter)
//SET_TX_DESC_QUEUE_SEL_8812(pDesc, QSLT_MGNT);
if (!pattrib->qos_en) {
SET_TX_DESC_HWSEQ_SEL_92E(pDesc, 1); // Hw set sequence number
SET_TX_DESC_EN_HWSEQ_92E(pDesc, 1);// Hw set sequence number
SET_TX_DESC_HWSEQ_SEL_92E(pDesc, pattrib->hw_ssn_sel);
} else {
SET_TX_DESC_SEQ_92E(pDesc, pattrib->seqnum);
}
@ -1507,34 +1512,33 @@ void fill_tx_desc_8192e(PADAPTER padapter)
#if defined(CONFIG_RTL8723B)
void fill_tx_desc_8723b(PADAPTER padapter)
{
struct mp_priv *pmp_priv = &padapter->mppriv;
struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib);
PTXDESC_8723B ptxdesc = (PTXDESC_8723B)&(pmp_priv->tx.desc);
u8 descRate;
ptxdesc->bk = 1;
ptxdesc->macid = pattrib->mac_id;
ptxdesc->qsel = pattrib->qsel;
u8 *ptxdesc = pmp_priv->tx.desc;
ptxdesc->rate_id = pattrib->raid;
ptxdesc->seq = pattrib->seqnum;
ptxdesc->en_hwseq = 1;
ptxdesc->userate = 1;
ptxdesc->disdatafb = 1;
SET_TX_DESC_AGG_BREAK_8723B(ptxdesc, 1);
SET_TX_DESC_MACID_8723B(ptxdesc, pattrib->mac_id);
SET_TX_DESC_QUEUE_SEL_8723B(ptxdesc, pattrib->qsel);
if( pmp_priv->preamble ){
if (pmp_priv->rateidx <= MPT_RATE_54M)
ptxdesc->data_short = 1;
SET_TX_DESC_RATE_ID_8723B(ptxdesc, pattrib->raid);
SET_TX_DESC_SEQ_8723B(ptxdesc, pattrib->seqnum);
SET_TX_DESC_HWSEQ_EN_8723B(ptxdesc, 1);
SET_TX_DESC_USE_RATE_8723B(ptxdesc, 1);
SET_TX_DESC_DISABLE_FB_8723B(ptxdesc, 1);
if (pmp_priv->preamble)
if (pmp_priv->rateidx <= MPT_RATE_54M) {
SET_TX_DESC_DATA_SHORT_8723B(ptxdesc, 1);
}
if (pmp_priv->bandwidth == CHANNEL_WIDTH_40) {
SET_TX_DESC_DATA_BW_8723B(ptxdesc, 1);
}
if (pmp_priv->bandwidth == CHANNEL_WIDTH_40)
ptxdesc->data_bw = 1;
ptxdesc->datarate = pmp_priv->rateidx;
ptxdesc->data_ratefb_lmt = 0x1F;
ptxdesc->rts_ratefb_lmt = 0xF;
SET_TX_DESC_TX_RATE_8723B(ptxdesc, pmp_priv->rateidx);
SET_TX_DESC_DATA_RATE_FB_LIMIT_8723B(ptxdesc, 0x1F);
SET_TX_DESC_RTS_RATE_FB_LIMIT_8723B(ptxdesc, 0xF);
}
#endif
@ -1665,16 +1669,18 @@ void SetPacketTx(PADAPTER padapter)
if(pmp_priv->TXradomBuffer == NULL)
{
DBG_871X("mp create random buffer fail!\n");
goto exit;
}
else
{
for(i=0;i<4096;i++)
pmp_priv->TXradomBuffer[i] = rtw_random32() %0xFF;
}
for(i=0;i<4096;i++)
pmp_priv->TXradomBuffer[i] = rtw_random32() %0xFF;
//startPlace = (u32)(rtw_random32() % 3450);
_rtw_memcpy(ptr, pmp_priv->TXradomBuffer,pkt_end - ptr);
//_rtw_memset(ptr, payload, pkt_end - ptr);
rtw_mfree(pmp_priv->TXradomBuffer,4096);
//3 6. start thread
#ifdef PLATFORM_LINUX
pmp_priv->tx.PktTxThread = kthread_run(mp_xmit_packet_thread, pmp_priv, "RTW_MP_THREAD");
@ -1694,7 +1700,8 @@ void SetPacketTx(PADAPTER padapter)
#endif
Rtw_MPSetMacTxEDCA(padapter);
exit:
return;
}
void SetPacketRx(PADAPTER pAdapter, u8 bStartRx)
@ -1795,7 +1802,7 @@ static u32 rtw_GetPSDData(PADAPTER pAdapter, u32 point)
{
u32 psd_val=0;
#if defined(CONFIG_RTL8812A) //MP PSD for 8812A
#if defined(CONFIG_RTL8812A)||defined(CONFIG_RTL8821A) //MP PSD for 8812A
u16 psd_reg = 0x910;
u16 psd_regL= 0xF44;
@ -2195,8 +2202,7 @@ mpt_ProQueryCalTxPower_8188E(
CurrChannel = 1;
}
if( pMptCtx->MptRateIndex >= MPT_RATE_1M &&
pMptCtx->MptRateIndex <= MPT_RATE_11M )
if(pMptCtx->MptRateIndex <= MPT_RATE_11M )
{
TxPower = pHalData->Index24G_CCK_Base[rf_path][index];
}
@ -2240,8 +2246,7 @@ mpt_ProQueryCalTxPower_8188E(
#endif
// 2012/11/02 Awk: add power limit mechansim
if( pMptCtx->MptRateIndex >= MPT_RATE_1M &&
pMptCtx->MptRateIndex <= MPT_RATE_11M )
if( pMptCtx->MptRateIndex <= MPT_RATE_11M )
{
rate = MGN_1M;
}
@ -2272,72 +2277,141 @@ mpt_ProQueryCalTxPower_8188E(
return TxPower;
}
u8 MptToMgntRate(u32 MptRateIdx)
u8
MptToMgntRate(
IN ULONG MptRateIdx
)
{
// Mapped to MGN_XXX defined in MgntGen.h
switch (MptRateIdx)
{
/* CCK rate. */
case MPT_RATE_1M: return 2;
case MPT_RATE_2M: return 4;
case MPT_RATE_55M: return 11;
case MPT_RATE_11M: return 22;
/* OFDM rate. */
case MPT_RATE_6M: return 12;
case MPT_RATE_9M: return 18;
case MPT_RATE_12M: return 24;
case MPT_RATE_18M: return 36;
case MPT_RATE_24M: return 48;
case MPT_RATE_36M: return 72;
case MPT_RATE_48M: return 96;
case MPT_RATE_54M: return 108;
/* HT rate. */
case MPT_RATE_MCS0: return 0x80;
case MPT_RATE_MCS1: return 0x81;
case MPT_RATE_MCS2: return 0x82;
case MPT_RATE_MCS3: return 0x83;
case MPT_RATE_MCS4: return 0x84;
case MPT_RATE_MCS5: return 0x85;
case MPT_RATE_MCS6: return 0x86;
case MPT_RATE_MCS7: return 0x87;
case MPT_RATE_MCS8: return 0x88;
case MPT_RATE_MCS9: return 0x89;
case MPT_RATE_MCS10: return 0x8A;
case MPT_RATE_MCS11: return 0x8B;
case MPT_RATE_MCS12: return 0x8C;
case MPT_RATE_MCS13: return 0x8D;
case MPT_RATE_MCS14: return 0x8E;
case MPT_RATE_MCS15: return 0x8F;
/* VHT rate. */
case MPT_RATE_VHT1SS_MCS0: return 0x90;
case MPT_RATE_VHT1SS_MCS1: return 0x91;
case MPT_RATE_VHT1SS_MCS2: return 0x92;
case MPT_RATE_VHT1SS_MCS3: return 0x93;
case MPT_RATE_VHT1SS_MCS4: return 0x94;
case MPT_RATE_VHT1SS_MCS5: return 0x95;
case MPT_RATE_VHT1SS_MCS6: return 0x96;
case MPT_RATE_VHT1SS_MCS7: return 0x97;
case MPT_RATE_VHT1SS_MCS8: return 0x98;
case MPT_RATE_VHT1SS_MCS9: return 0x99;
case MPT_RATE_VHT2SS_MCS0: return 0x9A;
case MPT_RATE_VHT2SS_MCS1: return 0x9B;
case MPT_RATE_VHT2SS_MCS2: return 0x9C;
case MPT_RATE_VHT2SS_MCS3: return 0x9D;
case MPT_RATE_VHT2SS_MCS4: return 0x9E;
case MPT_RATE_VHT2SS_MCS5: return 0x9F;
case MPT_RATE_VHT2SS_MCS6: return 0xA0;
case MPT_RATE_VHT2SS_MCS7: return 0xA1;
case MPT_RATE_VHT2SS_MCS8: return 0xA2;
case MPT_RATE_VHT2SS_MCS9: return 0xA3;
case MPT_RATE_1M: return MGN_1M;
case MPT_RATE_2M: return MGN_2M;
case MPT_RATE_55M: return MGN_5_5M;
case MPT_RATE_11M: return MGN_11M;
/* OFDM rate. */
case MPT_RATE_6M: return MGN_6M;
case MPT_RATE_9M: return MGN_9M;
case MPT_RATE_12M: return MGN_12M;
case MPT_RATE_18M: return MGN_18M;
case MPT_RATE_24M: return MGN_24M;
case MPT_RATE_36M: return MGN_36M;
case MPT_RATE_48M: return MGN_48M;
case MPT_RATE_54M: return MGN_54M;
/* HT rate. */
case MPT_RATE_MCS0: return MGN_MCS0;
case MPT_RATE_MCS1: return MGN_MCS1;
case MPT_RATE_MCS2: return MGN_MCS2;
case MPT_RATE_MCS3: return MGN_MCS3;
case MPT_RATE_MCS4: return MGN_MCS4;
case MPT_RATE_MCS5: return MGN_MCS5;
case MPT_RATE_MCS6: return MGN_MCS6;
case MPT_RATE_MCS7: return MGN_MCS7;
case MPT_RATE_MCS8: return MGN_MCS8;
case MPT_RATE_MCS9: return MGN_MCS9;
case MPT_RATE_MCS10: return MGN_MCS10;
case MPT_RATE_MCS11: return MGN_MCS11;
case MPT_RATE_MCS12: return MGN_MCS12;
case MPT_RATE_MCS13: return MGN_MCS13;
case MPT_RATE_MCS14: return MGN_MCS14;
case MPT_RATE_MCS15: return MGN_MCS15;
case MPT_RATE_MCS16: return MGN_MCS16;
case MPT_RATE_MCS17: return MGN_MCS17;
case MPT_RATE_MCS18: return MGN_MCS18;
case MPT_RATE_MCS19: return MGN_MCS19;
case MPT_RATE_MCS20: return MGN_MCS20;
case MPT_RATE_MCS21: return MGN_MCS21;
case MPT_RATE_MCS22: return MGN_MCS22;
case MPT_RATE_MCS23: return MGN_MCS23;
case MPT_RATE_MCS24: return MGN_MCS24;
case MPT_RATE_MCS25: return MGN_MCS25;
case MPT_RATE_MCS26: return MGN_MCS26;
case MPT_RATE_MCS27: return MGN_MCS27;
case MPT_RATE_MCS28: return MGN_MCS28;
case MPT_RATE_MCS29: return MGN_MCS29;
case MPT_RATE_MCS30: return MGN_MCS30;
case MPT_RATE_MCS31: return MGN_MCS31;
/* VHT rate. */
case MPT_RATE_VHT1SS_MCS0: return MGN_VHT1SS_MCS0;
case MPT_RATE_VHT1SS_MCS1: return MGN_VHT1SS_MCS1;
case MPT_RATE_VHT1SS_MCS2: return MGN_VHT1SS_MCS2;
case MPT_RATE_VHT1SS_MCS3: return MGN_VHT1SS_MCS3;
case MPT_RATE_VHT1SS_MCS4: return MGN_VHT1SS_MCS4;
case MPT_RATE_VHT1SS_MCS5: return MGN_VHT1SS_MCS5;
case MPT_RATE_VHT1SS_MCS6: return MGN_VHT1SS_MCS6;
case MPT_RATE_VHT1SS_MCS7: return MGN_VHT1SS_MCS7;
case MPT_RATE_VHT1SS_MCS8: return MGN_VHT1SS_MCS8;
case MPT_RATE_VHT1SS_MCS9: return MGN_VHT1SS_MCS9;
case MPT_RATE_VHT2SS_MCS0: return MGN_VHT2SS_MCS0;
case MPT_RATE_VHT2SS_MCS1: return MGN_VHT2SS_MCS1;
case MPT_RATE_VHT2SS_MCS2: return MGN_VHT2SS_MCS2;
case MPT_RATE_VHT2SS_MCS3: return MGN_VHT2SS_MCS3;
case MPT_RATE_VHT2SS_MCS4: return MGN_VHT2SS_MCS4;
case MPT_RATE_VHT2SS_MCS5: return MGN_VHT2SS_MCS5;
case MPT_RATE_VHT2SS_MCS6: return MGN_VHT2SS_MCS6;
case MPT_RATE_VHT2SS_MCS7: return MGN_VHT2SS_MCS7;
case MPT_RATE_VHT2SS_MCS8: return MGN_VHT2SS_MCS8;
case MPT_RATE_VHT2SS_MCS9: return MGN_VHT2SS_MCS9;
case MPT_RATE_VHT3SS_MCS0: return MGN_VHT3SS_MCS0;
case MPT_RATE_VHT3SS_MCS1: return MGN_VHT3SS_MCS1;
case MPT_RATE_VHT3SS_MCS2: return MGN_VHT3SS_MCS2;
case MPT_RATE_VHT3SS_MCS3: return MGN_VHT3SS_MCS3;
case MPT_RATE_VHT3SS_MCS4: return MGN_VHT3SS_MCS4;
case MPT_RATE_VHT3SS_MCS5: return MGN_VHT3SS_MCS5;
case MPT_RATE_VHT3SS_MCS6: return MGN_VHT3SS_MCS6;
case MPT_RATE_VHT3SS_MCS7: return MGN_VHT3SS_MCS7;
case MPT_RATE_VHT3SS_MCS8: return MGN_VHT3SS_MCS8;
case MPT_RATE_VHT3SS_MCS9: return MGN_VHT3SS_MCS9;
case MPT_RATE_VHT4SS_MCS0: return MGN_VHT4SS_MCS0;
case MPT_RATE_VHT4SS_MCS1: return MGN_VHT4SS_MCS1;
case MPT_RATE_VHT4SS_MCS2: return MGN_VHT4SS_MCS2;
case MPT_RATE_VHT4SS_MCS3: return MGN_VHT4SS_MCS3;
case MPT_RATE_VHT4SS_MCS4: return MGN_VHT4SS_MCS4;
case MPT_RATE_VHT4SS_MCS5: return MGN_VHT4SS_MCS5;
case MPT_RATE_VHT4SS_MCS6: return MGN_VHT4SS_MCS6;
case MPT_RATE_VHT4SS_MCS7: return MGN_VHT4SS_MCS7;
case MPT_RATE_VHT4SS_MCS8: return MGN_VHT4SS_MCS8;
case MPT_RATE_VHT4SS_MCS9: return MGN_VHT4SS_MCS9;
case MPT_RATE_LAST:// fully automatic
default:
DBG_8192C("<===MptToMgntRate(), Invalid Rate: %d!!\n", MptRateIdx);
return 0x0;
case MPT_RATE_LAST: // fully automatiMGN_VHT2SS_MCS1;
default:
DBG_871X("<===MptToMgntRate(), Invalid Rate: %d!!\n", MptRateIdx);
return 0x0;
}
}
u8 rtw_mpRateParseFunc(PADAPTER pAdapter, u8 *targetStr)
{
u16 i=0;
u8* rateindex_Array[] = { "1M","2M","5.5M","11M","6M","9M","12M","18M","24M","36M","48M","54M",
"HTMCS0","HTMCS1","HTMCS2","HTMCS3","HTMCS4","HTMCS5","HTMCS6","HTMCS7",
"HTMCS8","HTMCS9","HTMCS10","HTMCS11","HTMCS12","HTMCS13","HTMCS14","HTMCS15",
"HTMCS16","HTMCS17","HTMCS18","HTMCS19","HTMCS20","HTMCS21","HTMCS22","HTMCS23",
"HTMCS24","HTMCS25","HTMCS26","HTMCS27","HTMCS28","HTMCS29","HTMCS30","HTMCS31",
"VHT1MCS0","VHT1MCS1","VHT1MCS2","VHT1MCS3","VHT1MCS4","VHT1MCS5","VHT1MCS6","VHT1MCS7","VHT1MCS8","VHT1MCS9",
"VHT2MCS0","VHT2MCS1","VHT2MCS2","VHT2MCS3","VHT2MCS4","VHT2MCS5","VHT2MCS6","VHT2MCS7","VHT2MCS8","VHT2MCS9",
"VHT3MCS0","VHT3MCS1","VHT3MCS2","VHT3MCS3","VHT3MCS4","VHT3MCS5","VHT3MCS6","VHT3MCS7","VHT3MCS8","VHT3MCS9",
"VHT4MCS0","VHT4MCS1","VHT4MCS2","VHT4MCS3","VHT4MCS4","VHT4MCS5","VHT4MCS6","VHT4MCS7","VHT4MCS8","VHT4MCS9"};
for(i=0;i<=83;i++){
if(strcmp(targetStr, rateindex_Array[i]) == 0){
DBG_871X("%s , index = %d \n",__func__ ,i);
return i;
}
}
printk("%s ,please input a Data RATE String as:",__func__);
for(i=0;i<=83;i++){
printk("%s ",rateindex_Array[i]);
if(i%10==0)
printk("\n");
}
return _FAIL;
}
ULONG mpt_ProQueryCalTxPower(

6
drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_mp_ioctl.c
View File

@ -21,7 +21,7 @@
#include <drv_types.h>
#include <rtw_mp_ioctl.h>
#include "../hal/OUTSRC/odm_precomp.h"
#include "../hal/OUTSRC/phydm_precomp.h"
//**************** oid_rtl_seg_81_85 section start ****************
NDIS_STATUS oid_rt_wireless_mode_hdl(struct oid_par_priv *poid_par_priv)
@ -1990,9 +1990,9 @@ NDIS_STATUS oid_rt_pro_dele_sta_info_hdl(struct oid_par_priv *poid_par_priv)
psta = rtw_get_stainfo(&Adapter->stapriv, macaddr);
if (psta != NULL) {
_enter_critical(&(Adapter->stapriv.sta_hash_lock), &irqL);
//_enter_critical(&(Adapter->stapriv.sta_hash_lock), &irqL);
rtw_free_stainfo(Adapter, psta);
_exit_critical(&(Adapter->stapriv.sta_hash_lock), &irqL);
//_exit_critical(&(Adapter->stapriv.sta_hash_lock), &irqL);
}
return status;

155
drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_odm.c
View File

@ -37,13 +37,13 @@ const char *odm_comp_str[] = {
/* BIT12 */"ODM_COMP_DYNAMIC_PRICCA",
/* BIT13 */"ODM_COMP_RXHP",
/* BIT14 */"ODM_COMP_MP",
/* BIT15 */"ODM_COMP_DYNAMIC_ATC",
/* BIT16 */"ODM_COMP_EDCA_TURBO",
/* BIT17 */"ODM_COMP_EARLY_MODE",
/* BIT15 */"ODM_COMP_CFO_TRACKING",
/* BIT16 */"ODM_COMP_ACS",
/* BIT17 */"PHYDM_COMP_ADAPTIVITY",
/* BIT18 */NULL,
/* BIT19 */NULL,
/* BIT20 */NULL,
/* BIT21 */NULL,
/* BIT20 */"ODM_COMP_EDCA_TURBO",
/* BIT21 */"ODM_COMP_EARLY_MODE",
/* BIT22 */NULL,
/* BIT23 */NULL,
/* BIT24 */"ODM_COMP_TX_PWR_TRACK",
@ -73,14 +73,14 @@ const char *odm_ability_str[] = {
/* BIT11 */"ODM_BB_PSD",
/* BIT12 */"ODM_BB_RXHP",
/* BIT13 */"ODM_BB_ADAPTIVITY",
/* BIT14 */"ODM_BB_DYNAMIC_ATC",
/* BIT15 */NULL,
/* BIT16 */"ODM_MAC_EDCA_TURBO",
/* BIT17 */"ODM_MAC_EARLY_MODE",
/* BIT14 */"ODM_BB_CFO_TRACKING",
/* BIT15 */"ODM_BB_NHM_CNT",
/* BIT16 */"ODM_BB_PRIMARY_CCA",
/* BIT17 */NULL,
/* BIT18 */NULL,
/* BIT19 */NULL,
/* BIT20 */NULL,
/* BIT21 */NULL,
/* BIT20 */"ODM_MAC_EDCA_TURBO",
/* BIT21 */"ODM_MAC_EARLY_MODE",
/* BIT22 */NULL,
/* BIT23 */NULL,
/* BIT24 */"ODM_RF_TX_PWR_TRACK",
@ -166,11 +166,102 @@ inline void rtw_odm_ability_set(_adapter *adapter, u32 ability)
rtw_hal_set_hwreg(adapter, HW_VAR_DM_FLAG, (u8*)&ability);
}
void rtw_odm_adaptivity_ver_msg(void *sel, _adapter *adapter)
{
DBG_871X_SEL_NL(sel, "ADAPTIVITY_VERSION "ADAPTIVITY_VERSION"\n");
}
#define RTW_ADAPTIVITY_EN_DISABLE 0
#define RTW_ADAPTIVITY_EN_ENABLE 1
#define RTW_ADAPTIVITY_EN_AUTO 2
void rtw_odm_adaptivity_en_msg(void *sel, _adapter *adapter)
{
struct registry_priv *regsty = &adapter->registrypriv;
struct mlme_priv *mlme = &adapter->mlmepriv;
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
DM_ODM_T *odm = &hal_data->odmpriv;
DBG_871X_SEL_NL(sel, "RTW_ADAPTIVITY_EN_");
if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_DISABLE) {
DBG_871X_SEL(sel, "DISABLE\n");
} else if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_ENABLE) {
DBG_871X_SEL(sel, "ENABLE\n");
} else if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_AUTO) {
DBG_871X_SEL(sel, "AUTO, chplan:0x%02x, Regulation:%u,%u\n"
, mlme->ChannelPlan, odm->odm_Regulation2_4G, odm->odm_Regulation5G);
} else {
DBG_871X_SEL(sel, "INVALID\n");
}
}
#define RTW_ADAPTIVITY_MODE_NORMAL 0
#define RTW_ADAPTIVITY_MODE_CARRIER_SENSE 1
void rtw_odm_adaptivity_mode_msg(void *sel, _adapter *adapter)
{
struct registry_priv *regsty = &adapter->registrypriv;
DBG_871X_SEL_NL(sel, "RTW_ADAPTIVITY_MODE_");
if (regsty->adaptivity_mode == RTW_ADAPTIVITY_MODE_NORMAL) {
DBG_871X_SEL(sel, "NORMAL\n");
} else if (regsty->adaptivity_mode == RTW_ADAPTIVITY_MODE_CARRIER_SENSE) {
DBG_871X_SEL(sel, "CARRIER_SENSE\n");
} else {
DBG_871X_SEL(sel, "INVALID\n");
}
}
#define RTW_NHM_EN_DISABLE 0
#define RTW_NHM_EN_ENABLE 1
void rtw_odm_nhm_en_msg(void *sel, _adapter *adapter)
{
struct registry_priv *regsty = &adapter->registrypriv;
DBG_871X_SEL_NL(sel, "RTW_NHM_EN_");
if (regsty->nhm_en == RTW_NHM_EN_DISABLE) {
DBG_871X_SEL(sel, "DISABLE\n");
} else if (regsty->nhm_en == RTW_NHM_EN_ENABLE) {
DBG_871X_SEL(sel, "ENABLE\n");
} else {
DBG_871X_SEL(sel, "INVALID\n");
}
}
bool rtw_odm_adaptivity_needed(_adapter *adapter)
{
struct registry_priv *regsty = &adapter->registrypriv;
struct mlme_priv *mlme = &adapter->mlmepriv;
bool ret = _FALSE;
if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_ENABLE
|| regsty->adaptivity_en == RTW_ADAPTIVITY_EN_AUTO)
ret = _TRUE;
if (ret == _TRUE) {
rtw_odm_adaptivity_ver_msg(RTW_DBGDUMP, adapter);
rtw_odm_adaptivity_en_msg(RTW_DBGDUMP, adapter);
rtw_odm_adaptivity_mode_msg(RTW_DBGDUMP, adapter);
rtw_odm_nhm_en_msg(RTW_DBGDUMP, adapter);
}
return ret;
}
void rtw_odm_adaptivity_parm_msg(void *sel, _adapter *adapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter);
DM_ODM_T *odm = &pHalData->odmpriv;
rtw_odm_adaptivity_ver_msg(sel, adapter);
rtw_odm_adaptivity_en_msg(sel, adapter);
rtw_odm_adaptivity_mode_msg(sel, adapter);
rtw_odm_nhm_en_msg(sel, adapter);
DBG_871X_SEL_NL(sel, "%10s %16s %8s %10s %11s %14s\n"
, "TH_L2H_ini", "TH_EDCCA_HL_diff", "IGI_Base", "ForceEDCCA", "AdapEn_RSSI", "IGI_LowerBound");
DBG_871X_SEL_NL(sel, "0x%-8x %-16d 0x%-6x %-10d %-11u %-14u\n"
@ -181,6 +272,14 @@ void rtw_odm_adaptivity_parm_msg(void *sel, _adapter *adapter)
, odm->AdapEn_RSSI
, odm->IGI_LowerBound
);
DBG_871X_SEL_NL(sel, "%8s %9s\n", "EDCCA_ES","Adap_Flag");
DBG_871X_SEL_NL(sel, "%-8x %-9x \n"
, odm->EDCCA_enable_state
, odm->adaptivity_flag
);
}
void rtw_odm_adaptivity_parm_set(_adapter *adapter, s8 TH_L2H_ini, s8 TH_EDCCA_HL_diff,
@ -204,4 +303,36 @@ void rtw_odm_get_perpkt_rssi(void *sel, _adapter *adapter)
DBG_871X_SEL_NL(sel,"RxRate = %s, RSSI_A = %d(%%), RSSI_B = %d(%%)\n",
HDATA_RATE(odm->RxRate), odm->RSSI_A, odm->RSSI_B);
}
}
void rtw_odm_acquirespinlock(_adapter *adapter, RT_SPINLOCK_TYPE type)
{
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
_irqL irqL;
switch(type)
{
case RT_IQK_SPINLOCK:
_enter_critical_bh(&pdmpriv->IQKSpinLock, &irqL);
default:
break;
}
}
void rtw_odm_releasespinlock(_adapter *adapter, RT_SPINLOCK_TYPE type)
{
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
_irqL irqL;
switch(type)
{
case RT_IQK_SPINLOCK:
_exit_critical_bh(&pdmpriv->IQKSpinLock, &irqL);
default:
break;
}
}

29
drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_p2p.c
View File

@ -58,6 +58,11 @@ static u32 go_add_group_info_attr(struct wifidirect_info *pwdinfo, u8 *pbuf)
pdata_attr = rtw_zmalloc(MAX_P2P_IE_LEN);
if(NULL == pdata_attr){
DBG_871X("%s pdata_attr malloc failed \n", __FUNCTION__);
goto _exit;
}
pstart = pdata_attr;
pcur = pdata_attr;
@ -139,7 +144,8 @@ static u32 go_add_group_info_attr(struct wifidirect_info *pwdinfo, u8 *pbuf)
}
rtw_mfree(pdata_attr, MAX_P2P_IE_LEN);
_exit:
return len;
}
@ -3455,6 +3461,8 @@ _func_exit_;
void p2p_concurrent_handler( _adapter* padapter )
{
struct wifidirect_info *pwdinfo = &padapter->wdinfo;
struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
//_adapter *pbuddy_adapter = padapter->pbuddy_adapter;
//struct wifidirect_info *pbuddy_wdinfo = &pbuddy_adapter->wdinfo;
//struct mlme_priv *pbuddy_mlmepriv = &pbuddy_adapter->mlmepriv;
@ -3495,9 +3503,12 @@ _func_enter_;
}
rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN);
val8 = 1;
rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8));
if(!check_buddy_mlmeinfo_state(padapter, WIFI_FW_AP_STATE) &&
!(pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)
{
val8 = 1;
rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8));
}
// Todo: To check the value of pwdinfo->ext_listen_period is equal to 0 or not.
_set_timer( &pwdinfo->ap_p2p_switch_timer, pwdinfo->ext_listen_period );
}
@ -3517,8 +3528,11 @@ _func_enter_;
if ( pbuddy_mlmeext->cur_channel != pwdinfo->listen_channel )
{
set_channel_bwmode(padapter, pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_ch_offset, pbuddy_mlmeext->cur_bwmode);
val8 = 0;
padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8));
if(!check_buddy_mlmeinfo_state(padapter, WIFI_FW_AP_STATE) &&!(pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)
{
val8 = 0;
padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8));
}
rtw_p2p_set_state(pwdinfo, P2P_STATE_IDLE);
issue_nulldata(pbuddy_adapter, NULL, 0, 3, 500);
}
@ -3612,6 +3626,9 @@ _func_enter_;
pcfg80211_wdinfo->is_ro_ch = _FALSE;
pcfg80211_wdinfo->last_ro_ch_time = rtw_get_current_time();
if (pcfg80211_wdinfo->not_indic_ro_ch_exp == _TRUE)
return;
DBG_871X("cfg80211_remain_on_channel_expired, ch=%d, bw=%d, offset=%d\n",
rtw_get_oper_ch(padapter), rtw_get_oper_bw(padapter), rtw_get_oper_choffset(padapter));

168
drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_pwrctrl.c
View File

@ -20,7 +20,8 @@
#define _RTW_PWRCTRL_C_
#include <drv_types.h>
#include <hal_data.h>
#include <hal_com_h2c.h>
int rtw_fw_ps_state(PADAPTER padapter)
{
@ -159,6 +160,9 @@ int ips_leave(_adapter * padapter)
#endif //DBG_CHECK_FW_PS_STATE
_exit_pwrlock(&pwrpriv->lock);
if (_SUCCESS == ret)
ODM_DMReset(&GET_HAL_DATA(padapter)->odmpriv);
#ifdef CONFIG_BT_COEXIST
if (_SUCCESS == ret)
rtw_btcoex_IpsNotify(padapter, IPS_NONE);
@ -460,7 +464,7 @@ void traffic_check_for_leave_lps(PADAPTER padapter, u8 tx, u32 tx_packets)
#endif
)
{
DBG_871X("leave lps via Tx = %d\n", xmit_cnt);
//DBG_871X("leave lps via Tx = %d\n", xmit_cnt);
bLeaveLPS = _TRUE;
}
}
@ -481,7 +485,7 @@ void traffic_check_for_leave_lps(PADAPTER padapter, u8 tx, u32 tx_packets)
#endif
)
{
DBG_871X("leave lps via Rx = %d\n", pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod);
//DBG_871X("leave lps via Rx = %d\n", pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod);
bLeaveLPS = _TRUE;
}
}
@ -491,7 +495,7 @@ void traffic_check_for_leave_lps(PADAPTER padapter, u8 tx, u32 tx_packets)
{
//DBG_871X("leave lps via %s, Tx = %d, Rx = %d \n", tx?"Tx":"Rx", pmlmepriv->LinkDetectInfo.NumTxOkInPeriod,pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod);
//rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE, 1);
rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_LEAVE, tx?0:1);
rtw_lps_ctrl_wk_cmd(padapter, tx?LPS_CTRL_TX_TRAFFIC_LEAVE:LPS_CTRL_RX_TRAFFIC_LEAVE, tx?0:1);
}
#endif //CONFIG_CHECK_LEAVE_LPS
}
@ -604,7 +608,7 @@ _func_enter_;
// polling cpwm
do {
rtw_mdelay_os(1);
rtw_msleep_os(1);
poll_cnt++;
rtw_hal_get_hwreg(padapter, HW_VAR_CPWM, &cpwm_now);
if ((cpwm_orig ^ cpwm_now) & 0x80)
@ -718,6 +722,141 @@ u8 PS_RDY_CHECK(_adapter * padapter)
return _TRUE;
}
#if defined(CONFIG_FWLPS_IN_IPS) && defined(CONFIG_PNO_SUPPORT)
void rtw_set_fw_in_ips_mode(PADAPTER padapter, u8 enable)
{
struct hal_ops *pHalFunc = &padapter->HalFunc;
struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
int cnt=0;
u32 start_time;
u8 val8 = 0;
u8 cpwm_orig, cpwm_now;
u8 parm[H2C_INACTIVE_PS_LEN]={0};
if (padapter->netif_up == _FALSE) {
DBG_871X("%s: ERROR, netif is down\n", __func__);
return;
}
if (pHalFunc->fill_h2c_cmd == NULL) {
DBG_871X("%s: Please hook fill_h2c_cmd first!\n", __func__);
return;
}
//u8 cmd_param; //BIT0:enable, BIT1:NoConnect32k
if (enable) {
#ifdef CONFIG_BT_COEXIST
rtw_btcoex_IpsNotify(padapter, pwrpriv->ips_mode_req);
#endif
//Enter IPS
DBG_871X("%s: issue H2C to FW when entering IPS\n", __func__);
parm[0] = 0x03;
parm[1] = 0x01;
parm[2] = 0x01;
pHalFunc->fill_h2c_cmd(padapter, //H2C_FWLPS_IN_IPS_,
H2C_INACTIVE_PS_,
H2C_INACTIVE_PS_LEN, parm);
//poll 0x1cc to make sure H2C command already finished by FW; MAC_0x1cc=0 means H2C done by FW.
do{
val8 = rtw_read8(padapter, REG_HMETFR);
cnt++;
DBG_871X("%s polling REG_HMETFR=0x%x, cnt=%d \n",
__func__, val8, cnt);
rtw_mdelay_os(10);
}while(cnt<100 && (val8!=0));
//H2C done, enter 32k
if (val8 == 0) {
//ser rpwm to enter 32k
val8 = rtw_read8(padapter, SDIO_LOCAL_BASE|SDIO_REG_HRPWM1);
DBG_871X("%s: read rpwm=%02x\n", __FUNCTION__, val8);
val8 += 0x80;
val8 |= BIT(0);
rtw_write8(padapter, SDIO_LOCAL_BASE|SDIO_REG_HRPWM1, val8);
DBG_871X("%s: write rpwm=%02x\n", __FUNCTION__, val8);
adapter_to_pwrctl(padapter)->tog = (val8 + 0x80) & 0x80;
cnt = val8 = 0;
do {
val8 = rtw_read8(padapter, REG_CR);
cnt++;
DBG_871X("%s polling 0x100=0x%x, cnt=%d \n",
__func__, val8, cnt);
DBG_871X("%s 0x08:%02x, 0x03:%02x\n",
__func__,
rtw_read8(padapter, 0x08),
rtw_read8(padapter, 0x03));
rtw_mdelay_os(10);
} while(cnt<20 && (val8!=0xEA));
#ifdef DBG_CHECK_FW_PS_STATE
if(val8 != 0xEA) {
DBG_871X("MAC_1B8=0x%08x\n",
rtw_read32(padapter, 0x1b8));
DBG_871X("MAC_1C0=%08x, MAC_1C4=%08x, MAC_1C8=%08x, MAC_1CC=%08x\n",
rtw_read32(padapter, 0x1c0),
rtw_read32(padapter, 0x1c4),
rtw_read32(padapter, 0x1c8),
rtw_read32(padapter, 0x1cc));
#endif //DBG_CHECK_FW_PS_STATE
} else {
DBG_871X("MAC_1C0=%08x, MAC_1C4=%08x, MAC_1C8=%08x, MAC_1CC=%08x\n",
rtw_read32(padapter, 0x1c0),
rtw_read32(padapter, 0x1c4),
rtw_read32(padapter, 0x1c8),
rtw_read32(padapter, 0x1cc));
}
}
} else {
//Leave IPS
DBG_871X("%s: Leaving IPS in FWLPS state\n", __func__);
//for polling cpwm
cpwm_orig = 0;
rtw_hal_get_hwreg(padapter, HW_VAR_CPWM, &cpwm_orig);
//ser rpwm
val8 = rtw_read8(padapter, SDIO_LOCAL_BASE|SDIO_REG_HRPWM1);
val8 &= 0x80;
val8 += 0x80;
val8 |= BIT(6);
rtw_write8(padapter, SDIO_LOCAL_BASE|SDIO_REG_HRPWM1, val8);
DBG_871X("%s: write rpwm=%02x\n", __FUNCTION__, val8);
adapter_to_pwrctl(padapter)->tog = (val8 + 0x80) & 0x80;
//do polling cpwm
start_time = rtw_get_current_time();
do {
rtw_mdelay_os(1);
rtw_hal_get_hwreg(padapter, HW_VAR_CPWM, &cpwm_now);
if ((cpwm_orig ^ cpwm_now) & 0x80) {
#ifdef DBG_CHECK_FW_PS_STATE
DBG_871X("%s: polling cpwm ok when leaving IPS in FWLPS state, cpwm_orig=%02x, cpwm_now=%02x, 0x100=0x%x \n"
, __FUNCTION__, cpwm_orig, cpwm_now, rtw_read8(padapter, REG_CR));
#endif //DBG_CHECK_FW_PS_STATE
break;
}
if (rtw_get_passing_time_ms(start_time) > 100)
{
DBG_871X("%s: polling cpwm timeout when leaving IPS in FWLPS state\n", __FUNCTION__);
break;
}
} while (1);
parm[0] = 0x0;
parm[1] = 0x0;
parm[2] = 0x0;
pHalFunc->fill_h2c_cmd(padapter, H2C_INACTIVE_PS_,
H2C_INACTIVE_PS_LEN, parm);
#ifdef CONFIG_BT_COEXIST
rtw_btcoex_IpsNotify(padapter, IPS_NONE);
#endif
}
}
#endif //CONFIG_PNO_SUPPORT
void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode, const char *msg)
{
struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
@ -809,9 +948,10 @@ _func_enter_;
pwrpriv->pwr_mode = ps_mode;
rtw_set_rpwm(padapter, PS_STATE_S4);
#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) || defined(CONFIG_P2P_WOWLAN)
if (pwrpriv->wowlan_mode == _TRUE ||
pwrpriv->wowlan_ap_mode == _TRUE)
pwrpriv->wowlan_ap_mode == _TRUE ||
pwrpriv->wowlan_p2p_mode == _TRUE)
{
u32 start_time, delay_ms;
u8 val8;
@ -849,6 +989,9 @@ _func_enter_;
|| ((rtw_btcoex_IsBtControlLps(padapter) == _TRUE)
&& (rtw_btcoex_IsLpsOn(padapter) == _TRUE))
#endif
#ifdef CONFIG_P2P_WOWLAN
||( _TRUE == pwrpriv->wowlan_p2p_mode)
#endif //CONFIG_P2P_WOWLAN
)
{
u8 pslv;
@ -1015,6 +1158,13 @@ _func_enter_;
return;
}
#ifdef CONFIG_P2P_PS
if(padapter->wdinfo.p2p_ps_mode == P2P_PS_NOA)
{
return;//supporting p2p client ps NOA via H2C_8723B_P2P_PS_OFFLOAD
}
#endif //CONFIG_P2P_PS
if (pwrpriv->bLeisurePs)
{
// Idle for a while if we connect to AP a while ago.
@ -2148,6 +2298,7 @@ _func_enter_;
pwrctrlpriv->wowlan_mode = _FALSE;
pwrctrlpriv->wowlan_ap_mode = _FALSE;
pwrctrlpriv->wowlan_p2p_mode = _FALSE;
#ifdef CONFIG_RESUME_IN_WORKQUEUE
_init_workitem(&pwrctrlpriv->resume_work, resume_workitem_callback, NULL);
@ -2159,6 +2310,9 @@ _func_enter_;
rtw_register_early_suspend(pwrctrlpriv);
#endif //CONFIG_HAS_EARLYSUSPEND || CONFIG_ANDROID_POWER
#ifdef CONFIG_WOWLAN
pwrctrlpriv->wowlan_from_cmd = _FALSE;
#endif
#ifdef CONFIG_PNO_SUPPORT
pwrctrlpriv->pno_inited = _FALSE;
pwrctrlpriv->pnlo_info = NULL;

284
drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_recv.c
View File

@ -75,6 +75,10 @@ _func_enter_;
precvpriv->free_recvframe_cnt = NR_RECVFRAME;
precvpriv->sink_udpport = 0;
precvpriv->pre_rtp_rxseq = 0;
precvpriv->cur_rtp_rxseq = 0;
rtw_os_recv_resource_init(precvpriv, padapter);
precvpriv->pallocated_frame_buf = rtw_zvmalloc(NR_RECVFRAME * sizeof(union recv_frame) + RXFRAME_ALIGN_SZ);
@ -109,7 +113,7 @@ _func_enter_;
#ifdef CONFIG_USB_HCI
precvpriv->rx_pending_cnt=1;
ATOMIC_SET(&(precvpriv->rx_pending_cnt), 1);
_rtw_init_sema(&precvpriv->allrxreturnevt, 0);
@ -1580,6 +1584,32 @@ _func_enter_;
goto exit;
}
}
else if ((check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) &&
(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) )
{
DBG_871X("%s ,in WIFI_MP_STATE \n",__func__);
_rtw_memcpy(pattrib->dst, GetAddr1Ptr(ptr), ETH_ALEN);
_rtw_memcpy(pattrib->src, GetAddr2Ptr(ptr), ETH_ALEN);
_rtw_memcpy(pattrib->bssid, GetAddr3Ptr(ptr), ETH_ALEN);
_rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN);
_rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN);
//
_rtw_memcpy(pattrib->bssid, mybssid, ETH_ALEN);
*psta = rtw_get_stainfo(pstapriv, pattrib->bssid); // get sta_info
if (*psta == NULL) {
RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("can't get psta under MP_MODE ; drop pkt\n"));
#ifdef DBG_RX_DROP_FRAME
DBG_871X("DBG_RX_DROP_FRAME %s can't get psta under WIFI_MP_STATE ; drop pkt\n", __FUNCTION__);
#endif
ret= _FAIL;
goto exit;
}
}
else {
u8 *myhwaddr = myid(&adapter->eeprompriv);
if (!_rtw_memcmp(pattrib->ra, myhwaddr, ETH_ALEN)) {
@ -1745,7 +1775,7 @@ sint validate_recv_ctrl_frame(_adapter *padapter, union recv_frame *precv_frame)
DBG_871X("no buffered packets to xmit\n");
//issue nulldata with More data bit = 0 to indicate we have no buffered packets
issue_nulldata_in_interrupt(padapter, psta->hwaddr);
issue_nulldata_in_interrupt(padapter, psta->hwaddr, 0);
}
else
{
@ -2086,7 +2116,7 @@ static sint validate_80211w_mgmt(_adapter *adapter, union recv_frame *precv_fram
DBG_871X("%s mgmt allocate fail !!!!!!!!!\n", __FUNCTION__);
goto validate_80211w_fail;
}
/*//dump the packet content before decrypt
/* //dump the packet content before decrypt
{
int pp;
printk("pattrib->pktlen = %d =>", pattrib->pkt_len);
@ -2103,7 +2133,7 @@ static sint validate_80211w_mgmt(_adapter *adapter, union recv_frame *precv_fram
//remove the iv and icv length
pattrib->pkt_len = pattrib->pkt_len - pattrib->iv_len - pattrib->icv_len;
rtw_mfree(mgmt_DATA, data_len);
/*//print packet content after decryption
/* //print packet content after decryption
{
int pp;
printk("after decryption pattrib->pktlen = %d @@=>", pattrib->pkt_len);
@ -2130,9 +2160,9 @@ static sint validate_80211w_mgmt(_adapter *adapter, union recv_frame *precv_fram
}
else if(BIP_ret == RTW_RX_HANDLED)
{
//DBG_871X("802.11w recv none protected packet\n");
//issue sa query request
issue_action_SA_Query(adapter, NULL, 0, 0);
DBG_871X("802.11w recv none protected packet\n");
//drop pkt, don't issue sa query request
//issue_action_SA_Query(adapter, NULL, 0, 0);
goto validate_80211w_fail;
}
}//802.11w protect
@ -2153,9 +2183,14 @@ static sint validate_80211w_mgmt(_adapter *adapter, union recv_frame *precv_fram
}
else if(subtype == WIFI_DEAUTH || subtype == WIFI_DISASSOC)
{
DBG_871X("802.11w recv none protected packet\n");
//issue sa query request
issue_action_SA_Query(adapter, NULL, 0, 0);
unsigned short reason;
reason = le16_to_cpu(*(unsigned short *)(ptr + WLAN_HDR_A3_LEN));
DBG_871X("802.11w recv none protected packet, reason=%d\n", reason);
if(reason == 6 || reason == 7)
{
//issue sa query request
issue_action_SA_Query(adapter, NULL, 0, 0);
}
goto validate_80211w_fail;
}
}
@ -2486,21 +2521,32 @@ _func_enter_;
eth_type = 0x8712;
// append rx status for mp test packets
ptr = recvframe_pull(precvframe, (rmv_len-sizeof(struct ethhdr)+2)-24);
if (!ptr) {
ret = _FAIL;
goto exiting;
}
_rtw_memcpy(ptr, get_rxmem(precvframe), 24);
ptr+=24;
}
else {
ptr = recvframe_pull(precvframe, (rmv_len-sizeof(struct ethhdr)+ (bsnaphdr?2:0)));
if (!ptr) {
ret = _FAIL;
goto exiting;
}
}
_rtw_memcpy(ptr, pattrib->dst, ETH_ALEN);
_rtw_memcpy(ptr+ETH_ALEN, pattrib->src, ETH_ALEN);
if (ptr) {
_rtw_memcpy(ptr, pattrib->dst, ETH_ALEN);
_rtw_memcpy(ptr+ETH_ALEN, pattrib->src, ETH_ALEN);
if(!bsnaphdr) {
len = htons(len);
_rtw_memcpy(ptr+12, &len, 2);
if(!bsnaphdr) {
len = htons(len);
_rtw_memcpy(ptr+12, &len, 2);
}
}
exiting:
_func_exit_;
return ret;
@ -3342,7 +3388,15 @@ int recv_indicatepkt_reorder(_adapter *padapter, union recv_frame *prframe)
if(!pattrib->amsdu)
{
//s1.
wlanhdr_to_ethhdr(prframe);
retval = wlanhdr_to_ethhdr(prframe);
if (retval != _SUCCESS)
{
RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("wlanhdr_to_ethhdr: drop pkt \n"));
#ifdef DBG_RX_DROP_FRAME
DBG_871X("DBG_RX_DROP_FRAME %s wlanhdr_to_ethhdr error!\n", __FUNCTION__);
#endif
return retval;
}
//if ((pattrib->qos!=1) /*|| pattrib->priority!=0 || IS_MCAST(pattrib->ra)*/
// || (pattrib->eth_type==0x0806) || (pattrib->ack_policy!=0))
@ -3643,6 +3697,77 @@ int validate_mp_recv_frame(_adapter *adapter, union recv_frame *precv_frame)
}
#endif
static sint MPwlanhdr_to_ethhdr ( union recv_frame *precvframe)
{
sint rmv_len;
u16 eth_type, len;
u8 bsnaphdr;
u8 *psnap_type;
struct ieee80211_snap_hdr *psnap;
sint ret=_SUCCESS;
_adapter *adapter =precvframe->u.hdr.adapter;
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
u8 *ptr = get_recvframe_data(precvframe) ; // point to frame_ctrl field
struct rx_pkt_attrib *pattrib = & precvframe->u.hdr.attrib;
_func_enter_;
if(pattrib->encrypt){
recvframe_pull_tail(precvframe, pattrib->icv_len);
}
psnap=(struct ieee80211_snap_hdr *)(ptr+pattrib->hdrlen + pattrib->iv_len);
psnap_type=ptr+pattrib->hdrlen + pattrib->iv_len+SNAP_SIZE;
/* convert hdr + possible LLC headers into Ethernet header */
//eth_type = (psnap_type[0] << 8) | psnap_type[1];
if((_rtw_memcmp(psnap, rtw_rfc1042_header, SNAP_SIZE) &&
(_rtw_memcmp(psnap_type, SNAP_ETH_TYPE_IPX, 2) == _FALSE) &&
(_rtw_memcmp(psnap_type, SNAP_ETH_TYPE_APPLETALK_AARP, 2)==_FALSE) )||
//eth_type != ETH_P_AARP && eth_type != ETH_P_IPX) ||
_rtw_memcmp(psnap, rtw_bridge_tunnel_header, SNAP_SIZE)){
/* remove RFC1042 or Bridge-Tunnel encapsulation and replace EtherType */
bsnaphdr = _TRUE;
}
else {
/* Leave Ethernet header part of hdr and full payload */
bsnaphdr = _FALSE;
}
rmv_len = pattrib->hdrlen + pattrib->iv_len +(bsnaphdr?SNAP_SIZE:0);
len = precvframe->u.hdr.len - rmv_len;
RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\n===pattrib->hdrlen: %x, pattrib->iv_len:%x ===\n\n", pattrib->hdrlen, pattrib->iv_len));
_rtw_memcpy(&eth_type, ptr+rmv_len, 2);
eth_type= ntohs((unsigned short )eth_type); //pattrib->ether_type
pattrib->eth_type = eth_type;
{
ptr = recvframe_pull(precvframe, (rmv_len-sizeof(struct ethhdr)+ (bsnaphdr?2:0)));
}
_rtw_memcpy(ptr, pattrib->dst, ETH_ALEN);
_rtw_memcpy(ptr+ETH_ALEN, pattrib->src, ETH_ALEN);
if(!bsnaphdr) {
len = htons(len);
_rtw_memcpy(ptr+12, &len, 2);
}
if (adapter->registrypriv.mp_mode == 1)
{
len = htons(pattrib->seq_num);
//DBG_871X("wlan seq = %d ,seq_num =%x\n",len,pattrib->seq_num);
_rtw_memcpy(ptr+12,&len, 2);
}
_func_exit_;
return ret;
}
int recv_func_prehandle(_adapter *padapter, union recv_frame *rframe)
{
int ret = _SUCCESS;
@ -3653,13 +3778,17 @@ int recv_func_prehandle(_adapter *padapter, union recv_frame *rframe)
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct mp_priv *pmppriv = &padapter->mppriv;
#endif //CONFIG_MP_INCLUDED
DBG_COUNTER(padapter->rx_logs.core_rx_pre);
u8 type;
u8 *ptr = rframe->u.hdr.rx_data;
u8 *psa, *pda, *pbssid;
struct sta_info *psta = NULL;
DBG_COUNTER(padapter->rx_logs.core_rx_pre);
#ifdef CONFIG_MP_INCLUDED
if (padapter->registrypriv.mp_mode == 1)
{
if ((check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE))//&&(padapter->mppriv.check_mp_pkt == 0))
if ((check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) && (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) )//&&(padapter->mppriv.check_mp_pkt == 0))
{
if (pattrib->crc_err == 1){
padapter->mppriv.rx_crcerrpktcount++;
@ -3671,18 +3800,125 @@ int recv_func_prehandle(_adapter *padapter, union recv_frame *rframe)
padapter->mppriv.rx_pktcount_filter_out++;
}
if(pmppriv->rx_bindicatePkt == _FALSE)
{
if (check_fwstate(pmlmepriv, WIFI_MP_LPBK_STATE) == _FALSE) {
//if (check_fwstate(pmlmepriv, WIFI_MP_LPBK_STATE) == _FALSE) {
//RT_TRACE(_module_rtl871x_recv_c_, _drv_alert_, ("MP - Not in loopback mode , drop pkt \n"));
ret = _FAIL;
rtw_free_recvframe(rframe, pfree_recv_queue);//free this recv_frame
goto exit;
}
}
}
}
else {
type = GetFrameType(ptr);
pattrib->to_fr_ds = get_tofr_ds(ptr);
pattrib->frag_num = GetFragNum(ptr);
pattrib->seq_num = GetSequence(ptr);
pattrib->pw_save = GetPwrMgt(ptr);
pattrib->mfrag = GetMFrag(ptr);
pattrib->mdata = GetMData(ptr);
pattrib->privacy = GetPrivacy(ptr);
pattrib->order = GetOrder(ptr);
if(type ==WIFI_DATA_TYPE)
{
pda = get_da(ptr);
psa = get_sa(ptr);
pbssid = get_hdr_bssid(ptr);
_rtw_memcpy(pattrib->dst, pda, ETH_ALEN);
_rtw_memcpy(pattrib->src, psa, ETH_ALEN);
_rtw_memcpy(pattrib->bssid, pbssid, ETH_ALEN);
switch(pattrib->to_fr_ds)
{
case 0:
_rtw_memcpy(pattrib->ra, pda, ETH_ALEN);
_rtw_memcpy(pattrib->ta, psa, ETH_ALEN);
ret = sta2sta_data_frame(padapter, rframe, &psta);
break;
case 1:
_rtw_memcpy(pattrib->ra, pda, ETH_ALEN);
_rtw_memcpy(pattrib->ta, pbssid, ETH_ALEN);
ret = ap2sta_data_frame(padapter, rframe, &psta);
break;
case 2:
_rtw_memcpy(pattrib->ra, pbssid, ETH_ALEN);
_rtw_memcpy(pattrib->ta, psa, ETH_ALEN);
ret = sta2ap_data_frame(padapter, rframe, &psta);
break;
case 3:
_rtw_memcpy(pattrib->ra, GetAddr1Ptr(ptr), ETH_ALEN);
_rtw_memcpy(pattrib->ta, GetAddr2Ptr(ptr), ETH_ALEN);
ret =_FAIL;
RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" case 3\n"));
break;
default:
ret =_FAIL;
break;
}
ret = MPwlanhdr_to_ethhdr (rframe);
if (ret != _SUCCESS)
{
RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("wlanhdr_to_ethhdr: drop pkt \n"));
#ifdef DBG_RX_DROP_FRAME
DBG_871X("DBG_RX_DROP_FRAME %s wlanhdr_to_ethhdr: drop pkt\n", __FUNCTION__);
#endif
rtw_free_recvframe(rframe, pfree_recv_queue);//free this recv_frame
ret = _FAIL;
goto exit;
}
if ((padapter->bDriverStopped == _FALSE) && (padapter->bSurpriseRemoved == _FALSE))
{
RT_TRACE(_module_rtl871x_recv_c_, _drv_alert_, ("@@@@ recv_func: recv_func rtw_recv_indicatepkt\n" ));
//indicate this recv_frame
ret = rtw_recv_indicatepkt(padapter, rframe);
if (ret != _SUCCESS)
{
#ifdef DBG_RX_DROP_FRAME
DBG_871X("DBG_RX_DROP_FRAME %s rtw_recv_indicatepkt fail!\n", __FUNCTION__);
#endif
rtw_free_recvframe(rframe, pfree_recv_queue);//free this recv_frame
ret = _FAIL;
goto exit;
}
}
else
{
RT_TRACE(_module_rtl871x_recv_c_, _drv_alert_, ("@@@@ recv_func: rtw_free_recvframe\n" ));
RT_TRACE(_module_rtl871x_recv_c_, _drv_debug_, ("recv_func:bDriverStopped(%d) OR bSurpriseRemoved(%d)", padapter->bDriverStopped, padapter->bSurpriseRemoved));
#ifdef DBG_RX_DROP_FRAME
DBG_871X("DBG_RX_DROP_FRAME %s ecv_func:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", __FUNCTION__,
padapter->bDriverStopped, padapter->bSurpriseRemoved);
#endif
ret = _FAIL;
rtw_free_recvframe(rframe, pfree_recv_queue);//free this recv_frame
goto exit;
}
}
}
}
RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, ("recv_func: validate_recv_frame fail! drop pkt\n"));
rtw_free_recvframe(rframe, pfree_recv_queue);//free this recv_frame
ret = _FAIL;
goto exit;
}
#endif
//check the frame crtl field and decache

10
drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_sreset.c
View File

@ -267,8 +267,7 @@ void sreset_stop_adapter(_adapter *padapter)
DBG_871X(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter));
if (!rtw_netif_queue_stopped(padapter->pnetdev))
rtw_netif_stop_queue(padapter->pnetdev);
rtw_netif_stop_queue(padapter->pnetdev);
rtw_cancel_all_timer(padapter);
@ -307,11 +306,10 @@ void sreset_start_adapter(_adapter *padapter)
tasklet_hi_schedule(&pxmitpriv->xmit_tasklet);
#endif
_set_timer(&padapter->mlmepriv.dynamic_chk_timer, 2000);
if (rtw_netif_queue_stopped(padapter->pnetdev))
rtw_netif_wake_queue(padapter->pnetdev);
if (is_primary_adapter(padapter))
_set_timer(&padapter->mlmepriv.dynamic_chk_timer, 2000);
rtw_netif_wake_queue(padapter->pnetdev);
}
void sreset_reset(_adapter *padapter)

46
drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_sta_mgt.c
View File

@ -456,13 +456,19 @@ u32 rtw_free_stainfo(_adapter *padapter , struct sta_info *psta)
struct xmit_priv *pxmitpriv= &padapter->xmitpriv;
struct sta_priv *pstapriv = &padapter->stapriv;
struct hw_xmit *phwxmit;
int pending_qcnt[4];
_func_enter_;
if (psta == NULL)
goto exit;
_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL0);
rtw_list_delete(&psta->hash_list);
RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_err_,("\n free number_%d stainfo with hwaddr = 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x \n",pstapriv->asoc_sta_count , psta->hwaddr[0], psta->hwaddr[1], psta->hwaddr[2],psta->hwaddr[3],psta->hwaddr[4],psta->hwaddr[5]));
pstapriv->asoc_sta_count --;
_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL0);
_enter_critical_bh(&psta->lock, &irqL0);
psta->state &= ~_FW_LINKED;
@ -488,6 +494,7 @@ _func_enter_;
rtw_list_delete(&(pstaxmitpriv->vo_q.tx_pending));
phwxmit = pxmitpriv->hwxmits;
phwxmit->accnt -= pstaxmitpriv->vo_q.qcnt;
pending_qcnt[0] = pstaxmitpriv->vo_q.qcnt;
pstaxmitpriv->vo_q.qcnt = 0;
//_exit_critical_bh(&(pxmitpriv->vo_pending.lock), &irqL0);
@ -497,6 +504,7 @@ _func_enter_;
rtw_list_delete(&(pstaxmitpriv->vi_q.tx_pending));
phwxmit = pxmitpriv->hwxmits+1;
phwxmit->accnt -= pstaxmitpriv->vi_q.qcnt;
pending_qcnt[1] = pstaxmitpriv->vi_q.qcnt;
pstaxmitpriv->vi_q.qcnt = 0;
//_exit_critical_bh(&(pxmitpriv->vi_pending.lock), &irqL0);
@ -506,6 +514,7 @@ _func_enter_;
rtw_list_delete(&(pstaxmitpriv->be_q.tx_pending));
phwxmit = pxmitpriv->hwxmits+2;
phwxmit->accnt -= pstaxmitpriv->be_q.qcnt;
pending_qcnt[2] = pstaxmitpriv->be_q.qcnt;
pstaxmitpriv->be_q.qcnt = 0;
//_exit_critical_bh(&(pxmitpriv->be_pending.lock), &irqL0);
@ -515,15 +524,14 @@ _func_enter_;
rtw_list_delete(&(pstaxmitpriv->bk_q.tx_pending));
phwxmit = pxmitpriv->hwxmits+3;
phwxmit->accnt -= pstaxmitpriv->bk_q.qcnt;
pending_qcnt[3] = pstaxmitpriv->bk_q.qcnt;
pstaxmitpriv->bk_q.qcnt = 0;
//_exit_critical_bh(&(pxmitpriv->bk_pending.lock), &irqL0);
rtw_os_wake_queue_at_free_stainfo(padapter, pending_qcnt);
_exit_critical_bh(&pxmitpriv->lock, &irqL0);
rtw_list_delete(&psta->hash_list);
RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_err_,("\n free number_%d stainfo with hwaddr = 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x \n",pstapriv->asoc_sta_count , psta->hwaddr[0], psta->hwaddr[1], psta->hwaddr[2],psta->hwaddr[3],psta->hwaddr[4],psta->hwaddr[5]));
pstapriv->asoc_sta_count --;
// re-init sta_info; 20061114 // will be init in alloc_stainfo
//_rtw_init_sta_xmit_priv(&psta->sta_xmitpriv);
@ -631,7 +639,9 @@ _func_enter_;
_rtw_spinlock_free(&psta->lock);
//_enter_critical_bh(&(pfree_sta_queue->lock), &irqL0);
_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL0);
rtw_list_insert_tail(&psta->list, get_list_head(pfree_sta_queue));
_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL0);
//_exit_critical_bh(&(pfree_sta_queue->lock), &irqL0);
exit:
@ -651,6 +661,9 @@ void rtw_free_all_stainfo(_adapter *padapter)
struct sta_info *psta = NULL;
struct sta_priv *pstapriv = &padapter->stapriv;
struct sta_info* pbcmc_stainfo =rtw_get_bcmc_stainfo( padapter);
u8 free_sta_num = 0;
char free_sta_list[NUM_STA];
int stainfo_offset;
_func_enter_;
@ -670,13 +683,27 @@ _func_enter_;
plist = get_next(plist);
if(pbcmc_stainfo!=psta)
rtw_free_stainfo(padapter , psta);
if(pbcmc_stainfo!=psta)
{
rtw_list_delete(&psta->hash_list);
//rtw_free_stainfo(padapter , psta);
stainfo_offset = rtw_stainfo_offset(pstapriv, psta);
if (stainfo_offset_valid(stainfo_offset)) {
free_sta_list[free_sta_num++] = stainfo_offset;
}
}
}
}
_exit_critical_bh(&pstapriv->sta_hash_lock, &irqL);
for (index = 0; index < free_sta_num; index++)
{
psta = rtw_get_stainfo_by_offset(pstapriv, free_sta_list[index]);
rtw_free_stainfo(padapter , psta);
}
exit:
@ -762,9 +789,6 @@ _func_enter_;
goto exit;
}
// default broadcast & multicast use macid 1
psta->mac_id = 1;
ptxservq= &(psta->sta_xmitpriv.be_q);
/*

677
drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_wlan_util.c
View File

@ -70,6 +70,7 @@ static u8 rtw_basic_rate_mix[7] = {
IEEE80211_OFDM_RATE_24MB|IEEE80211_BASIC_RATE_MASK
};
int new_bcn_max = 3;
int cckrates_included(unsigned char *rate, int ratelen)
{
@ -862,8 +863,9 @@ void invalidate_cam_all(_adapter *padapter)
struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
struct cam_ctl_t *cam_ctl = &dvobj->cam_ctl;
_irqL irqL;
u8 val8 = 0;
rtw_hal_set_hwreg(padapter, HW_VAR_CAM_INVALID_ALL, 0);
rtw_hal_set_hwreg(padapter, HW_VAR_CAM_INVALID_ALL, &val8);
_enter_critical_bh(&cam_ctl->lock, &irqL);
cam_ctl->bitmap = 0;
@ -900,6 +902,32 @@ void read_cam(_adapter *padapter ,u8 entry, u8 *get_key)
}
//DBG_8192C("*********************************\n");
}
bool read_phy_cam_is_gtk(_adapter *padapter, u8 entry)
{
bool res = _FALSE;
u32 addr, cmd;
addr = entry << 3;
cmd = _ReadCAM(padapter, addr);
res = (cmd & BIT6)? _TRUE:_FALSE;
return res;
}
void dump_cam_table(_adapter *padapter) {
u32 i, j, addr, cmd;
DBG_871X("###########DUMP CAM TABLE##############\n");
for (i = 0; i < 8 ; i++) {
addr = i << 3;
DBG_871X("********* DUMP CAM Entry_#%02d**********\n",i);
for (j = 0; j < 6; j++) {
cmd = _ReadCAM(padapter ,addr+j);
DBG_8192C("offset:0x%02x => 0x%08x \n",addr+j,cmd);
}
DBG_871X("*********************************\n");
}
}
#endif
void _write_cam(_adapter *padapter, u8 entry, u16 ctrl, u8 *mac, u8 *key)
@ -1656,7 +1684,9 @@ void HT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE)
}
else
{
//modify from fw by Thomas 2010/11/17
/* AMPDU Parameters field */
/* Get MIN of MAX AMPDU Length Exp */
if ((pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x3) > (pIE->data[i] & 0x3))
{
max_AMPDU_len = (pIE->data[i] & 0x3);
@ -1665,7 +1695,8 @@ void HT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE)
{
max_AMPDU_len = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x3);
}
/* Get MAX of MIN MPDU Start Spacing */
if ((pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c) > (pIE->data[i] & 0x1c))
{
min_MPDU_spacing = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c);
@ -1713,7 +1744,7 @@ void HT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE)
if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) {
// Config STBC setting
if (TEST_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_TX) && GET_HT_CAPABILITY_ELE_TX_STBC(pIE->data))
if (TEST_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_TX) && GET_HT_CAP_ELE_TX_STBC(pIE->data))
{
SET_FLAG(cur_stbc_cap, STBC_HT_ENABLE_TX);
DBG_871X("Enable HT Tx STBC !\n");
@ -1740,7 +1771,7 @@ void HT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE)
#endif //CONFIG_BEAMFORMING
} else {
// Config LDPC Coding Capability
if (TEST_FLAG(phtpriv->ldpc_cap, LDPC_HT_ENABLE_TX) && GET_HT_CAPABILITY_ELE_LDPC_CAP(pIE->data))
if (TEST_FLAG(phtpriv->ldpc_cap, LDPC_HT_ENABLE_TX) && GET_HT_CAP_ELE_LDPC_CAP(pIE->data))
{
SET_FLAG(cur_ldpc_cap, (LDPC_HT_ENABLE_TX | LDPC_HT_CAP_TX));
DBG_871X("Enable HT Tx LDPC!\n");
@ -1748,7 +1779,7 @@ void HT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE)
phtpriv->ldpc_cap = cur_ldpc_cap;
// Config STBC setting
if (TEST_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_TX) && GET_HT_CAPABILITY_ELE_RX_STBC(pIE->data))
if (TEST_FLAG(phtpriv->stbc_cap, STBC_HT_ENABLE_TX) && GET_HT_CAP_ELE_RX_STBC(pIE->data))
{
SET_FLAG(cur_stbc_cap, (STBC_HT_ENABLE_TX | STBC_HT_CAP_TX) );
DBG_871X("Enable HT Tx STBC!\n");
@ -1994,8 +2025,117 @@ int check_ap_tdls_prohibited(u8 *pframe, u8 pkt_len)
}
#endif //CONFIG_TDLS
/*
* rtw_get_bcn_keys: get beacon keys from recv frame
*
* TODO:
* WLAN_EID_COUNTRY
* WLAN_EID_ERP_INFO
* WLAN_EID_CHANNEL_SWITCH
* WLAN_EID_PWR_CONSTRAINT
*/
int rtw_get_bcn_keys(ADAPTER *Adapter, u8 *pframe, u32 packet_len,
struct beacon_keys *recv_beacon)
{
int left;
u16 capability;
unsigned char *pos;
struct rtw_ieee802_11_elems elems;
struct rtw_ieee80211_ht_cap *pht_cap = NULL;
struct HT_info_element *pht_info = NULL;
_rtw_memset(recv_beacon, 0, sizeof(*recv_beacon));
/* checking capabilities */
capability = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN + 10));
/* checking IEs */
left = packet_len - sizeof(struct rtw_ieee80211_hdr_3addr) - _BEACON_IE_OFFSET_;
pos = pframe + sizeof(struct rtw_ieee80211_hdr_3addr) + _BEACON_IE_OFFSET_;
if (rtw_ieee802_11_parse_elems(pos, left, &elems, 1) == ParseFailed)
return _FALSE;
/* check bw and channel offset */
if (elems.ht_capabilities) {
if (elems.ht_capabilities_len != sizeof(*pht_cap))
return _FALSE;
pht_cap = (struct rtw_ieee80211_ht_cap *) elems.ht_capabilities;
recv_beacon->ht_cap_info = pht_cap->cap_info;
}
if (elems.ht_operation) {
if (elems.ht_operation_len != sizeof(*pht_info))
return _FALSE;
pht_info = (struct HT_info_element *) elems.ht_operation;
recv_beacon->ht_info_infos_0_sco = pht_info->infos[0] & 0x03;
}
/* Checking for channel */
if (elems.ds_params && elems.ds_params_len == sizeof(recv_beacon->bcn_channel))
_rtw_memcpy(&recv_beacon->bcn_channel, elems.ds_params,
sizeof(recv_beacon->bcn_channel));
else if (pht_info)
/* In 5G, some ap do not have DSSET IE checking HT info for channel */
recv_beacon->bcn_channel = pht_info->primary_channel;
else {
/* we don't find channel IE, so don't check it */
//DBG_871X("Oops: %s we don't find channel IE, so don't check it \n", __func__);
recv_beacon->bcn_channel = Adapter->mlmeextpriv.cur_channel;
}
/* checking SSID */
if (elems.ssid) {
if (elems.ssid_len > sizeof(recv_beacon->ssid))
return _FALSE;
_rtw_memcpy(recv_beacon->ssid, elems.ssid, elems.ssid_len);
recv_beacon->ssid_len = elems.ssid_len;
} else; // means hidden ssid
/* checking RSN first */
if (elems.rsn_ie && elems.rsn_ie_len) {
recv_beacon->encryp_protocol = ENCRYP_PROTOCOL_WPA2;
rtw_parse_wpa2_ie(elems.rsn_ie - 2, elems.rsn_ie_len + 2,
&recv_beacon->group_cipher, &recv_beacon->pairwise_cipher,
&recv_beacon->is_8021x);
}
/* checking WPA secon */
else if (elems.wpa_ie && elems.wpa_ie_len) {
recv_beacon->encryp_protocol = ENCRYP_PROTOCOL_WPA;
rtw_parse_wpa_ie(elems.wpa_ie - 2, elems.wpa_ie_len + 2,
&recv_beacon->group_cipher, &recv_beacon->pairwise_cipher,
&recv_beacon->is_8021x);
}
else if (capability & BIT(4)) {
recv_beacon->encryp_protocol = ENCRYP_PROTOCOL_WEP;
}
return _TRUE;
}
void rtw_dump_bcn_keys(struct beacon_keys *recv_beacon)
{
int i;
char *p;
u8 ssid[IW_ESSID_MAX_SIZE + 1];
_rtw_memcpy(ssid, recv_beacon->ssid, recv_beacon->ssid_len);
ssid[recv_beacon->ssid_len] = '\0';
DBG_871X("%s: ssid = %s\n", __func__, ssid);
DBG_871X("%s: channel = %x\n", __func__, recv_beacon->bcn_channel);
DBG_871X("%s: ht_cap = %x\n", __func__, recv_beacon->ht_cap_info);
DBG_871X("%s: ht_info_infos_0_sco = %x\n", __func__, recv_beacon->ht_info_infos_0_sco);
DBG_871X("%s: sec=%d, group = %x, pair = %x, 8021X = %x\n", __func__,
recv_beacon->encryp_protocol, recv_beacon->group_cipher,
recv_beacon->pairwise_cipher, recv_beacon->is_8021x);
}
int rtw_check_bcn_info(ADAPTER *Adapter, u8 *pframe, u32 packet_len)
{
#if 0
unsigned int len;
unsigned char *p;
unsigned short val16, subtype;
@ -2015,7 +2155,12 @@ int rtw_check_bcn_info(ADAPTER *Adapter, u8 *pframe, u32 packet_len)
u32 bcn_channel;
unsigned short ht_cap_info;
unsigned char ht_info_infos_0;
#endif
unsigned int len;
u8 *pbssid = GetAddr3Ptr(pframe);
struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
struct wlan_network *cur_network = &(Adapter->mlmepriv.cur_network);
struct beacon_keys recv_beacon;
if (is_client_associated_to_ap(Adapter) == _FALSE)
return _TRUE;
@ -2033,6 +2178,78 @@ int rtw_check_bcn_info(ADAPTER *Adapter, u8 *pframe, u32 packet_len)
return _TRUE;
}
if (rtw_get_bcn_keys(Adapter, pframe, packet_len, &recv_beacon) == _FALSE)
return _TRUE; // parsing failed => broken IE
// don't care hidden ssid, use current beacon ssid directly
if (recv_beacon.ssid_len == 0) {
_rtw_memcpy(recv_beacon.ssid, pmlmepriv->cur_beacon_keys.ssid,
pmlmepriv->cur_beacon_keys.ssid_len);
recv_beacon.ssid_len = pmlmepriv->cur_beacon_keys.ssid_len;
}
if (_rtw_memcmp(&recv_beacon, &pmlmepriv->cur_beacon_keys, sizeof(recv_beacon)) == _TRUE)
{
pmlmepriv->new_beacon_cnts = 0;
}
else if ((pmlmepriv->new_beacon_cnts == 0) ||
_rtw_memcmp(&recv_beacon, &pmlmepriv->new_beacon_keys, sizeof(recv_beacon)) == _FALSE)
{
DBG_871X_LEVEL(_drv_err_, "%s: start new beacon (seq=%d)\n", __func__, GetSequence(pframe));
if (pmlmepriv->new_beacon_cnts == 0) {
DBG_871X_LEVEL(_drv_err_, "%s: cur beacon key\n", __func__);
DBG_871X_EXP(_drv_err_, rtw_dump_bcn_keys(&pmlmepriv->cur_beacon_keys));
}
DBG_871X_LEVEL(_drv_err_, "%s: new beacon key\n", __func__);
DBG_871X_EXP(_drv_err_, rtw_dump_bcn_keys(&recv_beacon));
memcpy(&pmlmepriv->new_beacon_keys, &recv_beacon, sizeof(recv_beacon));
pmlmepriv->new_beacon_cnts = 1;
}
else
{
DBG_871X_LEVEL(_drv_err_, "%s: new beacon again (seq=%d)\n", __func__, GetSequence(pframe));
pmlmepriv->new_beacon_cnts++;
}
// if counter >= max, it means beacon is changed really
if (pmlmepriv->new_beacon_cnts >= new_bcn_max)
{
DBG_871X_LEVEL(_drv_err_, "%s: new beacon occur!!\n", __func__);
// check bw mode change only?
pmlmepriv->cur_beacon_keys.ht_cap_info = recv_beacon.ht_cap_info;
pmlmepriv->cur_beacon_keys.ht_info_infos_0_sco = recv_beacon.ht_info_infos_0_sco;
if (_rtw_memcmp(&recv_beacon, &pmlmepriv->cur_beacon_keys,
sizeof(recv_beacon)) == _FALSE) {
// beacon is changed, have to do disconnect/connect
return _FAIL;
}
DBG_871X("%s bw mode change\n", __func__);
DBG_871X("%s bcn now: ht_cap_info:%x ht_info_infos_0:%x\n", __func__,
cur_network->BcnInfo.ht_cap_info,
cur_network->BcnInfo.ht_info_infos_0);
cur_network->BcnInfo.ht_cap_info = recv_beacon.ht_cap_info;
cur_network->BcnInfo.ht_info_infos_0 =
(cur_network->BcnInfo.ht_info_infos_0 & (~0x03)) |
recv_beacon.ht_info_infos_0_sco;
DBG_871X("%s bcn link: ht_cap_info:%x ht_info_infos_0:%x\n", __func__,
cur_network->BcnInfo.ht_cap_info,
cur_network->BcnInfo.ht_info_infos_0);
memcpy(&pmlmepriv->cur_beacon_keys, &recv_beacon, sizeof(recv_beacon));
pmlmepriv->new_beacon_cnts = 0;
}
return _SUCCESS;
#if 0
bssid = (WLAN_BSSID_EX *)rtw_zmalloc(sizeof(WLAN_BSSID_EX));
if (bssid == NULL) {
DBG_871X("%s rtw_zmalloc fail !!!\n", __func__);
@ -2229,6 +2446,7 @@ int rtw_check_bcn_info(ADAPTER *Adapter, u8 *pframe, u32 packet_len)
}
return _SUCCESS;
#endif
}
void update_beacon_info(_adapter *padapter, u8 *pframe, uint pkt_len, struct sta_info *psta)
@ -3127,8 +3345,8 @@ void adaptive_early_32k(struct mlme_ext_priv *pmlmeext, u8 *pframe, uint len)
pmlmeext->bcn_delay_ratio[i] = (pmlmeext->bcn_delay_cnt[i] * 100) /pmlmeext->bcn_cnt;
DBG_871X("%s():bcn_delay_cnt[%d]=%d, bcn_delay_ratio[%d]=%d\n", __func__, i,
pmlmeext->bcn_delay_cnt[i] , i, pmlmeext->bcn_delay_ratio[i]);
//DBG_871X("%s():bcn_delay_cnt[%d]=%d, bcn_delay_ratio[%d]=%d\n", __func__, i,
// pmlmeext->bcn_delay_cnt[i] , i, pmlmeext->bcn_delay_ratio[i]);
ratio_20_delay += pmlmeext->bcn_delay_ratio[i];
ratio_80_delay += pmlmeext->bcn_delay_ratio[i];
@ -3136,13 +3354,13 @@ void adaptive_early_32k(struct mlme_ext_priv *pmlmeext, u8 *pframe, uint len)
if(ratio_20_delay > 20 && DrvBcnEarly == 0xff)
{
DrvBcnEarly = i;
DBG_871X("%s(): DrvBcnEarly = %d\n", __func__, DrvBcnEarly);
//DBG_871X("%s(): DrvBcnEarly = %d\n", __func__, DrvBcnEarly);
}
if(ratio_80_delay > 80 && DrvBcnTimeOut == 0xff)
{
DrvBcnTimeOut = i;
DBG_871X("%s(): DrvBcnTimeOut = %d\n", __func__, DrvBcnTimeOut);
//DBG_871X("%s(): DrvBcnTimeOut = %d\n", __func__, DrvBcnTimeOut);
}
//reset adaptive_early_32k cnt
@ -3164,99 +3382,278 @@ void beacon_timing_control(_adapter *padapter)
rtw_hal_bcn_related_reg_setting(padapter);
}
#define CONFIG_SHARED_BMC_MACID
void dump_macid_map(void *sel, struct macid_bmp *map, u8 max_num)
{
DBG_871X_SEL_NL(sel, "0x%08x\n", map->m0);
#if (MACID_NUM_SW_LIMIT > 32)
if (max_num && max_num > 32)
DBG_871X_SEL_NL(sel, "0x%08x\n", map->m1);
#endif
#if (MACID_NUM_SW_LIMIT > 64)
if (max_num && max_num > 64)
DBG_871X_SEL_NL(sel, "0x%08x\n", map->m2);
#endif
#if (MACID_NUM_SW_LIMIT > 96)
if (max_num && max_num > 96)
DBG_871X_SEL_NL(sel, "0x%08x\n", map->m3);
#endif
}
inline bool rtw_macid_is_set(struct macid_bmp *map, u8 id)
{
if (id < 32)
return (map->m0 & BIT(id));
#if (MACID_NUM_SW_LIMIT > 32)
else if (id < 64)
return (map->m1 & BIT(id-32));
#endif
#if (MACID_NUM_SW_LIMIT > 64)
else if (id < 96)
return (map->m2 & BIT(id-64));
#endif
#if (MACID_NUM_SW_LIMIT > 96)
else if (id < 128)
return (map->m3 & BIT(id-96));
#endif
else
rtw_warn_on(1);
return 0;
}
inline void rtw_macid_map_set(struct macid_bmp *map, u8 id)
{
if (id < 32)
map->m0 |= BIT(id);
#if (MACID_NUM_SW_LIMIT > 32)
else if (id < 64)
map->m1 |= BIT(id-32);
#endif
#if (MACID_NUM_SW_LIMIT > 64)
else if (id < 96)
map->m2 |= BIT(id-64);
#endif
#if (MACID_NUM_SW_LIMIT > 96)
else if (id < 128)
map->m3 |= BIT(id-96);
#endif
else
rtw_warn_on(1);
}
inline void rtw_macid_map_clr(struct macid_bmp *map, u8 id)
{
if (id < 32)
map->m0 &= ~BIT(id);
#if (MACID_NUM_SW_LIMIT > 32)
else if (id < 64)
map->m1 &= ~BIT(id-32);
#endif
#if (MACID_NUM_SW_LIMIT > 64)
else if (id < 96)
map->m2 &= ~BIT(id-64);
#endif
#if (MACID_NUM_SW_LIMIT > 96)
else if (id < 128)
map->m3 &= ~BIT(id-96);
#endif
else
rtw_warn_on(1);
}
inline bool rtw_macid_is_used(struct macid_ctl_t *macid_ctl, u8 id)
{
return rtw_macid_is_set(&macid_ctl->used, id);
}
inline bool rtw_macid_is_bmc(struct macid_ctl_t *macid_ctl, u8 id)
{
return rtw_macid_is_set(&macid_ctl->bmc, id);
}
inline s8 rtw_macid_get_if_g(struct macid_ctl_t *macid_ctl, u8 id)
{
int i;
#ifdef CONFIG_SHARED_BMC_MACID
if (rtw_macid_is_bmc(macid_ctl,id))
return -1;
#endif
for (i=0;i<IFACE_ID_MAX;i++) {
if (rtw_macid_is_set(&macid_ctl->if_g[i], id))
return i;
}
return -1;
}
inline s8 rtw_macid_get_ch_g(struct macid_ctl_t *macid_ctl, u8 id)
{
int i;
for (i=0;i<2;i++) {
if (rtw_macid_is_set(&macid_ctl->ch_g[i], id))
return i;
}
return -1;
}
void rtw_alloc_macid(_adapter *padapter, struct sta_info *psta)
{
int i;
_irqL irqL;
_irqL irqL;
u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff};
struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter);
struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj);
struct macid_bmp *used_map = &macid_ctl->used;
//static u8 last_id = 0; /* for testing */
u8 last_id = 0;
if(_rtw_memcmp(psta->hwaddr, bc_addr, ETH_ALEN))
return;
if(_rtw_memcmp(psta->hwaddr, myid(&padapter->eeprompriv), ETH_ALEN))
{
psta->mac_id = NUM_STA;
if (_rtw_memcmp(psta->hwaddr, myid(&padapter->eeprompriv), ETH_ALEN)) {
psta->mac_id = macid_ctl->num;
return;
}
_enter_critical_bh(&pdvobj->lock, &irqL);
for(i=0; i<NUM_STA; i++)
{
if(pdvobj->macid[i] == _FALSE)
{
pdvobj->macid[i] = _TRUE;
#ifdef CONFIG_SHARED_BMC_MACID
if(_rtw_memcmp(psta->hwaddr, bc_addr, ETH_ALEN)) {
/* use shared broadcast & multicast macid 1 */
_enter_critical_bh(&macid_ctl->lock, &irqL);
rtw_macid_map_set(used_map, 1);
rtw_macid_map_set(&macid_ctl->bmc, 1);
for (i=0;i<IFACE_ID_MAX;i++)
rtw_macid_map_set(&macid_ctl->if_g[padapter->iface_id], 1);
/* TODO ch_g? */
_exit_critical_bh(&macid_ctl->lock, &irqL);
i = 1;
goto assigned;
}
#endif
_enter_critical_bh(&macid_ctl->lock, &irqL);
for (i=last_id;i<macid_ctl->num;i++) {
#ifdef CONFIG_SHARED_BMC_MACID
if (i == 1)
continue;
#endif
if (!rtw_macid_is_used(macid_ctl, i))
break;
}
}
_exit_critical_bh(&pdvobj->lock, &irqL);
if( i > (NUM_STA-1))
{
psta->mac_id = NUM_STA;
DBG_871X(" no room for more MACIDs\n");
}
else
{
psta->mac_id = i;
DBG_871X("%s = %d\n", __FUNCTION__, psta->mac_id);
}
if (i < macid_ctl->num) {
rtw_macid_map_set(used_map, i);
if(_rtw_memcmp(psta->hwaddr, bc_addr, ETH_ALEN))
rtw_macid_map_set(&macid_ctl->bmc, i);
rtw_macid_map_set(&macid_ctl->if_g[padapter->iface_id], i);
/* TODO ch_g? */
last_id++;
last_id %= macid_ctl->num;
}
_exit_critical_bh(&macid_ctl->lock, &irqL);
if (i >= macid_ctl->num) {
psta->mac_id = macid_ctl->num;
DBG_871X_LEVEL(_drv_err_, FUNC_ADPT_FMT" if%u, hwaddr:"MAC_FMT" no available macid\n"
, FUNC_ADPT_ARG(padapter), padapter->iface_id+1, MAC_ARG(psta->hwaddr));
rtw_warn_on(1);
goto exit;
} else {
goto assigned;
}
assigned:
psta->mac_id = i;
DBG_871X(FUNC_ADPT_FMT" if%u, hwaddr:"MAC_FMT" macid:%u\n"
, FUNC_ADPT_ARG(padapter), padapter->iface_id+1, MAC_ARG(psta->hwaddr), psta->mac_id);
exit:
return;
}
void rtw_release_macid(_adapter *padapter, struct sta_info *psta)
{
int i;
_irqL irqL;
_irqL irqL;
u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff};
struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter);
struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj);
if(_rtw_memcmp(psta->hwaddr, myid(&padapter->eeprompriv), ETH_ALEN))
return;
#ifdef CONFIG_SHARED_BMC_MACID
if(_rtw_memcmp(psta->hwaddr, bc_addr, ETH_ALEN))
return;
if(_rtw_memcmp(psta->hwaddr, myid(&padapter->eeprompriv), ETH_ALEN))
{
if (psta->mac_id == 1) {
DBG_871X_LEVEL(_drv_err_, FUNC_ADPT_FMT" if%u, hwaddr:"MAC_FMT" with macid:%u\n"
, FUNC_ADPT_ARG(padapter), padapter->iface_id+1, MAC_ARG(psta->hwaddr), psta->mac_id);
rtw_warn_on(1);
return;
}
#endif
_enter_critical_bh(&pdvobj->lock, &irqL);
if(psta->mac_id<NUM_STA && psta->mac_id !=1 )
{
if(pdvobj->macid[psta->mac_id] == _TRUE)
{
DBG_871X("%s = %d\n", __FUNCTION__, psta->mac_id);
pdvobj->macid[psta->mac_id] = _FALSE;
psta->mac_id = NUM_STA;
_enter_critical_bh(&macid_ctl->lock, &irqL);
if (psta->mac_id < macid_ctl->num) {
int i;
if (!rtw_macid_is_used(macid_ctl, psta->mac_id)) {
DBG_871X_LEVEL(_drv_err_, FUNC_ADPT_FMT" if%u, hwaddr:"MAC_FMT" macid:%u not used\n"
, FUNC_ADPT_ARG(padapter), padapter->iface_id+1, MAC_ARG(psta->hwaddr), psta->mac_id);
rtw_warn_on(1);
}
rtw_macid_map_clr(&macid_ctl->used, psta->mac_id);
rtw_macid_map_clr(&macid_ctl->bmc, psta->mac_id);
for (i=0;i<IFACE_ID_MAX;i++)
rtw_macid_map_clr(&macid_ctl->if_g[i], psta->mac_id);
for (i=0;i<2;i++)
rtw_macid_map_clr(&macid_ctl->ch_g[i], psta->mac_id);
}
_exit_critical_bh(&pdvobj->lock, &irqL);
_exit_critical_bh(&macid_ctl->lock, &irqL);
psta->mac_id = macid_ctl->num;
}
//For 8188E RA
u8 rtw_search_max_mac_id(_adapter *padapter)
{
u8 max_mac_id=0;
struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter);
struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj);
int i;
_irqL irqL;
_enter_critical_bh(&pdvobj->lock, &irqL);
for(i=(NUM_STA-1); i>=0 ; i--)
{
if(pdvobj->macid[i] == _TRUE)
{
_irqL irqL;
_enter_critical_bh(&macid_ctl->lock, &irqL);
for(i=(macid_ctl->num-1); i>0 ; i--) {
if (!rtw_macid_is_used(macid_ctl, i))
break;
}
}
_exit_critical_bh(&macid_ctl->lock, &irqL);
max_mac_id = i;
_exit_critical_bh(&pdvobj->lock, &irqL);
return max_mac_id;
}
inline void rtw_macid_ctl_init(struct macid_ctl_t *macid_ctl)
{
_rtw_spinlock_init(&macid_ctl->lock);
}
inline void rtw_macid_ctl_deinit(struct macid_ctl_t *macid_ctl)
{
_rtw_spinlock_free(&macid_ctl->lock);
}
#if 0
unsigned int setup_beacon_frame(_adapter *padapter, unsigned char *beacon_frame)
{
@ -3472,152 +3869,7 @@ u8 rtw_check_invalid_mac_address(u8 *mac_addr) {
return res;
}
/*
* Description:
* dump_TX_FIFO: This is only used to dump TX_FIFO for debug WoW mode offload
* contant.
*
* Input:
* adapter: adapter pointer.
* page_num: The max. page number that user want to dump.
* page_size: page size of each page. eg. 128 bytes, 256 bytes.
*/
void dump_TX_FIFO(_adapter* padapter, u8 page_num, u16 page_size){
int i;
u8 val = 0;
u8 base = 0;
u32 addr = 0;
u32 count = (page_size / 8);
if (page_num <= 0) {
DBG_871X("!!%s: incorrect input page_num paramter!\n", __func__);
return;
}
if (page_size < 128 || page_size > 256) {
DBG_871X("!!%s: incorrect input page_size paramter!\n", __func__);
return;
}
DBG_871X("+%s+\n", __func__);
val = rtw_read8(padapter, 0x106);
rtw_write8(padapter, 0x106, 0x69);
DBG_871X("0x106: 0x%02x\n", val);
base = rtw_read8(padapter, 0x209);
DBG_871X("0x209: 0x%02x\n", base);
addr = ((base) * page_size)/8;
for (i = 0 ; i < page_num * count ; i+=2) {
rtw_write32(padapter, 0x140, addr + i);
printk(" %08x %08x ", rtw_read32(padapter, 0x144), rtw_read32(padapter, 0x148));
rtw_write32(padapter, 0x140, addr + i + 1);
printk(" %08x %08x \n", rtw_read32(padapter, 0x144), rtw_read32(padapter, 0x148));
}
}
#ifdef CONFIG_GPIO_API
int rtw_get_gpio(struct net_device *netdev, int gpio_num)
{
u8 value;
u8 direction;
_adapter *adapter = (_adapter *)rtw_netdev_priv(netdev);
struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter);
rtw_ps_deny(adapter, PS_DENY_IOCTL);
DBG_871X("rf_pwrstate=0x%02x\n", pwrpriv->rf_pwrstate);
LeaveAllPowerSaveModeDirect(adapter);
/* Read GPIO Direction */
direction = (rtw_read8(adapter,REG_GPIO_PIN_CTRL + 2) & BIT(gpio_num)) >> gpio_num;
/* According the direction to read register value */
if( direction )
value = (rtw_read8(adapter, REG_GPIO_PIN_CTRL + 1)& BIT(gpio_num)) >> gpio_num;
else
value = (rtw_read8(adapter, REG_GPIO_PIN_CTRL)& BIT(gpio_num)) >> gpio_num;
rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL);
DBG_871X("%s direction=%d value=%d\n",__FUNCTION__,direction,value);
return value;
}
EXPORT_SYMBOL(rtw_get_gpio);
int rtw_set_gpio_output_value(struct net_device *netdev, int gpio_num, BOOLEAN isHigh)
{
u8 direction = 0;
u8 res = -1;
_adapter *adapter = (_adapter *)rtw_netdev_priv(netdev);
/* Check GPIO is 4~7 */
if( gpio_num > 7 || gpio_num < 4)
{
DBG_871X("%s The gpio number does not included 4~7.\n",__FUNCTION__);
return -1;
}
rtw_ps_deny(adapter, PS_DENY_IOCTL);
LeaveAllPowerSaveModeDirect(adapter);
/* Read GPIO direction */
direction = (rtw_read8(adapter,REG_GPIO_PIN_CTRL + 2) & BIT(gpio_num)) >> gpio_num;
/* If GPIO is output direction, setting value. */
if( direction )
{
if(isHigh)
rtw_write8(adapter, REG_GPIO_PIN_CTRL + 1, rtw_read8(adapter, REG_GPIO_PIN_CTRL + 1) | BIT(gpio_num));
else
rtw_write8(adapter, REG_GPIO_PIN_CTRL + 1, rtw_read8(adapter, REG_GPIO_PIN_CTRL + 1) & ~BIT(gpio_num));
DBG_871X("%s Set gpio %x[%d]=%d\n",__FUNCTION__,REG_GPIO_PIN_CTRL+1,gpio_num,isHigh );
res = 0;
}
else
{
DBG_871X("%s The gpio is input,not be set!\n",__FUNCTION__);
res = -1;
}
rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL);
return res;
}
EXPORT_SYMBOL(rtw_set_gpio_output_value);
int rtw_config_gpio(struct net_device *netdev, int gpio_num, BOOLEAN isOutput)
{
_adapter *adapter = (_adapter *)rtw_netdev_priv(netdev);
if( gpio_num > 7 || gpio_num < 4)
{
DBG_871X("%s The gpio number does not included 4~7.\n",__FUNCTION__);
return -1;
}
DBG_871X("%s gpio_num =%d direction=%d\n",__FUNCTION__,gpio_num,isOutput);
rtw_ps_deny(adapter, PS_DENY_IOCTL);
LeaveAllPowerSaveModeDirect(adapter);
if( isOutput )
{
rtw_write8(adapter, REG_GPIO_PIN_CTRL + 2, rtw_read8(adapter, REG_GPIO_PIN_CTRL + 2) | BIT(gpio_num));
}
else
{
rtw_write8(adapter, REG_GPIO_PIN_CTRL + 2, rtw_read8(adapter, REG_GPIO_PIN_CTRL + 2) & ~BIT(gpio_num));
}
rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL);
return 0;
}
EXPORT_SYMBOL(rtw_config_gpio);
#endif
#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
void rtw_get_current_ip_address(PADAPTER padapter, u8 *pcurrentip)
@ -3824,9 +4076,13 @@ int rtw_dev_nlo_info_set(struct pno_nlo_info *nlo_info, pno_ssid_t* ssid,
nlo_info->fast_scan_period = pno_time;
nlo_info->ssid_num = num & BIT_LEN_MASK_32(8);
nlo_info->hidden_ssid_num = num & BIT_LEN_MASK_32(8);
nlo_info->slow_scan_period = (pno_time * 2);
nlo_info->fast_scan_iterations = 5;
if (nlo_info->hidden_ssid_num > 8)
nlo_info->hidden_ssid_num = 8;
//TODO: channel list and probe index is all empty.
for (i = 0 ; i < num ; i++) {
nlo_info->ssid_length[i]
@ -3876,6 +4132,7 @@ int rtw_dev_ssid_list_set(struct pno_ssid_list *pno_ssid_list,
for (i = 0 ; i < num ; i++) {
_rtw_memcpy(&pno_ssid_list->node[i].SSID,
ssid[i].SSID, ssid[i].SSID_len);
pno_ssid_list->node[i].SSID_len = ssid[i].SSID_len;
}
return 0;
}
@ -3966,15 +4223,15 @@ int rtw_dev_pno_set(struct net_device *net, pno_ssid_t* ssid, int num,
failing:
if (pwrctl->pnlo_info) {
rtw_mfree(pwrctl->pnlo_info, sizeof(pno_nlo_info_t));
rtw_mfree((u8 *)pwrctl->pnlo_info, sizeof(pno_nlo_info_t));
pwrctl->pnlo_info = NULL;
}
if (pwrctl->pno_ssid_list) {
rtw_mfree(pwrctl->pno_ssid_list, sizeof(pno_ssid_list_t));
rtw_mfree((u8 *)pwrctl->pno_ssid_list, sizeof(pno_ssid_list_t));
pwrctl->pno_ssid_list = NULL;
}
if (pwrctl->pscan_info) {
rtw_mfree(pwrctl->pscan_info, sizeof(pno_scan_info_t));
rtw_mfree((u8 *)pwrctl->pscan_info, sizeof(pno_scan_info_t));
pwrctl->pscan_info = NULL;
}

54
drivers/net/wireless/rockchip_wlan/rtl8723bs/core/rtw_xmit.c
View File

@ -448,7 +448,6 @@ u8 query_ra_short_GI(struct sta_info *psta)
if (psta->vhtpriv.vht_option) {
sgi_80m= psta->vhtpriv.sgi_80m;
}
else
#endif //CONFIG_80211AC_VHT
{
sgi_20m = psta->htpriv.sgi_20m;
@ -964,6 +963,18 @@ s32 update_tdls_attrib(_adapter *padapter, struct pkt_attrib *pattrib)
#endif //CONFIG_TDLS
//get non-qos hw_ssn control register,mapping to REG_HW_SEQ0,1,2,3
inline u8 rtw_get_hwseq_no(_adapter *padapter)
{
u8 hwseq_num = 0;
#ifdef CONFIG_CONCURRENT_MODE
if(padapter->adapter_type == SECONDARY_ADAPTER)
hwseq_num = 1;
//else
// hwseq_num = 2;
#endif //CONFIG_CONCURRENT_MODE
return hwseq_num;
}
static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattrib)
{
uint i;
@ -974,8 +985,9 @@ static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattr
sint bmcast;
struct sta_priv *pstapriv = &padapter->stapriv;
struct security_priv *psecuritypriv = &padapter->securitypriv;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct qos_priv *pqospriv= &pmlmepriv->qospriv;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
sint res = _SUCCESS;
_func_enter_;
@ -995,12 +1007,12 @@ static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattr
if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) ||
(check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) {
_rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN);
_rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN);
_rtw_memcpy(pattrib->ta, myid(&padapter->eeprompriv), ETH_ALEN);
DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_adhoc);
}
else if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) {
_rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN);
_rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN);
_rtw_memcpy(pattrib->ta, myid(&padapter->eeprompriv), ETH_ALEN);
DBG_COUNTER(padapter->tx_logs.core_tx_upd_attrib_sta);
}
else if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) {
@ -1181,7 +1193,7 @@ static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattr
}
//pattrib->priority = 5; //force to used VI queue, for testing
pattrib->hw_ssn_sel = pxmitpriv->hw_ssn_seq_no;
rtw_set_tx_chksum_offload(pkt, pattrib);
exit:
@ -1434,8 +1446,6 @@ _func_enter_;
if (pattrib->subtype & WIFI_DATA_TYPE)
{
if ((check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)) {
//to_ds = 1, fr_ds = 0;
#ifdef CONFIG_TDLS
if(pattrib->direct_link == _TRUE){
//TDLS data transfer, ToDS=0, FrDs=0
@ -1446,11 +1456,12 @@ _func_enter_;
else
#endif //CONFIG_TDLS
{
//to_ds = 1, fr_ds = 0;
// 1.Data transfer to AP
// 2.Arp pkt will relayed by AP
SetToDs(fctrl);
_rtw_memcpy(pwlanhdr->addr1, get_bssid(pmlmepriv), ETH_ALEN);
_rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN);
_rtw_memcpy(pwlanhdr->addr2, pattrib->ta, ETH_ALEN);
_rtw_memcpy(pwlanhdr->addr3, pattrib->dst, ETH_ALEN);
}
@ -1471,7 +1482,7 @@ _func_enter_;
else if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) ||
(check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) {
_rtw_memcpy(pwlanhdr->addr1, pattrib->dst, ETH_ALEN);
_rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN);
_rtw_memcpy(pwlanhdr->addr2, pattrib->ta, ETH_ALEN);
_rtw_memcpy(pwlanhdr->addr3, get_bssid(pmlmepriv), ETH_ALEN);
if(pattrib->qos_en)
@ -2243,7 +2254,7 @@ _func_enter_;
int frame_body_len;
u8 mic[16];
_rtw_memset(MME, 0, 18);
_rtw_memset(MME, 0, _MME_IE_LENGTH_);
//other types doesn't need the BIP
if(GetFrameSubType(pframe) != WIFI_DEAUTH && GetFrameSubType(pframe) != WIFI_DISASSOC)
@ -3002,7 +3013,7 @@ _func_enter_;
else if(pxmitframe->ext_tag == 1)
queue = &pxmitpriv->free_xframe_ext_queue;
else
{}
rtw_warn_on(1);
_enter_critical_bh(&queue->lock, &irqL);
@ -3109,7 +3120,7 @@ static struct xmit_frame *dequeue_one_xmitframe(struct xmit_priv *pxmitpriv, str
break;
pxmitframe = NULL;
//pxmitframe = NULL;
}
@ -4012,7 +4023,7 @@ sint xmitframe_enqueue_for_sleeping_sta(_adapter *padapter, struct xmit_frame *p
//pattrib->triggered=0;
if (bmcst && xmitframe_hiq_filter(pxmitframe) == _TRUE)
pattrib->qsel = 0x11;//HIQ
pattrib->qsel = QSLT_HIGH;//HIQ
return ret;
}
@ -4024,7 +4035,7 @@ sint xmitframe_enqueue_for_sleeping_sta(_adapter *padapter, struct xmit_frame *p
if(pstapriv->sta_dz_bitmap)//if anyone sta is in ps mode
{
//pattrib->qsel = 0x11;//HIQ
//pattrib->qsel = QSLT_HIGH;//HIQ
rtw_list_delete(&pxmitframe->list);
@ -4043,7 +4054,10 @@ sint xmitframe_enqueue_for_sleeping_sta(_adapter *padapter, struct xmit_frame *p
//DBG_871X("enqueue, sq_len=%d, tim=%x\n", psta->sleepq_len, pstapriv->tim_bitmap);
if (update_tim == _TRUE) {
update_beacon(padapter, _TIM_IE_, NULL, _TRUE);
if (is_broadcast_mac_addr(pattrib->ra))
_update_beacon(padapter, _TIM_IE_, NULL, _TRUE, "buffer BC");
else
_update_beacon(padapter, _TIM_IE_, NULL, _TRUE, "buffer MC");
} else {
chk_bmc_sleepq_cmd(padapter);
}
@ -4116,7 +4130,7 @@ sint xmitframe_enqueue_for_sleeping_sta(_adapter *padapter, struct xmit_frame *p
{
//DBG_871X("sleepq_len==1, update BCNTIM\n");
//upate BCN for TIM IE
update_beacon(padapter, _TIM_IE_, NULL, _TRUE);
_update_beacon(padapter, _TIM_IE_, NULL, _TRUE, "buffer UC");
}
}
@ -4423,8 +4437,12 @@ void wakeup_sta_to_xmit(_adapter *padapter, struct sta_info *psta)
if(update_mask)
{
//update_BCNTIM(padapter);
//printk("%s => call update_beacon\n",__FUNCTION__);
update_beacon(padapter, _TIM_IE_, NULL, _TRUE);
if ((update_mask & (BIT(0)|BIT(1))) == (BIT(0)|BIT(1)))
_update_beacon(padapter, _TIM_IE_, NULL, _TRUE, "clear UC&BMC");
else if ((update_mask & BIT(1)) == BIT(1))
_update_beacon(padapter, _TIM_IE_, NULL, _TRUE, "clear BMC");
else
_update_beacon(padapter, _TIM_IE_, NULL, _TRUE, "clear UC");
}
}

2
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/HalPwrSeqCmd.c
View File

@ -147,7 +147,7 @@ u8 HalPwrSeqCmdParsing(
rtw_udelay_os(10);
if (pollingCount++ > maxPollingCnt) {
DBG_871X("Fail to polling Offset[%#x]=%02x\n", offset, value);
DBG_871X_LEVEL(_drv_always_, "HalPwrSeqCmdParsing: Fail to polling Offset[%#x]=%02x\n", offset, value);
return _FALSE;
}
} while (!bPollingBit);

35
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC-BTCoexist/HalBtc8188c2Ant.c
View File

@ -1774,11 +1774,6 @@ EXhalbtc8188c2ant_DisplayCoexInfo(
pu1Byte cliBuf=pBtCoexist->cliBuf;
u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0;
u4Byte u4Tmp[4];
BOOLEAN bRoam=FALSE, bScan=FALSE, bLink=FALSE, bWifiUnder5G=FALSE;
BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE;
s4Byte wifiRssi=0, btHsRssi=0;
u4Byte wifiBw, wifiTrafficDir;
u1Byte wifiDot11Chnl, wifiHsChnl;
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============");
CL_PRINTF(cliBuf);
@ -1797,34 +1792,12 @@ EXhalbtc8188c2ant_DisplayCoexInfo(
((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_DOT11_CHNL, &wifiDot11Chnl);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_HS_CHNL, &wifiHsChnl);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d(%d)", "Dot11 channel / HsChnl(HsMode)", \
wifiDot11Chnl, wifiHsChnl, bBtHsOn);
// wifi status
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============");
CL_PRINTF(cliBuf);
pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_HS_RSSI, &btHsRssi);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "Wifi rssi/ HS rssi", \
wifiRssi, btHsRssi);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "Wifi bLink/ bRoam/ bScan", \
bLink, bRoam, bScan);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %s/ %s ", "Wifi status", \
(bWifiUnder5G? "5G":"2.4G"),
((BTC_WIFI_BW_LEGACY==wifiBw)? "Legacy": (((BTC_WIFI_BW_HT40==wifiBw)? "HT40":"HT20"))),
((!bWifiBusy)? "idle": ((BTC_WIFI_TRAFFIC_TX==wifiTrafficDir)? "uplink":"downlink")));
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============");
CL_PRINTF(cliBuf);
if(pStackInfo->bProfileNotified)

35
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC-BTCoexist/HalBtc8192d2Ant.c
View File

@ -1780,11 +1780,6 @@ EXhalbtc8192d2ant_DisplayCoexInfo(
pu1Byte cliBuf=pBtCoexist->cliBuf;
u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0;
u4Byte u4Tmp[4];
BOOLEAN bRoam=FALSE, bScan=FALSE, bLink=FALSE, bWifiUnder5G=FALSE;
BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE;
s4Byte wifiRssi=0, btHsRssi=0;
u4Byte wifiBw, wifiTrafficDir;
u1Byte wifiDot11Chnl, wifiHsChnl;
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============");
CL_PRINTF(cliBuf);
@ -1803,34 +1798,12 @@ EXhalbtc8192d2ant_DisplayCoexInfo(
((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_DOT11_CHNL, &wifiDot11Chnl);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_HS_CHNL, &wifiHsChnl);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d(%d)", "Dot11 channel / HsChnl(HsMode)", \
wifiDot11Chnl, wifiHsChnl, bBtHsOn);
// wifi status
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============");
CL_PRINTF(cliBuf);
pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_HS_RSSI, &btHsRssi);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "Wifi rssi/ HS rssi", \
wifiRssi, btHsRssi);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "Wifi bLink/ bRoam/ bScan", \
bLink, bRoam, bScan);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %s/ %s ", "Wifi status", \
(bWifiUnder5G? "5G":"2.4G"),
((BTC_WIFI_BW_LEGACY==wifiBw)? "Legacy": (((BTC_WIFI_BW_HT40==wifiBw)? "HT40":"HT20"))),
((!bWifiBusy)? "idle": ((BTC_WIFI_TRAFFIC_TX==wifiTrafficDir)? "uplink":"downlink")));
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============");
CL_PRINTF(cliBuf);
if(pStackInfo->bProfileNotified)

59
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC-BTCoexist/HalBtc8192e1Ant.c
View File

@ -2519,11 +2519,6 @@ EXhalbtc8192e1ant_DisplayCoexInfo(
pu1Byte cliBuf=pBtCoexist->cliBuf;
u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0;
u4Byte u4Tmp[4];
BOOLEAN bRoam=FALSE, bScan=FALSE, bLink=FALSE, bWifiUnder5G=FALSE;
BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE;
s4Byte wifiRssi=0, btHsRssi=0;
u4Byte wifiBw, wifiTrafficDir;
u1Byte wifiDot11Chnl, wifiHsChnl;
u4Byte fwVer=0, btPatchVer=0;
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============");
@ -2558,40 +2553,19 @@ EXhalbtc8192e1ant_DisplayCoexInfo(
GLCoexVerDate8192e1Ant, GLCoexVer8192e1Ant, fwVer, btPatchVer, btPatchVer);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_DOT11_CHNL, &wifiDot11Chnl);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_HS_CHNL, &wifiHsChnl);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d(%d)", "Dot11 channel / HsChnl(HsMode)", \
wifiDot11Chnl, wifiHsChnl, bBtHsOn);
CL_PRINTF(cliBuf);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "H2C Wifi inform bt chnl Info", \
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \
pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1],
pCoexDm->wifiChnlInfo[2]);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_HS_RSSI, &btHsRssi);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "Wifi rssi/ HS rssi", \
wifiRssi, btHsRssi);
// wifi status
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============");
CL_PRINTF(cliBuf);
pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============");
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "Wifi bLink/ bRoam/ bScan", \
bLink, bRoam, bScan);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %s/ %s ", "Wifi status", \
(bWifiUnder5G? "5G":"2.4G"),
((BTC_WIFI_BW_LEGACY==wifiBw)? "Legacy": (((BTC_WIFI_BW_HT40==wifiBw)? "HT40":"HT20"))),
((!bWifiBusy)? "idle": ((BTC_WIFI_TRAFFIC_TX==wifiTrafficDir)? "uplink":"downlink")));
CL_PRINTF(cliBuf);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", \
((pBtCoexist->btInfo.bBtDisabled)? ("disabled"): ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8192E_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus)? "non-connected idle":
( (BT_8192E_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy")))),
@ -2620,17 +2594,6 @@ EXhalbtc8192e1ant_DisplayCoexInfo(
CL_PRINTF(cliBuf);
}
}
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/%s, (0x%x/0x%x)", "PS state, IPS/LPS, (lps/rpwm)", \
((pCoexSta->bUnderIps? "IPS ON":"IPS OFF")),
((pCoexSta->bUnderLps? "LPS ON":"LPS OFF")),
pBtCoexist->btInfo.lpsVal,
pBtCoexist->btInfo.rpwmVal);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_FW_PWR_MODE_CMD);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "SS Type", \
pCoexDm->curSsType);
CL_PRINTF(cliBuf);
if(!pBtCoexist->bManualControl)
{
@ -2638,10 +2601,6 @@ EXhalbtc8192e1ant_DisplayCoexInfo(
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============");
CL_PRINTF(cliBuf);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d(0x%x) ", "SM[SwDacSwing(lvl)]", \
pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl);
CL_PRINTF(cliBuf);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %d ", "DelBA/ BtCtrlAgg/ AggSize", \
(pBtCoexist->btInfo.bRejectAggPkt? "Yes":"No"), (pBtCoexist->btInfo.bBtCtrlAggBufSize? "Yes":"No"),
pBtCoexist->btInfo.aggBufSize);
@ -2665,8 +2624,8 @@ EXhalbtc8192e1ant_DisplayCoexInfo(
pCoexDm->errorCondition);
CL_PRINTF(cliBuf);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "DecBtPwrLvl/ IgnWlanAct", \
pCoexDm->curBtDecPwrLvl, pCoexDm->bCurIgnoreWlanAct);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d ", "IgnWlanAct", \
pCoexDm->bCurIgnoreWlanAct);
CL_PRINTF(cliBuf);
}

50
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC-BTCoexist/HalBtc8192e2Ant.c
View File

@ -1697,7 +1697,8 @@ halbtc8192e2ant_SetSwitchSsType(
pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xd04, 0x1);
pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x90c, 0x81111111);
// switch cck patch
pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xe77, 0x4, 0x1);
//Jenyu suggest to remove 0xe77 this line for tx issue
//pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xe77, 0x4, 0x1);
//pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xa07, 0x81);
mimoPs=BTC_MIMO_PS_STATIC;
}
@ -1707,7 +1708,8 @@ halbtc8192e2ant_SetSwitchSsType(
pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xc04, 0x33);
pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xd04, 0x3);
pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x90c, 0x81121313);
pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xe77, 0x4, 0x0);
//Jenyu suggest to remove 0xe77 this line for tx issue
//pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xe77, 0x4, 0x0);
//pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xa07, 0x41);
mimoPs=BTC_MIMO_PS_DYNAMIC;
}
@ -3827,11 +3829,7 @@ EXhalbtc8192e2ant_DisplayCoexInfo(
u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0;
u2Byte u2Tmp[4];
u4Byte u4Tmp[4];
BOOLEAN bRoam=FALSE, bScan=FALSE, bLink=FALSE, bWifiUnder5G=FALSE;
BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE;
s4Byte wifiRssi=0, btHsRssi=0;
u4Byte wifiBw, wifiTrafficDir, faOfdm, faCck;
u1Byte wifiDot11Chnl, wifiHsChnl;
u4Byte faOfdm, faCck;
u4Byte fwVer=0, btPatchVer=0;
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============");
@ -3859,39 +3857,17 @@ EXhalbtc8192e2ant_DisplayCoexInfo(
GLCoexVerDate8192e2Ant, GLCoexVer8192e2Ant, fwVer, btPatchVer, btPatchVer);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_DOT11_CHNL, &wifiDot11Chnl);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_HS_CHNL, &wifiHsChnl);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d(%d)", "Dot11 channel / HsMode(HsChnl)", \
wifiDot11Chnl, bBtHsOn, wifiHsChnl);
CL_PRINTF(cliBuf);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "H2C Wifi inform bt chnl Info", \
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \
pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1],
pCoexDm->wifiChnlInfo[2]);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_HS_RSSI, &btHsRssi);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "Wifi rssi/ HS rssi", \
wifiRssi, btHsRssi);
// wifi status
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============");
CL_PRINTF(cliBuf);
pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "Wifi bLink/ bRoam/ bScan", \
bLink, bRoam, bScan);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %s/ %s ", "Wifi status", \
(bWifiUnder5G? "5G":"2.4G"),
((BTC_WIFI_BW_LEGACY==wifiBw)? "Legacy": (((BTC_WIFI_BW_HT40==wifiBw)? "HT40":"HT20"))),
((!bWifiBusy)? "idle": ((BTC_WIFI_TRAFFIC_TX==wifiTrafficDir)? "uplink":"downlink")));
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============");
CL_PRINTF(cliBuf);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", \
@ -3923,12 +3899,6 @@ EXhalbtc8192e2ant_DisplayCoexInfo(
}
}
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/%s", "PS state, IPS/LPS", \
((pCoexSta->bUnderIps? "IPS ON":"IPS OFF")),
((pCoexSta->bUnderLps? "LPS ON":"LPS OFF")));
CL_PRINTF(cliBuf);
pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_FW_PWR_MODE_CMD);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "SS Type", \
pCoexDm->curSsType);
CL_PRINTF(cliBuf);

43
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC-BTCoexist/HalBtc8723a1Ant.c
View File

@ -1068,11 +1068,6 @@ EXhalbtc8723a1ant_DisplayCoexInfo(
pu1Byte cliBuf=pBtCoexist->cliBuf;
u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0;
u4Byte u4Tmp[4];
BOOLEAN bRoam=FALSE, bScan=FALSE, bLink=FALSE, bWifiUnder5G=FALSE;
BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE;
s4Byte wifiRssi=0, btHsRssi=0;
u4Byte wifiBw, wifiTrafficDir;
u1Byte wifiDot11Chnl, wifiHsChnl;
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============");
CL_PRINTF(cliBuf);
@ -1091,39 +1086,17 @@ EXhalbtc8723a1ant_DisplayCoexInfo(
((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_DOT11_CHNL, &wifiDot11Chnl);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_HS_CHNL, &wifiHsChnl);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d(%d)", "Dot11 channel / HsChnl(HsMode)", \
wifiDot11Chnl, wifiHsChnl, bBtHsOn);
CL_PRINTF(cliBuf);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "H2C Wifi inform bt chnl Info", \
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \
pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1],
pCoexDm->wifiChnlInfo[2]);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_HS_RSSI, &btHsRssi);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "Wifi rssi/ HS rssi", \
wifiRssi, btHsRssi);
// wifi status
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============");
CL_PRINTF(cliBuf);
pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "Wifi bLink/ bRoam/ bScan", \
bLink, bRoam, bScan);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %s/ %s ", "Wifi status", \
(bWifiUnder5G? "5G":"2.4G"),
((BTC_WIFI_BW_LEGACY==wifiBw)? "Legacy": (((BTC_WIFI_BW_HT40==wifiBw)? "HT40":"HT20"))),
((!bWifiBusy)? "idle": ((BTC_WIFI_TRAFFIC_TX==wifiTrafficDir)? "uplink":"downlink")));
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============");
CL_PRINTF(cliBuf);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", \
@ -1251,12 +1224,6 @@ EXhalbtc8723a1ant_DisplayCoexInfo(
pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx);
CL_PRINTF(cliBuf);
// Tx mgnt queue hang or not, 0x41b should = 0xf, ex: 0xd ==>hang
u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x41b);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x41b (mgntQ hang chk == 0xf)", \
u1Tmp[0]);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS);
}

43
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC-BTCoexist/HalBtc8723a2Ant.c
View File

@ -3429,11 +3429,6 @@ EXhalbtc8723a2ant_DisplayCoexInfo(
pu1Byte cliBuf=pBtCoexist->cliBuf;
u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0;
u4Byte u4Tmp[4];
BOOLEAN bRoam=FALSE, bScan=FALSE, bLink=FALSE, bWifiUnder5G=FALSE;
BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE;
s4Byte wifiRssi=0, btHsRssi=0;
u4Byte wifiBw, wifiTrafficDir;
u1Byte wifiDot11Chnl, wifiHsChnl;
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============");
CL_PRINTF(cliBuf);
@ -3452,39 +3447,17 @@ EXhalbtc8723a2ant_DisplayCoexInfo(
((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_DOT11_CHNL, &wifiDot11Chnl);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_HS_CHNL, &wifiHsChnl);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d(%d)", "Dot11 channel / HsChnl(HsMode)", \
wifiDot11Chnl, wifiHsChnl, bBtHsOn);
CL_PRINTF(cliBuf);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "H2C Wifi inform bt chnl Info", \
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \
pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1],
pCoexDm->wifiChnlInfo[2]);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_HS_RSSI, &btHsRssi);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "Wifi rssi/ HS rssi", \
wifiRssi, btHsRssi);
// wifi status
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============");
CL_PRINTF(cliBuf);
pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "Wifi bLink/ bRoam/ bScan", \
bLink, bRoam, bScan);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %s/ %s ", "Wifi status", \
(bWifiUnder5G? "5G":"2.4G"),
((BTC_WIFI_BW_LEGACY==wifiBw)? "Legacy": (((BTC_WIFI_BW_HT40==wifiBw)? "HT40":"HT20"))),
((!bWifiBusy)? "idle": ((BTC_WIFI_TRAFFIC_TX==wifiTrafficDir)? "uplink":"downlink")));
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============");
CL_PRINTF(cliBuf);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", \
@ -3615,12 +3588,6 @@ EXhalbtc8723a2ant_DisplayCoexInfo(
pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx);
CL_PRINTF(cliBuf);
// Tx mgnt queue hang or not, 0x41b should = 0xf, ex: 0xd ==>hang
u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x41b);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x41b (mgntQ hang chk == 0xf)", \
u1Tmp[0]);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS);
}

1135
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC-BTCoexist/HalBtc8723b1Ant.c
View File

File diff suppressed because it is too large Load Diff

72
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC-BTCoexist/HalBtc8723b1Ant.h
View File

@ -62,6 +62,9 @@ typedef enum _BT_8723B_1ANT_COEX_ALGO{
}BT_8723B_1ANT_COEX_ALGO,*PBT_8723B_1ANT_COEX_ALGO;
typedef struct _COEX_DM_8723B_1ANT{
// hw setting
u1Byte preAntPosType;
u1Byte curAntPosType;
// fw mechanism
BOOLEAN bCurIgnoreWlanAct;
BOOLEAN bPreIgnoreWlanAct;
@ -122,6 +125,7 @@ typedef struct _COEX_STA_8723B_1ANT{
BOOLEAN bA2dpExist;
BOOLEAN bHidExist;
BOOLEAN bPanExist;
BOOLEAN bBtHiPriLinkExist;
BOOLEAN bUnderLps;
BOOLEAN bUnderIps;
@ -137,6 +141,7 @@ typedef struct _COEX_STA_8723B_1ANT{
BOOLEAN bC2hBtInfoReqSent;
u1Byte btInfoC2h[BT_INFO_SRC_8723B_1ANT_MAX][10];
u4Byte btInfoC2hCnt[BT_INFO_SRC_8723B_1ANT_MAX];
BOOLEAN bBtWhckTest;
BOOLEAN bC2hBtInquiryPage;
BOOLEAN bC2hBtPage; //Add for win8.1 page out issue
BOOLEAN bWiFiIsHighPriTask; //Add for win8.1 page out issue
@ -157,11 +162,45 @@ typedef struct _COEX_STA_8723B_1ANT{
BOOLEAN bCCKLock;
BOOLEAN bPreCCKLock;
BOOLEAN bCCKEverLock;
u1Byte nCoexTableType;
BOOLEAN bForceLpsOn;
}COEX_STA_8723B_1ANT, *PCOEX_STA_8723B_1ANT;
#define BT_8723B_1ANT_ANTDET_PSD_POINTS 256 //MAX:1024
#define BT_8723B_1ANT_ANTDET_PSD_AVGNUM 1 //MAX:3
typedef struct _PSDSCAN_STA_8723B_1ANT{
BOOLEAN bIsAntDetEnable;
BOOLEAN bIsAntIsoEnable;
BOOLEAN bIsPSDScanEnable;
u4Byte realcentFreq; //ex:2412
s4Byte realoffset;
u4Byte realspan;
u4Byte realseconds;
BOOLEAN bAntDetFinish;
u1Byte nAntIsolation;
u4Byte nPSDBandWidth; //unit: Hz
u4Byte nPSDPoint; //128/256/512/1024
u4Byte nPSDReport[1024]; //unit:dB (20logx), 0~255
u4Byte nPSDReport_MaxHold[1024]; //unit:dB (20logx), 0~255
u4Byte nPSDStartPoint;
u4Byte nPSDStopPoint;
u4Byte nPSDMaxValuePoint;
u4Byte nPSDMaxValue;
u4Byte nPSDStartBase;
u4Byte nPSDAvgNum; // 1/8/16/32
u4Byte nPSDGenCount;
u4Byte nPSDGenTotalCount;
BOOLEAN bIsSetupFinish;
BOOLEAN bIsPSDRunning;
BOOLEAN bIsPSDShowMaxOnly;
} PSDSCAN_STA_8723B_1ANT, *PPSDSCAN_STA_8723B_1ANT;
//===========================================
// The following is interface which will notify coex module.
//===========================================
@ -170,6 +209,10 @@ EXhalbtc8723b1ant_PowerOnSetting(
IN PBTC_COEXIST pBtCoexist
);
VOID
EXhalbtc8723b1ant_PreLoadFirmware(
IN PBTC_COEXIST pBtCoexist
);
VOID
EXhalbtc8723b1ant_InitHwConfig(
IN PBTC_COEXIST pBtCoexist,
IN BOOLEAN bWifiOnly
@ -240,4 +283,33 @@ VOID
EXhalbtc8723b1ant_DisplayCoexInfo(
IN PBTC_COEXIST pBtCoexist
);
VOID
EXhalbtc8723b1ant_AntennaDetection(
IN PBTC_COEXIST pBtCoexist,
IN u4Byte centFreq,
IN u4Byte offset,
IN u4Byte span,
IN u4Byte seconds
);
VOID
EXhalbtc8723b1ant_AntennaIsolation(
IN PBTC_COEXIST pBtCoexist,
IN u4Byte centFreq,
IN u4Byte offset,
IN u4Byte span,
IN u4Byte seconds
);
VOID
EXhalbtc8723b1ant_PSDScan(
IN PBTC_COEXIST pBtCoexist,
IN u4Byte centFreq,
IN u4Byte offset,
IN u4Byte span,
IN u4Byte seconds
);
VOID
EXhalbtc8723b1ant_DisplayAntIsolation(
IN PBTC_COEXIST pBtCoexist
);

887
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC-BTCoexist/HalBtc8723b2Ant.c
View File

File diff suppressed because it is too large Load Diff

29
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC-BTCoexist/HalBtc8723b2Ant.h
View File

@ -15,6 +15,10 @@
#define BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT 2
#define BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES 42 //WiFi RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation
#define BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES 46 //BT RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation
typedef enum _BT_INFO_SRC_8723B_2ANT{
BT_INFO_SRC_8723B_2ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8723B_2ANT_BT_RSP = 0x1,
@ -98,6 +102,11 @@ typedef struct _COEX_DM_8723B_2ANT{
BOOLEAN bNeedRecover0x948;
u4Byte backup0x948;
u1Byte preLps;
u1Byte curLps;
u1Byte preRpwm;
u1Byte curRpwm;
} COEX_DM_8723B_2ANT, *PCOEX_DM_8723B_2ANT;
typedef struct _COEX_STA_8723B_2ANT{
@ -120,9 +129,25 @@ typedef struct _COEX_STA_8723B_2ANT{
BOOLEAN bC2hBtInfoReqSent;
u1Byte btInfoC2h[BT_INFO_SRC_8723B_2ANT_MAX][10];
u4Byte btInfoC2hCnt[BT_INFO_SRC_8723B_2ANT_MAX];
BOOLEAN bBtWhckTest;
BOOLEAN bC2hBtInquiryPage;
u1Byte btRetryCnt;
u1Byte btInfoExt;
u4Byte nCRCOK_CCK;
u4Byte nCRCOK_11g;
u4Byte nCRCOK_11n;
u4Byte nCRCOK_11nAgg;
u4Byte nCRCErr_CCK;
u4Byte nCRCErr_11g;
u4Byte nCRCErr_11n;
u4Byte nCRCErr_11nAgg;
u1Byte nCoexTableType;
BOOLEAN bForceLpsOn;
u1Byte disVerInfoCnt;
}COEX_STA_8723B_2ANT, *PCOEX_STA_8723B_2ANT;
//===========================================
@ -133,6 +158,10 @@ EXhalbtc8723b2ant_PowerOnSetting(
IN PBTC_COEXIST pBtCoexist
);
VOID
EXhalbtc8723b2ant_PreLoadFirmware(
IN PBTC_COEXIST pBtCoexist
);
VOID
EXhalbtc8723b2ant_InitHwConfig(
IN PBTC_COEXIST pBtCoexist,
IN BOOLEAN bWifiOnly

47
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC-BTCoexist/HalBtc8812a1Ant.c
View File

@ -2168,11 +2168,6 @@ EXhalbtc8812a1ant_DisplayCoexInfo(
pu1Byte cliBuf=pBtCoexist->cliBuf;
u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0;
u4Byte u4Tmp[4];
BOOLEAN bRoam=FALSE, bScan=FALSE, bLink=FALSE, bWifiUnder5G=FALSE;
BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE;
s4Byte wifiRssi=0, btHsRssi=0;
u4Byte wifiBw, wifiTrafficDir;
u1Byte wifiDot11Chnl, wifiHsChnl;
u4Byte fwVer=0, btPatchVer=0;
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============");
@ -2207,40 +2202,19 @@ EXhalbtc8812a1ant_DisplayCoexInfo(
GLCoexVerDate8812a1Ant, GLCoexVer8812a1Ant, fwVer, btPatchVer, btPatchVer);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_DOT11_CHNL, &wifiDot11Chnl);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_HS_CHNL, &wifiHsChnl);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d(%d)", "Dot11 channel / HsChnl(HsMode)", \
wifiDot11Chnl, wifiHsChnl, bBtHsOn);
CL_PRINTF(cliBuf);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "H2C Wifi inform bt chnl Info", \
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \
pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1],
pCoexDm->wifiChnlInfo[2]);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_HS_RSSI, &btHsRssi);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "Wifi rssi/ HS rssi", \
wifiRssi, btHsRssi);
// wifi status
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============");
CL_PRINTF(cliBuf);
pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============");
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "Wifi bLink/ bRoam/ bScan", \
bLink, bRoam, bScan);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %s/ %s ", "Wifi status", \
(bWifiUnder5G? "5G":"2.4G"),
((BTC_WIFI_BW_LEGACY==wifiBw)? "Legacy": (((BTC_WIFI_BW_HT40==wifiBw)? "HT40":"HT20"))),
((!bWifiBusy)? "idle": ((BTC_WIFI_TRAFFIC_TX==wifiTrafficDir)? "uplink":"downlink")));
CL_PRINTF(cliBuf);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", \
((pBtCoexist->btInfo.bBtDisabled)? ("disabled"): ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8812A_1ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus)? "non-connected idle":
( (BT_8812A_1ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy")))),
@ -2269,13 +2243,6 @@ EXhalbtc8812a1ant_DisplayCoexInfo(
CL_PRINTF(cliBuf);
}
}
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/%s, (0x%x/0x%x)", "PS state, IPS/LPS, (lps/rpwm)", \
((pCoexSta->bUnderIps? "IPS ON":"IPS OFF")),
((pCoexSta->bUnderLps? "LPS ON":"LPS OFF")),
pBtCoexist->btInfo.lpsVal,
pBtCoexist->btInfo.rpwmVal);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_FW_PWR_MODE_CMD);
if(!pBtCoexist->bManualControl)
{

47
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC-BTCoexist/HalBtc8812a2Ant.c
View File

@ -4163,11 +4163,6 @@ EXhalbtc8812a2ant_DisplayCoexInfo(
u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0;
u2Byte u2Tmp[4];
u4Byte u4Tmp[4];
BOOLEAN bRoam=FALSE, bScan=FALSE, bLink=FALSE, bWifiUnder5G=FALSE;
BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE;
s4Byte wifiRssi=0, btHsRssi=0;
u4Byte wifiBw, wifiTrafficDir;
u1Byte wifiDot11Chnl, wifiHsChnl;
u4Byte fwVer=0, btPatchVer=0;
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============");
@ -4195,41 +4190,18 @@ EXhalbtc8812a2ant_DisplayCoexInfo(
GLCoexVerDate8812a2Ant, GLCoexVer8812a2Ant, fwVer, btPatchVer, btPatchVer);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_DOT11_CHNL, &wifiDot11Chnl);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_HS_CHNL, &wifiHsChnl);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d(%d)", "Dot11 channel / HsMode(HsChnl)", \
wifiDot11Chnl, bBtHsOn, wifiHsChnl);
CL_PRINTF(cliBuf);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "H2C Wifi inform bt chnl Info", \
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \
pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1],
pCoexDm->wifiChnlInfo[2]);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_HS_RSSI, &btHsRssi);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "Wifi rssi/ HS rssi", \
wifiRssi, btHsRssi);
// wifi status
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============");
CL_PRINTF(cliBuf);
pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "Wifi bLink/ bRoam/ bScan", \
bLink, bRoam, bScan);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============");
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %s/ %s ", "Wifi status", \
(bWifiUnder5G? "5G":"2.4G"),
((BTC_WIFI_BW_LEGACY==wifiBw)? "Legacy": (((BTC_WIFI_BW_HT40==wifiBw)? "HT40":"HT20"))),
((!bWifiBusy)? "idle": ((BTC_WIFI_TRAFFIC_TX==wifiTrafficDir)? "uplink":"downlink")));
CL_PRINTF(cliBuf);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", \
((pBtCoexist->btInfo.bBtDisabled)? ("disabled"): ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8812A_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus)? "non-connected idle":
( (BT_8812A_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy")))),
@ -4259,15 +4231,6 @@ EXhalbtc8812a2ant_DisplayCoexInfo(
}
}
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/%s, (0x%x/0x%x)", "PS state, IPS/LPS, (lps/rpwm)", \
((pCoexSta->bUnderIps? "IPS ON":"IPS OFF")),
((pCoexSta->bUnderLps? "LPS ON":"LPS OFF")),
pBtCoexist->btInfo.lpsVal,
pBtCoexist->btInfo.rpwmVal);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_FW_PWR_MODE_CMD);
// Sw mechanism
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============");
CL_PRINTF(cliBuf);

52
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC-BTCoexist/HalBtc8821a1Ant.c
View File

@ -2650,11 +2650,7 @@ EXhalbtc8821a1ant_DisplayCoexInfo(
u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0;
u2Byte u2Tmp[4];
u4Byte u4Tmp[4];
BOOLEAN bRoam=FALSE, bScan=FALSE, bLink=FALSE, bWifiUnder5G=FALSE;
BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE;
s4Byte wifiRssi=0, btHsRssi=0;
u4Byte wifiBw, wifiTrafficDir, faOfdm, faCck, wifiLinkStatus;
u1Byte wifiDot11Chnl, wifiHsChnl;
u4Byte faOfdm, faCck;
u4Byte fwVer=0, btPatchVer=0;
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============");
@ -2689,46 +2685,17 @@ EXhalbtc8821a1ant_DisplayCoexInfo(
GLCoexVerDate8821a1Ant, GLCoexVer8821a1Ant, fwVer, btPatchVer, btPatchVer);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_DOT11_CHNL, &wifiDot11Chnl);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_HS_CHNL, &wifiHsChnl);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d(%d)", "Dot11 channel / HsChnl(HsMode)", \
wifiDot11Chnl, wifiHsChnl, bBtHsOn);
CL_PRINTF(cliBuf);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "H2C Wifi inform bt chnl Info", \
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \
pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1],
pCoexDm->wifiChnlInfo[2]);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_HS_RSSI, &btHsRssi);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "Wifi rssi/ HS rssi", \
wifiRssi, btHsRssi);
// wifi status
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============");
CL_PRINTF(cliBuf);
pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "Wifi bLink/ bRoam/ bScan", \
bLink, bRoam, bScan);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %s/ %s ", "Wifi status", \
(bWifiUnder5G? "5G":"2.4G"),
((BTC_WIFI_BW_LEGACY==wifiBw)? "Legacy": (((BTC_WIFI_BW_HT40==wifiBw)? "HT40":"HT20"))),
((!bWifiBusy)? "idle": ((BTC_WIFI_TRAFFIC_TX==wifiTrafficDir)? "uplink":"downlink")));
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d/ %d", "sta/vwifi/hs/p2pGo/p2pGc", \
((wifiLinkStatus&WIFI_STA_CONNECTED)? 1:0), ((wifiLinkStatus&WIFI_AP_CONNECTED)? 1:0),
((wifiLinkStatus&WIFI_HS_CONNECTED)? 1:0), ((wifiLinkStatus&WIFI_P2P_GO_CONNECTED)? 1:0),
((wifiLinkStatus&WIFI_P2P_GC_CONNECTED)? 1:0) );
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============");
CL_PRINTF(cliBuf);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", \
@ -2759,13 +2726,6 @@ EXhalbtc8821a1ant_DisplayCoexInfo(
CL_PRINTF(cliBuf);
}
}
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/%s, (0x%x/0x%x)", "PS state, IPS/LPS, (lps/rpwm)", \
((pCoexSta->bUnderIps? "IPS ON":"IPS OFF")),
((pCoexSta->bUnderLps? "LPS ON":"LPS OFF")),
pBtCoexist->btInfo.lpsVal,
pBtCoexist->btInfo.rpwmVal);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_FW_PWR_MODE_CMD);
if(!pBtCoexist->bManualControl)
{

49
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC-BTCoexist/HalBtc8821a2Ant.c
View File

@ -3572,11 +3572,6 @@ EXhalbtc8821a2ant_DisplayCoexInfo(
pu1Byte cliBuf=pBtCoexist->cliBuf;
u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0;
u4Byte u4Tmp[4];
BOOLEAN bRoam=FALSE, bScan=FALSE, bLink=FALSE, bWifiUnder5G=FALSE;
BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE;
s4Byte wifiRssi=0, btHsRssi=0;
u4Byte wifiBw, wifiTrafficDir;
u1Byte wifiDot11Chnl, wifiHsChnl;
u4Byte fwVer=0, btPatchVer=0;
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============");
@ -3602,39 +3597,17 @@ EXhalbtc8821a2ant_DisplayCoexInfo(
GLCoexVerDate8821a2Ant, GLCoexVer8821a2Ant, fwVer, btPatchVer, btPatchVer);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_DOT11_CHNL, &wifiDot11Chnl);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_HS_CHNL, &wifiHsChnl);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d(%d)", "Dot11 channel / HsMode(HsChnl)", \
wifiDot11Chnl, bBtHsOn, wifiHsChnl);
CL_PRINTF(cliBuf);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "H2C Wifi inform bt chnl Info", \
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \
pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1],
pCoexDm->wifiChnlInfo[2]);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_HS_RSSI, &btHsRssi);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "Wifi rssi/ HS rssi", \
wifiRssi, btHsRssi);
// wifi status
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============");
CL_PRINTF(cliBuf);
pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "Wifi bLink/ bRoam/ bScan", \
bLink, bRoam, bScan);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %s/ %s ", "Wifi status", \
(bWifiUnder5G? "5G":"2.4G"),
((BTC_WIFI_BW_LEGACY==wifiBw)? "Legacy": (((BTC_WIFI_BW_HT40==wifiBw)? "HT40":"HT20"))),
((!bWifiBusy)? "idle": ((BTC_WIFI_TRAFFIC_TX==wifiTrafficDir)? "uplink":"downlink")));
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============");
CL_PRINTF(cliBuf);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", \
@ -3669,12 +3642,6 @@ EXhalbtc8821a2ant_DisplayCoexInfo(
}
}
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/%s", "PS state, IPS/LPS", \
((pCoexSta->bUnderIps? "IPS ON":"IPS OFF")),
((pCoexSta->bUnderLps? "LPS ON":"LPS OFF")));
CL_PRINTF(cliBuf);
pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_FW_PWR_MODE_CMD);
// Sw mechanism
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============");
CL_PRINTF(cliBuf);
@ -3768,12 +3735,6 @@ EXhalbtc8821a2ant_DisplayCoexInfo(
pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx);
CL_PRINTF(cliBuf);
// Tx mgnt queue hang or not, 0x41b should = 0xf, ex: 0xd ==>hang
u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x41b);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x41b (mgntQ hang chk == 0xf)", \
u1Tmp[0]);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS);
}

512
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC-BTCoexist/HalBtc8821aCsr2Ant.c
View File

@ -1,7 +1,7 @@
//============================================================
// Description:
//
// This file is for RTL8821A_CSR_CSR Co-exist mechanism
// This file is for RTL8821A_CSR Co-exist mechanism
//
// History
// 2012/08/22 Cosa first check in.
@ -13,6 +13,13 @@
// include files
//============================================================
#include "Mp_Precomp.h"
#define _BTCOEX_CSR 1
#ifndef rtw_warn_on
#define rtw_warn_on(condition) do {} while (0)
#endif
#if(BT_30_SUPPORT == 1)
//============================================================
// Global variables, these are static variables
@ -335,7 +342,210 @@ halbtc8821aCsr2ant_MonitorBtCtr(
regLPTxRx, regLPTx, regLPTx, regLPRx, regLPRx));
// reset counter
pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc);
pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x5d);
}
VOID
halbtc8821aCsr2ant_UpdateRaMask(
IN PBTC_COEXIST pBtCoexist,
IN BOOLEAN bForceExec,
IN u4Byte disRateMask
)
{
pCoexDm->curRaMask = disRateMask;
if( bForceExec || (pCoexDm->preRaMask != pCoexDm->curRaMask))
{
pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_UPDATE_RAMASK, &pCoexDm->curRaMask);
}
pCoexDm->preRaMask = pCoexDm->curRaMask;
}
VOID
halbtc8821aCsr2ant_AutoRateFallbackRetry(
IN PBTC_COEXIST pBtCoexist,
IN BOOLEAN bForceExec,
IN u1Byte type
)
{
BOOLEAN bWifiUnderBMode=FALSE;
pCoexDm->curArfrType = type;
if( bForceExec || (pCoexDm->preArfrType != pCoexDm->curArfrType))
{
switch(pCoexDm->curArfrType)
{
case 0: // normal mode
pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, pCoexDm->backupArfrCnt1);
pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, pCoexDm->backupArfrCnt2);
break;
case 1:
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode);
if(bWifiUnderBMode)
{
pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0);
pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x01010101);
}
else
{
pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0);
pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x04030201);
}
break;
default:
break;
}
}
pCoexDm->preArfrType = pCoexDm->curArfrType;
}
VOID
halbtc8821aCsr2ant_RetryLimit(
IN PBTC_COEXIST pBtCoexist,
IN BOOLEAN bForceExec,
IN u1Byte type
)
{
pCoexDm->curRetryLimitType = type;
if( bForceExec || (pCoexDm->preRetryLimitType != pCoexDm->curRetryLimitType))
{
switch(pCoexDm->curRetryLimitType)
{
case 0: // normal mode
pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, pCoexDm->backupRetryLimit);
break;
case 1: // retry limit=8
pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, 0x0808);
break;
default:
break;
}
}
pCoexDm->preRetryLimitType = pCoexDm->curRetryLimitType;
}
VOID
halbtc8821aCsr2ant_AmpduMaxTime(
IN PBTC_COEXIST pBtCoexist,
IN BOOLEAN bForceExec,
IN u1Byte type
)
{
pCoexDm->curAmpduTimeType = type;
if( bForceExec || (pCoexDm->preAmpduTimeType != pCoexDm->curAmpduTimeType))
{
switch(pCoexDm->curAmpduTimeType)
{
case 0: // normal mode
pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, pCoexDm->backupAmpduMaxTime);
break;
case 1: // AMPDU timw = 0x38 * 32us
pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, 0x38);
break;
case 2:
pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, 0x17);
break;
default:
break;
}
}
pCoexDm->preAmpduTimeType = pCoexDm->curAmpduTimeType;
}
VOID
halbtc8821aCsr2Ant_AmpduMaxNum(
IN PBTC_COEXIST pBtCoexist,
IN BOOLEAN bForceExec,
IN u1Byte type
)
{
pCoexDm->curAmpduNumType = type;
if( bForceExec || (pCoexDm->preAmpduNumType != pCoexDm->curAmpduNumType))
{
switch(pCoexDm->curAmpduNumType)
{
case 0: // normal mode
pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x4ca, pCoexDm->backupAmpduMaxNum);
break;
case 1:
pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x4ca, 0x0808);
break;
case 2:
pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x4ca, 0x1f1f);
break;
default:
break;
}
}
pCoexDm->preAmpduNumType = pCoexDm->curAmpduNumType;
}
VOID
halbtc8821aCsr2ant_LimitedTx(
IN PBTC_COEXIST pBtCoexist,
IN BOOLEAN bForceExec,
IN u1Byte raMaskType,
IN u1Byte arfrType,
IN u1Byte retryLimitType,
IN u1Byte ampduTimeType,
IN u1Byte ampduNumType
)
{
switch(raMaskType)
{
case 0: // normal mode
halbtc8821aCsr2ant_UpdateRaMask(pBtCoexist, bForceExec, 0x0);
break;
case 1: // disable cck 1/2
halbtc8821aCsr2ant_UpdateRaMask(pBtCoexist, bForceExec, 0x00000003);
break;
case 2: // disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4
halbtc8821aCsr2ant_UpdateRaMask(pBtCoexist, bForceExec, 0x0001f1f7);
break;
default:
break;
}
halbtc8821aCsr2ant_AutoRateFallbackRetry(pBtCoexist, bForceExec, arfrType);
halbtc8821aCsr2ant_RetryLimit(pBtCoexist, bForceExec, retryLimitType);
halbtc8821aCsr2ant_AmpduMaxTime(pBtCoexist, bForceExec, ampduTimeType);
halbtc8821aCsr2Ant_AmpduMaxNum(pBtCoexist, bForceExec, ampduNumType);
}
VOID
halbtc8821aCsr2ant_LimitedRx(
IN PBTC_COEXIST pBtCoexist,
IN BOOLEAN bForceExec,
IN BOOLEAN bRejApAggPkt,
IN BOOLEAN bBtCtrlAggBufSize,
IN u1Byte aggBufSize
)
{
BOOLEAN bRejectRxAgg=bRejApAggPkt;
BOOLEAN bBtCtrlRxAggSize=bBtCtrlAggBufSize;
u1Byte rxAggSize=aggBufSize;
//============================================
// Rx Aggregation related setting
//============================================
pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejectRxAgg);
// decide BT control aggregation buf size or not
pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, &bBtCtrlRxAggSize);
// aggregation buf size, only work when BT control Rx aggregation size.
pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_AGG_BUF_SIZE, &rxAggSize);
// real update aggregation setting
pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
}
VOID
@ -352,8 +562,10 @@ halbtc8821aCsr2ant_QueryBtInfo(
BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], Query Bt Info, FW write 0x61=0x%x\n",
H2C_Parameter[0]));
rtw_warn_on(_BTCOEX_CSR);
pBtCoexist->fBtcFillH2c(pBtCoexist, 0x61, 1, H2C_Parameter);
}
u1Byte
halbtc8821aCsr2ant_ActionAlgorithm(
IN PBTC_COEXIST pBtCoexist
@ -365,14 +577,14 @@ halbtc8821aCsr2ant_ActionAlgorithm(
u1Byte numOfDiffProfile=0;
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
//for win-8 stack HID report error
if(!pStackInfo->bHidExist)
pStackInfo->bHidExist = pCoexSta->bHidExist; //sync BTInfo with BT firmware and stack
// when stack HID report error, here we use the info from bt fw.
if(!pStackInfo->bBtLinkExist)
pStackInfo->bBtLinkExist = pCoexSta->bBtLinkExist;
//sync StackInfo with BT firmware and stack
pStackInfo->bHidExist = pCoexSta->bHidExist;
pStackInfo->bBtLinkExist = pCoexSta->bBtLinkExist;
pStackInfo->bScoExist = pCoexSta->bScoExist;
pStackInfo->bPanExist = pCoexSta->bPanExist;
pStackInfo->bA2dpExist = pCoexSta->bA2dpExist;
if(!pStackInfo->bBtLinkExist)
{
BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], No profile exists!!!\n"));
@ -659,6 +871,7 @@ halbtc8821aCsr2ant_SetFwDecBtPwr(
BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], decrease Bt Power : %s, FW write 0x62=0x%x\n",
(bDecBtPwr? "Yes!!":"No!!"), H2C_Parameter[0]));
rtw_warn_on(_BTCOEX_CSR);
pBtCoexist->fBtcFillH2c(pBtCoexist, 0x62, 1, H2C_Parameter);
}
@ -681,7 +894,9 @@ halbtc8821aCsr2ant_DecBtPwr(
if(pCoexDm->bPreDecBtPwr == pCoexDm->bCurDecBtPwr)
return;
}
halbtc8821aCsr2ant_SetFwDecBtPwr(pBtCoexist, pCoexDm->bCurDecBtPwr);
/* TODO: may CSR consider to decrease BT power? */
//halbtc8821aCsr2ant_SetFwDecBtPwr(pBtCoexist, pCoexDm->bCurDecBtPwr);
pCoexDm->bPreDecBtPwr = pCoexDm->bCurDecBtPwr;
}
@ -704,6 +919,7 @@ halbtc8821aCsr2ant_SetBtAutoReport(
BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], BT FW auto report : %s, FW write 0x68=0x%x\n",
(bEnableAutoReport? "Enabled!!":"Disabled!!"), H2C_Parameter[0]));
rtw_warn_on(_BTCOEX_CSR);
pBtCoexist->fBtcFillH2c(pBtCoexist, 0x68, 1, H2C_Parameter);
}
@ -726,7 +942,7 @@ halbtc8821aCsr2ant_BtAutoReport(
if(pCoexDm->bPreBtAutoReport == pCoexDm->bCurBtAutoReport)
return;
}
halbtc8821aCsr2ant_SetBtAutoReport(pBtCoexist, pCoexDm->bCurBtAutoReport);
//halbtc8821aCsr2ant_SetBtAutoReport(pBtCoexist, pCoexDm->bCurBtAutoReport);
pCoexDm->bPreBtAutoReport = pCoexDm->bCurBtAutoReport;
}
@ -836,7 +1052,6 @@ halbtc8821aCsr2ant_LowPenaltyRa(
IN BOOLEAN bLowPenaltyRa
)
{
//return;
BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW, ("[BTCoex], %s turn LowPenaltyRA = %s\n",
(bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF")));
pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa;
@ -1084,6 +1299,7 @@ halbtc8821aCsr2ant_SetFwIgnoreWlanAct(
BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x63=0x%x\n",
H2C_Parameter[0]));
rtw_warn_on(_BTCOEX_CSR);
pBtCoexist->fBtcFillH2c(pBtCoexist, 0x63, 1, H2C_Parameter);
}
@ -1106,7 +1322,7 @@ halbtc8821aCsr2ant_IgnoreWlanAct(
if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct)
return;
}
halbtc8821aCsr2ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable);
//halbtc8821aCsr2ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable);
pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct;
}
@ -1121,25 +1337,27 @@ halbtc8821aCsr2ant_SetFwPstdma(
IN u1Byte byte5
)
{
u1Byte H2C_Parameter[5] ={0};
u1Byte H2C_Parameter[6] ={0};
H2C_Parameter[0] = byte1;
H2C_Parameter[1] = byte2;
H2C_Parameter[2] = byte3;
H2C_Parameter[3] = byte4;
H2C_Parameter[4] = byte5;
H2C_Parameter[5] = 0x01;
pCoexDm->psTdmaPara[0] = byte1;
pCoexDm->psTdmaPara[1] = byte2;
pCoexDm->psTdmaPara[2] = byte3;
pCoexDm->psTdmaPara[3] = byte4;
pCoexDm->psTdmaPara[4] = byte5;
pCoexDm->psTdmaPara[5] = 0x01;
BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], FW write 0x60(5bytes)=0x%x%08x\n",
BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], FW write 0x60(6bytes)=0x%x%08x%02x\n",
H2C_Parameter[0],
H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4]));
H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4], H2C_Parameter[5]));
pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 5, H2C_Parameter);
pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 6, H2C_Parameter);
}
VOID
@ -1328,6 +1546,12 @@ halbtc8821aCsr2ant_PsTdma(
case 21:
halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x03, 0x70, 0x90);
break;
case 22: //ad2dp master
halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xeb, 0x11, 0x11, 0x21, 0x10);
break;
case 23: //a2dp slave
halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xeb, 0x12, 0x12, 0x20, 0x10);
break;
case 71:
halbtc8821aCsr2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90);
break;
@ -1422,8 +1646,6 @@ halbtc8821aCsr2ant_IsCommonAction(
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5afa5afa, 0xffff, 0x3);
if(!bWifiConnected &&
BT_8821A_CSR_2ANT_BT_STATUS_IDLE == pCoexDm->btStatus)
{
@ -1439,6 +1661,8 @@ halbtc8821aCsr2ant_IsCommonAction(
halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0, 0);
halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, 0, 0, 0);
bCommon = TRUE;
}
@ -1462,8 +1686,10 @@ halbtc8821aCsr2ant_IsCommonAction(
halbtc8821aCsr2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
halbtc8821aCsr2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, FALSE);
halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0, 0);
halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, 0, 0, 0);
bCommon = TRUE;
}
@ -1481,6 +1707,8 @@ halbtc8821aCsr2ant_IsCommonAction(
halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0, 0);
halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, 0, 0, 0);
bCommon = TRUE;
}
@ -1506,6 +1734,8 @@ halbtc8821aCsr2ant_IsCommonAction(
halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,TRUE,TRUE);
halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0, 0);
halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, 0, 0, 0);
bCommon = TRUE;
}
@ -1523,6 +1753,8 @@ halbtc8821aCsr2ant_IsCommonAction(
halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0, 0);
halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, 0, 0, 0);
bCommon = TRUE;
}
@ -1551,7 +1783,10 @@ halbtc8821aCsr2ant_IsCommonAction(
halbtc8821aCsr2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,TRUE,TRUE);
}
if (bCommon == TRUE)
halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55ff55ff, 0x5afa5afa, 0xffff, 0x3);
return bCommon;
}
VOID
@ -2480,6 +2715,19 @@ halbtc8821aCsr2ant_ActionSco(
u1Byte wifiRssiState,btRssiState;
u4Byte wifiBw;
halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0x55555555, 0x55555555, 0xffffff, 0x3);
halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0);
halbtc8821aCsr2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, TRUE);
halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 1, 0, 2, 0);
if(pCoexSta->bSlave == FALSE)
halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x4);
else
halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x2);
/*
wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0);
@ -2558,6 +2806,7 @@ halbtc8821aCsr2ant_ActionSco(
halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
}
}
*/
}
@ -2653,6 +2902,24 @@ halbtc8821aCsr2ant_ActionA2dp(
u1Byte wifiRssiState, btRssiState;
u4Byte wifiBw;
halbtc8821aCsr2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x8);
if(pCoexSta->bSlave == FALSE)
{
halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0xfdfdfdfd, 0xdfdadfda, 0xffffff, 0x3);
halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22);
halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0, 1);
halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x0c);
}
else
{
halbtc8821aCsr2ant_CoexTable(pBtCoexist, NORMAL_EXEC, 0xfdfdfdfd, 0xdfdadfda, 0xffffff, 0x3);
halbtc8821aCsr2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 23);
halbtc8821aCsr2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0, 2);
halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x18);
}
/*
wifiRssiState = halbtc8821aCsr2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
btRssiState = halbtc8821aCsr2ant_BtRssiState(2, 35, 0);
@ -2719,6 +2986,7 @@ halbtc8821aCsr2ant_ActionA2dp(
halbtc8821aCsr2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
}
}
*/
}
VOID
@ -3403,7 +3671,7 @@ halbtc8821aCsr2ant_RunCoexistMechanism(
BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Manual control!!!\n"));
return;
}
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G);
if(bWifiUnder5G)
@ -3413,7 +3681,7 @@ halbtc8821aCsr2ant_RunCoexistMechanism(
return;
}
if(pStackInfo->bProfileNotified)
//if(pStackInfo->bProfileNotified)
{
algorithm = halbtc8821aCsr2ant_ActionAlgorithm(pBtCoexist);
if(pCoexSta->bC2hBtInquiryPage && (BT_8821A_CSR_2ANT_COEX_ALGO_PANHS!=algorithm))
@ -3489,15 +3757,6 @@ halbtc8821aCsr2ant_RunCoexistMechanism(
pCoexDm->preAlgorithm = pCoexDm->curAlgorithm;
}
}
else
{ // stack doesn't notify profile info.
// use the following profile info from bt fw.
//pCoexSta->bBtLinkExist
//pCoexSta->bScoExist
//pCoexSta->bA2dpExist
//pCoexSta->bHidExist
//pCoexSta->bPanExist
}
}
@ -3530,15 +3789,27 @@ EXhalbtc8821aCsr2ant_InitHwConfig(
BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], 2Ant Init HW Config!!\n"));
// backup rf 0x1e value
pCoexDm->btRf0x1eBackup =
pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff);
if(bWifiOnly)
return;
//if(bBackUp)
{
// backup rf 0x1e value
pCoexDm->btRf0x1eBackup = pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff);
pCoexDm->backupArfrCnt1 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430);
pCoexDm->backupArfrCnt2 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x434);
pCoexDm->backupRetryLimit = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x42a);
pCoexDm->backupAmpduMaxTime = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x456);
pCoexDm->backupAmpduMaxNum = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x4ca);
}
#if 0 /* REMOVE */
// 0x790[5:0]=0x5
u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x790);
u1Tmp &= 0xc0;
u1Tmp |= 0x5;
pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x790, u1Tmp);
#endif
//Antenna config
halbtc8821aCsr2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_MAIN, TRUE, FALSE);
@ -3549,7 +3820,10 @@ EXhalbtc8821aCsr2ant_InitHwConfig(
// Enable counter statistics
pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); //0x76e[3] =1, WLAN_Act control by PTA
pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x3);
#if 0 /* REMOVE */
pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x40, 0x20, 0x1);
#endif
}
VOID
@ -3572,11 +3846,6 @@ EXhalbtc8821aCsr2ant_DisplayCoexInfo(
pu1Byte cliBuf=pBtCoexist->cliBuf;
u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0;
u4Byte u4Tmp[4];
BOOLEAN bRoam=FALSE, bScan=FALSE, bLink=FALSE, bWifiUnder5G=FALSE;
BOOLEAN bBtHsOn=FALSE, bWifiBusy=FALSE;
s4Byte wifiRssi=0, btHsRssi=0;
u4Byte wifiBw, wifiTrafficDir;
u1Byte wifiDot11Chnl, wifiHsChnl;
u4Byte fwVer=0, btPatchVer=0;
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============");
@ -3602,39 +3871,17 @@ EXhalbtc8821aCsr2ant_DisplayCoexInfo(
GLCoexVerDate8821aCsr2Ant, GLCoexVer8821aCsr2Ant, fwVer, btPatchVer, btPatchVer);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_DOT11_CHNL, &wifiDot11Chnl);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_HS_CHNL, &wifiHsChnl);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d(%d)", "Dot11 channel / HsMode(HsChnl)", \
wifiDot11Chnl, bBtHsOn, wifiHsChnl);
CL_PRINTF(cliBuf);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "H2C Wifi inform bt chnl Info", \
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \
pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1],
pCoexDm->wifiChnlInfo[2]);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_HS_RSSI, &btHsRssi);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "Wifi rssi/ HS rssi", \
wifiRssi, btHsRssi);
// wifi status
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============");
CL_PRINTF(cliBuf);
pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "Wifi bLink/ bRoam/ bScan", \
bLink, bRoam, bScan);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &bWifiUnder5G);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %s/ %s ", "Wifi status", \
(bWifiUnder5G? "5G":"2.4G"),
((BTC_WIFI_BW_LEGACY==wifiBw)? "Legacy": (((BTC_WIFI_BW_HT40==wifiBw)? "HT40":"HT20"))),
((!bWifiBusy)? "idle": ((BTC_WIFI_TRAFFIC_TX==wifiTrafficDir)? "uplink":"downlink")));
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============");
CL_PRINTF(cliBuf);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", \
@ -3669,12 +3916,6 @@ EXhalbtc8821aCsr2ant_DisplayCoexInfo(
}
}
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/%s", "PS state, IPS/LPS", \
((pCoexSta->bUnderIps? "IPS ON":"IPS OFF")),
((pCoexSta->bUnderLps? "LPS ON":"LPS OFF")));
CL_PRINTF(cliBuf);
pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_FW_PWR_MODE_CMD);
// Sw mechanism
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============");
CL_PRINTF(cliBuf);
@ -3768,12 +4009,6 @@ EXhalbtc8821aCsr2ant_DisplayCoexInfo(
pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx);
CL_PRINTF(cliBuf);
// Tx mgnt queue hang or not, 0x41b should = 0xf, ex: 0xd ==>hang
u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x41b);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x41b (mgntQ hang chk == 0xf)", \
u1Tmp[0]);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS);
}
@ -3880,7 +4115,8 @@ EXhalbtc8821aCsr2ant_MediaStatusNotify(
else
H2C_Parameter[2] = 0x20;
}
#if 0 /* REMOVE */
pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0];
pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1];
pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2];
@ -3888,7 +4124,9 @@ EXhalbtc8821aCsr2ant_MediaStatusNotify(
BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], FW write 0x66=0x%x\n",
H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2]));
rtw_warn_on(_BTCOEX_CSR);
pBtCoexist->fBtcFillH2c(pBtCoexist, 0x66, 3, H2C_Parameter);
#endif
}
VOID
@ -3950,7 +4188,8 @@ EXhalbtc8821aCsr2ant_BtInfoNotify(
pCoexSta->btInfoExt =
pCoexSta->btInfoC2h[rspSource][4];
#if 0 /* REMOVE */
// Here we need to resend some wifi info to BT
// because bt is reset and loss of the info.
if( (pCoexSta->btInfoExt & BIT1) )
@ -3965,7 +4204,9 @@ EXhalbtc8821aCsr2ant_BtInfoNotify(
EXhalbtc8821aCsr2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT);
}
}
#endif
#if 0 /* REMOVE */
if(!pBtCoexist->bManualControl && !bWifiUnder5G)
{
if( (pCoexSta->btInfoExt&BIT3) )
@ -3986,7 +4227,9 @@ EXhalbtc8821aCsr2ant_BtInfoNotify(
}
}
}
#endif
#if 0 /* REMOVE */
if( (pCoexSta->btInfoExt & BIT4) )
{
// BT auto report already enabled, do nothing
@ -3995,60 +4238,74 @@ EXhalbtc8821aCsr2ant_BtInfoNotify(
{
halbtc8821aCsr2ant_BtAutoReport(pBtCoexist, FORCE_EXEC, TRUE);
}
#endif
}
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
// check BIT2 first ==> check if bt is under inquiry or page scan
if(btInfo & BT_INFO_8821A_CSR_2ANT_B_INQ_PAGE)
if(btInfo == BT_INFO_8821A_CSR_2ANT_B_CONNECTION) // connection exists but no busy
{
pCoexSta->bC2hBtInquiryPage = TRUE;
pCoexSta->bBtLinkExist = TRUE;
pCoexDm->btStatus = BT_8821A_CSR_2ANT_BT_STATUS_CONNECTED_IDLE;
}
else if(btInfo & BT_INFO_8821A_CSR_2ANT_B_CONNECTION) // connection exists and some link is busy
{
pCoexSta->bBtLinkExist = TRUE;
if(btInfo & BT_INFO_8821A_CSR_2ANT_B_FTP)
pCoexSta->bPanExist = TRUE;
else
pCoexSta->bPanExist = FALSE;
if(btInfo & BT_INFO_8821A_CSR_2ANT_B_A2DP)
pCoexSta->bA2dpExist = TRUE;
else
pCoexSta->bA2dpExist = FALSE;
if(btInfo & BT_INFO_8821A_CSR_2ANT_B_HID)
pCoexSta->bHidExist = TRUE;
else
pCoexSta->bHidExist = FALSE;
if(btInfo & BT_INFO_8821A_CSR_2ANT_B_SCO_ESCO)
pCoexSta->bScoExist = TRUE;
else
pCoexSta->bScoExist = FALSE;
if (pCoexSta->btInfoExt & 0x80)
pCoexSta->bSlave = TRUE; //Slave
else
pCoexSta->bSlave = FALSE; //Master
pCoexDm->btStatus = BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE;
}
else
{
pCoexSta->bC2hBtInquiryPage = FALSE;
if(btInfo == 0x1) // connection exists but no busy
{
pCoexSta->bBtLinkExist = TRUE;
pCoexDm->btStatus = BT_8821A_CSR_2ANT_BT_STATUS_CONNECTED_IDLE;
}
else if(btInfo & BT_INFO_8821A_CSR_2ANT_B_CONNECTION) // connection exists and some link is busy
{
pCoexSta->bBtLinkExist = TRUE;
if(btInfo & BT_INFO_8821A_CSR_2ANT_B_FTP)
pCoexSta->bPanExist = TRUE;
else
pCoexSta->bPanExist = FALSE;
if(btInfo & BT_INFO_8821A_CSR_2ANT_B_A2DP)
pCoexSta->bA2dpExist = TRUE;
else
pCoexSta->bA2dpExist = FALSE;
if(btInfo & BT_INFO_8821A_CSR_2ANT_B_HID)
pCoexSta->bHidExist = TRUE;
else
pCoexSta->bHidExist = FALSE;
if(btInfo & BT_INFO_8821A_CSR_2ANT_B_SCO_ESCO)
pCoexSta->bScoExist = TRUE;
else
pCoexSta->bScoExist = FALSE;
pCoexDm->btStatus = BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE;
}
else
{
pCoexSta->bBtLinkExist = FALSE;
pCoexSta->bPanExist = FALSE;
pCoexSta->bA2dpExist = FALSE;
pCoexSta->bHidExist = FALSE;
pCoexSta->bScoExist = FALSE;
pCoexDm->btStatus = BT_8821A_CSR_2ANT_BT_STATUS_IDLE;
}
if(bBtHsOn)
{
pCoexDm->btStatus = BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE;
}
pCoexSta->bBtLinkExist = FALSE;
pCoexSta->bPanExist = FALSE;
pCoexSta->bA2dpExist = FALSE;
pCoexSta->bSlave = FALSE;
pCoexSta->bHidExist = FALSE;
pCoexSta->bScoExist = FALSE;
pCoexDm->btStatus = BT_8821A_CSR_2ANT_BT_STATUS_IDLE;
}
if(bBtHsOn)
{
pCoexDm->btStatus = BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE;
}
if(btInfo & BT_INFO_8821A_CSR_2ANT_B_INQ_PAGE)
{
pCoexSta->bC2hBtInquiryPage = TRUE;
pCoexDm->btStatus = BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE;
}
else
{
pCoexSta->bC2hBtInquiryPage = FALSE;
}
if(BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE == pCoexDm->btStatus)
{
bBtBusy = TRUE;
@ -4130,7 +4387,8 @@ EXhalbtc8821aCsr2ant_Periodical(
BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], ****************************************************************\n"));
}
halbtc8821aCsr2ant_QueryBtInfo(pBtCoexist);
//halbtc8821aCsr2ant_QueryBtInfo(pBtCoexist);
//halbtc8821aCsr2ant_RunCoexistMechanism(pBtCoexist);
halbtc8821aCsr2ant_MonitorBtCtr(pBtCoexist);
halbtc8821aCsr2ant_MonitorBtEnableDisable(pBtCoexist);
}

23
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC-BTCoexist/HalBtc8821aCsr2Ant.h
View File

@ -51,7 +51,7 @@ typedef struct _COEX_DM_8821A_CSR_2ANT{
BOOLEAN bPreIgnoreWlanAct;
u1Byte prePsTdma;
u1Byte curPsTdma;
u1Byte psTdmaPara[5];
u1Byte psTdmaPara[6];
u1Byte psTdmaDuAdjType;
BOOLEAN bResetTdmaAdjust;
BOOLEAN bPrePsTdmaOn;
@ -83,6 +83,26 @@ typedef struct _COEX_DM_8821A_CSR_2ANT{
u1Byte curVal0x6cc;
BOOLEAN bLimitedDig;
u4Byte preRaMask;
u4Byte curRaMask;
u1Byte curAmpduNumType;
u1Byte preAmpduNumType;
u2Byte backupAmpduMaxNum;
u1Byte curAmpduTimeType;
u1Byte preAmpduTimeType;
u1Byte backupAmpduMaxTime;
u1Byte curArfrType;
u1Byte preArfrType;
u4Byte backupArfrCnt1;
u4Byte backupArfrCnt2;
u1Byte curRetryLimitType;
u1Byte preRetryLimitType;
u2Byte backupRetryLimit;
// algorithm related
u1Byte preAlgorithm;
u1Byte curAlgorithm;
@ -94,6 +114,7 @@ typedef struct _COEX_STA_8821A_CSR_2ANT{
BOOLEAN bBtLinkExist;
BOOLEAN bScoExist;
BOOLEAN bA2dpExist;
BOOLEAN bSlave;
BOOLEAN bHidExist;
BOOLEAN bPanExist;

43
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC-BTCoexist/HalBtcOutSrc.h
View File

@ -203,10 +203,18 @@ typedef enum _BTC_WIFI_ROLE{
BTC_ROLE_MAX
}BTC_WIFI_ROLE,*PBTC_WIFI_ROLE;
typedef enum _BTC_WIRELESS_FREQ{
BTC_FREQ_2_4G = 0x0,
BTC_FREQ_5G = 0x1,
BTC_FREQ_MAX
}BTC_WIRELESS_FREQ,*PBTC_WIRELESS_FREQ;
typedef enum _BTC_WIFI_BW_MODE{
BTC_WIFI_BW_LEGACY = 0x0,
BTC_WIFI_BW_HT20 = 0x1,
BTC_WIFI_BW_HT40 = 0x2,
BTC_WIFI_BW_HT80 = 0x3,
BTC_WIFI_BW_HT160 = 0x4,
BTC_WIFI_BW_MAX
}BTC_WIFI_BW_MODE,*PBTC_WIFI_BW_MODE;
@ -233,6 +241,15 @@ typedef enum _BT_WIFI_COEX_STATE{
BTC_WIFI_STAT_MAX
}BT_WIFI_COEX_STATE,*PBT_WIFI_COEX_STATE;
typedef enum _BT_ANT_TYPE{
BTC_ANT_TYPE_0,
BTC_ANT_TYPE_1,
BTC_ANT_TYPE_2,
BTC_ANT_TYPE_3,
BTC_ANT_TYPE_4,
BTC_ANT_TYPE_MAX
}BT_ANT_TYPE,*PBT_ANT_TYPE;
// defined for BFP_BTC_GET
typedef enum _BTC_GET_TYPE{
// type BOOLEAN
@ -250,6 +267,7 @@ typedef enum _BTC_GET_TYPE{
BTC_GET_BL_WIFI_UNDER_B_MODE,
BTC_GET_BL_EXT_SWITCH,
BTC_GET_BL_WIFI_IS_IN_MP_MODE,
BTC_GET_BL_IS_ASUS_8723B,
// type s4Byte
BTC_GET_S4_WIFI_RSSI,
@ -268,6 +286,7 @@ typedef enum _BTC_GET_TYPE{
BTC_GET_U1_WIFI_HS_CHNL,
BTC_GET_U1_MAC_PHY_MODE,
BTC_GET_U1_AP_NUM,
BTC_GET_U1_ANT_TYPE,
//===== for 1Ant ======
BTC_GET_U1_LPS_MODE,
@ -286,6 +305,7 @@ typedef enum _BTC_SET_TYPE{
BTC_SET_BL_BT_CTRL_AGG_SIZE,
BTC_SET_BL_INC_SCAN_DEV_NUM,
BTC_SET_BL_BT_TX_RX_MASK,
BTC_SET_BL_MIRACAST_PLUS_BT,
// type u1Byte
BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON,
@ -319,7 +339,7 @@ typedef enum _BTC_SET_TYPE{
typedef enum _BTC_DBG_DISP_TYPE{
BTC_DBG_DISP_COEX_STATISTICS = 0x0,
BTC_DBG_DISP_BT_LINK_INFO = 0x1,
BTC_DBG_DISP_FW_PWR_MODE_CMD = 0x2,
BTC_DBG_DISP_WIFI_STATUS = 0x2,
BTC_DBG_DISP_MAX
}BTC_DBG_DISP_TYPE,*PBTC_DBG_DISP_TYPE;
@ -488,6 +508,7 @@ typedef struct _BTC_BT_INFO{
u1Byte rssiAdjustFor1AntCoexType;
BOOLEAN bPreBtCtrlAggBufSize;
BOOLEAN bBtCtrlAggBufSize;
BOOLEAN bPreRejectAggPkt;
BOOLEAN bRejectAggPkt;
BOOLEAN bIncreaseScanDevNum;
BOOLEAN bBtTxRxMask;
@ -499,6 +520,7 @@ typedef struct _BTC_BT_INFO{
u2Byte btRealFwVer;
u1Byte btFwVer;
u4Byte getBtFwVerCnt;
BOOLEAN bMiracastPlusBt;
BOOLEAN bBtDisableLowPwr;
@ -527,6 +549,7 @@ typedef struct _BTC_STACK_INFO{
typedef struct _BTC_BT_LINK_INFO{
BOOLEAN bBtLinkExist;
BOOLEAN bBtHiPriLinkExist;
BOOLEAN bScoExist;
BOOLEAN bScoOnly;
BOOLEAN bA2dpExist;
@ -536,11 +559,13 @@ typedef struct _BTC_BT_LINK_INFO{
BOOLEAN bPanExist;
BOOLEAN bPanOnly;
BOOLEAN bSlaveRole;
BOOLEAN bAclBusy;
} BTC_BT_LINK_INFO, *PBTC_BT_LINK_INFO;
typedef struct _BTC_STATISTICS{
u4Byte cntBind;
u4Byte cntPowerOn;
u4Byte cntPreLoadFirmware;
u4Byte cntInitHwConfig;
u4Byte cntInitCoexDm;
u4Byte cntIpsNotify;
@ -614,6 +639,10 @@ EXhalbtcoutsrc_PowerOnSetting(
IN PBTC_COEXIST pBtCoexist
);
VOID
EXhalbtcoutsrc_PreLoadFirmware(
IN PBTC_COEXIST pBtCoexist
);
VOID
EXhalbtcoutsrc_InitHwConfig(
IN PBTC_COEXIST pBtCoexist,
IN BOOLEAN bWifiOnly
@ -693,6 +722,14 @@ EXhalbtcoutsrc_DbgControl(
IN pu1Byte pData
);
VOID
EXhalbtcoutsrc_AntennaDetection(
IN PBTC_COEXIST pBtCoexist,
IN u4Byte centFreq,
IN u4Byte offset,
IN u4Byte span,
IN u4Byte seconds
);
VOID
EXhalbtcoutsrc_StackUpdateProfileInfo(
VOID
);
@ -732,5 +769,9 @@ VOID
EXhalbtcoutsrc_DisplayBtCoexInfo(
IN PBTC_COEXIST pBtCoexist
);
VOID
EXhalbtcoutsrc_DisplayAntIsolation(
IN PBTC_COEXIST pBtCoexist
);
#endif

1
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC-BTCoexist/Mp_Precomp.h
View File

@ -52,5 +52,6 @@
#include "HalBtc8812a2Ant.h"
#include "HalBtc8821a1Ant.h"
#include "HalBtc8821a2Ant.h"
#include "HalBtc8821aCsr2Ant.h"
#endif // __MP_PRECOMP_H__

6
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/HalPhyRf.c
View File

@ -18,8 +18,8 @@
*
******************************************************************************/
//#include "Mp_Precomp.h"
#include "odm_precomp.h"
#include "Mp_Precomp.h"
#include "phydm_precomp.h"
#define CALCULATE_SWINGTALBE_OFFSET(_offset, _direction, _size, _deltaThermal) \
@ -161,7 +161,7 @@ ODM_TXPowerTrackingCallback_ThermalMeter(
#endif
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
if ( *(pDM_Odm->mp_mode) == 1)
if (pDM_Odm->mp_mode == TRUE)
#endif
// <Kordan> RFCalibrateInfo.RegA24 will be initialized when ODM HW configuring, but MP configures with para files.
pDM_Odm->RFCalibrateInfo.RegA24 = 0x090e1317;

24
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/Mp_Precomp.h Executable file
View File

@ -0,0 +1,24 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
//#include <Precomp.h>
//#include "phydm_precomp.h"
//#include "../phydm_precomp.h"

880
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/PhyDM_Adaptivity.c Executable file
View File

@ -0,0 +1,880 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
//============================================================
// include files
//============================================================
#include "Mp_Precomp.h"
#include "phydm_precomp.h"
VOID
Phydm_CheckAdaptivity(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
if(pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY)
{
if(pDM_Odm->bAdaOn == TRUE)
{
if(pDM_Odm->DynamicLinkAdaptivity == TRUE)
{
if(pDM_Odm->bLinked && pDM_Odm->bCheck == FALSE)
{
Phydm_NHMCounterStatistics(pDM_Odm);
Phydm_CheckEnvironment(pDM_Odm);
}
else if(!pDM_Odm->bLinked)
{
pDM_Odm->bCheck = FALSE;
}
}
else
{
Phydm_MACEDCCAState(pDM_Odm, PhyDM_DONT_IGNORE_EDCCA);
pDM_Odm->adaptivity_flag = TRUE;
}
}
else
{
Phydm_MACEDCCAState(pDM_Odm, PhyDM_IGNORE_EDCCA);
pDM_Odm->adaptivity_flag = FALSE;
}
}
}
VOID
Phydm_NHMCounterStatisticsInit(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES)
{
//PHY parameters initialize for ac series
ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TIMER_11AC+2, 0xC350); //0x990[31:16]=0xC350 Time duration for NHM unit: us, 0xc350=200ms
ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC+2, 0xffff); //0x994[31:16]=0xffff th_9, th_10
//ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11AC, 0xffffff5c); //0x998=0xffffff5c th_3, th_2, th_1, th_0
ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11AC, 0xffffff50); //0x998=0xffffff52 th_3, th_2, th_1, th_0
ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11AC, 0xffffffff); //0x99c=0xffffffff th_7, th_6, th_5, th_4
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH8_11AC, bMaskByte0, 0xff); //0x9a0[7:0]=0xff th_8
//ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT8|BIT9|BIT10, 0x7); //0x994[9:8]=3 enable CCX
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT8|BIT9|BIT10, 0x1); //0x994[10:8]=1 ignoreCCA ignore PHYTXON enable CCX
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_9E8_11AC, BIT0, 0x1); //0x9e8[7]=1 max power among all RX ants
}
else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES)
{
//PHY parameters initialize for n series
ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TIMER_11N+2, 0xC350); //0x894[31:16]=0x0xC350 Time duration for NHM unit: us, 0xc350=200ms
//ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TIMER_11N+2, 0x4e20); //0x894[31:16]=0x4e20 Time duration for NHM unit: 4us, 0x4e20=80ms
ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N+2, 0xffff); //0x890[31:16]=0xffff th_9, th_10
//ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11N, 0xffffff5c); //0x898=0xffffff5c th_3, th_2, th_1, th_0
ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11N, 0xffffff50); //0x898=0xffffff52 th_3, th_2, th_1, th_0
ODM_Write4Byte(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11N, 0xffffffff); //0x89c=0xffffffff th_7, th_6, th_5, th_4
ODM_SetBBReg(pDM_Odm, ODM_REG_FPGA0_IQK_11N, bMaskByte0, 0xff); //0xe28[7:0]=0xff th_8
//ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT10|BIT9|BIT8, 0x7); //0x890[9:8]=3 enable CCX
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT10|BIT9|BIT8, 0x1); //0x890[10:8]=1 ignoreCCA ignore PHYTXON enable CCX
ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTC_11N, BIT7, 0x1); //0xc0c[7]=1 max power among all RX ants
}
}
VOID
Phydm_NHMCounterStatistics(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
if(!(pDM_Odm->SupportAbility & ODM_BB_NHM_CNT))
return;
// Get NHM report
Phydm_GetNHMCounterStatistics(pDM_Odm);
// Reset NHM counter
Phydm_NHMCounterStatisticsReset(pDM_Odm);
}
VOID
Phydm_GetNHMCounterStatistics(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
u4Byte value32 = 0;
if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES)
value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_CNT_11AC, bMaskDWord);
else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES)
value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_CNT_11N, bMaskDWord);
pDM_Odm->NHM_cnt_0 = (u1Byte)(value32 & bMaskByte0);
pDM_Odm->NHM_cnt_1 = (u1Byte)((value32 & bMaskByte1)>>8);
}
VOID
Phydm_NHMCounterStatisticsReset(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES)
{
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT1, 0);
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT1, 1);
}
else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES)
{
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT1, 0);
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT1, 1);
}
}
VOID
Phydm_NHMBBInit(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
pDM_Odm->adaptivity_flag = FALSE;
pDM_Odm->tolerance_cnt = 3;
pDM_Odm->NHMLastTxOkcnt = 0;
pDM_Odm->NHMLastRxOkcnt = 0;
pDM_Odm->NHMCurTxOkcnt = 0;
pDM_Odm->NHMCurRxOkcnt = 0;
}
VOID
Phydm_SetEDCCAThreshold(
IN PVOID pDM_VOID,
IN s1Byte H2L,
IN s1Byte L2H
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES)
{
ODM_SetBBReg(pDM_Odm,rOFDM0_ECCAThreshold, bMaskByte0, (u1Byte)L2H);
ODM_SetBBReg(pDM_Odm,rOFDM0_ECCAThreshold, bMaskByte2, (u1Byte)H2L);
}
else if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES)
{
ODM_SetBBReg(pDM_Odm, rFPGA0_XB_LSSIReadBack, bMaskByte0, (u1Byte)L2H);
ODM_SetBBReg(pDM_Odm, rFPGA0_XB_LSSIReadBack, bMaskByte1, (u1Byte)H2L);
}
}
VOID
Phydm_SetTRxMux(
IN PVOID pDM_VOID,
IN PhyDM_Trx_MUX_Type txMode,
IN PhyDM_Trx_MUX_Type rxMode
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES)
{
ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_RPT_FORMAT_11N, BIT3|BIT2|BIT1, txMode); // set TXmod to standby mode to remove outside noise affect
ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_RPT_FORMAT_11N, BIT22|BIT21|BIT20, rxMode); // set RXmod to standby mode to remove outside noise affect
if(pDM_Odm->RFType > ODM_1T1R)
{
ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_RPT_FORMAT_11N_B, BIT3|BIT2|BIT1, txMode); // set TXmod to standby mode to remove outside noise affect
ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_RPT_FORMAT_11N_B, BIT22|BIT21|BIT20, rxMode); // set RXmod to standby mode to remove outside noise affect
}
}
else if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES)
{
ODM_SetBBReg(pDM_Odm, ODM_REG_TRMUX_11AC, BIT11|BIT10|BIT9|BIT8, txMode); // set TXmod to standby mode to remove outside noise affect
ODM_SetBBReg(pDM_Odm, ODM_REG_TRMUX_11AC, BIT7|BIT6|BIT5|BIT4, rxMode); // set RXmod to standby mode to remove outside noise affect
if(pDM_Odm->RFType > ODM_1T1R)
{
ODM_SetBBReg(pDM_Odm, ODM_REG_TRMUX_11AC_B, BIT11|BIT10|BIT9|BIT8, txMode); // set TXmod to standby mode to remove outside noise affect
ODM_SetBBReg(pDM_Odm, ODM_REG_TRMUX_11AC_B, BIT7|BIT6|BIT5|BIT4, rxMode); // set RXmod to standby mode to remove outside noise affect
}
}
}
VOID
Phydm_MACEDCCAState(
IN PVOID pDM_VOID,
IN PhyDM_MACEDCCA_Type State
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
if(State == PhyDM_IGNORE_EDCCA)
{
ODM_SetMACReg(pDM_Odm, REG_TX_PTCL_CTRL, BIT15, 1); //ignore EDCCA reg520[15]=1
ODM_SetMACReg(pDM_Odm, REG_RD_CTRL, BIT11, 0); //reg524[11]=0
}
else // don't set MAC ignore EDCCA signal
{
ODM_SetMACReg(pDM_Odm, REG_TX_PTCL_CTRL, BIT15, 0); //don't ignore EDCCA reg520[15]=0
ODM_SetMACReg(pDM_Odm, REG_RD_CTRL, BIT11, 1); //reg524[11]=1
}
pDM_Odm->EDCCA_enable_state = State;
ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("EDCCA enable State = %d \n", State));
}
BOOLEAN
Phydm_CalNHMcnt(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
u2Byte Base = 0;
Base = pDM_Odm->NHM_cnt_0 + pDM_Odm->NHM_cnt_1;
if(Base != 0)
{
pDM_Odm->NHM_cnt_0 = ((pDM_Odm->NHM_cnt_0) << 8) / Base;
pDM_Odm->NHM_cnt_1 = ((pDM_Odm->NHM_cnt_1) << 8) / Base;
}
if((pDM_Odm->NHM_cnt_0 - pDM_Odm->NHM_cnt_1) >= 100)
return TRUE; // clean environment
else
return FALSE; //noisy environment
}
VOID
Phydm_CheckEnvironment(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
BOOLEAN isCleanEnvironment = FALSE;
u1Byte i, clean = 0;
if(pDM_Odm->bFirstLink == TRUE)
{
pDM_Odm->adaptivity_flag = TRUE;
pDM_Odm->bFirstLink = FALSE;
return;
}
else
{
if(pDM_Odm->NHMWait < 3) // Start enter NHM after 4 NHMWait
{
pDM_Odm->NHMWait ++;
Phydm_NHMCounterStatistics(pDM_Odm);
return;
}
else
{
Phydm_NHMCounterStatistics(pDM_Odm);
isCleanEnvironment = Phydm_CalNHMcnt(pDM_Odm);
if(isCleanEnvironment == TRUE)
{
Phydm_MACEDCCAState(pDM_Odm, PhyDM_DONT_IGNORE_EDCCA);
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
pDM_Odm->TH_L2H_ini = pDM_Odm->TH_L2H_ini_backup; //mode 1
pDM_Odm->TH_EDCCA_HL_diff= pDM_Odm->TH_EDCCA_HL_diff_backup;
#endif
pDM_Odm->adaptivity_flag = TRUE;
}
else
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
Phydm_MACEDCCAState(pDM_Odm, PhyDM_IGNORE_EDCCA);
#else
Phydm_MACEDCCAState(pDM_Odm, PhyDM_DONT_IGNORE_EDCCA);
pDM_Odm->TH_L2H_ini = pDM_Odm->TH_L2H_ini_mode2; // for AP mode 2
pDM_Odm->TH_EDCCA_HL_diff= pDM_Odm->TH_EDCCA_HL_diff_mode2;
#endif
pDM_Odm->adaptivity_flag = FALSE;
}
pDM_Odm->bFirstLink = TRUE;
pDM_Odm->bCheck = TRUE;
}
}
}
VOID
Phydm_NHMBB(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
BOOLEAN bCleanEnvironment;
bCleanEnvironment = Phydm_CalNHMcnt(pDM_Odm);
pDM_Odm->NHMCurTxOkcnt = *(pDM_Odm->pNumTxBytesUnicast) - pDM_Odm->NHMLastTxOkcnt;
pDM_Odm->NHMCurRxOkcnt = *(pDM_Odm->pNumRxBytesUnicast) - pDM_Odm->NHMLastRxOkcnt;
pDM_Odm->NHMLastTxOkcnt = *(pDM_Odm->pNumTxBytesUnicast);
pDM_Odm->NHMLastRxOkcnt = *(pDM_Odm->pNumRxBytesUnicast);
ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("cnt_0=%d, cnt_1=%d, bCleanEnvironment = %d, NHMCurTxOkcnt = %llu, NHMCurRxOkcnt = %llu\n",
pDM_Odm->NHM_cnt_0, pDM_Odm->NHM_cnt_1, bCleanEnvironment, pDM_Odm->NHMCurTxOkcnt, pDM_Odm->NHMCurRxOkcnt));
if(pDM_Odm->NHMWait < 4) // Start enter NHM after 4 NHMWait
{
pDM_Odm->NHMWait ++;
Phydm_MACEDCCAState(pDM_Odm, PhyDM_IGNORE_EDCCA);
}
else if ( ((pDM_Odm->NHMCurTxOkcnt>>10) > 2) && ((pDM_Odm->NHMCurTxOkcnt) + 1 > (u8Byte)(pDM_Odm->NHMCurRxOkcnt<<2) + 1)) //Tx > 4*Rx and Tx > 2Mb possible for adaptivity test
{
if(bCleanEnvironment == TRUE || pDM_Odm->adaptivity_flag == TRUE)
{
//Enable EDCCA since it is possible running Adaptivity testing
pDM_Odm->adaptivity_flag = TRUE;
Phydm_MACEDCCAState(pDM_Odm, PhyDM_DONT_IGNORE_EDCCA);
pDM_Odm->tolerance_cnt = 0;
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
pDM_Odm->TH_L2H_ini = pDM_Odm->TH_L2H_ini_backup;
pDM_Odm->TH_EDCCA_HL_diff = pDM_Odm->TH_EDCCA_HL_diff_backup ;
#endif
}
else
{
if(pDM_Odm->tolerance_cnt < 3)
pDM_Odm->tolerance_cnt ++;
else
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
pDM_Odm->TH_L2H_ini = pDM_Odm->TH_L2H_ini_mode2;
pDM_Odm->TH_EDCCA_HL_diff = pDM_Odm->TH_EDCCA_HL_diff_mode2 ;
#else
Phydm_MACEDCCAState(pDM_Odm, PhyDM_IGNORE_EDCCA);
#endif
pDM_Odm->adaptivity_flag = FALSE;
}
}
}
else // TX<RX
{
if(pDM_Odm->adaptivity_flag == TRUE && bCleanEnvironment == FALSE)
{
Phydm_MACEDCCAState(pDM_Odm, PhyDM_DONT_IGNORE_EDCCA);
pDM_Odm->tolerance_cnt = 0;
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
pDM_Odm->TH_L2H_ini = pDM_Odm->TH_L2H_ini_backup;
pDM_Odm->TH_EDCCA_HL_diff = pDM_Odm->TH_EDCCA_HL_diff_backup ;
#endif
}
#if(DM_ODM_SUPPORT_TYPE & ODM_AP) // for repeater mode add by YuChen 2014.06.23
#ifdef UNIVERSAL_REPEATER
else if((bCleanEnvironment == TRUE) && (pDM_Odm->VXD_bLinked) && ((pDM_Odm->NHMCurTxOkcnt>>10) > 1)) // clean environment and VXD linked and Tx TP>1Mb
{
pDM_Odm->adaptivity_flag = TRUE;
Phydm_MACEDCCAState(pDM_Odm, PhyDM_DONT_IGNORE_EDCCA);
pDM_Odm->tolerance_cnt = 0;
pDM_Odm->TH_L2H_ini = pDM_Odm->TH_L2H_ini_backup;
pDM_Odm->TH_EDCCA_HL_diff = pDM_Odm->TH_EDCCA_HL_diff_backup ;
}
#endif
#endif // for repeater mode add by YuChen 2014.06.23
else
{
if(pDM_Odm->tolerance_cnt < 3)
pDM_Odm->tolerance_cnt ++;
else
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
pDM_Odm->TH_L2H_ini = pDM_Odm->TH_L2H_ini_mode2;
pDM_Odm->TH_EDCCA_HL_diff = pDM_Odm->TH_EDCCA_HL_diff_mode2 ;
#else
Phydm_MACEDCCAState(pDM_Odm, PhyDM_IGNORE_EDCCA);
#endif
pDM_Odm->adaptivity_flag = FALSE;
}
}
}
ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("adaptivity_flag = %d\n ", pDM_Odm->adaptivity_flag));
}
VOID
Phydm_SearchPwdBLowerBound(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
u4Byte value32 =0;
u1Byte cnt, IGI_Pause = 0x7f, IGI_Resume = 0x20, IGI = 0x50; //IGI = 0x50 for cal EDCCA lower bound
u1Byte txEdcca1 = 0, txEdcca0 = 0;
BOOLEAN bAdjust=TRUE;
s1Byte TH_L2H_dmc, TH_H2L_dmc, IGI_target = 0x32;
s1Byte Diff;
Phydm_SetTRxMux(pDM_Odm, PhyDM_STANDBY_MODE, PhyDM_STANDBY_MODE);
ODM_Write_DIG(pDM_Odm, IGI_Pause);
Diff = IGI_target -(s1Byte)IGI;
TH_L2H_dmc = pDM_Odm->TH_L2H_ini + Diff;
if(TH_L2H_dmc > 10)
TH_L2H_dmc = 10;
TH_H2L_dmc = TH_L2H_dmc - pDM_Odm->TH_EDCCA_HL_diff;
Phydm_SetEDCCAThreshold(pDM_Odm, TH_H2L_dmc, TH_L2H_dmc);
ODM_delay_ms(5);
while(bAdjust)
{
for(cnt=0; cnt<20; cnt ++)
{
if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES)
value32 = ODM_GetBBReg(pDM_Odm,ODM_REG_RPT_11N, bMaskDWord);
else if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES)
value32 = ODM_GetBBReg(pDM_Odm,ODM_REG_RPT_11AC, bMaskDWord);
if (value32 & BIT30 && (pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8723B|ODM_RTL8188E)))
txEdcca1 = txEdcca1 + 1;
else if(value32 & BIT29)
txEdcca1 = txEdcca1 + 1;
else
txEdcca0 = txEdcca0 + 1;
}
if(txEdcca1 > 9 )
{
IGI = IGI -1;
TH_L2H_dmc = TH_L2H_dmc + 1;
if(TH_L2H_dmc > 10)
TH_L2H_dmc = 10;
TH_H2L_dmc = TH_L2H_dmc - pDM_Odm->TH_EDCCA_HL_diff;
Phydm_SetEDCCAThreshold(pDM_Odm, TH_H2L_dmc, TH_L2H_dmc);
txEdcca1 = 0;
txEdcca0 = 0;
if(TH_L2H_dmc == 10)
{
bAdjust = FALSE;
pDM_Odm->H2L_lb = TH_H2L_dmc;
pDM_Odm->L2H_lb = TH_L2H_dmc;
pDM_Odm->Adaptivity_IGI_upper = IGI;
}
}
else
{
bAdjust = FALSE;
pDM_Odm->H2L_lb = TH_H2L_dmc;
pDM_Odm->L2H_lb = TH_L2H_dmc;
pDM_Odm->Adaptivity_IGI_upper = IGI;
}
}
Phydm_SetTRxMux(pDM_Odm, PhyDM_TX_MODE, PhyDM_RX_MODE);
ODM_Write_DIG(pDM_Odm, IGI_Resume);
Phydm_SetEDCCAThreshold(pDM_Odm, 0x7f, 0x7f); // resume to no link state
}
VOID
Phydm_AdaptivityInit(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
#if(DM_ODM_SUPPORT_TYPE == ODM_WIN)
PADAPTER pAdapter = pDM_Odm->Adapter;
PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo);
pDM_Odm->Carrier_Sense_enable = (BOOLEAN)pMgntInfo->RegEnableCarrierSense;
pDM_Odm->NHM_enable = (BOOLEAN)pMgntInfo->RegNHMEnable;
pDM_Odm->DynamicLinkAdaptivity = (BOOLEAN)pMgntInfo->RegDmLinkAdaptivity;
#elif(DM_ODM_SUPPORT_TYPE == ODM_CE)
pDM_Odm->Carrier_Sense_enable = (pDM_Odm->Adapter->registrypriv.adaptivity_mode!=0)?TRUE:FALSE;
pDM_Odm->NHM_enable = (BOOLEAN)pDM_Odm->Adapter->registrypriv.nhm_en;
pDM_Odm->DynamicLinkAdaptivity = FALSE; // Jeff please add this
#endif
#if(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN))
if(pDM_Odm->Carrier_Sense_enable == FALSE)
{
#if(DM_ODM_SUPPORT_TYPE == ODM_WIN)
if( pMgntInfo->RegL2HForAdaptivity != 0 )
pDM_Odm->TH_L2H_ini = pMgntInfo->RegL2HForAdaptivity;
else
#endif
pDM_Odm->TH_L2H_ini = 0xf5; // -7
}
else
{
#if(DM_ODM_SUPPORT_TYPE == ODM_WIN)
if( pMgntInfo->RegL2HForAdaptivity != 0 )
pDM_Odm->TH_L2H_ini = pMgntInfo->RegL2HForAdaptivity;
else
#endif
pDM_Odm->TH_L2H_ini = 0xa;
}
pDM_Odm->AdapEn_RSSI = 20;
#if(DM_ODM_SUPPORT_TYPE == ODM_WIN)
if( pMgntInfo->RegHLDiffForAdaptivity != 0 )
pDM_Odm->TH_EDCCA_HL_diff = pMgntInfo->RegHLDiffForAdaptivity;
else
#endif
pDM_Odm->TH_EDCCA_HL_diff = 7;
ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("TH_L2H_ini = 0x%x, TH_EDCCA_HL_diff = 0x%x\n", pDM_Odm->TH_L2H_ini, pDM_Odm->TH_EDCCA_HL_diff));
#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
prtl8192cd_priv priv = pDM_Odm->priv;
if(pDM_Odm->Carrier_Sense_enable){
pDM_Odm->TH_L2H_ini = 10;
pDM_Odm->TH_EDCCA_HL_diff = 7;
pDM_Odm->AdapEn_RSSI = 30;
}
else
{
pDM_Odm->TH_L2H_ini = pDM_Odm->TH_L2H_ini_backup; //set by mib
pDM_Odm->TH_EDCCA_HL_diff = 7;
pDM_Odm->AdapEn_RSSI = 20;
}
pDM_Odm->TH_L2H_ini_mode2 = 20;
pDM_Odm->TH_EDCCA_HL_diff_mode2 = 8;
//pDM_Odm->TH_L2H_ini_backup = pDM_Odm->TH_L2H_ini;
pDM_Odm->TH_EDCCA_HL_diff_backup = pDM_Odm->TH_EDCCA_HL_diff ;
if(priv->pshare->rf_ft_var.adaptivity_enable == 2)
pDM_Odm->DynamicLinkAdaptivity = TRUE;
else
pDM_Odm->DynamicLinkAdaptivity = FALSE;
// pDM_Odm->NHM_enable = FALSE;
#endif
pDM_Odm->IGI_Base = 0x32;
pDM_Odm->IGI_target = 0x1c;
pDM_Odm->ForceEDCCA = 0;
pDM_Odm->H2L_lb= 0;
pDM_Odm->L2H_lb= 0;
pDM_Odm->Adaptivity_IGI_upper = 0;
pDM_Odm->NHMWait = 0;
Phydm_NHMBBInit(pDM_Odm);
pDM_Odm->bCheck = FALSE;
pDM_Odm->bFirstLink = TRUE;
pDM_Odm->bAdaOn = TRUE;
ODM_SetBBReg(pDM_Odm, REG_RD_CTRL, BIT11, 1); // stop counting if EDCCA is asserted
//Search pwdB lower bound
{
if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES)
ODM_SetBBReg(pDM_Odm,ODM_REG_DBG_RPT_11N, bMaskDWord, 0x208);
else if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES)
ODM_SetBBReg(pDM_Odm,ODM_REG_DBG_RPT_11AC, bMaskDWord, 0x209);
Phydm_SearchPwdBLowerBound(pDM_Odm);
}
Phydm_MACEDCCAState(pDM_Odm, PhyDM_IGNORE_EDCCA);
}
BOOLEAN
Phydm_Adaptivity(
IN PVOID pDM_VOID,
IN u1Byte IGI
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
s1Byte TH_L2H_dmc, TH_H2L_dmc, L2H_nolink_Band4 = 0x7f, H2L_nolink_Band4 = 0x7f;
s1Byte Diff, IGI_target;
BOOLEAN EDCCA_State = FALSE;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
PADAPTER pAdapter = pDM_Odm->Adapter;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
BOOLEAN bFwCurrentInPSMode=FALSE;
PMGNT_INFO pMgntInfo = &(pAdapter->MgntInfo);
pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_FW_PSMODE_STATUS, (pu1Byte)(&bFwCurrentInPSMode));
// Disable EDCCA mode while under LPS mode, added by Roger, 2012.09.14.
if(bFwCurrentInPSMode)
return FALSE;
#endif
if(!(pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY))
{
ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("Go to odm_DynamicEDCCA() \n"));
// Add by Neil Chen to enable edcca to MP Platform
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
// Adjust EDCCA.
if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES)
Phydm_DynamicEDCCA(pDM_Odm);
#endif
return FALSE;
}
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
if(pMgntInfo->RegEnableAdaptivity== 2)
#else
if (pDM_Odm->Adapter->registrypriv.adaptivity_en == 2)
#endif
{
if(pDM_Odm->Carrier_Sense_enable == FALSE) // check domain Code for Adaptivity or CarrierSense
{
if ((*pDM_Odm->pBandType == ODM_BAND_5G) &&
!(pDM_Odm->odm_Regulation5G == REGULATION_ETSI || pDM_Odm->odm_Regulation5G == REGULATION_WW))
{
ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("Adaptivity skip 5G domain code : %d \n", pDM_Odm->odm_Regulation5G));
return FALSE;
}
else if((*pDM_Odm->pBandType == ODM_BAND_2_4G) &&
!(pDM_Odm->odm_Regulation2_4G == REGULATION_ETSI || pDM_Odm->odm_Regulation2_4G == REGULATION_WW))
{
ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("Adaptivity skip 2.4G domain code : %d \n", pDM_Odm->odm_Regulation2_4G));
return FALSE;
}
else if ((*pDM_Odm->pBandType != ODM_BAND_2_4G) && (*pDM_Odm->pBandType != ODM_BAND_5G))
{
ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("Adaptivity neither 2G nor 5G band, return\n"));
return FALSE;
}
}
else
{
if ((*pDM_Odm->pBandType == ODM_BAND_5G) &&
!(pDM_Odm->odm_Regulation5G == REGULATION_ETSI || pDM_Odm->odm_Regulation5G == REGULATION_WW))
{
ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("CarrierSense skip 5G domain code : %d\n", pDM_Odm->odm_Regulation5G));
return FALSE;
}
else if((*pDM_Odm->pBandType == ODM_BAND_2_4G) &&
!(pDM_Odm->odm_Regulation2_4G == REGULATION_ETSI || pDM_Odm->odm_Regulation2_4G == REGULATION_WW))
{
ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("CarrierSense skip 2.4G domain code : %d\n", pDM_Odm->odm_Regulation2_4G));
return FALSE;
}
else if ((*pDM_Odm->pBandType != ODM_BAND_2_4G) && (*pDM_Odm->pBandType != ODM_BAND_5G))
{
ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("CarrierSense neither 2G nor 5G band, return\n"));
return FALSE;
}
}
}
#endif
ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("odm_Adaptivity() =====> \n"));
ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("ForceEDCCA=%d, IGI_Base=0x%x, TH_L2H_ini = %d, TH_EDCCA_HL_diff = %d, AdapEn_RSSI = %d\n",
pDM_Odm->ForceEDCCA, pDM_Odm->IGI_Base, pDM_Odm->TH_L2H_ini, pDM_Odm->TH_EDCCA_HL_diff, pDM_Odm->AdapEn_RSSI));
if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES)
ODM_SetBBReg(pDM_Odm, 0x800, BIT10, 0); //ADC_mask enable
if(*pDM_Odm->pBandWidth == ODM_BW20M) //CHANNEL_WIDTH_20
IGI_target = pDM_Odm->IGI_Base;
else if(*pDM_Odm->pBandWidth == ODM_BW40M)
IGI_target = pDM_Odm->IGI_Base + 2;
else if(*pDM_Odm->pBandWidth == ODM_BW80M)
IGI_target = pDM_Odm->IGI_Base + 2;
else
IGI_target = pDM_Odm->IGI_Base;
pDM_Odm->IGI_target = (u1Byte) IGI_target;
if(*pDM_Odm->pChannel >= 149) // Band4 -> for AP : mode2, for sd4 and sd7 : turnoff adaptivity
{
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
if(pDM_Odm->bLinked)
{
Diff = IGI_target -(s1Byte)IGI;
L2H_nolink_Band4 = pDM_Odm->TH_L2H_ini_mode2 + Diff;
if(L2H_nolink_Band4 > 10)
L2H_nolink_Band4 = 10;
H2L_nolink_Band4 = L2H_nolink_Band4 - pDM_Odm->TH_EDCCA_HL_diff_mode2;
}
#endif
Phydm_SetEDCCAThreshold(pDM_Odm, H2L_nolink_Band4, L2H_nolink_Band4);
return FALSE;
}
if(!pDM_Odm->ForceEDCCA)
{
if(pDM_Odm->RSSI_Min > pDM_Odm->AdapEn_RSSI)
EDCCA_State = 1;
else if(pDM_Odm->RSSI_Min < (pDM_Odm->AdapEn_RSSI - 5))
EDCCA_State = 0;
}
else
EDCCA_State = 1;
if(pDM_Odm->Carrier_Sense_enable == FALSE && pDM_Odm->NHM_enable == TRUE)
Phydm_NHMBB(pDM_Odm);
ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("BandWidth=%s, IGI_target=0x%x, EDCCA_State=%d, EDCCA_enable_state = %d\n",
(*pDM_Odm->pBandWidth==ODM_BW80M)?"80M":((*pDM_Odm->pBandWidth==ODM_BW40M)?"40M":"20M"), IGI_target, EDCCA_State, pDM_Odm->EDCCA_enable_state));
ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("RSSI_min = %d, AdapIGIUpper= 0x %x\n", pDM_Odm->RSSI_Min, pDM_Odm->Adaptivity_IGI_upper));
if(EDCCA_State == 1)
{
Diff = IGI_target -(s1Byte)IGI;
TH_L2H_dmc = pDM_Odm->TH_L2H_ini + Diff;
if(TH_L2H_dmc > 10)
TH_L2H_dmc = 10;
TH_H2L_dmc = TH_L2H_dmc - pDM_Odm->TH_EDCCA_HL_diff;
//replace lower bound to prevent EDCCA always equal 1
if(TH_H2L_dmc < pDM_Odm->H2L_lb)
TH_H2L_dmc = pDM_Odm->H2L_lb;
if(TH_L2H_dmc < pDM_Odm->L2H_lb)
TH_L2H_dmc = pDM_Odm->L2H_lb;
}
else
{
TH_L2H_dmc = 0x7f;
TH_H2L_dmc = 0x7f;
}
ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("IGI=0x%x, TH_L2H_dmc = %d, TH_H2L_dmc = %d, adaptivity_flg = %d, bAdaOn = %d, DynamicLinkAdaptivity = %d, NHM_enable = %d\n",
IGI, TH_L2H_dmc, TH_H2L_dmc, pDM_Odm->adaptivity_flag, pDM_Odm->bAdaOn, pDM_Odm->DynamicLinkAdaptivity, pDM_Odm->NHM_enable));
Phydm_SetEDCCAThreshold(pDM_Odm, TH_H2L_dmc, TH_L2H_dmc);
return TRUE;
}
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
VOID
Phydm_EnableEDCCA(
IN PVOID pDM_VOID
)
{
// This should be moved out of OUTSRC
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
PADAPTER pAdapter = pDM_Odm->Adapter;
// Enable EDCCA. The value is suggested by SD3 Wilson.
//
// Revised for ASUS 11b/g performance issues, suggested by BB Neil, 2012.04.13.
//
if((pDM_Odm->SupportICType == ODM_RTL8723A)&&(IS_WIRELESS_MODE_G(pAdapter)))
{
//PlatformEFIOWrite1Byte(Adapter, rOFDM0_ECCAThreshold, 0x00);
ODM_Write1Byte(pDM_Odm,rOFDM0_ECCAThreshold,0x00);
ODM_Write1Byte(pDM_Odm,rOFDM0_ECCAThreshold+2,0xFD);
}
else
{
//PlatformEFIOWrite1Byte(Adapter, rOFDM0_ECCAThreshold, 0x03);
ODM_Write1Byte(pDM_Odm,rOFDM0_ECCAThreshold,0x03);
ODM_Write1Byte(pDM_Odm,rOFDM0_ECCAThreshold+2,0x00);
}
//PlatformEFIOWrite1Byte(Adapter, rOFDM0_ECCAThreshold+2, 0x00);
}
VOID
Phydm_DisableEDCCA(
IN PVOID pDM_VOID
)
{
// Disable EDCCA..
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
ODM_Write1Byte(pDM_Odm, rOFDM0_ECCAThreshold, 0x7f);
ODM_Write1Byte(pDM_Odm, rOFDM0_ECCAThreshold+2, 0x7f);
}
//
// Description: According to initial gain value to determine to enable or disable EDCCA.
//
// Suggested by SD3 Wilson. Added by tynli. 2011.11.25.
//
VOID
Phydm_DynamicEDCCA(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
PADAPTER pAdapter = pDM_Odm->Adapter;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
u1Byte RegC50, RegC58;
BOOLEAN bEDCCAenable = FALSE;
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
BOOLEAN bFwCurrentInPSMode=FALSE;
pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_FW_PSMODE_STATUS, (pu1Byte)(&bFwCurrentInPSMode));
// Disable EDCCA mode while under LPS mode, added by Roger, 2012.09.14.
if(bFwCurrentInPSMode)
return;
#endif
//
// 2013/11/14 Ken According to BB team Jame's suggestion, we need to disable soft AP mode EDCCA.
// 2014/01/08 MH For Miracst AP mode test. We need to disable EDCCA. Otherwise, we may stop
// to send beacon in noisy environment or platform.
//
if(ACTING_AS_AP(pAdapter) || ACTING_AS_AP(GetFirstAPAdapter(pAdapter)))
//if(ACTING_AS_AP(pAdapter))
{
ODM_RT_TRACE(pDM_Odm,PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("At least One Port as AP disable EDCCA\n"));
Phydm_DisableEDCCA(pDM_Odm);
if(pHalData->bPreEdccaEnable)
Phydm_DisableEDCCA(pDM_Odm);
pHalData->bPreEdccaEnable = FALSE;
return;
}
RegC50 = (u1Byte)ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0);
RegC58 = (u1Byte)ODM_GetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0);
if((RegC50 > 0x28 && RegC58 > 0x28) ||
((pDM_Odm->SupportICType == ODM_RTL8723A && IS_WIRELESS_MODE_G(pAdapter) && RegC50>0x26)) ||
(pDM_Odm->SupportICType == ODM_RTL8188E && RegC50 > 0x28))
{
if(!pHalData->bPreEdccaEnable)
{
Phydm_EnableEDCCA(pDM_Odm);
pHalData->bPreEdccaEnable = TRUE;
}
}
else if((RegC50 < 0x25 && RegC58 < 0x25) || (pDM_Odm->SupportICType == ODM_RTL8188E && RegC50 < 0x25))
{
if(pHalData->bPreEdccaEnable)
{
Phydm_DisableEDCCA(pDM_Odm);
pHalData->bPreEdccaEnable = FALSE;
}
}
}
#endif

146
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/PhyDM_Adaptivity.h Executable file
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@ -0,0 +1,146 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __PHYDMADAPTIVITY_H__
#define __PHYDMADAPTIVITY_H__
#define ADAPTIVITY_VERSION "7.1"
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
typedef enum _tag_PhyDM_REGULATION_Type {
REGULATION_FCC = 0,
REGULATION_MKK = 1,
REGULATION_ETSI = 2,
REGULATION_WW = 3,
MAX_REGULATION_NUM = 4
} PhyDM_REGULATION_TYPE;
#endif
typedef enum tag_PhyDM_TRx_MUX_Type
{
PhyDM_SHUTDOWN = 0,
PhyDM_STANDBY_MODE = 1,
PhyDM_TX_MODE = 2,
PhyDM_RX_MODE = 3
}PhyDM_Trx_MUX_Type;
typedef enum tag_PhyDM_MACEDCCA_Type
{
PhyDM_IGNORE_EDCCA = 0,
PhyDM_DONT_IGNORE_EDCCA = 1
}PhyDM_MACEDCCA_Type;
VOID
Phydm_CheckAdaptivity(
IN PVOID pDM_VOID
);
VOID
Phydm_CheckEnvironment(
IN PVOID pDM_VOID
);
VOID
Phydm_NHMCounterStatisticsInit(
IN PVOID pDM_VOID
);
VOID
Phydm_NHMCounterStatistics(
IN PVOID pDM_VOID
);
VOID
Phydm_NHMBBInit(
IN PVOID pDM_VOID
);
VOID
Phydm_NHMBB(
IN PVOID pDM_VOID
);
VOID
Phydm_NHMCounterStatisticsReset(
IN PVOID pDM_VOID
);
VOID
Phydm_GetNHMCounterStatistics(
IN PVOID pDM_VOID
);
VOID
Phydm_MACEDCCAState(
IN PVOID pDM_VOID,
IN PhyDM_MACEDCCA_Type State
);
VOID
Phydm_SetEDCCAThreshold(
IN PVOID pDM_VOID,
IN s1Byte H2L,
IN s1Byte L2H
);
VOID
Phydm_SetTRxMux(
IN PVOID pDM_VOID,
IN PhyDM_Trx_MUX_Type txMode,
IN PhyDM_Trx_MUX_Type rxMode
);
BOOLEAN
Phydm_CalNHMcnt(
IN PVOID pDM_VOID
);
VOID
Phydm_SearchPwdBLowerBound(
IN PVOID pDM_VOID
);
VOID
Phydm_AdaptivityInit(
IN PVOID pDM_VOID
);
BOOLEAN
Phydm_Adaptivity(
IN PVOID pDM_VOID,
IN u1Byte IGI
);
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
VOID
Phydm_DisableEDCCA(
IN PVOID pDM_VOID
);
VOID
Phydm_DynamicEDCCA(
IN PVOID pDM_VOID
);
#endif
#endif

2397
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm.c Executable file
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File diff suppressed because it is too large Load Diff

2000
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm.h Executable file
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File diff suppressed because it is too large Load Diff

213
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_ACS.c Executable file
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@ -0,0 +1,213 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
//============================================================
// include files
//============================================================
#include "Mp_Precomp.h"
#include "phydm_precomp.h"
u1Byte
ODM_GetAutoChannelSelectResult(
IN PVOID pDM_VOID,
IN u1Byte Band
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
PACS pACS = &pDM_Odm->DM_ACS;
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
if(Band == ODM_BAND_2_4G)
{
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("[ACS] ODM_GetAutoChannelSelectResult(): CleanChannel_2G(%d)\n", pACS->CleanChannel_2G));
return (u1Byte)pACS->CleanChannel_2G;
}
else
{
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("[ACS] ODM_GetAutoChannelSelectResult(): CleanChannel_5G(%d)\n", pACS->CleanChannel_5G));
return (u1Byte)pACS->CleanChannel_5G;
}
#else
return (u1Byte)pACS->CleanChannel_2G;
#endif
}
VOID
odm_AutoChannelSelectSetting(
IN PVOID pDM_VOID,
IN BOOLEAN IsEnable
)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
u2Byte period = 0x2710;// 40ms in default
u2Byte NHMType = 0x7;
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelectSetting()=========> \n"));
if(IsEnable)
{//20 ms
period = 0x1388;
NHMType = 0x1;
}
if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES)
{
//PHY parameters initialize for ac series
ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TIMER_11AC+2, period); //0x990[31:16]=0x2710 Time duration for NHM unit: 4us, 0x2710=40ms
//ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT8|BIT9|BIT10, NHMType); //0x994[9:8]=3 enable CCX
}
else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES)
{
//PHY parameters initialize for n series
ODM_Write2Byte(pDM_Odm, ODM_REG_NHM_TIMER_11N+2, period); //0x894[31:16]=0x2710 Time duration for NHM unit: 4us, 0x2710=40ms
//ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT10|BIT9|BIT8, NHMType); //0x890[9:8]=3 enable CCX
}
#endif
}
VOID
odm_AutoChannelSelectInit(
IN PVOID pDM_VOID
)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
PACS pACS = &pDM_Odm->DM_ACS;
u1Byte i;
if(!(pDM_Odm->SupportAbility & ODM_BB_NHM_CNT))
return;
if(pACS->bForceACSResult)
return;
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelectInit()=========> \n"));
pACS->CleanChannel_2G = 1;
pACS->CleanChannel_5G = 36;
for (i = 0; i < ODM_MAX_CHANNEL_2G; ++i)
{
pACS->Channel_Info_2G[0][i] = 0;
pACS->Channel_Info_2G[1][i] = 0;
}
if(pDM_Odm->SupportICType & (ODM_IC_11AC_SERIES|ODM_RTL8192D))
{
for (i = 0; i < ODM_MAX_CHANNEL_5G; ++i)
{
pACS->Channel_Info_5G[0][i] = 0;
pACS->Channel_Info_5G[1][i] = 0;
}
}
#endif
}
VOID
odm_AutoChannelSelectReset(
IN PVOID pDM_VOID
)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
PACS pACS = &pDM_Odm->DM_ACS;
if(!(pDM_Odm->SupportAbility & ODM_BB_NHM_CNT))
return;
if(pACS->bForceACSResult)
return;
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelectReset()=========> \n"));
odm_AutoChannelSelectSetting(pDM_Odm,TRUE);// for 20ms measurement
Phydm_NHMCounterStatisticsReset(pDM_Odm);
#endif
}
VOID
odm_AutoChannelSelect(
IN PVOID pDM_VOID,
IN u1Byte Channel
)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
PACS pACS = &pDM_Odm->DM_ACS;
u1Byte ChannelIDX = 0, SearchIDX = 0;
u2Byte MaxScore=0;
if(!(pDM_Odm->SupportAbility & ODM_BB_NHM_CNT))
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_AutoChannelSelect(): Return: SupportAbility ODM_BB_NHM_CNT is disabled\n"));
return;
}
if(pACS->bForceACSResult)
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_AutoChannelSelect(): Force 2G clean channel = %d, 5G clean channel = %d\n",
pACS->CleanChannel_2G, pACS->CleanChannel_5G));
return;
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelect(): Channel = %d=========> \n", Channel));
Phydm_GetNHMCounterStatistics(pDM_Odm);
odm_AutoChannelSelectSetting(pDM_Odm,FALSE);
if(Channel >=1 && Channel <=14)
{
ChannelIDX = Channel - 1;
pACS->Channel_Info_2G[1][ChannelIDX]++;
if(pACS->Channel_Info_2G[1][ChannelIDX] >= 2)
pACS->Channel_Info_2G[0][ChannelIDX] = (pACS->Channel_Info_2G[0][ChannelIDX] >> 1) +
(pACS->Channel_Info_2G[0][ChannelIDX] >> 2) + (pDM_Odm->NHM_cnt_0>>2);
else
pACS->Channel_Info_2G[0][ChannelIDX] = pDM_Odm->NHM_cnt_0;
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelect(): NHM_cnt_0 = %d \n", pDM_Odm->NHM_cnt_0));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("odm_AutoChannelSelect(): Channel_Info[0][%d] = %d, Channel_Info[1][%d] = %d\n", ChannelIDX, pACS->Channel_Info_2G[0][ChannelIDX], ChannelIDX, pACS->Channel_Info_2G[1][ChannelIDX]));
for(SearchIDX = 0; SearchIDX < ODM_MAX_CHANNEL_2G; SearchIDX++)
{
if(pACS->Channel_Info_2G[1][SearchIDX] != 0)
{
if(pACS->Channel_Info_2G[0][SearchIDX] >= MaxScore)
{
MaxScore = pACS->Channel_Info_2G[0][SearchIDX];
pACS->CleanChannel_2G = SearchIDX+1;
}
}
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ACS, ODM_DBG_LOUD, ("(1)odm_AutoChannelSelect(): 2G: CleanChannel_2G = %d, MaxScore = %d \n",
pACS->CleanChannel_2G, MaxScore));
}
else if(Channel >= 36)
{
// Need to do
pACS->CleanChannel_5G = Channel;
}
#endif
}

61
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_ACS.h Executable file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __PHYDMACS_H__
#define __PHYDMACS_H__
#define ACS_VERSION "1.0"
#define ODM_MAX_CHANNEL_2G 14
#define ODM_MAX_CHANNEL_5G 24
typedef struct _ACS_
{
BOOLEAN bForceACSResult;
u1Byte CleanChannel_2G;
u1Byte CleanChannel_5G;
u2Byte Channel_Info_2G[2][ODM_MAX_CHANNEL_2G]; //Channel_Info[1]: Channel Score, Channel_Info[2]:Channel_Scan_Times
u2Byte Channel_Info_5G[2][ODM_MAX_CHANNEL_5G];
}ACS, *PACS;
VOID
odm_AutoChannelSelectInit(
IN PVOID pDM_VOID
);
VOID
odm_AutoChannelSelectReset(
IN PVOID pDM_VOID
);
VOID
odm_AutoChannelSelect(
IN PVOID pDM_VOID,
IN u1Byte Channel
);
u1Byte
ODM_GetAutoChannelSelectResult(
IN PVOID pDM_VOID,
IN u1Byte Band
);
#endif

1206
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_AntDect.c Executable file
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76
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_AntDect.h Executable file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __PHYDMANTDECT_H__
#define __PHYDMANTDECT_H__
#define ANTDECT_VERSION "1.0"
#if( DM_ODM_SUPPORT_TYPE & (ODM_WIN |ODM_CE))
//1 [1. Single Tone Method] ===================================================
VOID
ODM_SingleDualAntennaDefaultSetting(
IN PDM_ODM_T pDM_Odm
);
BOOLEAN
ODM_SingleDualAntennaDetection(
IN PDM_ODM_T pDM_Odm,
IN u1Byte mode
);
//1 [2. Scan AP RSSI Method] ==================================================
VOID
odm_SwAntDetectInit(
IN PDM_ODM_T pDM_Odm
);
#define SwAntDivCheckBeforeLink ODM_SwAntDivCheckBeforeLink
BOOLEAN
ODM_SwAntDivCheckBeforeLink(
IN PDM_ODM_T pDM_Odm
);
//1 [3. PSD Method] ==========================================================
VOID
ODM_SingleDualAntennaDetection_PSD(
IN PDM_ODM_T pDM_Odm
);
#endif
#endif

2850
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_AntDiv.c Executable file
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217
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_AntDiv.h Executable file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __PHYDMANTDIV_H__
#define __PHYDMANTDIV_H__
#define ANTDIV_VERSION "1.0"
#define ANT1_2G 0 // = ANT2_5G
#define ANT2_2G 1 // = ANT1_5G
//Antenna Diversty Control Type
#define ODM_AUTO_ANT 0
#define ODM_FIX_MAIN_ANT 1
#define ODM_FIX_AUX_ANT 2
#define TX_BY_REG 0
#if (DM_ODM_SUPPORT_TYPE != ODM_AP)
#define ODM_RTL8881A 0 //Just for windows driver to jointly use ODM-driver
#endif
#define ODM_ANTDIV_SUPPORT (ODM_RTL8188E|ODM_RTL8192E|ODM_RTL8723B|ODM_RTL8821|ODM_RTL8881A|ODM_RTL8812)
#define ODM_N_ANTDIV_SUPPORT (ODM_RTL8188E|ODM_RTL8192E|ODM_RTL8723B)
#define ODM_AC_ANTDIV_SUPPORT (ODM_RTL8821|ODM_RTL8881A|ODM_RTL8812)
#define ODM_SMART_ANT_SUPPORT (ODM_RTL8188E|ODM_RTL8192E)
#define ODM_OLD_IC_ANTDIV_SUPPORT (ODM_RTL8723A|ODM_RTL8192C|ODM_RTL8192D)
#define ODM_ANTDIV_2G_SUPPORT_IC (ODM_RTL8188E|ODM_RTL8192E|ODM_RTL8723B|ODM_RTL8881A)
#define ODM_ANTDIV_5G_SUPPORT_IC (ODM_RTL8821|ODM_RTL8881A|ODM_RTL8812)
#define ODM_ANTDIV_2G BIT0
#define ODM_ANTDIV_5G BIT1
#define ANTDIV_ON 1
#define ANTDIV_OFF 0
#define INIT_ANTDIV_TIMMER 0
#define CANCEL_ANTDIV_TIMMER 1
#define RELEASE_ANTDIV_TIMMER 2
VOID
ODM_StopAntennaSwitchDm(
IN PDM_ODM_T pDM_Odm
);
VOID
ODM_SetAntConfig(
IN PDM_ODM_T pDM_Odm,
IN u1Byte antSetting // 0=A, 1=B, 2=C, ....
);
#define SwAntDivRestAfterLink ODM_SwAntDivRestAfterLink
VOID ODM_SwAntDivRestAfterLink( IN PDM_ODM_T pDM_Odm);
#if (defined(CONFIG_HW_ANTENNA_DIVERSITY))
VOID
ODM_UpdateRxIdleAnt(
IN PDM_ODM_T pDM_Odm,
IN u1Byte Ant
);
VOID
odm_AntselStatistics(
IN PDM_ODM_T pDM_Odm,
IN u1Byte antsel_tr_mux,
IN u4Byte MacId,
IN u4Byte RxPWDBAll
);
#if (RTL8723B_SUPPORT == 1)||(RTL8821A_SUPPORT == 1)
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
VOID
ODM_SW_AntDiv_Callback(
IN PRT_TIMER pTimer
);
VOID
ODM_SW_AntDiv_WorkitemCallback(
IN PVOID pContext
);
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
VOID
ODM_SW_AntDiv_Callback(void *FunctionContext);
#endif
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
VOID
odm_S0S1_SwAntDivByCtrlFrame(
IN PDM_ODM_T pDM_Odm,
IN u1Byte Step
);
VOID
odm_AntselStatisticsOfCtrlFrame(
IN PDM_ODM_T pDM_Odm,
IN u1Byte antsel_tr_mux,
IN u4Byte RxPWDBAll
);
VOID
odm_S0S1_SwAntDivByCtrlFrame_ProcessRSSI(
IN PDM_ODM_T pDM_Odm,
IN PODM_PHY_INFO_T pPhyInfo,
IN PODM_PACKET_INFO_T pPktinfo
);
#endif //#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
#endif
#if(RTL8188E_SUPPORT == 1 || RTL8192E_SUPPORT == 1)
#if ( !(DM_ODM_SUPPORT_TYPE == ODM_CE))
VOID
odm_FastAntTraining(
IN PDM_ODM_T pDM_Odm
);
VOID
odm_FastAntTrainingCallback(
IN PDM_ODM_T pDM_Odm
);
VOID
odm_FastAntTrainingWorkItemCallback(
IN PDM_ODM_T pDM_Odm
);
#endif
#endif
VOID
ODM_AntDivInit(
IN PDM_ODM_T pDM_Odm
);
VOID
ODM_AntDivReset(
IN PDM_ODM_T pDM_Odm
);
VOID
ODM_AntDiv(
IN PDM_ODM_T pDM_Odm
);
VOID
ODM_Process_RSSIForAntDiv(
IN OUT PDM_ODM_T pDM_Odm,
IN PODM_PHY_INFO_T pPhyInfo,
IN PODM_PACKET_INFO_T pPktinfo
);
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
VOID
ODM_SetTxAntByTxInfo(
IN PDM_ODM_T pDM_Odm,
IN pu1Byte pDesc,
IN u1Byte macId
);
#else// (DM_ODM_SUPPORT_TYPE == ODM_AP)
VOID
ODM_SetTxAntByTxInfo(
//IN PDM_ODM_T pDM_Odm,
struct rtl8192cd_priv *priv,
struct tx_desc *pdesc,
struct tx_insn *txcfg,
unsigned short aid
);
#endif
VOID
ODM_AntDiv_Config(
IN PDM_ODM_T pDM_Odm
);
VOID
ODM_UpdateRxIdleAnt_8723B(
IN PDM_ODM_T pDM_Odm,
IN u1Byte Ant,
IN u4Byte DefaultAnt,
IN u4Byte OptionalAnt
);
VOID
ODM_AntDivTimers(
IN PDM_ODM_T pDM_Odm,
IN u1Byte state
);
#endif //#if (defined(CONFIG_HW_ANTENNA_DIVERSITY))
#endif //#ifndef __ODMANTDIV_H__

357
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_CfoTracking.c Executable file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include "Mp_Precomp.h"
#include "phydm_precomp.h"
VOID
odm_SetCrystalCap(
IN PVOID pDM_VOID,
IN u1Byte CrystalCap
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PHYDM_CFOTRACK);
BOOLEAN bEEPROMCheck;
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
PADAPTER Adapter = pDM_Odm->Adapter;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
bEEPROMCheck = (pHalData->EEPROMVersion >= 0x01)?TRUE:FALSE;
#else
bEEPROMCheck = TRUE;
#endif
if(pCfoTrack->CrystalCap == CrystalCap)
return;
pCfoTrack->CrystalCap = CrystalCap;
if(pDM_Odm->SupportICType & ODM_RTL8192D)
{
ODM_SetBBReg(pDM_Odm, REG_AFE_XTAL_CTRL, 0x000000F0, CrystalCap & 0x0F);
ODM_SetBBReg(pDM_Odm, REG_AFE_PLL_CTRL, 0xF0000000, ((CrystalCap & 0xF0) >> 4));
}
else if(pDM_Odm->SupportICType & ODM_RTL8188E)
{
// write 0x24[22:17] = 0x24[16:11] = CrystalCap
CrystalCap = CrystalCap & 0x3F;
ODM_SetBBReg(pDM_Odm, REG_AFE_XTAL_CTRL, 0x007ff800, (CrystalCap | (CrystalCap << 6)));
}
else if(pDM_Odm->SupportICType & ODM_RTL8812)
{
// write 0x2C[30:25] = 0x2C[24:19] = CrystalCap
CrystalCap = CrystalCap & 0x3F;
ODM_SetBBReg(pDM_Odm, REG_MAC_PHY_CTRL, 0x7FF80000, (CrystalCap | (CrystalCap << 6)));
}
else if (((pDM_Odm->SupportICType & ODM_RTL8723A) && bEEPROMCheck) ||
(pDM_Odm->SupportICType & ODM_RTL8723B) ||(pDM_Odm->SupportICType & ODM_RTL8192E) ||
(pDM_Odm->SupportICType & ODM_RTL8821))
{
// 0x2C[23:18] = 0x2C[17:12] = CrystalCap
CrystalCap = CrystalCap & 0x3F;
ODM_SetBBReg(pDM_Odm, REG_MAC_PHY_CTRL, 0x00FFF000, (CrystalCap | (CrystalCap << 6)));
}
else if(pDM_Odm->SupportICType & ODM_RTL8821B)
{
// write 0x28[6:1] = 0x24[30:25] = CrystalCap
CrystalCap = CrystalCap & 0x3F;
ODM_SetBBReg(pDM_Odm, REG_AFE_XTAL_CTRL, 0x7E000000, CrystalCap);
ODM_SetBBReg(pDM_Odm, REG_AFE_PLL_CTRL, 0x7E, CrystalCap);
}
else if(pDM_Odm->SupportICType & ODM_RTL8814A)
{
// write 0x2C[26:21] = 0x2C[20:15] = CrystalCap
CrystalCap = CrystalCap & 0x3F;
ODM_SetBBReg(pDM_Odm, REG_MAC_PHY_CTRL, 0x07FF8000, (CrystalCap | (CrystalCap << 6)));
}
else
{
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("odm_SetCrystalCap(): Use default setting.\n"));
ODM_SetBBReg(pDM_Odm, REG_MAC_PHY_CTRL, 0xFFF000, (CrystalCap | (CrystalCap << 6)));
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("odm_SetCrystalCap(): CrystalCap = 0x%x\n", CrystalCap));
}
u1Byte
odm_GetDefaultCrytaltalCap(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
u1Byte CrystalCap = 0x20;
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
PADAPTER Adapter = pDM_Odm->Adapter;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
CrystalCap = pHalData->CrystalCap;
#else
prtl8192cd_priv priv = pDM_Odm->priv;
if(priv->pmib->dot11RFEntry.xcap > 0)
CrystalCap = priv->pmib->dot11RFEntry.xcap;
#endif
CrystalCap = CrystalCap & 0x3f;
return CrystalCap;
}
VOID
odm_SetATCStatus(
IN PVOID pDM_VOID,
IN BOOLEAN ATCStatus
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PHYDM_CFOTRACK);
if(pCfoTrack->bATCStatus == ATCStatus)
return;
ODM_SetBBReg(pDM_Odm, ODM_REG(BB_ATC,pDM_Odm), ODM_BIT(BB_ATC,pDM_Odm), ATCStatus);
pCfoTrack->bATCStatus = ATCStatus;
}
BOOLEAN
odm_GetATCStatus(
IN PVOID pDM_VOID
)
{
BOOLEAN ATCStatus;
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
ATCStatus = (BOOLEAN)ODM_GetBBReg(pDM_Odm, ODM_REG(BB_ATC,pDM_Odm), ODM_BIT(BB_ATC,pDM_Odm));
return ATCStatus;
}
VOID
ODM_CfoTrackingReset(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PHYDM_CFOTRACK);
u1Byte CrystalCap;
pCfoTrack->DefXCap = odm_GetDefaultCrytaltalCap(pDM_Odm);
pCfoTrack->bAdjust = TRUE;
#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
odm_SetCrystalCap(pDM_Odm, pCfoTrack->DefXCap);
odm_SetATCStatus(pDM_Odm, TRUE);
#else
if(pCfoTrack->CrystalCap > pCfoTrack->DefXCap)
{
for(CrystalCap = pCfoTrack->CrystalCap; CrystalCap >= pCfoTrack->DefXCap; CrystalCap--)
odm_SetCrystalCap(pDM_Odm, CrystalCap);
}
else
{
for(CrystalCap = pCfoTrack->CrystalCap; CrystalCap <= pCfoTrack->DefXCap; CrystalCap++)
odm_SetCrystalCap(pDM_Odm, CrystalCap);
}
#endif
}
VOID
ODM_CfoTrackingInit(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PHYDM_CFOTRACK);
pCfoTrack->DefXCap = pCfoTrack->CrystalCap = odm_GetDefaultCrytaltalCap(pDM_Odm);
pCfoTrack->bATCStatus = odm_GetATCStatus(pDM_Odm);
pCfoTrack->bAdjust = TRUE;
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking_init()=========> \n"));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking_init(): bATCStatus = %d, CrystalCap = 0x%x \n",pCfoTrack->bATCStatus, pCfoTrack->DefXCap));
}
VOID
ODM_CfoTracking(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PHYDM_CFOTRACK);
int CFO_kHz_A, CFO_kHz_B, CFO_ave = 0;
int CFO_ave_diff;
int CrystalCap = (int)pCfoTrack->CrystalCap;
u1Byte Adjust_Xtal = 1;
//4 Support ability
if(!(pDM_Odm->SupportAbility & ODM_BB_CFO_TRACKING))
{
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Return: SupportAbility ODM_BB_CFO_TRACKING is disabled\n"));
return;
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking()=========> \n"));
if(!pDM_Odm->bLinked || !pDM_Odm->bOneEntryOnly)
{
//4 No link or more than one entry
ODM_CfoTrackingReset(pDM_Odm);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Reset: bLinked = %d, bOneEntryOnly = %d\n",
pDM_Odm->bLinked, pDM_Odm->bOneEntryOnly));
}
else
{
//3 1. CFO Tracking
//4 1.1 No new packet
if(pCfoTrack->packetCount == pCfoTrack->packetCount_pre)
{
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): packet counter doesn't change\n"));
return;
}
pCfoTrack->packetCount_pre = pCfoTrack->packetCount;
//4 1.2 Calculate CFO
CFO_kHz_A = (int)(pCfoTrack->CFO_tail[0] * 3125) / 1280;
CFO_kHz_B = (int)(pCfoTrack->CFO_tail[1] * 3125) / 1280;
if(pDM_Odm->RFType < ODM_2T2R)
CFO_ave = CFO_kHz_A;
else
CFO_ave = (int)(CFO_kHz_A + CFO_kHz_B) >> 1;
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): CFO_kHz_A = %dkHz, CFO_kHz_B = %dkHz, CFO_ave = %dkHz\n",
CFO_kHz_A, CFO_kHz_B, CFO_ave));
//4 1.3 Avoid abnormal large CFO
CFO_ave_diff = (pCfoTrack->CFO_ave_pre >= CFO_ave)?(pCfoTrack->CFO_ave_pre - CFO_ave):(CFO_ave - pCfoTrack->CFO_ave_pre);
if(CFO_ave_diff > 20 && pCfoTrack->largeCFOHit == 0 && !pCfoTrack->bAdjust)
{
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): first large CFO hit\n"));
pCfoTrack->largeCFOHit = 1;
return;
}
else
pCfoTrack->largeCFOHit = 0;
pCfoTrack->CFO_ave_pre = CFO_ave;
//4 1.4 Dynamic Xtal threshold
if(pCfoTrack->bAdjust == FALSE)
{
if(CFO_ave > CFO_TH_XTAL_HIGH || CFO_ave < (-CFO_TH_XTAL_HIGH))
pCfoTrack->bAdjust = TRUE;
}
else
{
if(CFO_ave < CFO_TH_XTAL_LOW && CFO_ave > (-CFO_TH_XTAL_LOW))
pCfoTrack->bAdjust = FALSE;
}
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
//4 1.5 BT case: Disable CFO tracking
if(pDM_Odm->bBtEnabled)
{
pCfoTrack->bAdjust = FALSE;
odm_SetCrystalCap(pDM_Odm, pCfoTrack->DefXCap);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Disable CFO tracking for BT!!\n"));
}
//4 1.6 Big jump
if(pCfoTrack->bAdjust)
{
if(CFO_ave > CFO_TH_XTAL_LOW)
Adjust_Xtal = Adjust_Xtal + ((CFO_ave - CFO_TH_XTAL_LOW) >> 2);
else if(CFO_ave < (-CFO_TH_XTAL_LOW))
Adjust_Xtal = Adjust_Xtal + ((CFO_TH_XTAL_LOW - CFO_ave) >> 2);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Crystal cap offset = %d\n", Adjust_Xtal));
}
#endif
//4 1.7 Adjust Crystal Cap.
if(pCfoTrack->bAdjust)
{
if(CFO_ave > CFO_TH_XTAL_LOW)
CrystalCap = CrystalCap + Adjust_Xtal;
else if(CFO_ave < (-CFO_TH_XTAL_LOW))
CrystalCap = CrystalCap - Adjust_Xtal;
if(CrystalCap > 0x3f)
CrystalCap = 0x3f;
else if (CrystalCap < 0)
CrystalCap = 0;
odm_SetCrystalCap(pDM_Odm, (u1Byte)CrystalCap);
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Crystal cap = 0x%x, Default Crystal cap = 0x%x\n",
pCfoTrack->CrystalCap, pCfoTrack->DefXCap));
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES)
return;
//3 2. Dynamic ATC switch
if(CFO_ave < CFO_TH_ATC && CFO_ave > -CFO_TH_ATC)
{
odm_SetATCStatus(pDM_Odm, FALSE);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Disable ATC!!\n"));
}
else
{
odm_SetATCStatus(pDM_Odm, TRUE);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Enable ATC!!\n"));
}
#endif
}
}
VOID
ODM_ParsingCFO(
IN PVOID pDM_VOID,
IN PVOID pPktinfo_VOID,
IN s1Byte* pcfotail
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
PODM_PACKET_INFO_T pPktinfo = (PODM_PACKET_INFO_T)pPktinfo_VOID;
PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PHYDM_CFOTRACK);
u1Byte i;
if(!(pDM_Odm->SupportAbility & ODM_BB_CFO_TRACKING))
return;
#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
if(pPktinfo->bPacketMatchBSSID)
#else
if(pPktinfo->StationID != 0)
#endif
{
//3 Update CFO report for path-A & path-B
// Only paht-A and path-B have CFO tail and short CFO
for(i = ODM_RF_PATH_A; i <= ODM_RF_PATH_B; i++)
{
pCfoTrack->CFO_tail[i] = (int)pcfotail[i];
}
//3 Update packet counter
if(pCfoTrack->packetCount == 0xffffffff)
pCfoTrack->packetCount = 0;
else
pCfoTrack->packetCount++;
}
}

68
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_CfoTracking.h Executable file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __PHYDMCFOTRACK_H__
#define __PHYDMCFOTRACK_H__
#define CFO_TRACKING_VERSION "1.0"
#define CFO_TH_XTAL_HIGH 20 // kHz
#define CFO_TH_XTAL_LOW 10 // kHz
#define CFO_TH_ATC 80 // kHz
typedef struct _CFO_TRACKING_
{
BOOLEAN bATCStatus;
BOOLEAN largeCFOHit;
BOOLEAN bAdjust;
u1Byte CrystalCap;
u1Byte DefXCap;
int CFO_tail[2];
int CFO_ave_pre;
u4Byte packetCount;
u4Byte packetCount_pre;
BOOLEAN bForceXtalCap;
BOOLEAN bReset;
}CFO_TRACKING, *PCFO_TRACKING;
VOID
ODM_CfoTrackingReset(
IN PVOID pDM_VOID
);
VOID
ODM_CfoTrackingInit(
IN PVOID pDM_VOID
);
VOID
ODM_CfoTracking(
IN PVOID pDM_VOID
);
VOID
ODM_ParsingCFO(
IN PVOID pDM_VOID,
IN PVOID pPktinfo_VOID,
IN s1Byte* pcfotail
);
#endif

2023
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_DIG.c Executable file
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309
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_DIG.h Executable file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __PHYDMDIG_H__
#define __PHYDMDIG_H__
#define DIG_VERSION "1.1"
typedef struct _Dynamic_Initial_Gain_Threshold_
{
BOOLEAN bStopDIG; // for debug
BOOLEAN bPauseDIG;
BOOLEAN bIgnoreDIG;
BOOLEAN bPSDInProgress;
u1Byte Dig_Enable_Flag;
u1Byte Dig_Ext_Port_Stage;
int RssiLowThresh;
int RssiHighThresh;
u4Byte FALowThresh;
u4Byte FAHighThresh;
u1Byte CurSTAConnectState;
u1Byte PreSTAConnectState;
u1Byte CurMultiSTAConnectState;
u1Byte PreIGValue;
u1Byte CurIGValue;
u1Byte BackupIGValue; //MP DIG
u1Byte BT30_CurIGI;
u1Byte IGIBackup;
s1Byte BackoffVal;
s1Byte BackoffVal_range_max;
s1Byte BackoffVal_range_min;
u1Byte rx_gain_range_max;
u1Byte rx_gain_range_min;
u1Byte Rssi_val_min;
u1Byte PreCCK_CCAThres;
u1Byte CurCCK_CCAThres;
u1Byte PreCCKPDState;
u1Byte CurCCKPDState;
u1Byte CCKPDBackup;
u1Byte LargeFAHit;
u1Byte ForbiddenIGI;
u4Byte Recover_cnt;
u1Byte DIG_Dynamic_MIN_0;
u1Byte DIG_Dynamic_MIN_1;
BOOLEAN bMediaConnect_0;
BOOLEAN bMediaConnect_1;
u4Byte AntDiv_RSSI_max;
u4Byte RSSI_max;
u1Byte *pbP2pLinkInProgress;
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
BOOLEAN bTpTarget;
BOOLEAN bNoiseEst;
u4Byte TpTrainTH_min;
u1Byte IGIOffset_A;
u1Byte IGIOffset_B;
#endif
}DIG_T,*pDIG_T;
typedef struct _FALSE_ALARM_STATISTICS{
u4Byte Cnt_Parity_Fail;
u4Byte Cnt_Rate_Illegal;
u4Byte Cnt_Crc8_fail;
u4Byte Cnt_Mcs_fail;
u4Byte Cnt_Ofdm_fail;
u4Byte Cnt_Ofdm_fail_pre; //For RTL8881A
u4Byte Cnt_Cck_fail;
u4Byte Cnt_all;
u4Byte Cnt_Fast_Fsync;
u4Byte Cnt_SB_Search_fail;
u4Byte Cnt_OFDM_CCA;
u4Byte Cnt_CCK_CCA;
u4Byte Cnt_CCA_all;
u4Byte Cnt_BW_USC; //Gary
u4Byte Cnt_BW_LSC; //Gary
}FALSE_ALARM_STATISTICS, *PFALSE_ALARM_STATISTICS;
typedef enum tag_Dynamic_Init_Gain_Operation_Type_Definition
{
DIG_TYPE_THRESH_HIGH = 0,
DIG_TYPE_THRESH_LOW = 1,
DIG_TYPE_BACKOFF = 2,
DIG_TYPE_RX_GAIN_MIN = 3,
DIG_TYPE_RX_GAIN_MAX = 4,
DIG_TYPE_ENABLE = 5,
DIG_TYPE_DISABLE = 6,
DIG_OP_TYPE_MAX
}DM_DIG_OP_E;
typedef enum tag_ODM_PauseDIG_Type {
ODM_PAUSE_DIG = BIT0,
ODM_RESUME_DIG = BIT1
} ODM_Pause_DIG_TYPE;
typedef enum tag_ODM_PauseCCKPD_Type {
ODM_PAUSE_CCKPD = BIT0,
ODM_RESUME_CCKPD = BIT1
} ODM_Pause_CCKPD_TYPE;
/*
typedef enum tag_CCK_Packet_Detection_Threshold_Type_Definition
{
CCK_PD_STAGE_LowRssi = 0,
CCK_PD_STAGE_HighRssi = 1,
CCK_PD_STAGE_MAX = 3,
}DM_CCK_PDTH_E;
typedef enum tag_DIG_EXT_PORT_ALGO_Definition
{
DIG_EXT_PORT_STAGE_0 = 0,
DIG_EXT_PORT_STAGE_1 = 1,
DIG_EXT_PORT_STAGE_2 = 2,
DIG_EXT_PORT_STAGE_3 = 3,
DIG_EXT_PORT_STAGE_MAX = 4,
}DM_DIG_EXT_PORT_ALG_E;
typedef enum tag_DIG_Connect_Definition
{
DIG_STA_DISCONNECT = 0,
DIG_STA_CONNECT = 1,
DIG_STA_BEFORE_CONNECT = 2,
DIG_MultiSTA_DISCONNECT = 3,
DIG_MultiSTA_CONNECT = 4,
DIG_CONNECT_MAX
}DM_DIG_CONNECT_E;
#define DM_MultiSTA_InitGainChangeNotify(Event) {DM_DigTable.CurMultiSTAConnectState = Event;}
#define DM_MultiSTA_InitGainChangeNotify_CONNECT(_ADAPTER) \
DM_MultiSTA_InitGainChangeNotify(DIG_MultiSTA_CONNECT)
#define DM_MultiSTA_InitGainChangeNotify_DISCONNECT(_ADAPTER) \
DM_MultiSTA_InitGainChangeNotify(DIG_MultiSTA_DISCONNECT)
*/
#define DM_DIG_THRESH_HIGH 40
#define DM_DIG_THRESH_LOW 35
#define DM_FALSEALARM_THRESH_LOW 400
#define DM_FALSEALARM_THRESH_HIGH 1000
#define DM_DIG_MAX_NIC 0x3e
#define DM_DIG_MIN_NIC 0x1e //0x22//0x1c
#define DM_DIG_MAX_OF_MIN_NIC 0x3e
#define DM_DIG_MAX_AP 0x3e
#define DM_DIG_MIN_AP 0x1c
#define DM_DIG_MAX_OF_MIN 0x2A //0x32
#define DM_DIG_MIN_AP_DFS 0x20
#define DM_DIG_MAX_NIC_HP 0x46
#define DM_DIG_MIN_NIC_HP 0x2e
#define DM_DIG_MAX_AP_HP 0x42
#define DM_DIG_MIN_AP_HP 0x30
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#define DM_DIG_MAX_AP_COVERAGR 0x26
#define DM_DIG_MIN_AP_COVERAGE 0x1c
#define DM_DIG_MAX_OF_MIN_COVERAGE 0x22
#define DM_DIG_TP_Target_TH0 500
#define DM_DIG_TP_Target_TH1 1000
#define DM_DIG_TP_Training_Period 10
#endif
//vivi 92c&92d has different definition, 20110504
//this is for 92c
#if (DM_ODM_SUPPORT_TYPE & ODM_CE)
#ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV
#define DM_DIG_FA_TH0 0x80//0x20
#else
#define DM_DIG_FA_TH0 0x200//0x20
#endif
#else
#define DM_DIG_FA_TH0 0x200//0x20
#endif
#define DM_DIG_FA_TH1 0x300
#define DM_DIG_FA_TH2 0x400
//this is for 92d
#define DM_DIG_FA_TH0_92D 0x100
#define DM_DIG_FA_TH1_92D 0x400
#define DM_DIG_FA_TH2_92D 0x600
#define DM_DIG_BACKOFF_MAX 12
#define DM_DIG_BACKOFF_MIN -4
#define DM_DIG_BACKOFF_DEFAULT 10
#define DM_DIG_FA_TH0_LPS 4 //-> 4 in lps
#define DM_DIG_FA_TH1_LPS 15 //-> 15 lps
#define DM_DIG_FA_TH2_LPS 30 //-> 30 lps
#define RSSI_OFFSET_DIG 0x05
VOID
ODM_ChangeDynamicInitGainThresh(
IN PVOID pDM_VOID,
IN u4Byte DM_Type,
IN u4Byte DM_Value
);
VOID
ODM_Write_DIG(
IN PVOID pDM_VOID,
IN u1Byte CurrentIGI
);
VOID
odm_PauseDIG(
IN PVOID pDM_VOID,
IN ODM_Pause_DIG_TYPE PauseType,
IN u1Byte IGIValue
);
VOID
odm_DIGInit(
IN PVOID pDM_VOID
);
VOID
odm_DIG(
IN PVOID pDM_VOID
);
VOID
odm_DIGbyRSSI_LPS(
IN PVOID pDM_VOID
);
VOID
odm_FalseAlarmCounterStatistics(
IN PVOID pDM_VOID
);
VOID
odm_PauseCCKPacketDetection(
IN PVOID pDM_VOID,
IN ODM_Pause_CCKPD_TYPE PauseType,
IN u1Byte CCKPDThreshold
);
VOID
odm_CCKPacketDetectionThresh(
IN PVOID pDM_VOID
);
VOID
ODM_Write_CCK_CCA_Thres(
IN PVOID pDM_VOID,
IN u1Byte CurCCK_CCAThres
);
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
VOID
odm_MPT_DIGCallback(
PRT_TIMER pTimer
);
VOID
odm_MPT_DIGWorkItemCallback(
IN PVOID pContext
);
#endif
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
VOID
odm_MPT_DIGCallback(
IN PVOID pDM_VOID
);
#endif
#if (DM_ODM_SUPPORT_TYPE != ODM_CE)
VOID
ODM_MPT_DIG(
IN PVOID pDM_VOID
);
#endif
#endif

218
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_DynamicBBPowerSaving.c Executable file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
//============================================================
// include files
//============================================================
#include "Mp_Precomp.h"
#include "phydm_precomp.h"
VOID
odm_DynamicBBPowerSavingInit(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
pPS_T pDM_PSTable = &pDM_Odm->DM_PSTable;
pDM_PSTable->PreCCAState = CCA_MAX;
pDM_PSTable->CurCCAState = CCA_MAX;
pDM_PSTable->PreRFState = RF_MAX;
pDM_PSTable->CurRFState = RF_MAX;
pDM_PSTable->Rssi_val_min = 0;
pDM_PSTable->initialize = 0;
}
VOID
odm_DynamicBBPowerSaving(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
if (pDM_Odm->SupportICType != ODM_RTL8723A)
return;
if(!(pDM_Odm->SupportAbility & ODM_BB_PWR_SAVE))
return;
if(!(pDM_Odm->SupportPlatform & (ODM_WIN|ODM_CE)))
return;
//1 2.Power Saving for 92C
if((pDM_Odm->SupportICType == ODM_RTL8192C) &&(pDM_Odm->RFType == ODM_2T2R))
{
odm_1R_CCA(pDM_Odm);
}
// 20100628 Joseph: Turn off BB power save for 88CE because it makesthroughput unstable.
// 20100831 Joseph: Turn ON BB power save again after modifying AGC delay from 900ns ot 600ns.
//1 3.Power Saving for 88C
else
{
ODM_RF_Saving(pDM_Odm, FALSE);
}
#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
}
VOID
odm_1R_CCA(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
pPS_T pDM_PSTable = &pDM_Odm->DM_PSTable;
if(pDM_Odm->RSSI_Min!= 0xFF)
{
if(pDM_PSTable->PreCCAState == CCA_2R)
{
if(pDM_Odm->RSSI_Min >= 35)
pDM_PSTable->CurCCAState = CCA_1R;
else
pDM_PSTable->CurCCAState = CCA_2R;
}
else{
if(pDM_Odm->RSSI_Min <= 30)
pDM_PSTable->CurCCAState = CCA_2R;
else
pDM_PSTable->CurCCAState = CCA_1R;
}
}
else{
pDM_PSTable->CurCCAState=CCA_MAX;
}
if(pDM_PSTable->PreCCAState != pDM_PSTable->CurCCAState)
{
if(pDM_PSTable->CurCCAState == CCA_1R)
{
if( pDM_Odm->RFType ==ODM_2T2R )
{
ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x13);
//PHY_SetBBReg(pAdapter, 0xe70, bMaskByte3, 0x20);
}
else
{
ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x23);
//PHY_SetBBReg(pAdapter, 0xe70, 0x7fc00000, 0x10c); // Set RegE70[30:22] = 9b'100001100
}
}
else
{
ODM_SetBBReg(pDM_Odm, 0xc04 , bMaskByte0, 0x33);
//PHY_SetBBReg(pAdapter,0xe70, bMaskByte3, 0x63);
}
pDM_PSTable->PreCCAState = pDM_PSTable->CurCCAState;
}
}
void
ODM_RF_Saving(
IN PVOID pDM_VOID,
IN u1Byte bForceInNormal
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
#if (DM_ODM_SUPPORT_TYPE != ODM_AP)
pPS_T pDM_PSTable = &pDM_Odm->DM_PSTable;
u1Byte Rssi_Up_bound = 30 ;
u1Byte Rssi_Low_bound = 25;
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
if(pDM_Odm->PatchID == 40 ) //RT_CID_819x_FUNAI_TV
{
Rssi_Up_bound = 50 ;
Rssi_Low_bound = 45;
}
#endif
if(pDM_PSTable->initialize == 0){
pDM_PSTable->Reg874 = (ODM_GetBBReg(pDM_Odm, 0x874, bMaskDWord)&0x1CC000)>>14;
pDM_PSTable->RegC70 = (ODM_GetBBReg(pDM_Odm, 0xc70, bMaskDWord)&BIT3)>>3;
pDM_PSTable->Reg85C = (ODM_GetBBReg(pDM_Odm, 0x85c, bMaskDWord)&0xFF000000)>>24;
pDM_PSTable->RegA74 = (ODM_GetBBReg(pDM_Odm, 0xa74, bMaskDWord)&0xF000)>>12;
//Reg818 = PHY_QueryBBReg(pAdapter, 0x818, bMaskDWord);
pDM_PSTable->initialize = 1;
}
if(!bForceInNormal)
{
if(pDM_Odm->RSSI_Min != 0xFF)
{
if(pDM_PSTable->PreRFState == RF_Normal)
{
if(pDM_Odm->RSSI_Min >= Rssi_Up_bound)
pDM_PSTable->CurRFState = RF_Save;
else
pDM_PSTable->CurRFState = RF_Normal;
}
else{
if(pDM_Odm->RSSI_Min <= Rssi_Low_bound)
pDM_PSTable->CurRFState = RF_Normal;
else
pDM_PSTable->CurRFState = RF_Save;
}
}
else
pDM_PSTable->CurRFState=RF_MAX;
}
else
{
pDM_PSTable->CurRFState = RF_Normal;
}
if(pDM_PSTable->PreRFState != pDM_PSTable->CurRFState)
{
if(pDM_PSTable->CurRFState == RF_Save)
{
// <tynli_note> 8723 RSSI report will be wrong. Set 0x874[5]=1 when enter BB power saving mode.
// Suggested by SD3 Yu-Nan. 2011.01.20.
if(pDM_Odm->SupportICType == ODM_RTL8723A)
{
ODM_SetBBReg(pDM_Odm, 0x874 , BIT5, 0x1); //Reg874[5]=1b'1
}
ODM_SetBBReg(pDM_Odm, 0x874 , 0x1C0000, 0x2); //Reg874[20:18]=3'b010
ODM_SetBBReg(pDM_Odm, 0xc70, BIT3, 0); //RegC70[3]=1'b0
ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, 0x63); //Reg85C[31:24]=0x63
ODM_SetBBReg(pDM_Odm, 0x874, 0xC000, 0x2); //Reg874[15:14]=2'b10
ODM_SetBBReg(pDM_Odm, 0xa74, 0xF000, 0x3); //RegA75[7:4]=0x3
ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x0); //Reg818[28]=1'b0
ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x1); //Reg818[28]=1'b1
}
else
{
ODM_SetBBReg(pDM_Odm, 0x874 , 0x1CC000, pDM_PSTable->Reg874);
ODM_SetBBReg(pDM_Odm, 0xc70, BIT3, pDM_PSTable->RegC70);
ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, pDM_PSTable->Reg85C);
ODM_SetBBReg(pDM_Odm, 0xa74, 0xF000, pDM_PSTable->RegA74);
ODM_SetBBReg(pDM_Odm,0x818, BIT28, 0x0);
if(pDM_Odm->SupportICType == ODM_RTL8723A)
{
ODM_SetBBReg(pDM_Odm,0x874 , BIT5, 0x0); //Reg874[5]=1b'0
}
}
pDM_PSTable->PreRFState =pDM_PSTable->CurRFState;
}
#endif
}

63
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_DynamicBBPowerSaving.h Executable file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __PHYDMDYNAMICBBPOWERSAVING_H__
#define __PHYDMDYNAMICBBPOWERSAVING_H__
#define DYNAMIC_BBPWRSAV_VERSION "1.0"
typedef struct _Dynamic_Power_Saving_
{
u1Byte PreCCAState;
u1Byte CurCCAState;
u1Byte PreRFState;
u1Byte CurRFState;
int Rssi_val_min;
u1Byte initialize;
u4Byte Reg874,RegC70,Reg85C,RegA74;
}PS_T,*pPS_T;
#define dm_RF_Saving ODM_RF_Saving
void ODM_RF_Saving(
IN PVOID pDM_VOID,
IN u1Byte bForceInNormal
);
VOID
odm_DynamicBBPowerSavingInit(
IN PVOID pDM_VOID
);
VOID
odm_DynamicBBPowerSaving(
IN PVOID pDM_VOID
);
VOID
odm_1R_CCA(
IN PVOID pDM_VOID
);
#endif

882
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_DynamicTxPower.c Executable file
View File

@ -0,0 +1,882 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
//============================================================
// include files
//============================================================
#include "Mp_Precomp.h"
#include "phydm_precomp.h"
VOID
odm_DynamicTxPowerInit(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
PADAPTER Adapter = pDM_Odm->Adapter;
PMGNT_INFO pMgntInfo = &Adapter->MgntInfo;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
#if DEV_BUS_TYPE==RT_USB_INTERFACE
if(RT_GetInterfaceSelection(Adapter) == INTF_SEL1_USB_High_Power)
{
odm_DynamicTxPowerSavePowerIndex(pDM_Odm);
pMgntInfo->bDynamicTxPowerEnable = TRUE;
}
else
#else
//so 92c pci do not need dynamic tx power? vivi check it later
if(IS_HARDWARE_TYPE_8192D(Adapter))
pMgntInfo->bDynamicTxPowerEnable = TRUE;
else
pMgntInfo->bDynamicTxPowerEnable = FALSE;
#endif
pHalData->LastDTPLvl = TxHighPwrLevel_Normal;
pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
PADAPTER Adapter = pDM_Odm->Adapter;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
pdmpriv->bDynamicTxPowerEnable = _FALSE;
#if (RTL8192C_SUPPORT==1)
#ifdef CONFIG_USB_HCI
#ifdef CONFIG_INTEL_PROXIM
if((pHalData->BoardType == BOARD_USB_High_PA)||(Adapter->proximity.proxim_support==_TRUE))
#else
if(pHalData->BoardType == BOARD_USB_High_PA)
#endif
{
//odm_SavePowerIndex(Adapter);
odm_DynamicTxPowerSavePowerIndex(pDM_Odm);
pdmpriv->bDynamicTxPowerEnable = _TRUE;
}
else
#else
pdmpriv->bDynamicTxPowerEnable = _FALSE;
#endif
#endif
pdmpriv->LastDTPLvl = TxHighPwrLevel_Normal;
pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
#endif
}
VOID
odm_DynamicTxPowerSavePowerIndex(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN))
u1Byte index;
u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a};
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
PADAPTER Adapter = pDM_Odm->Adapter;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
for(index = 0; index< 6; index++)
pHalData->PowerIndex_backup[index] = PlatformEFIORead1Byte(Adapter, Power_Index_REG[index]);
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
PADAPTER Adapter = pDM_Odm->Adapter;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
for(index = 0; index< 6; index++)
pdmpriv->PowerIndex_backup[index] = rtw_read8(Adapter, Power_Index_REG[index]);
#endif
#endif
}
VOID
odm_DynamicTxPowerRestorePowerIndex(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN))
u1Byte index;
PADAPTER Adapter = pDM_Odm->Adapter;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a};
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
for(index = 0; index< 6; index++)
PlatformEFIOWrite1Byte(Adapter, Power_Index_REG[index], pHalData->PowerIndex_backup[index]);
#elif(DM_ODM_SUPPORT_TYPE == ODM_CE)
struct dm_priv *pdmpriv = &pHalData->dmpriv;
for(index = 0; index< 6; index++)
rtw_write8(Adapter, Power_Index_REG[index], pdmpriv->PowerIndex_backup[index]);
#endif
#endif
}
VOID
odm_DynamicTxPowerWritePowerIndex(
IN PVOID pDM_VOID,
IN u1Byte Value)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
u1Byte index;
u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a};
for(index = 0; index< 6; index++)
//PlatformEFIOWrite1Byte(Adapter, Power_Index_REG[index], Value);
ODM_Write1Byte(pDM_Odm, Power_Index_REG[index], Value);
}
VOID
odm_DynamicTxPower(
IN PVOID pDM_VOID
)
{
//
// For AP/ADSL use prtl8192cd_priv
// For CE/NIC use PADAPTER
//
//PADAPTER pAdapter = pDM_Odm->Adapter;
// prtl8192cd_priv priv = pDM_Odm->priv;
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
if (!(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_TXPWR))
return;
//
// 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate
// at the same time. In the stage2/3, we need to prive universal interface and merge all
// HW dynamic mechanism.
//
switch (pDM_Odm->SupportPlatform)
{
case ODM_WIN:
case ODM_CE:
odm_DynamicTxPowerNIC(pDM_Odm);
break;
case ODM_AP:
odm_DynamicTxPowerAP(pDM_Odm);
break;
case ODM_ADSL:
//odm_DIGAP(pDM_Odm);
break;
}
}
VOID
odm_DynamicTxPowerNIC(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
if (!(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_TXPWR))
return;
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
if(pDM_Odm->SupportICType == ODM_RTL8192C)
{
odm_DynamicTxPower_92C(pDM_Odm);
}
else if(pDM_Odm->SupportICType == ODM_RTL8192D)
{
odm_DynamicTxPower_92D(pDM_Odm);
}
else if (pDM_Odm->SupportICType == ODM_RTL8821)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
PADAPTER Adapter = pDM_Odm->Adapter;
PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(Adapter);
if (pMgntInfo->RegRspPwr == 1)
{
if(pDM_Odm->RSSI_Min > 60)
{
ODM_SetMACReg(pDM_Odm, ODM_REG_RESP_TX_11AC, BIT20|BIT19|BIT18, 1); // Resp TXAGC offset = -3dB
}
else if(pDM_Odm->RSSI_Min < 55)
{
ODM_SetMACReg(pDM_Odm, ODM_REG_RESP_TX_11AC, BIT20|BIT19|BIT18, 0); // Resp TXAGC offset = 0dB
}
}
#endif
}
#endif
}
VOID
odm_DynamicTxPowerAP(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
//#if ((RTL8192C_SUPPORT==1) || (RTL8192D_SUPPORT==1) || (RTL8188E_SUPPORT==1) || (RTL8812E_SUPPORT==1))
prtl8192cd_priv priv = pDM_Odm->priv;
s4Byte i;
s2Byte pwr_thd = TX_POWER_NEAR_FIELD_THRESH_AP;
if(!priv->pshare->rf_ft_var.tx_pwr_ctrl)
return;
#if ((RTL8812E_SUPPORT==1) || (RTL8881A_SUPPORT==1))
if (pDM_Odm->SupportICType & (ODM_RTL8812 | ODM_RTL8881A))
pwr_thd = TX_POWER_NEAR_FIELD_THRESH_8812;
#endif
#if defined(CONFIG_RTL_92D_SUPPORT) || defined(CONFIG_RTL_92C_SUPPORT)
if(CHIP_VER_92X_SERIES(priv))
{
#ifdef HIGH_POWER_EXT_PA
if(pDM_Odm->ExtPA)
tx_power_control(priv);
#endif
}
#endif
/*
* Check if station is near by to use lower tx power
*/
if ((priv->up_time % 3) == 0 ) {
int disable_pwr_ctrl = ((pDM_Odm->FalseAlmCnt.Cnt_all > 1000 ) || ((pDM_Odm->FalseAlmCnt.Cnt_all > 300 ) && ((RTL_R8(0xc50) & 0x7f) >= 0x32))) ? 1 : 0;
for(i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++){
PSTA_INFO_T pstat = pDM_Odm->pODM_StaInfo[i];
if(IS_STA_VALID(pstat) ) {
if(disable_pwr_ctrl)
pstat->hp_level = 0;
else if ((pstat->hp_level == 0) && (pstat->rssi > pwr_thd))
pstat->hp_level = 1;
else if ((pstat->hp_level == 1) && (pstat->rssi < (pwr_thd-8)))
pstat->hp_level = 0;
}
}
#if defined(CONFIG_WLAN_HAL_8192EE)
if (GET_CHIP_VER(priv) == VERSION_8192E) {
if( !disable_pwr_ctrl && (pDM_Odm->RSSI_Min != 0xff) ) {
if(pDM_Odm->RSSI_Min > pwr_thd)
RRSR_power_control_11n(priv, 1 );
else if(pDM_Odm->RSSI_Min < (pwr_thd-8))
RRSR_power_control_11n(priv, 0 );
} else {
RRSR_power_control_11n(priv, 0 );
}
}
#endif
}
//#endif
#endif
}
VOID
odm_DynamicTxPower_92C(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
PADAPTER Adapter = pDM_Odm->Adapter;
PMGNT_INFO pMgntInfo = &Adapter->MgntInfo;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
s4Byte UndecoratedSmoothedPWDB;
// 2012/01/12 MH According to Luke's suggestion, only high power will support the feature.
if (pDM_Odm->ExtPA == FALSE)
return;
// STA not connected and AP not connected
if((!pMgntInfo->bMediaConnect) &&
(pHalData->EntryMinUndecoratedSmoothedPWDB == 0))
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("Not connected to any \n"));
pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
//the LastDTPlvl should reset when disconnect,
//otherwise the tx power level wouldn't change when disconnect and connect again.
// Maddest 20091220.
pHalData->LastDTPLvl=TxHighPwrLevel_Normal;
return;
}
#if (INTEL_PROXIMITY_SUPPORT == 1)
// Intel set fixed tx power
if(pMgntInfo->IntelProximityModeInfo.PowerOutput > 0)
{
switch(pMgntInfo->IntelProximityModeInfo.PowerOutput){
case 1:
pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_100;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_100\n"));
break;
case 2:
pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_70;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_70\n"));
break;
case 3:
pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_50;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_50\n"));
break;
case 4:
pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_35;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_35\n"));
break;
case 5:
pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_15;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_15\n"));
break;
default:
pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_100;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_100\n"));
break;
}
}
else
#endif
{
if( (pMgntInfo->bDynamicTxPowerEnable != TRUE) ||
pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_HIGH_POWER)
{
pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
}
else
{
if(pMgntInfo->bMediaConnect) // Default port
{
if(ACTING_AS_AP(Adapter) || ACTING_AS_IBSS(Adapter))
{
UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB));
}
else
{
UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB));
}
}
else // associated entry pwdb
{
UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB));
}
if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2)
{
pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n"));
}
else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) &&
(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) )
{
pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n"));
}
else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5))
{
pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n"));
}
}
}
if( pHalData->DynamicTxHighPowerLvl != pHalData->LastDTPLvl )
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("PHY_SetTxPowerLevel8192C() Channel = %d \n" , pHalData->CurrentChannel));
PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel);
if( (pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Normal) &&
(pHalData->LastDTPLvl == TxHighPwrLevel_Level1 || pHalData->LastDTPLvl == TxHighPwrLevel_Level2)) //TxHighPwrLevel_Normal
odm_DynamicTxPowerRestorePowerIndex(pDM_Odm);
else if(pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
odm_DynamicTxPowerWritePowerIndex(pDM_Odm, 0x14);
else if(pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2)
odm_DynamicTxPowerWritePowerIndex(pDM_Odm, 0x10);
}
pHalData->LastDTPLvl = pHalData->DynamicTxHighPowerLvl;
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
#if (RTL8192C_SUPPORT==1)
PADAPTER Adapter = pDM_Odm->Adapter;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv);
struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
int UndecoratedSmoothedPWDB;
if(!pdmpriv->bDynamicTxPowerEnable)
return;
#ifdef CONFIG_INTEL_PROXIM
if(Adapter->proximity.proxim_on== _TRUE){
struct proximity_priv *prox_priv=Adapter->proximity.proximity_priv;
// Intel set fixed tx power
printk("\n %s Adapter->proximity.proxim_on=%d prox_priv->proxim_modeinfo->power_output=%d \n",__FUNCTION__,Adapter->proximity.proxim_on,prox_priv->proxim_modeinfo->power_output);
if(prox_priv!=NULL){
if(prox_priv->proxim_modeinfo->power_output> 0)
{
switch(prox_priv->proxim_modeinfo->power_output)
{
case 1:
pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_100;
printk("TxHighPwrLevel_100\n");
break;
case 2:
pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_70;
printk("TxHighPwrLevel_70\n");
break;
case 3:
pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_50;
printk("TxHighPwrLevel_50\n");
break;
case 4:
pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_35;
printk("TxHighPwrLevel_35\n");
break;
case 5:
pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_15;
printk("TxHighPwrLevel_15\n");
break;
default:
pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_100;
printk("TxHighPwrLevel_100\n");
break;
}
}
}
}
else
#endif
{
// STA not connected and AP not connected
if((check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE) &&
(pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0))
{
//ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("Not connected to any \n"));
pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
//the LastDTPlvl should reset when disconnect,
//otherwise the tx power level wouldn't change when disconnect and connect again.
// Maddest 20091220.
pdmpriv->LastDTPLvl=TxHighPwrLevel_Normal;
return;
}
if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) // Default port
{
#if 0
//todo: AP Mode
if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) ||
(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE))
{
UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB;
//ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB));
}
else
{
UndecoratedSmoothedPWDB = pdmpriv->UndecoratedSmoothedPWDB;
//ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB));
}
#else
UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB;
#endif
}
else // associated entry pwdb
{
UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB;
//ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB));
}
if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2)
{
pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2;
//ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n"));
}
else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) &&
(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) )
{
pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1;
//ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n"));
}
else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5))
{
pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
//ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n"));
}
}
if( (pdmpriv->DynamicTxHighPowerLvl != pdmpriv->LastDTPLvl) )
{
PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel);
if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Normal) // HP1 -> Normal or HP2 -> Normal
odm_DynamicTxPowerRestorePowerIndex(pDM_Odm);
else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
odm_DynamicTxPowerWritePowerIndex(pDM_Odm, 0x14);
else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2)
odm_DynamicTxPowerWritePowerIndex(pDM_Odm, 0x10);
}
pdmpriv->LastDTPLvl = pdmpriv->DynamicTxHighPowerLvl;
#endif
#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
}
VOID
odm_DynamicTxPower_92D(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
PADAPTER Adapter = pDM_Odm->Adapter;
PMGNT_INFO pMgntInfo = &Adapter->MgntInfo;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
s4Byte UndecoratedSmoothedPWDB;
PADAPTER BuddyAdapter = Adapter->BuddyAdapter;
BOOLEAN bGetValueFromBuddyAdapter = dm_DualMacGetParameterFromBuddyAdapter(Adapter);
u1Byte HighPowerLvlBackForMac0 = TxHighPwrLevel_Level1;
// 2012/01/12 MH According to Luke's suggestion, only high power will support the feature.
if (pDM_Odm->ExtPA == FALSE)
return;
// If dynamic high power is disabled.
if( (pMgntInfo->bDynamicTxPowerEnable != TRUE) ||
pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_HIGH_POWER)
{
pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
return;
}
// STA not connected and AP not connected
if((!pMgntInfo->bMediaConnect) &&
(pHalData->EntryMinUndecoratedSmoothedPWDB == 0))
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("Not connected to any \n"));
pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
//the LastDTPlvl should reset when disconnect,
//otherwise the tx power level wouldn't change when disconnect and connect again.
// Maddest 20091220.
pHalData->LastDTPLvl=TxHighPwrLevel_Normal;
return;
}
if(pMgntInfo->bMediaConnect) // Default port
{
if(ACTING_AS_AP(Adapter) || pMgntInfo->mIbss)
{
UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB));
}
else
{
UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB));
}
}
else // associated entry pwdb
{
UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB));
}
if(IS_HARDWARE_TYPE_8192D(Adapter) && GET_HAL_DATA(Adapter)->CurrentBandType == 1){
if(UndecoratedSmoothedPWDB >= 0x33)
{
pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level2 (TxPwr=0x0)\n"));
}
else if((UndecoratedSmoothedPWDB <0x33) &&
(UndecoratedSmoothedPWDB >= 0x2b) )
{
pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level1 (TxPwr=0x10)\n"));
}
else if(UndecoratedSmoothedPWDB < 0x2b)
{
pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Normal\n"));
}
}
else
{
if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2)
{
pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n"));
}
else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) &&
(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) )
{
pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n"));
}
else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5))
{
pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n"));
}
}
//sherry delete flag 20110517
if(bGetValueFromBuddyAdapter)
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() mac 0 for mac 1 \n"));
if(Adapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP)
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() change value \n"));
HighPowerLvlBackForMac0 = pHalData->DynamicTxHighPowerLvl;
pHalData->DynamicTxHighPowerLvl = Adapter->DualMacDMSPControl.CurTxHighLvlForAnotherMacOfDMSP;
PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel);
pHalData->DynamicTxHighPowerLvl = HighPowerLvlBackForMac0;
Adapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP = FALSE;
}
}
if( (pHalData->DynamicTxHighPowerLvl != pHalData->LastDTPLvl) )
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("PHY_SetTxPowerLevel8192S() Channel = %d \n" , pHalData->CurrentChannel));
if(Adapter->DualMacSmartConcurrent == TRUE)
{
if(BuddyAdapter == NULL)
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter == NULL case \n"));
if(!Adapter->bSlaveOfDMSP)
{
PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel);
}
}
else
{
if(pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY)
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter DMSP \n"));
if(Adapter->bSlaveOfDMSP)
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() bslave case \n"));
BuddyAdapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP = TRUE;
BuddyAdapter->DualMacDMSPControl.CurTxHighLvlForAnotherMacOfDMSP = pHalData->DynamicTxHighPowerLvl;
}
else
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() master case \n"));
if(!bGetValueFromBuddyAdapter)
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() mac 0 for mac 0 \n"));
PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel);
}
}
}
else
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter DMDP\n"));
PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel);
}
}
}
else
{
PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel);
}
}
pHalData->LastDTPLvl = pHalData->DynamicTxHighPowerLvl;
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
#if (RTL8192D_SUPPORT==1)
PADAPTER Adapter = pDM_Odm->Adapter;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
DM_ODM_T *podmpriv = &pHalData->odmpriv;
int UndecoratedSmoothedPWDB;
#if (RTL8192D_EASY_SMART_CONCURRENT == 1)
PADAPTER BuddyAdapter = Adapter->BuddyAdapter;
BOOLEAN bGetValueFromBuddyAdapter = DualMacGetParameterFromBuddyAdapter(Adapter);
u8 HighPowerLvlBackForMac0 = TxHighPwrLevel_Level1;
#endif
// If dynamic high power is disabled.
if( (pdmpriv->bDynamicTxPowerEnable != _TRUE) ||
(!(podmpriv->SupportAbility& ODM_BB_DYNAMIC_TXPWR)) )
{
pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
return;
}
// STA not connected and AP not connected
if((check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE) &&
(pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0))
{
//ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("Not connected to any \n"));
pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
//the LastDTPlvl should reset when disconnect,
//otherwise the tx power level wouldn't change when disconnect and connect again.
// Maddest 20091220.
pdmpriv->LastDTPLvl=TxHighPwrLevel_Normal;
return;
}
if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) // Default port
{
#if 0
//todo: AP Mode
if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) ||
(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE))
{
UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB;
//ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB));
}
else
{
UndecoratedSmoothedPWDB = pdmpriv->UndecoratedSmoothedPWDB;
//ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB));
}
#else
UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB;
#endif
}
else // associated entry pwdb
{
UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB;
//ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB));
}
#if TX_POWER_FOR_5G_BAND == 1
if(pHalData->CurrentBandType92D == BAND_ON_5G){
if(UndecoratedSmoothedPWDB >= 0x33)
{
pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2;
//ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level2 (TxPwr=0x0)\n"));
}
else if((UndecoratedSmoothedPWDB <0x33) &&
(UndecoratedSmoothedPWDB >= 0x2b) )
{
pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1;
//ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Level1 (TxPwr=0x10)\n"));
}
else if(UndecoratedSmoothedPWDB < 0x2b)
{
pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
//ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("5G:TxHighPwrLevel_Normal\n"));
}
}
else
#endif
{
if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2)
{
pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2;
//ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n"));
}
else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) &&
(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) )
{
pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1;
//ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n"));
}
else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5))
{
pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
//ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n"));
}
}
#if (RTL8192D_EASY_SMART_CONCURRENT == 1)
if(bGetValueFromBuddyAdapter)
{
//ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() mac 0 for mac 1 \n"));
if(Adapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP)
{
//ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() change value \n"));
HighPowerLvlBackForMac0 = pHalData->DynamicTxHighPowerLvl;
pHalData->DynamicTxHighPowerLvl = Adapter->DualMacDMSPControl.CurTxHighLvlForAnotherMacOfDMSP;
PHY_SetTxPowerLevel8192D(Adapter, pHalData->CurrentChannel);
pHalData->DynamicTxHighPowerLvl = HighPowerLvlBackForMac0;
Adapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP = _FALSE;
}
}
#endif
if( (pdmpriv->DynamicTxHighPowerLvl != pdmpriv->LastDTPLvl) )
{
//ODM_RT_TRACE(pDM_Odm,COMP_HIPWR, DBG_LOUD, ("PHY_SetTxPowerLevel8192S() Channel = %d \n" , pHalData->CurrentChannel));
#if (RTL8192D_EASY_SMART_CONCURRENT == 1)
if(BuddyAdapter == NULL)
{
//ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter == NULL case \n"));
if(!Adapter->bSlaveOfDMSP)
{
PHY_SetTxPowerLevel8192D(Adapter, pHalData->CurrentChannel);
}
}
else
{
if(pHalData->MacPhyMode92D == DUALMAC_SINGLEPHY)
{
//ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter DMSP \n"));
if(Adapter->bSlaveOfDMSP)
{
//ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() bslave case \n"));
BuddyAdapter->DualMacDMSPControl.bChangeTxHighPowerLvlForAnotherMacOfDMSP = _TRUE;
BuddyAdapter->DualMacDMSPControl.CurTxHighLvlForAnotherMacOfDMSP = pHalData->DynamicTxHighPowerLvl;
}
else
{
//ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() master case \n"));
if(!bGetValueFromBuddyAdapter)
{
//ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() mac 0 for mac 0 \n"));
PHY_SetTxPowerLevel8192D(Adapter, pHalData->CurrentChannel);
}
}
}
else
{
//ODM_RT_TRACE(pDM_Odm,COMP_MLME,DBG_LOUD,("dm_DynamicTxPower() BuddyAdapter DMDP\n"));
PHY_SetTxPowerLevel8192D(Adapter, pHalData->CurrentChannel);
}
}
#else
PHY_SetTxPowerLevel8192D(Adapter, pHalData->CurrentChannel);
#endif
}
pdmpriv->LastDTPLvl = pdmpriv->DynamicTxHighPowerLvl;
#endif
#endif // #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
}

89
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_DynamicTxPower.h Executable file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __PHYDMDYNAMICTXPOWER_H__
#define __PHYDMDYNAMICTXPOWER_H__
#define DYNAMIC_TXPWR_VERSION "1.0"
#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74
#define TX_POWER_NEAR_FIELD_THRESH_LVL1 67
#define TX_POWER_NEAR_FIELD_THRESH_AP 0x3F
#define TX_POWER_NEAR_FIELD_THRESH_8812 60
#define TxHighPwrLevel_Normal 0
#define TxHighPwrLevel_Level1 1
#define TxHighPwrLevel_Level2 2
#define TxHighPwrLevel_BT1 3
#define TxHighPwrLevel_BT2 4
#define TxHighPwrLevel_15 5
#define TxHighPwrLevel_35 6
#define TxHighPwrLevel_50 7
#define TxHighPwrLevel_70 8
#define TxHighPwrLevel_100 9
VOID
odm_DynamicTxPowerInit(
IN PVOID pDM_VOID
);
VOID
odm_DynamicTxPowerRestorePowerIndex(
IN PVOID pDM_VOID
);
VOID
odm_DynamicTxPowerNIC(
IN PVOID pDM_VOID
);
#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
VOID
odm_DynamicTxPowerSavePowerIndex(
IN PVOID pDM_VOID
);
VOID
odm_DynamicTxPowerWritePowerIndex(
IN PVOID pDM_VOID,
IN u1Byte Value);
VOID
odm_DynamicTxPower_92C(
IN PVOID pDM_VOID
);
VOID
odm_DynamicTxPower_92D(
IN PVOID pDM_VOID
);
#endif
VOID
odm_DynamicTxPower(
IN PVOID pDM_VOID
);
VOID
odm_DynamicTxPowerAP(
IN PVOID pDM_VOID
);
#endif

1915
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_EdcaTurboCheck.c Executable file
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152
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_EdcaTurboCheck.h Executable file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __PHYDMEDCATURBOCHECK_H__
#define __PHYDMEDCATURBOCHECK_H__
#define EDCATURBO_VERSION "1.0"
typedef struct _EDCA_TURBO_
{
BOOLEAN bCurrentTurboEDCA;
BOOLEAN bIsCurRDLState;
#if(DM_ODM_SUPPORT_TYPE == ODM_CE )
u4Byte prv_traffic_idx; // edca turbo
#endif
}EDCA_T,*pEDCA_T;
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
static u4Byte edca_setting_UL[HT_IOT_PEER_MAX] =
// UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MERU MARVELL 92U_AP SELF_AP(DownLink/Tx)
{ 0x5e4322, 0xa44f, 0x5e4322, 0x5ea32b, 0x5ea422, 0x5ea322, 0x3ea430, 0x5ea42b, 0x5ea44f, 0x5e4322, 0x5e4322};
static u4Byte edca_setting_DL[HT_IOT_PEER_MAX] =
// UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MERU, MARVELL 92U_AP SELF_AP(UpLink/Rx)
{ 0xa44f, 0x5ea44f, 0x5e4322, 0x5ea42b, 0xa44f, 0xa630, 0x5ea630, 0x5ea42b, 0xa44f, 0xa42b, 0xa42b};
static u4Byte edca_setting_DL_GMode[HT_IOT_PEER_MAX] =
// UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MERU, MARVELL 92U_AP SELF_AP
{ 0x4322, 0xa44f, 0x5e4322, 0xa42b, 0x5e4322, 0x4322, 0xa42b, 0x5ea42b, 0xa44f, 0x5e4322, 0x5ea42b};
//============================================================
// EDCA Paramter for AP/ADSL by Mingzhi 2011-11-22
//============================================================
#elif (DM_ODM_SUPPORT_TYPE &ODM_ADSL)
enum qos_prio { BK, BE, VI, VO, VI_AG, VO_AG };
static const struct ParaRecord rtl_ap_EDCA[] =
{
//ACM,AIFSN, ECWmin, ECWmax, TXOplimit
{0, 7, 4, 10, 0}, //BK
{0, 3, 4, 6, 0}, //BE
{0, 1, 3, 4, 188}, //VI
{0, 1, 2, 3, 102}, //VO
{0, 1, 3, 4, 94}, //VI_AG
{0, 1, 2, 3, 47}, //VO_AG
};
static const struct ParaRecord rtl_sta_EDCA[] =
{
//ACM,AIFSN, ECWmin, ECWmax, TXOplimit
{0, 7, 4, 10, 0},
{0, 3, 4, 10, 0},
{0, 2, 3, 4, 188},
{0, 2, 2, 3, 102},
{0, 2, 3, 4, 94},
{0, 2, 2, 3, 47},
};
#endif
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#ifdef WIFI_WMM
VOID
ODM_IotEdcaSwitch(
IN PVOID pDM_VOID,
IN unsigned char enable
);
#endif
BOOLEAN
ODM_ChooseIotMainSTA(
IN PVOID pDM_VOID,
IN PSTA_INFO_T pstat
);
#endif
VOID
odm_EdcaTurboCheck(
IN PVOID pDM_VOID
);
VOID
ODM_EdcaTurboInit(
IN PVOID pDM_VOID
);
#if(DM_ODM_SUPPORT_TYPE==ODM_WIN)
VOID
odm_EdcaTurboCheckMP(
IN PVOID pDM_VOID
);
//check if edca turbo is disabled
BOOLEAN
odm_IsEdcaTurboDisable(
IN PVOID pDM_VOID
);
//choose edca paramter for special IOT case
VOID
ODM_EdcaParaSelByIot(
IN PVOID pDM_VOID,
OUT u4Byte *EDCA_BE_UL,
OUT u4Byte *EDCA_BE_DL
);
//check if it is UL or DL
VOID
odm_EdcaChooseTrafficIdx(
IN PVOID pDM_VOID,
IN u8Byte cur_tx_bytes,
IN u8Byte cur_rx_bytes,
IN BOOLEAN bBiasOnRx,
OUT BOOLEAN *pbIsCurRDLState
);
#elif (DM_ODM_SUPPORT_TYPE==ODM_CE)
VOID
odm_EdcaTurboCheckCE(
IN PVOID pDM_VOID
);
#else
VOID
odm_IotEngine(
IN PVOID pDM_VOID
);
VOID
odm_EdcaParaInit(
IN PVOID pDM_VOID
);
#endif
#endif

2362
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_HWConfig.c Executable file
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237
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_HWConfig.h Executable file
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@ -0,0 +1,237 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __HALHWOUTSRC_H__
#define __HALHWOUTSRC_H__
/*--------------------------Define -------------------------------------------*/
//#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0)
#define AGC_DIFF_CONFIG_MP(ic, band) (ODM_ReadAndConfig_MP_##ic##_AGC_TAB_DIFF(pDM_Odm, Array_MP_##ic##_AGC_TAB_DIFF_##band, \
sizeof(Array_MP_##ic##_AGC_TAB_DIFF_##band)/sizeof(u4Byte)))
#define AGC_DIFF_CONFIG_TC(ic, band) (ODM_ReadAndConfig_TC_##ic##_AGC_TAB_DIFF(pDM_Odm, Array_TC_##ic##_AGC_TAB_DIFF_##band, \
sizeof(Array_TC_##ic##_AGC_TAB_DIFF_##band)/sizeof(u4Byte)))
#define AGC_DIFF_CONFIG(ic, band) do {\
if (pDM_Odm->bIsMPChip)\
AGC_DIFF_CONFIG_MP(ic,band);\
else\
AGC_DIFF_CONFIG_TC(ic,band);\
} while(0)
//============================================================
// structure and define
//============================================================
typedef struct _Phy_Rx_AGC_Info
{
#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
u1Byte gain:7,trsw:1;
#else
u1Byte trsw:1,gain:7;
#endif
} PHY_RX_AGC_INFO_T,*pPHY_RX_AGC_INFO_T;
typedef struct _Phy_Status_Rpt_8192cd
{
PHY_RX_AGC_INFO_T path_agc[2];
u1Byte ch_corr[2];
u1Byte cck_sig_qual_ofdm_pwdb_all;
u1Byte cck_agc_rpt_ofdm_cfosho_a;
u1Byte cck_rpt_b_ofdm_cfosho_b;
u1Byte rsvd_1;//ch_corr_msb;
u1Byte noise_power_db_msb;
s1Byte path_cfotail[2];
u1Byte pcts_mask[2];
s1Byte stream_rxevm[2];
u1Byte path_rxsnr[2];
u1Byte noise_power_db_lsb;
u1Byte rsvd_2[3];
u1Byte stream_csi[2];
u1Byte stream_target_csi[2];
s1Byte sig_evm;
u1Byte rsvd_3;
#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
u1Byte antsel_rx_keep_2:1; //ex_intf_flg:1;
u1Byte sgi_en:1;
u1Byte rxsc:2;
u1Byte idle_long:1;
u1Byte r_ant_train_en:1;
u1Byte ant_sel_b:1;
u1Byte ant_sel:1;
#else // _BIG_ENDIAN_
u1Byte ant_sel:1;
u1Byte ant_sel_b:1;
u1Byte r_ant_train_en:1;
u1Byte idle_long:1;
u1Byte rxsc:2;
u1Byte sgi_en:1;
u1Byte antsel_rx_keep_2:1; //ex_intf_flg:1;
#endif
} PHY_STATUS_RPT_8192CD_T,*PPHY_STATUS_RPT_8192CD_T;
typedef struct _Phy_Status_Rpt_8812
{
#if 0
PHY_RX_AGC_INFO_T path_agc[2];
u1Byte ch_num[2];
u1Byte cck_sig_qual_ofdm_pwdb_all;
u1Byte cck_agc_rpt_ofdm_cfosho_a;
u1Byte cck_bb_pwr_ofdm_cfosho_b;
u1Byte cck_rx_path; //CCK_RX_PATH [3:0] (with regA07[3:0] definition)
u1Byte rsvd_1;
u1Byte path_cfotail[2];
u1Byte pcts_mask[2];
s1Byte stream_rxevm[2];
u1Byte path_rxsnr[2];
u1Byte rsvd_2[2];
u1Byte stream_snr[2];
u1Byte stream_csi[2];
u1Byte rsvd_3[2];
s1Byte sig_evm;
u1Byte rsvd_4;
#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
u1Byte antidx_anta:3;
u1Byte antidx_antb:3;
u1Byte rsvd_5:2;
#else // _BIG_ENDIAN_
u1Byte rsvd_5:2;
u1Byte antidx_antb:3;
u1Byte antidx_anta:3;
#endif
#endif
//2012.05.24 LukeLee: This structure should take big/little endian in consideration later.....
//DWORD 0
u1Byte gain_trsw[2];
#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
u2Byte chl_num:10;
u2Byte sub_chnl:4;
u2Byte r_RFMOD:2;
#else // _BIG_ENDIAN_
u2Byte r_RFMOD:2;
u2Byte sub_chnl:4;
u2Byte chl_num:10;
#endif
//DWORD 1
u1Byte pwdb_all;
u1Byte cfosho[4]; // DW 1 byte 1 DW 2 byte 0
//DWORD 2
s1Byte cfotail[4]; // DW 2 byte 1 DW 3 byte 0
//DWORD 3
s1Byte rxevm[2]; // DW 3 byte 1 DW 3 byte 2
s1Byte rxsnr[2]; // DW 3 byte 3 DW 4 byte 0
//DWORD 4
u1Byte PCTS_MSK_RPT[2];
u1Byte pdsnr[2]; // DW 4 byte 3 DW 5 Byte 0
//DWORD 5
u1Byte csi_current[2];
u1Byte rx_gain_c;
//DWORD 6
u1Byte rx_gain_d;
s1Byte sigevm;
u1Byte resvd_0;
u1Byte antidx_anta:3;
u1Byte antidx_antb:3;
u1Byte resvd_1:2;
} PHY_STATUS_RPT_8812_T,*PPHY_STATUS_RPT_8812_T;
VOID
odm_Init_RSSIForDM(
IN OUT PDM_ODM_T pDM_Odm
);
VOID
ODM_PhyStatusQuery(
IN OUT PDM_ODM_T pDM_Odm,
OUT PODM_PHY_INFO_T pPhyInfo,
IN pu1Byte pPhyStatus,
IN PODM_PACKET_INFO_T pPktinfo
);
VOID
ODM_MacStatusQuery(
IN OUT PDM_ODM_T pDM_Odm,
IN pu1Byte pMacStatus,
IN u1Byte MacID,
IN BOOLEAN bPacketMatchBSSID,
IN BOOLEAN bPacketToSelf,
IN BOOLEAN bPacketBeacon
);
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE|ODM_AP))
HAL_STATUS
ODM_ConfigRFWithTxPwrTrackHeaderFile(
IN PDM_ODM_T pDM_Odm
);
HAL_STATUS
ODM_ConfigRFWithHeaderFile(
IN PDM_ODM_T pDM_Odm,
IN ODM_RF_Config_Type ConfigType,
IN ODM_RF_RADIO_PATH_E eRFPath
);
HAL_STATUS
ODM_ConfigBBWithHeaderFile(
IN PDM_ODM_T pDM_Odm,
IN ODM_BB_Config_Type ConfigType
);
HAL_STATUS
ODM_ConfigMACWithHeaderFile(
IN PDM_ODM_T pDM_Odm
);
HAL_STATUS
ODM_ConfigFWWithHeaderFile(
IN PDM_ODM_T pDM_Odm,
IN ODM_FW_Config_Type ConfigType,
OUT u1Byte *pFirmware,
OUT u4Byte *pSize
);
u4Byte
ODM_GetHWImgVersion(
IN PDM_ODM_T pDM_Odm
);
s4Byte
odm_SignalScaleMapping(
IN OUT PDM_ODM_T pDM_Odm,
IN s4Byte CurrSig
);
#endif
#endif

197
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_NoiseMonitor.c Executable file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
//============================================================
// include files
//============================================================
//#include "Mp_Precomp.h"
#include "phydm_precomp.h"
//=================================================
// This function is for inband noise test utility only
// To obtain the inband noise level(dbm), do the following.
// 1. disable DIG and Power Saving
// 2. Set initial gain = 0x1a
// 3. Stop updating idle time pwer report (for driver read)
// - 0x80c[25]
//
//=================================================
#define Valid_Min -35
#define Valid_Max 10
#define ValidCnt 5
s2Byte odm_InbandNoise_Monitor_NSeries(PDM_ODM_T pDM_Odm,u8 bPauseDIG,u8 IGIValue,u32 max_time)
{
u4Byte tmp4b;
u1Byte max_rf_path=0,rf_path;
u1Byte reg_c50, reg_c58,valid_done=0;
struct noise_level noise_data;
u32 start = 0, func_start=0, func_end = 0;
func_start = ODM_GetCurrentTime(pDM_Odm);
pDM_Odm->noise_level.noise_all = 0;
if((pDM_Odm->RFType == ODM_1T2R) ||(pDM_Odm->RFType == ODM_2T2R))
max_rf_path = 2;
else
max_rf_path = 1;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("odm_DebugControlInbandNoise_Nseries() ==> \n"));
ODM_Memory_Set(pDM_Odm,&noise_data,0,sizeof(struct noise_level));
//
// Step 1. Disable DIG && Set initial gain.
//
if(bPauseDIG)
{
odm_PauseDIG(pDM_Odm,ODM_PAUSE_DIG,IGIValue);
}
//
// Step 2. Disable all power save for read registers
//
//dcmd_DebugControlPowerSave(pAdapter, PSDisable);
//
// Step 3. Get noise power level
//
start = ODM_GetCurrentTime(pDM_Odm);
while(1)
{
//Stop updating idle time pwer report (for driver read)
ODM_SetBBReg(pDM_Odm, rFPGA0_TxGainStage, BIT25, 1);
//Read Noise Floor Report
tmp4b = ODM_GetBBReg(pDM_Odm, 0x8f8,bMaskDWord );
ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("Noise Floor Report (0x8f8) = 0x%08x\n", tmp4b));
//ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0, TestInitialGain);
//if(max_rf_path == 2)
// ODM_SetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0, TestInitialGain);
//update idle time pwer report per 5us
ODM_SetBBReg(pDM_Odm, rFPGA0_TxGainStage, BIT25, 0);
noise_data.value[ODM_RF_PATH_A] = (u1Byte)(tmp4b&0xff);
noise_data.value[ODM_RF_PATH_B] = (u1Byte)((tmp4b&0xff00)>>8);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("value_a = 0x%x(%d), value_b = 0x%x(%d)\n",
noise_data.value[ODM_RF_PATH_A], noise_data.value[ODM_RF_PATH_A], noise_data.value[ODM_RF_PATH_B], noise_data.value[ODM_RF_PATH_B]));
for(rf_path = ODM_RF_PATH_A; rf_path < max_rf_path; rf_path++)
{
noise_data.sval[rf_path] = (s1Byte)noise_data.value[rf_path];
noise_data.sval[rf_path] /= 2;
}
ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("sval_a = %d, sval_b = %d\n",
noise_data.sval[ODM_RF_PATH_A], noise_data.sval[ODM_RF_PATH_B]));
//ODM_delay_ms(10);
//ODM_sleep_ms(10);
for(rf_path = ODM_RF_PATH_A; rf_path < max_rf_path; rf_path++)
{
if( (noise_data.valid_cnt[rf_path] < ValidCnt) && (noise_data.sval[rf_path] < Valid_Max && noise_data.sval[rf_path] >= Valid_Min))
{
noise_data.valid_cnt[rf_path]++;
noise_data.sum[rf_path] += noise_data.sval[rf_path];
ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("RF_Path:%d Valid sval = %d\n", rf_path,noise_data.sval[rf_path]));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("Sum of sval = %d, \n", noise_data.sum[rf_path]));
if(noise_data.valid_cnt[rf_path] == ValidCnt)
{
valid_done++;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("After divided, RF_Path:%d ,sum = %d \n", rf_path,noise_data.sum[rf_path]));
}
}
}
//printk("####### valid_done:%d #############\n",valid_done);
if ((valid_done==max_rf_path) || (ODM_GetProgressingTime(pDM_Odm,start) > max_time))
{
for(rf_path = ODM_RF_PATH_A; rf_path < max_rf_path; rf_path++)
{
//printk("%s PATH_%d - sum = %d, valid_cnt = %d \n",__FUNCTION__,rf_path,noise_data.sum[rf_path], noise_data.valid_cnt[rf_path]);
if(noise_data.valid_cnt[rf_path])
noise_data.sum[rf_path] /= noise_data.valid_cnt[rf_path];
else
noise_data.sum[rf_path] = 0;
}
break;
}
}
reg_c50 = (s4Byte)ODM_GetBBReg(pDM_Odm,rOFDM0_XAAGCCore1,bMaskByte0);
reg_c50 &= ~BIT7;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("0x%x = 0x%02x(%d)\n", rOFDM0_XAAGCCore1, reg_c50, reg_c50));
pDM_Odm->noise_level.noise[ODM_RF_PATH_A] = -110 + reg_c50 + noise_data.sum[ODM_RF_PATH_A];
pDM_Odm->noise_level.noise_all += pDM_Odm->noise_level.noise[ODM_RF_PATH_A];
if(max_rf_path == 2){
reg_c58 = (s4Byte)ODM_GetBBReg(pDM_Odm,rOFDM0_XBAGCCore1,bMaskByte0);
reg_c58 &= ~BIT7;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("0x%x = 0x%02x(%d)\n", rOFDM0_XBAGCCore1, reg_c58, reg_c58));
pDM_Odm->noise_level.noise[ODM_RF_PATH_B] = -110 + reg_c58 + noise_data.sum[ODM_RF_PATH_B];
pDM_Odm->noise_level.noise_all += pDM_Odm->noise_level.noise[ODM_RF_PATH_B];
}
pDM_Odm->noise_level.noise_all /= max_rf_path;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("noise_a = %d, noise_b = %d\n",
pDM_Odm->noise_level.noise[ODM_RF_PATH_A],
pDM_Odm->noise_level.noise[ODM_RF_PATH_B]));
//
// Step 4. Recover the Dig
//
if(bPauseDIG)
{
odm_PauseDIG(pDM_Odm,ODM_RESUME_DIG,IGIValue);
}
func_end = ODM_GetProgressingTime(pDM_Odm,func_start) ;
//printk("%s noise_a = %d, noise_b = %d noise_all:%d (%d ms)\n",__FUNCTION__,
// pDM_Odm->noise_level.noise[ODM_RF_PATH_A],
// pDM_Odm->noise_level.noise[ODM_RF_PATH_B],
// pDM_Odm->noise_level.noise_all,func_end);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,("odm_DebugControlInbandNoise_Nseries() <== \n"));
return pDM_Odm->noise_level.noise_all;
}
s2Byte ODM_InbandNoise_Monitor(PVOID pDM_VOID,u8 bPauseDIG,u8 IGIValue,u32 max_time)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES )
{
//odm_InbandNoise_Monitor_JaguarSeries(pDM_Odm,bPauseDIG,IGIValue,max_time);
return 0;
}
else
{
return odm_InbandNoise_Monitor_NSeries(pDM_VOID,bPauseDIG,IGIValue,max_time);
}
}

49
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_NoiseMonitor.h Executable file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
*****************************************************************************/
#ifndef __ODMNOISEMONITOR_H__
#define __ODMNOISEMONITOR_H__
#define ODM_MAX_CHANNEL_NUM 38//14+24
struct noise_level
{
//u1Byte value_a, value_b;
u1Byte value[MAX_RF_PATH];
//s1Byte sval_a, sval_b;
s1Byte sval[MAX_RF_PATH];
//s4Byte noise_a=0, noise_b=0,sum_a=0, sum_b=0;
//s4Byte noise[ODM_RF_PATH_MAX];
s4Byte sum[MAX_RF_PATH];
//u1Byte valid_cnt_a=0, valid_cnt_b=0,
u1Byte valid[MAX_RF_PATH];
u1Byte valid_cnt[MAX_RF_PATH];
};
typedef struct _ODM_NOISE_MONITOR_
{
s1Byte noise[MAX_RF_PATH];
s2Byte noise_all;
}ODM_NOISE_MONITOR;
s2Byte ODM_InbandNoise_Monitor(PVOID pDM_VOID,u8 bPauseDIG,u8 IGIValue,u32 max_time);
#endif

1585
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_PathDiv.c Executable file
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193
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_PathDiv.h Executable file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __PHYDMPATHDIV_H__
#define __PHYDMPATHDIV_H__
#define PATHDIV_VERSION "1.0"
VOID
odm_PathDiversityInit(
IN PVOID pDM_VOID
);
VOID
odm_PathDiversity(
IN PVOID pDM_VOID
);
#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN))
//#define PATHDIV_ENABLE 1
#define dm_PathDiv_RSSI_Check ODM_PathDivChkPerPktRssi
#define PathDivCheckBeforeLink8192C ODM_PathDiversityBeforeLink92C
typedef struct _PathDiv_Parameter_define_
{
u4Byte org_5g_RegE30;
u4Byte org_5g_RegC14;
u4Byte org_5g_RegCA0;
u4Byte swt_5g_RegE30;
u4Byte swt_5g_RegC14;
u4Byte swt_5g_RegCA0;
//for 2G IQK information
u4Byte org_2g_RegC80;
u4Byte org_2g_RegC4C;
u4Byte org_2g_RegC94;
u4Byte org_2g_RegC14;
u4Byte org_2g_RegCA0;
u4Byte swt_2g_RegC80;
u4Byte swt_2g_RegC4C;
u4Byte swt_2g_RegC94;
u4Byte swt_2g_RegC14;
u4Byte swt_2g_RegCA0;
}PATHDIV_PARA,*pPATHDIV_PARA;
VOID
odm_PathDiversityInit_92C(
IN PADAPTER Adapter
);
VOID
odm_2TPathDiversityInit_92C(
IN PADAPTER Adapter
);
VOID
odm_1TPathDiversityInit_92C(
IN PADAPTER Adapter
);
BOOLEAN
odm_IsConnected_92C(
IN PADAPTER Adapter
);
BOOLEAN
ODM_PathDiversityBeforeLink92C(
//IN PADAPTER Adapter
IN PDM_ODM_T pDM_Odm
);
VOID
odm_PathDiversityAfterLink_92C(
IN PADAPTER Adapter
);
VOID
odm_SetRespPath_92C(
IN PADAPTER Adapter,
IN u1Byte DefaultRespPath
);
VOID
odm_OFDMTXPathDiversity_92C(
IN PADAPTER Adapter
);
VOID
odm_CCKTXPathDiversity_92C(
IN PADAPTER Adapter
);
VOID
odm_ResetPathDiversity_92C(
IN PADAPTER Adapter
);
VOID
odm_CCKTXPathDiversityCallback(
PRT_TIMER pTimer
);
VOID
odm_CCKTXPathDiversityWorkItemCallback(
IN PVOID pContext
);
VOID
odm_PathDivChkAntSwitchCallback(
PRT_TIMER pTimer
);
VOID
odm_PathDivChkAntSwitchWorkitemCallback(
IN PVOID pContext
);
VOID
odm_PathDivChkAntSwitch(
PDM_ODM_T pDM_Odm
);
VOID
ODM_CCKPathDiversityChkPerPktRssi(
PADAPTER Adapter,
BOOLEAN bIsDefPort,
BOOLEAN bMatchBSSID,
PRT_WLAN_STA pEntry,
PRT_RFD pRfd,
pu1Byte pDesc
);
VOID
ODM_PathDivChkPerPktRssi(
PADAPTER Adapter,
BOOLEAN bIsDefPort,
BOOLEAN bMatchBSSID,
PRT_WLAN_STA pEntry,
PRT_RFD pRfd
);
VOID
ODM_PathDivRestAfterLink(
IN PDM_ODM_T pDM_Odm
);
VOID
ODM_FillTXPathInTXDESC(
IN PADAPTER Adapter,
IN PRT_TCB pTcb,
IN pu1Byte pDesc
);
VOID
odm_PathDivInit_92D(
IN PDM_ODM_T pDM_Odm
);
u1Byte
odm_SwAntDivSelectScanChnl(
IN PADAPTER Adapter
);
VOID
odm_SwAntDivConstructScanChnl(
IN PADAPTER Adapter,
IN u1Byte ScanChnl
);
#endif //#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN))
#endif //#ifndef __ODMPATHDIV_H__

687
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_PowerTracking.c Executable file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
//============================================================
// include files
//============================================================
#include "Mp_Precomp.h"
#include "phydm_precomp.h"
//============================================================
// Global var
//============================================================
u4Byte OFDMSwingTable[OFDM_TABLE_SIZE] = {
0x7f8001fe, // 0, +6.0dB
0x788001e2, // 1, +5.5dB
0x71c001c7, // 2, +5.0dB
0x6b8001ae, // 3, +4.5dB
0x65400195, // 4, +4.0dB
0x5fc0017f, // 5, +3.5dB
0x5a400169, // 6, +3.0dB
0x55400155, // 7, +2.5dB
0x50800142, // 8, +2.0dB
0x4c000130, // 9, +1.5dB
0x47c0011f, // 10, +1.0dB
0x43c0010f, // 11, +0.5dB
0x40000100, // 12, +0dB
0x3c8000f2, // 13, -0.5dB
0x390000e4, // 14, -1.0dB
0x35c000d7, // 15, -1.5dB
0x32c000cb, // 16, -2.0dB
0x300000c0, // 17, -2.5dB
0x2d4000b5, // 18, -3.0dB
0x2ac000ab, // 19, -3.5dB
0x288000a2, // 20, -4.0dB
0x26000098, // 21, -4.5dB
0x24000090, // 22, -5.0dB
0x22000088, // 23, -5.5dB
0x20000080, // 24, -6.0dB
0x1e400079, // 25, -6.5dB
0x1c800072, // 26, -7.0dB
0x1b00006c, // 27. -7.5dB
0x19800066, // 28, -8.0dB
0x18000060, // 29, -8.5dB
0x16c0005b, // 30, -9.0dB
0x15800056, // 31, -9.5dB
0x14400051, // 32, -10.0dB
0x1300004c, // 33, -10.5dB
0x12000048, // 34, -11.0dB
0x11000044, // 35, -11.5dB
0x10000040, // 36, -12.0dB
};
u1Byte CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = {
{0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, // 0, +0dB
{0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, // 1, -0.5dB
{0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, // 2, -1.0dB
{0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, // 3, -1.5dB
{0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, // 4, -2.0dB
{0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, // 5, -2.5dB
{0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, // 6, -3.0dB
{0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, // 7, -3.5dB
{0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, // 8, -4.0dB
{0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, // 9, -4.5dB
{0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, // 10, -5.0dB
{0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, // 11, -5.5dB
{0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, // 12, -6.0dB <== default
{0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, // 13, -6.5dB
{0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, // 14, -7.0dB
{0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, // 15, -7.5dB
{0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, // 16, -8.0dB
{0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, // 17, -8.5dB
{0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, // 18, -9.0dB
{0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 19, -9.5dB
{0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 20, -10.0dB
{0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 21, -10.5dB
{0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 22, -11.0dB
{0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, // 23, -11.5dB
{0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, // 24, -12.0dB
{0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, // 25, -12.5dB
{0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, // 26, -13.0dB
{0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, // 27, -13.5dB
{0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, // 28, -14.0dB
{0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, // 29, -14.5dB
{0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, // 30, -15.0dB
{0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, // 31, -15.5dB
{0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} // 32, -16.0dB
};
u1Byte CCKSwingTable_Ch14[CCK_TABLE_SIZE][8] = {
{0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, // 0, +0dB
{0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, // 1, -0.5dB
{0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, // 2, -1.0dB
{0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, // 3, -1.5dB
{0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, // 4, -2.0dB
{0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, // 5, -2.5dB
{0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, // 6, -3.0dB
{0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, // 7, -3.5dB
{0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, // 8, -4.0dB
{0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, // 9, -4.5dB
{0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, // 10, -5.0dB
{0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 11, -5.5dB
{0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 12, -6.0dB <== default
{0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, // 13, -6.5dB
{0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, // 14, -7.0dB
{0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 15, -7.5dB
{0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 16, -8.0dB
{0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 17, -8.5dB
{0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 18, -9.0dB
{0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 19, -9.5dB
{0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 20, -10.0dB
{0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, // 21, -10.5dB
{0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, // 22, -11.0dB
{0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 23, -11.5dB
{0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 24, -12.0dB
{0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, // 25, -12.5dB
{0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 26, -13.0dB
{0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 27, -13.5dB
{0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 28, -14.0dB
{0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 29, -14.5dB
{0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 30, -15.0dB
{0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 31, -15.5dB
{0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} // 32, -16.0dB
};
u4Byte OFDMSwingTable_New[OFDM_TABLE_SIZE] = {
0x0b40002d, // 0, -15.0dB
0x0c000030, // 1, -14.5dB
0x0cc00033, // 2, -14.0dB
0x0d800036, // 3, -13.5dB
0x0e400039, // 4, -13.0dB
0x0f00003c, // 5, -12.5dB
0x10000040, // 6, -12.0dB
0x11000044, // 7, -11.5dB
0x12000048, // 8, -11.0dB
0x1300004c, // 9, -10.5dB
0x14400051, // 10, -10.0dB
0x15800056, // 11, -9.5dB
0x16c0005b, // 12, -9.0dB
0x18000060, // 13, -8.5dB
0x19800066, // 14, -8.0dB
0x1b00006c, // 15, -7.5dB
0x1c800072, // 16, -7.0dB
0x1e400079, // 17, -6.5dB
0x20000080, // 18, -6.0dB
0x22000088, // 19, -5.5dB
0x24000090, // 20, -5.0dB
0x26000098, // 21, -4.5dB
0x288000a2, // 22, -4.0dB
0x2ac000ab, // 23, -3.5dB
0x2d4000b5, // 24, -3.0dB
0x300000c0, // 25, -2.5dB
0x32c000cb, // 26, -2.0dB
0x35c000d7, // 27, -1.5dB
0x390000e4, // 28, -1.0dB
0x3c8000f2, // 29, -0.5dB
0x40000100, // 30, +0dB
0x43c0010f, // 31, +0.5dB
0x47c0011f, // 32, +1.0dB
0x4c000130, // 33, +1.5dB
0x50800142, // 34, +2.0dB
0x55400155, // 35, +2.5dB
0x5a400169, // 36, +3.0dB
0x5fc0017f, // 37, +3.5dB
0x65400195, // 38, +4.0dB
0x6b8001ae, // 39, +4.5dB
0x71c001c7, // 40, +5.0dB
0x788001e2, // 41, +5.5dB
0x7f8001fe // 42, +6.0dB
};
u1Byte CCKSwingTable_Ch1_Ch13_New[CCK_TABLE_SIZE][8] = {
{0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}, // 0, -16.0dB
{0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, // 1, -15.5dB
{0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, // 2, -15.0dB
{0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, // 3, -14.5dB
{0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, // 4, -14.0dB
{0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, // 5, -13.5dB
{0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, // 6, -13.0dB
{0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, // 7, -12.5dB
{0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, // 8, -12.0dB
{0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, // 9, -11.5dB
{0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 10, -11.0dB
{0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 11, -10.5dB
{0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 12, -10.0dB
{0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 13, -9.5dB
{0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, // 14, -9.0dB
{0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, // 15, -8.5dB
{0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, // 16, -8.0dB
{0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, // 17, -7.5dB
{0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, // 18, -7.0dB
{0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, // 19, -6.5dB
{0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, // 20, -6.0dB
{0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, // 21, -5.5dB
{0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, // 22, -5.0dB
{0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, // 23, -4.5dB
{0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, // 24, -4.0dB
{0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, // 25, -3.5dB
{0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, // 26, -3.0dB
{0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, // 27, -2.5dB
{0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, // 28, -2.0dB
{0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, // 29, -1.5dB
{0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, // 30, -1.0dB
{0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, // 31, -0.5dB
{0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04} // 32, +0dB
};
u1Byte CCKSwingTable_Ch14_New[CCK_TABLE_SIZE][8]= {
{0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}, // 0, -16.0dB
{0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 1, -15.5dB
{0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 2, -15.0dB
{0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 3, -14.5dB
{0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 4, -14.0dB
{0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 5, -13.5dB
{0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 6, -13.0dB
{0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, // 7, -12.5dB
{0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 8, -12.0dB
{0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 9, -11.5dB
{0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, // 10, -11.0dB
{0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, // 11, -10.5dB
{0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 12, -10.0dB
{0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 13, -9.5dB
{0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 14, -9.0dB
{0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 15, -8.5dB
{0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 16, -8.0dB
{0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 17, -7.5dB
{0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, // 18, -7.0dB
{0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, // 19, -6.5dB
{0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 20, -6.0dB
{0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 21, -5.5dB
{0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, // 22, -5.0dB
{0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, // 23, -4.5dB
{0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, // 24, -4.0dB
{0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, // 25, -3.5dB
{0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, // 26, -3.0dB
{0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, // 27, -2.5dB
{0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, // 28, -2.0dB
{0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, // 29, -1.5dB
{0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, // 30, -1.0dB
{0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, // 31, -0.5dB
{0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00} // 32, +0dB
};
u4Byte TxScalingTable_Jaguar[TXSCALE_TABLE_SIZE] =
{
0x081, // 0, -12.0dB
0x088, // 1, -11.5dB
0x090, // 2, -11.0dB
0x099, // 3, -10.5dB
0x0A2, // 4, -10.0dB
0x0AC, // 5, -9.5dB
0x0B6, // 6, -9.0dB
0x0C0, // 7, -8.5dB
0x0CC, // 8, -8.0dB
0x0D8, // 9, -7.5dB
0x0E5, // 10, -7.0dB
0x0F2, // 11, -6.5dB
0x101, // 12, -6.0dB
0x110, // 13, -5.5dB
0x120, // 14, -5.0dB
0x131, // 15, -4.5dB
0x143, // 16, -4.0dB
0x156, // 17, -3.5dB
0x16A, // 18, -3.0dB
0x180, // 19, -2.5dB
0x197, // 20, -2.0dB
0x1AF, // 21, -1.5dB
0x1C8, // 22, -1.0dB
0x1E3, // 23, -0.5dB
0x200, // 24, +0 dB
0x21E, // 25, +0.5dB
0x23E, // 26, +1.0dB
0x261, // 27, +1.5dB
0x285, // 28, +2.0dB
0x2AB, // 29, +2.5dB
0x2D3, // 30, +3.0dB
0x2FE, // 31, +3.5dB
0x32B, // 32, +4.0dB
0x35C, // 33, +4.5dB
0x38E, // 34, +5.0dB
0x3C4, // 35, +5.5dB
0x3FE // 36, +6.0dB
};
#ifdef AP_BUILD_WORKAROUND
unsigned int TxPwrTrk_OFDM_SwingTbl[TxPwrTrk_OFDM_SwingTbl_Len] = {
/* +6.0dB */ 0x7f8001fe,
/* +5.5dB */ 0x788001e2,
/* +5.0dB */ 0x71c001c7,
/* +4.5dB */ 0x6b8001ae,
/* +4.0dB */ 0x65400195,
/* +3.5dB */ 0x5fc0017f,
/* +3.0dB */ 0x5a400169,
/* +2.5dB */ 0x55400155,
/* +2.0dB */ 0x50800142,
/* +1.5dB */ 0x4c000130,
/* +1.0dB */ 0x47c0011f,
/* +0.5dB */ 0x43c0010f,
/* 0.0dB */ 0x40000100,
/* -0.5dB */ 0x3c8000f2,
/* -1.0dB */ 0x390000e4,
/* -1.5dB */ 0x35c000d7,
/* -2.0dB */ 0x32c000cb,
/* -2.5dB */ 0x300000c0,
/* -3.0dB */ 0x2d4000b5,
/* -3.5dB */ 0x2ac000ab,
/* -4.0dB */ 0x288000a2,
/* -4.5dB */ 0x26000098,
/* -5.0dB */ 0x24000090,
/* -5.5dB */ 0x22000088,
/* -6.0dB */ 0x20000080,
/* -6.5dB */ 0x1a00006c,
/* -7.0dB */ 0x1c800072,
/* -7.5dB */ 0x18000060,
/* -8.0dB */ 0x19800066,
/* -8.5dB */ 0x15800056,
/* -9.0dB */ 0x26c0005b,
/* -9.5dB */ 0x14400051,
/* -10.0dB */ 0x24400051,
/* -10.5dB */ 0x1300004c,
/* -11.0dB */ 0x12000048,
/* -11.5dB */ 0x11000044,
/* -12.0dB */ 0x10000040
};
#endif
VOID
odm_TXPowerTrackingInit(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
if(!(pDM_Odm->SupportICType & (ODM_RTL8814A|ODM_IC_11N_SERIES)))
return;
#endif
odm_TXPowerTrackingThermalMeterInit(pDM_Odm);
}
u1Byte
getSwingIndex(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
PADAPTER Adapter = pDM_Odm->Adapter;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
u1Byte i = 0;
u4Byte bbSwing;
u4Byte swingTableSize;
pu4Byte pSwingTable;
if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8723B ||
pDM_Odm->SupportICType == ODM_RTL8192E)
{
bbSwing = PHY_QueryBBReg(Adapter, rOFDM0_XATxIQImbalance, 0xFFC00000);
pSwingTable = OFDMSwingTable_New;
swingTableSize = OFDM_TABLE_SIZE;
} else {
#if ((RTL8812A_SUPPORT==1)||(RTL8821A_SUPPORT==1))
if (pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8821)
{
bbSwing = PHY_GetTxBBSwing_8812A(Adapter, pHalData->CurrentBandType, ODM_RF_PATH_A);
pSwingTable = TxScalingTable_Jaguar;
swingTableSize = TXSCALE_TABLE_SIZE;
}
else
#endif
{
bbSwing = 0;
pSwingTable = OFDMSwingTable;
swingTableSize = OFDM_TABLE_SIZE;
}
}
for (i = 0; i < swingTableSize; ++i) {
u4Byte tableValue = pSwingTable[i];
if (tableValue >= 0x100000 )
tableValue >>= 22;
if (bbSwing == tableValue)
break;
}
return i;
}
VOID
odm_TXPowerTrackingThermalMeterInit(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
u1Byte defaultSwingIndex = getSwingIndex(pDM_Odm);
u1Byte p = 0;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
PADAPTER Adapter = pDM_Odm->Adapter;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
if(pDM_Odm->mp_mode == FALSE)
pHalData->TxPowerTrackControl = TRUE;
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
PADAPTER Adapter = pDM_Odm->Adapter;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
if (pDM_Odm->SupportICType >= ODM_RTL8188E)
{
pDM_Odm->RFCalibrateInfo.bTXPowerTracking = _TRUE;
pDM_Odm->RFCalibrateInfo.TXPowercount = 0;
pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = _FALSE;
if(pDM_Odm->mp_mode == FALSE)
pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _TRUE;
else
pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _FALSE;
MSG_8192C("pDM_Odm TxPowerTrackControl = %d\n", pDM_Odm->RFCalibrateInfo.TxPowerTrackControl);
}
else
{
struct dm_priv *pdmpriv = &pHalData->dmpriv;
pdmpriv->bTXPowerTracking = _TRUE;
pdmpriv->TXPowercount = 0;
pdmpriv->bTXPowerTrackingInit = _FALSE;
//#if (MP_DRIVER != 1) //for mp driver, turn off txpwrtracking as default
if(pDM_Odm->mp_mode == FALSE)
pdmpriv->TxPowerTrackControl = _TRUE;
else
pdmpriv->TxPowerTrackControl = _FALSE;
//MSG_8192C("pdmpriv->TxPowerTrackControl = %d\n", pdmpriv->TxPowerTrackControl);
}
#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#ifdef RTL8188E_SUPPORT
{
pDM_Odm->RFCalibrateInfo.bTXPowerTracking = _TRUE;
pDM_Odm->RFCalibrateInfo.TXPowercount = 0;
pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = _FALSE;
pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _TRUE;
}
#endif
#endif
//pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = TRUE;
pDM_Odm->RFCalibrateInfo.ThermalValue = pHalData->EEPROMThermalMeter;
pDM_Odm->RFCalibrateInfo.ThermalValue_IQK = pHalData->EEPROMThermalMeter;
pDM_Odm->RFCalibrateInfo.ThermalValue_LCK = pHalData->EEPROMThermalMeter;
// The index of "0 dB" in SwingTable.
if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8723B ||
pDM_Odm->SupportICType == ODM_RTL8192E)
{
pDM_Odm->DefaultOfdmIndex = (defaultSwingIndex >= OFDM_TABLE_SIZE) ? 30 : defaultSwingIndex;
pDM_Odm->DefaultCckIndex = 20;
}
else
{
pDM_Odm->DefaultOfdmIndex = (defaultSwingIndex >= TXSCALE_TABLE_SIZE) ? 24 : defaultSwingIndex;
pDM_Odm->DefaultCckIndex = 24;
}
pDM_Odm->BbSwingIdxCckBase = pDM_Odm->DefaultCckIndex;
pDM_Odm->RFCalibrateInfo.CCK_index = pDM_Odm->DefaultCckIndex;
for (p = ODM_RF_PATH_A; p < MAX_RF_PATH; ++p)
{
pDM_Odm->BbSwingIdxOfdmBase[p] = pDM_Odm->DefaultOfdmIndex;
pDM_Odm->RFCalibrateInfo.OFDM_index[p] = pDM_Odm->DefaultOfdmIndex;
pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] = 0;
pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[p] = 0;
pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p] = 0;
}
}
VOID
ODM_TXPowerTrackingCheck(
IN PVOID pDM_VOID
)
{
//
// 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate
// at the same time. In the stage2/3, we need to prive universal interface and merge all
// HW dynamic mechanism.
//
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
switch (pDM_Odm->SupportPlatform)
{
case ODM_WIN:
odm_TXPowerTrackingCheckMP(pDM_Odm);
break;
case ODM_CE:
odm_TXPowerTrackingCheckCE(pDM_Odm);
break;
case ODM_AP:
odm_TXPowerTrackingCheckAP(pDM_Odm);
break;
case ODM_ADSL:
//odm_DIGAP(pDM_Odm);
break;
}
}
VOID
odm_TXPowerTrackingCheckCE(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
PADAPTER Adapter = pDM_Odm->Adapter;
#if( (RTL8192C_SUPPORT==1) || (RTL8723A_SUPPORT==1) )
if(IS_HARDWARE_TYPE_8192C(Adapter)){
rtl8192c_odm_CheckTXPowerTracking(Adapter);
return;
}
#endif
#if (RTL8192D_SUPPORT==1)
if(IS_HARDWARE_TYPE_8192D(Adapter)){
#if (RTL8192D_EASY_SMART_CONCURRENT == 1)
if(!Adapter->bSlaveOfDMSP)
#endif
rtl8192d_odm_CheckTXPowerTracking(Adapter);
return;
}
#endif
#if(((RTL8188E_SUPPORT==1) || (RTL8812A_SUPPORT==1) || (RTL8821A_SUPPORT==1) || (RTL8192E_SUPPORT==1) || (RTL8723B_SUPPORT==1) ))
if(!(pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK))
{
return;
}
if(!pDM_Odm->RFCalibrateInfo.TM_Trigger) //at least delay 1 sec
{
//pHalData->TxPowerCheckCnt++; //cosa add for debug
if(IS_HARDWARE_TYPE_8188E(Adapter) || IS_HARDWARE_TYPE_JAGUAR(Adapter) || IS_HARDWARE_TYPE_8192E(Adapter)||IS_HARDWARE_TYPE_8723B(Adapter))
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_T_METER_NEW, (BIT17 | BIT16), 0x03);
else
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_T_METER_OLD, bRFRegOffsetMask, 0x60);
//DBG_871X("Trigger Thermal Meter!!\n");
pDM_Odm->RFCalibrateInfo.TM_Trigger = 1;
return;
}
else
{
//DBG_871X("Schedule TxPowerTracking direct call!!\n");
ODM_TXPowerTrackingCallback_ThermalMeter(Adapter);
pDM_Odm->RFCalibrateInfo.TM_Trigger = 0;
}
#endif
#endif
}
VOID
odm_TXPowerTrackingCheckMP(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
PADAPTER Adapter = pDM_Odm->Adapter;
if (ODM_CheckPowerStatus(Adapter) == FALSE)
{
RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("===>ODM_CheckPowerStatus() return FALSE\n"));
return;
}
if(IS_HARDWARE_TYPE_8723A(Adapter))
return;
if(!Adapter->bSlaveOfDMSP || Adapter->DualMacSmartConcurrent == FALSE)
odm_TXPowerTrackingThermalMeterCheck(Adapter);
else {
RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("!Adapter->bSlaveOfDMSP || Adapter->DualMacSmartConcurrent == FALSE\n"));
}
#endif
}
VOID
odm_TXPowerTrackingCheckAP(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
prtl8192cd_priv priv = pDM_Odm->priv;
if ( (priv->pmib->dot11RFEntry.ther) && ((priv->up_time % priv->pshare->rf_ft_var.tpt_period) == 0)){
#ifdef CONFIG_RTL_92D_SUPPORT
if (GET_CHIP_VER(priv)==VERSION_8192D){
tx_power_tracking_92D(priv);
} else
#endif
{
#ifdef CONFIG_RTL_92C_SUPPORT
tx_power_tracking(priv);
#endif
}
}
#endif
}
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
VOID
odm_TXPowerTrackingThermalMeterCheck(
IN PADAPTER Adapter
)
{
#ifndef AP_BUILD_WORKAROUND
static u1Byte TM_Trigger = 0;
if(!(GET_HAL_DATA(Adapter)->DM_OutSrc.SupportAbility & ODM_RF_TX_PWR_TRACK))
{
RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,
("===>odm_TXPowerTrackingThermalMeterCheck(),pMgntInfo->bTXPowerTracking is FALSE, return!!\n"));
return;
}
if(!TM_Trigger) //at least delay 1 sec
{
if(IS_HARDWARE_TYPE_8192D(Adapter))
PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_T_METER_92D, BIT17 | BIT16, 0x03);
else if(IS_HARDWARE_TYPE_8188E(Adapter) || IS_HARDWARE_TYPE_JAGUAR(Adapter) || IS_HARDWARE_TYPE_8192E(Adapter) ||
IS_HARDWARE_TYPE_8723B(Adapter))
PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_T_METER_88E, BIT17 | BIT16, 0x03);
else
PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60);
RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Trigger Thermal Meter!!\n"));
TM_Trigger = 1;
return;
}
else
{
RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Schedule TxPowerTracking direct call!!\n"));
odm_TXPowerTrackingDirectCall(Adapter); //Using direct call is instead, added by Roger, 2009.06.18.
TM_Trigger = 0;
}
#endif
}
#endif

248
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_PowerTracking.h Executable file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __PHYDMPOWERTRACKING_H__
#define __PHYDMPOWERTRACKING_H__
#define POWRTRACKING_VERSION "1.0"
#define DPK_DELTA_MAPPING_NUM 13
#define index_mapping_HP_NUM 15
#define OFDM_TABLE_SIZE 43
#define CCK_TABLE_SIZE 33
#define TXSCALE_TABLE_SIZE 37
#define TXPWR_TRACK_TABLE_SIZE 30
#define DELTA_SWINGIDX_SIZE 30
#define BAND_NUM 4
#define AVG_THERMAL_NUM 8
#define HP_THERMAL_NUM 8
#define IQK_MAC_REG_NUM 4
#define IQK_ADDA_REG_NUM 16
#define IQK_BB_REG_NUM_MAX 10
#if (RTL8192D_SUPPORT==1)
#define IQK_BB_REG_NUM 10
#else
#define IQK_BB_REG_NUM 9
#endif
#define IQK_Matrix_REG_NUM 8
#define IQK_Matrix_Settings_NUM 14+24+21 // Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G
extern u4Byte OFDMSwingTable[OFDM_TABLE_SIZE];
extern u1Byte CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8];
extern u1Byte CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8];
extern u4Byte OFDMSwingTable_New[OFDM_TABLE_SIZE];
extern u1Byte CCKSwingTable_Ch1_Ch13_New[CCK_TABLE_SIZE][8];
extern u1Byte CCKSwingTable_Ch14_New [CCK_TABLE_SIZE][8];
extern u4Byte TxScalingTable_Jaguar[TXSCALE_TABLE_SIZE];
// <20121018, Kordan> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table.
static u1Byte DeltaSwingTableIdx_2GA_P_8188E[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9};
static u1Byte DeltaSwingTableIdx_2GA_N_8188E[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11};
#define dm_CheckTXPowerTracking ODM_TXPowerTrackingCheck
typedef struct _IQK_MATRIX_REGS_SETTING{
BOOLEAN bIQKDone;
s4Byte Value[3][IQK_Matrix_REG_NUM];
BOOLEAN bBWIqkResultSaved[3];
}IQK_MATRIX_REGS_SETTING,*PIQK_MATRIX_REGS_SETTING;
typedef struct ODM_RF_Calibration_Structure
{
//for tx power tracking
u4Byte RegA24; // for TempCCK
s4Byte RegE94;
s4Byte RegE9C;
s4Byte RegEB4;
s4Byte RegEBC;
u1Byte TXPowercount;
BOOLEAN bTXPowerTrackingInit;
BOOLEAN bTXPowerTracking;
u1Byte TxPowerTrackControl; //for mp mode, turn off txpwrtracking as default
u1Byte TM_Trigger;
u1Byte InternalPA5G[2]; //pathA / pathB
u1Byte ThermalMeter[2]; // ThermalMeter, index 0 for RFIC0, and 1 for RFIC1
u1Byte ThermalValue;
u1Byte ThermalValue_LCK;
u1Byte ThermalValue_IQK;
u1Byte ThermalValue_DPK;
u1Byte ThermalValue_AVG[AVG_THERMAL_NUM];
u1Byte ThermalValue_AVG_index;
u1Byte ThermalValue_RxGain;
u1Byte ThermalValue_Crystal;
u1Byte ThermalValue_DPKstore;
u1Byte ThermalValue_DPKtrack;
BOOLEAN TxPowerTrackingInProgress;
BOOLEAN bReloadtxpowerindex;
u1Byte bRfPiEnable;
u4Byte TXPowerTrackingCallbackCnt; //cosa add for debug
//------------------------- Tx power Tracking -------------------------//
u1Byte bCCKinCH14;
u1Byte CCK_index;
u1Byte OFDM_index[MAX_RF_PATH];
s1Byte PowerIndexOffset[MAX_RF_PATH];
s1Byte DeltaPowerIndex[MAX_RF_PATH];
s1Byte DeltaPowerIndexLast[MAX_RF_PATH];
BOOLEAN bTxPowerChanged;
u1Byte ThermalValue_HP[HP_THERMAL_NUM];
u1Byte ThermalValue_HP_index;
IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM];
u1Byte Delta_LCK;
s1Byte BBSwingDiff2G, BBSwingDiff5G; // Unit: dB
u1Byte DeltaSwingTableIdx_2GCCKA_P[DELTA_SWINGIDX_SIZE];
u1Byte DeltaSwingTableIdx_2GCCKA_N[DELTA_SWINGIDX_SIZE];
u1Byte DeltaSwingTableIdx_2GCCKB_P[DELTA_SWINGIDX_SIZE];
u1Byte DeltaSwingTableIdx_2GCCKB_N[DELTA_SWINGIDX_SIZE];
u1Byte DeltaSwingTableIdx_2GA_P[DELTA_SWINGIDX_SIZE];
u1Byte DeltaSwingTableIdx_2GA_N[DELTA_SWINGIDX_SIZE];
u1Byte DeltaSwingTableIdx_2GB_P[DELTA_SWINGIDX_SIZE];
u1Byte DeltaSwingTableIdx_2GB_N[DELTA_SWINGIDX_SIZE];
u1Byte DeltaSwingTableIdx_5GA_P[BAND_NUM][DELTA_SWINGIDX_SIZE];
u1Byte DeltaSwingTableIdx_5GA_N[BAND_NUM][DELTA_SWINGIDX_SIZE];
u1Byte DeltaSwingTableIdx_5GB_P[BAND_NUM][DELTA_SWINGIDX_SIZE];
u1Byte DeltaSwingTableIdx_5GB_N[BAND_NUM][DELTA_SWINGIDX_SIZE];
u1Byte DeltaSwingTableIdx_2GA_P_8188E[DELTA_SWINGIDX_SIZE];
u1Byte DeltaSwingTableIdx_2GA_N_8188E[DELTA_SWINGIDX_SIZE];
//--------------------------------------------------------------------//
//for IQK
u4Byte RegC04;
u4Byte Reg874;
u4Byte RegC08;
u4Byte RegB68;
u4Byte RegB6C;
u4Byte Reg870;
u4Byte Reg860;
u4Byte Reg864;
BOOLEAN bIQKInitialized;
BOOLEAN bLCKInProgress;
BOOLEAN bAntennaDetected;
BOOLEAN bNeedIQK;
BOOLEAN bIQKInProgress;
u1Byte Delta_IQK;
u4Byte ADDA_backup[IQK_ADDA_REG_NUM];
u4Byte IQK_MAC_backup[IQK_MAC_REG_NUM];
u4Byte IQK_BB_backup_recover[9];
u4Byte IQK_BB_backup[IQK_BB_REG_NUM];
u4Byte TxIQC_8723B[2][3][2]; // { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}
u4Byte RxIQC_8723B[2][2][2]; // { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}
// <James> IQK time measurement
u8Byte IQK_StartTime;
u8Byte IQK_ProgressingTime;
//for APK
u4Byte APKoutput[2][2]; //path A/B; output1_1a/output1_2a
u1Byte bAPKdone;
u1Byte bAPKThermalMeterIgnore;
// DPK
BOOLEAN bDPKFail;
u1Byte bDPdone;
u1Byte bDPPathAOK;
u1Byte bDPPathBOK;
u4Byte TxLOK[2];
}ODM_RF_CAL_T,*PODM_RF_CAL_T;
VOID
ODM_TXPowerTrackingCheck(
IN PVOID pDM_VOID
);
VOID
odm_TXPowerTrackingInit(
IN PVOID pDM_VOID
);
VOID
odm_TXPowerTrackingCheckAP(
IN PVOID pDM_VOID
);
VOID
odm_TXPowerTrackingThermalMeterInit(
IN PVOID pDM_VOID
);
VOID
odm_TXPowerTrackingInit(
IN PVOID pDM_VOID
);
VOID
odm_TXPowerTrackingCheckMP(
IN PVOID pDM_VOID
);
VOID
odm_TXPowerTrackingCheckCE(
IN PVOID pDM_VOID
);
#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN))
VOID
odm_TXPowerTrackingCallbackThermalMeter92C(
IN PADAPTER Adapter
);
VOID
odm_TXPowerTrackingCallbackRXGainThermalMeter92D(
IN PADAPTER Adapter
);
VOID
odm_TXPowerTrackingCallbackThermalMeter92D(
IN PADAPTER Adapter
);
VOID
odm_TXPowerTrackingDirectCall92C(
IN PADAPTER Adapter
);
VOID
odm_TXPowerTrackingThermalMeterCheck(
IN PADAPTER Adapter
);
#endif
#endif

1685
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_RXHP.c Executable file
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105
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_RXHP.h Executable file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __PHYDMRXHP_H__
#define __PHYDMRXHP_H__
#define RXHP_VERSION "1.0"
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
#define AFH_PSD 1 //0:normal PSD scan, 1: only do 20 pts PSD
#define MODE_40M 0 //0:20M, 1:40M
#define PSD_TH2 3
#define PSD_CHMIN 20 // Minimum channel number for BT AFH
#define SIR_STEP_SIZE 3
#define Smooth_Size_1 5
#define Smooth_TH_1 3
#define Smooth_Size_2 10
#define Smooth_TH_2 4
#define Smooth_Size_3 20
#define Smooth_TH_3 4
#define Smooth_Step_Size 5
#define Adaptive_SIR 1
#define PSD_RESCAN 4
#define PSD_SCAN_INTERVAL 700 //ms
typedef struct _RX_High_Power_
{
u1Byte RXHP_flag;
u1Byte PSD_func_trigger;
u1Byte PSD_bitmap_RXHP[80];
u1Byte Pre_IGI;
u1Byte Cur_IGI;
u1Byte Pre_pw_th;
u1Byte Cur_pw_th;
BOOLEAN First_time_enter;
BOOLEAN RXHP_enable;
u1Byte TP_Mode;
RT_TIMER PSDTimer;
#if USE_WORKITEM
RT_WORK_ITEM PSDTimeWorkitem;
#endif
}RXHP_T, *pRXHP_T;
#define dm_PSDMonitorCallback odm_PSDMonitorCallback
VOID odm_PSDMonitorCallback(PRT_TIMER pTimer);
VOID
odm_PSDMonitorInit(
IN PVOID pDM_VOID
);
void odm_RXHPInit(
IN PVOID pDM_VOID);
void odm_RXHP(
IN PVOID pDM_VOID);
VOID
odm_PSD_RXHPCallback(
PRT_TIMER pTimer
);
VOID
ODM_PSDDbgControl(
IN PADAPTER Adapter,
IN u4Byte mode,
IN u4Byte btRssi
);
VOID
odm_PSD_RXHPCallback(
PRT_TIMER pTimer
);
VOID
odm_PSD_RXHPWorkitemCallback(
IN PVOID pContext
);
VOID
odm_PSDMonitorWorkItemCallback(
IN PVOID pContext
);
#endif
#endif

1595
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_RaInfo.c Executable file
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167
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_RaInfo.h Executable file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __PHYDMRAINFO_H__
#define __PHYDMRAINFO_H__
#define RAINFO_VERSION "1.0"
#define AP_InitRateAdaptiveState ODM_RateAdaptiveStateApInit
#define DM_RATR_STA_INIT 0
#define DM_RATR_STA_HIGH 1
#define DM_RATR_STA_MIDDLE 2
#define DM_RATR_STA_LOW 3
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#define DM_RATR_STA_ULTRA_LOW 4
#endif
#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
typedef struct _Rate_Adaptive_Table_{
u1Byte firstconnect;
#if(DM_ODM_SUPPORT_TYPE==ODM_WIN)
BOOLEAN PT_collision_pre;
#endif
}RA_T, *pRA_T;
#endif
typedef struct _ODM_RATE_ADAPTIVE
{
u1Byte Type; // DM_Type_ByFW/DM_Type_ByDriver
u1Byte HighRSSIThresh; // if RSSI > HighRSSIThresh => RATRState is DM_RATR_STA_HIGH
u1Byte LowRSSIThresh; // if RSSI <= LowRSSIThresh => RATRState is DM_RATR_STA_LOW
u1Byte RATRState; // Current RSSI level, DM_RATR_STA_HIGH/DM_RATR_STA_MIDDLE/DM_RATR_STA_LOW
#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
u1Byte LdpcThres; // if RSSI > LdpcThres => switch from LPDC to BCC
BOOLEAN bLowerRtsRate;
#endif
#if(DM_ODM_SUPPORT_TYPE & ODM_WIN)
u1Byte RtsThres;
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
BOOLEAN bUseLdpc;
#else
u1Byte UltraLowRSSIThresh;
u4Byte LastRATR; // RATR Register Content
#endif
} ODM_RATE_ADAPTIVE, *PODM_RATE_ADAPTIVE;
VOID
odm_RSSIMonitorInit(
IN PVOID pDM_VOID
);
VOID
odm_RSSIMonitorCheck(
IN PVOID pDM_VOID
);
#if(DM_ODM_SUPPORT_TYPE==ODM_WIN)
VOID
odm_RSSIDumpToRegister(
IN PVOID pDM_VOID
);
#endif
VOID
odm_RSSIMonitorCheckMP(
IN PVOID pDM_VOID
);
VOID
odm_RSSIMonitorCheckCE(
IN PVOID pDM_VOID
);
VOID
odm_RSSIMonitorCheckAP(
IN PVOID pDM_VOID
);
VOID
odm_RateAdaptiveMaskInit(
IN PVOID pDM_VOID
);
VOID
odm_RefreshRateAdaptiveMask(
IN PVOID pDM_VOID
);
VOID
odm_RefreshRateAdaptiveMaskMP(
IN PVOID pDM_VOID
);
VOID
odm_RefreshRateAdaptiveMaskCE(
IN PVOID pDM_VOID
);
VOID
odm_RefreshRateAdaptiveMaskAPADSL(
IN PVOID pDM_VOID
);
BOOLEAN
ODM_RAStateCheck(
IN PVOID pDM_VOID,
IN s4Byte RSSI,
IN BOOLEAN bForceUpdate,
OUT pu1Byte pRATRState
);
VOID
odm_RefreshBasicRateMask(
IN PVOID pDM_VOID
);
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
VOID
ODM_DynamicARFBSelect(
IN PVOID pDM_VOID,
IN u1Byte rate,
IN BOOLEAN Collision_State
);
VOID
ODM_RateAdaptiveStateApInit(
IN PVOID PADAPTER_VOID,
IN PRT_WLAN_STA pEntry
);
#endif
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
u4Byte
ODM_Get_Rate_Bitmap(
IN PVOID pDM_VOID,
IN u4Byte macid,
IN u4Byte ra_mask,
IN u1Byte rssi_level
);
#endif
#endif //#ifndef __ODMRAINFO_H__

76
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_RegDefine11AC.h Executable file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __ODM_REGDEFINE11AC_H__
#define __ODM_REGDEFINE11AC_H__
//2 RF REG LIST
//2 BB REG LIST
//PAGE 8
#define ODM_REG_CCK_RPT_FORMAT_11AC 0x804
#define ODM_REG_BB_RX_PATH_11AC 0x808
#define ODM_REG_BB_ATC_11AC 0x860
#define ODM_REG_DBG_RPT_11AC 0x8fc
//PAGE 9
#define ODM_REG_OFDM_FA_RST_11AC 0x9A4
#define ODM_REG_NHM_TIMER_11AC 0x990
#define ODM_REG_NHM_TH9_TH10_11AC 0x994
#define ODM_REG_NHM_TH3_TO_TH0_11AC 0x998
#define ODM_REG_NHM_TH7_TO_TH4_11AC 0x99c
#define ODM_REG_NHM_TH8_11AC 0x9a0
#define ODM_REG_NHM_9E8_11AC 0x9e8
//PAGE A
#define ODM_REG_CCK_CCA_11AC 0xA0A
#define ODM_REG_CCK_FA_RST_11AC 0xA2C
#define ODM_REG_CCK_FA_11AC 0xA5C
//PAGE B
#define ODM_REG_RST_RPT_11AC 0xB58
//PAGE C
#define ODM_REG_TRMUX_11AC 0xC08
#define ODM_REG_IGI_A_11AC 0xC50
//PAGE E
#define ODM_REG_IGI_B_11AC 0xE50
#define ODM_REG_TRMUX_11AC_B 0xE08
//PAGE F
#define ODM_REG_CCK_CCA_CNT_11AC 0xF08
#define ODM_REG_OFDM_FA_11AC 0xF48
#define ODM_REG_RPT_11AC 0xfa0
#define ODM_REG_NHM_CNT_11AC 0xfa8
//PAGE 18
#define ODM_REG_IGI_C_11AC 0x1850
//PAGE 1A
#define ODM_REG_IGI_D_11AC 0x1A50
//2 MAC REG LIST
#define ODM_REG_RESP_TX_11AC 0x6D8
//DIG Related
#define ODM_BIT_IGI_11AC 0xFFFFFFFF
#define ODM_BIT_CCK_RPT_FORMAT_11AC BIT16
#define ODM_BIT_BB_RX_PATH_11AC 0xF
#define ODM_BIT_BB_ATC_11AC BIT14
#endif

181
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_RegDefine11N.h Executable file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __ODM_REGDEFINE11N_H__
#define __ODM_REGDEFINE11N_H__
//2 RF REG LIST
#define ODM_REG_RF_MODE_11N 0x00
#define ODM_REG_RF_0B_11N 0x0B
#define ODM_REG_CHNBW_11N 0x18
#define ODM_REG_T_METER_11N 0x24
#define ODM_REG_RF_25_11N 0x25
#define ODM_REG_RF_26_11N 0x26
#define ODM_REG_RF_27_11N 0x27
#define ODM_REG_RF_2B_11N 0x2B
#define ODM_REG_RF_2C_11N 0x2C
#define ODM_REG_RXRF_A3_11N 0x3C
#define ODM_REG_T_METER_92D_11N 0x42
#define ODM_REG_T_METER_88E_11N 0x42
//2 BB REG LIST
//PAGE 8
#define ODM_REG_BB_CTRL_11N 0x800
#define ODM_REG_RF_PIN_11N 0x804
#define ODM_REG_PSD_CTRL_11N 0x808
#define ODM_REG_TX_ANT_CTRL_11N 0x80C
#define ODM_REG_BB_PWR_SAV5_11N 0x818
#define ODM_REG_CCK_RPT_FORMAT_11N 0x824
#define ODM_REG_CCK_RPT_FORMAT_11N_B 0x82C
#define ODM_REG_RX_DEFUALT_A_11N 0x858
#define ODM_REG_RX_DEFUALT_B_11N 0x85A
#define ODM_REG_BB_PWR_SAV3_11N 0x85C
#define ODM_REG_ANTSEL_CTRL_11N 0x860
#define ODM_REG_RX_ANT_CTRL_11N 0x864
#define ODM_REG_PIN_CTRL_11N 0x870
#define ODM_REG_BB_PWR_SAV1_11N 0x874
#define ODM_REG_ANTSEL_PATH_11N 0x878
#define ODM_REG_BB_3WIRE_11N 0x88C
#define ODM_REG_SC_CNT_11N 0x8C4
#define ODM_REG_PSD_DATA_11N 0x8B4
#define ODM_REG_PSD_DATA_11N 0x8B4
#define ODM_REG_NHM_TIMER_11N 0x894
#define ODM_REG_NHM_TH9_TH10_11N 0x890
#define ODM_REG_NHM_TH3_TO_TH0_11N 0x898
#define ODM_REG_NHM_TH7_TO_TH4_11N 0x89c
#define ODM_REG_NHM_CNT_11N 0x8d8
//PAGE 9
#define ODM_REG_DBG_RPT_11N 0x908
#define ODM_REG_ANT_MAPPING1_11N 0x914
#define ODM_REG_ANT_MAPPING2_11N 0x918
//PAGE A
#define ODM_REG_CCK_ANTDIV_PARA1_11N 0xA00
#define ODM_REG_CCK_CCA_11N 0xA0A
#define ODM_REG_CCK_ANTDIV_PARA2_11N 0xA0C
#define ODM_REG_CCK_ANTDIV_PARA3_11N 0xA10
#define ODM_REG_CCK_ANTDIV_PARA4_11N 0xA14
#define ODM_REG_CCK_FILTER_PARA1_11N 0xA22
#define ODM_REG_CCK_FILTER_PARA2_11N 0xA23
#define ODM_REG_CCK_FILTER_PARA3_11N 0xA24
#define ODM_REG_CCK_FILTER_PARA4_11N 0xA25
#define ODM_REG_CCK_FILTER_PARA5_11N 0xA26
#define ODM_REG_CCK_FILTER_PARA6_11N 0xA27
#define ODM_REG_CCK_FILTER_PARA7_11N 0xA28
#define ODM_REG_CCK_FILTER_PARA8_11N 0xA29
#define ODM_REG_CCK_FA_RST_11N 0xA2C
#define ODM_REG_CCK_FA_MSB_11N 0xA58
#define ODM_REG_CCK_FA_LSB_11N 0xA5C
#define ODM_REG_CCK_CCA_CNT_11N 0xA60
#define ODM_REG_BB_PWR_SAV4_11N 0xA74
//PAGE B
#define ODM_REG_LNA_SWITCH_11N 0xB2C
#define ODM_REG_PATH_SWITCH_11N 0xB30
#define ODM_REG_RSSI_CTRL_11N 0xB38
#define ODM_REG_CONFIG_ANTA_11N 0xB68
#define ODM_REG_RSSI_BT_11N 0xB9C
//PAGE C
#define ODM_REG_OFDM_FA_HOLDC_11N 0xC00
#define ODM_REG_BB_RX_PATH_11N 0xC04
#define ODM_REG_TRMUX_11N 0xC08
#define ODM_REG_OFDM_FA_RSTC_11N 0xC0C
#define ODM_REG_RXIQI_MATRIX_11N 0xC14
#define ODM_REG_TXIQK_MATRIX_LSB1_11N 0xC4C
#define ODM_REG_IGI_A_11N 0xC50
#define ODM_REG_ANTDIV_PARA2_11N 0xC54
#define ODM_REG_IGI_B_11N 0xC58
#define ODM_REG_ANTDIV_PARA3_11N 0xC5C
#define ODM_REG_L1SBD_PD_CH_11N 0XC6C
#define ODM_REG_BB_PWR_SAV2_11N 0xC70
#define ODM_REG_RX_OFF_11N 0xC7C
#define ODM_REG_TXIQK_MATRIXA_11N 0xC80
#define ODM_REG_TXIQK_MATRIXB_11N 0xC88
#define ODM_REG_TXIQK_MATRIXA_LSB2_11N 0xC94
#define ODM_REG_TXIQK_MATRIXB_LSB2_11N 0xC9C
#define ODM_REG_RXIQK_MATRIX_LSB_11N 0xCA0
#define ODM_REG_ANTDIV_PARA1_11N 0xCA4
#define ODM_REG_OFDM_FA_TYPE1_11N 0xCF0
//PAGE D
#define ODM_REG_OFDM_FA_RSTD_11N 0xD00
#define ODM_REG_BB_ATC_11N 0xD2C
#define ODM_REG_OFDM_FA_TYPE2_11N 0xDA0
#define ODM_REG_OFDM_FA_TYPE3_11N 0xDA4
#define ODM_REG_OFDM_FA_TYPE4_11N 0xDA8
#define ODM_REG_RPT_11N 0xDF4
//PAGE E
#define ODM_REG_TXAGC_A_6_18_11N 0xE00
#define ODM_REG_TXAGC_A_24_54_11N 0xE04
#define ODM_REG_TXAGC_A_1_MCS32_11N 0xE08
#define ODM_REG_TXAGC_A_MCS0_3_11N 0xE10
#define ODM_REG_TXAGC_A_MCS4_7_11N 0xE14
#define ODM_REG_TXAGC_A_MCS8_11_11N 0xE18
#define ODM_REG_TXAGC_A_MCS12_15_11N 0xE1C
#define ODM_REG_FPGA0_IQK_11N 0xE28
#define ODM_REG_TXIQK_TONE_A_11N 0xE30
#define ODM_REG_RXIQK_TONE_A_11N 0xE34
#define ODM_REG_TXIQK_PI_A_11N 0xE38
#define ODM_REG_RXIQK_PI_A_11N 0xE3C
#define ODM_REG_TXIQK_11N 0xE40
#define ODM_REG_RXIQK_11N 0xE44
#define ODM_REG_IQK_AGC_PTS_11N 0xE48
#define ODM_REG_IQK_AGC_RSP_11N 0xE4C
#define ODM_REG_BLUETOOTH_11N 0xE6C
#define ODM_REG_RX_WAIT_CCA_11N 0xE70
#define ODM_REG_TX_CCK_RFON_11N 0xE74
#define ODM_REG_TX_CCK_BBON_11N 0xE78
#define ODM_REG_OFDM_RFON_11N 0xE7C
#define ODM_REG_OFDM_BBON_11N 0xE80
#define ODM_REG_TX2RX_11N 0xE84
#define ODM_REG_TX2TX_11N 0xE88
#define ODM_REG_RX_CCK_11N 0xE8C
#define ODM_REG_RX_OFDM_11N 0xED0
#define ODM_REG_RX_WAIT_RIFS_11N 0xED4
#define ODM_REG_RX2RX_11N 0xED8
#define ODM_REG_STANDBY_11N 0xEDC
#define ODM_REG_SLEEP_11N 0xEE0
#define ODM_REG_PMPD_ANAEN_11N 0xEEC
#define ODM_REG_IGI_C_11N 0xF84
#define ODM_REG_IGI_D_11N 0xF88
//2 MAC REG LIST
#define ODM_REG_BB_RST_11N 0x02
#define ODM_REG_ANTSEL_PIN_11N 0x4C
#define ODM_REG_EARLY_MODE_11N 0x4D0
#define ODM_REG_RSSI_MONITOR_11N 0x4FE
#define ODM_REG_EDCA_VO_11N 0x500
#define ODM_REG_EDCA_VI_11N 0x504
#define ODM_REG_EDCA_BE_11N 0x508
#define ODM_REG_EDCA_BK_11N 0x50C
#define ODM_REG_TXPAUSE_11N 0x522
#define ODM_REG_RESP_TX_11N 0x6D8
#define ODM_REG_ANT_TRAIN_PARA1_11N 0x7b0
#define ODM_REG_ANT_TRAIN_PARA2_11N 0x7b4
//DIG Related
#define ODM_BIT_IGI_11N 0x0000007F
#define ODM_BIT_CCK_RPT_FORMAT_11N BIT9
#define ODM_BIT_BB_RX_PATH_11N 0xF
#define ODM_BIT_BB_ATC_11N BIT11
#endif

873
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_debug.c Executable file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
//============================================================
// include files
//============================================================
#include "Mp_Precomp.h"
#include "phydm_precomp.h"
VOID
PHYDM_InitDebugSetting(
IN PDM_ODM_T pDM_Odm
)
{
pDM_Odm->DebugLevel = ODM_DBG_TRACE;
pDM_Odm->DebugComponents =
\
#if DBG
//BB Functions
// ODM_COMP_DIG |
// ODM_COMP_RA_MASK |
// ODM_COMP_DYNAMIC_TXPWR |
// ODM_COMP_FA_CNT |
// ODM_COMP_RSSI_MONITOR |
// ODM_COMP_CCK_PD |
// ODM_COMP_ANT_DIV |
// ODM_COMP_PWR_SAVE |
// ODM_COMP_PWR_TRAIN |
// ODM_COMP_RATE_ADAPTIVE |
// ODM_COMP_PATH_DIV |
// ODM_COMP_DYNAMIC_PRICCA |
// ODM_COMP_RXHP |
// ODM_COMP_MP |
// ODM_COMP_CFO_TRACKING |
// ODM_COMP_ACS |
// PHYDM_COMP_ADAPTIVITY |
//MAC Functions
// ODM_COMP_EDCA_TURBO |
// ODM_COMP_EARLY_MODE |
//RF Functions
// ODM_COMP_TX_PWR_TRACK |
// ODM_COMP_RX_GAIN_TRACK |
// ODM_COMP_CALIBRATION |
//Common
// ODM_COMP_COMMON |
// ODM_COMP_INIT |
// ODM_COMP_PSD |
#endif
0;
}
#if(DM_ODM_SUPPORT_TYPE & ODM_WIN)
static u1Byte BbDbgBuf[BB_TMP_BUF_SIZE];
VOID
phydm_BB_Debug_Info(IN PDM_ODM_T pDM_Odm)
{
u1Byte RX_HT_BW, RX_VHT_BW, RXSC, RX_HT, RX_BW;
static u1Byte vRX_BW ;
u4Byte value32, value32_1, value32_2, value32_3;
s4Byte SFO_A, SFO_B, SFO_C, SFO_D;
s4Byte LFO_A, LFO_B, LFO_C, LFO_D;
static u1Byte MCSS,Tail,Parity,rsv,vrsv,idx,smooth,htsound,agg,stbc,vstbc,fec,fecext,sgi,sgiext,htltf,vgid,vNsts,vtxops,vrsv2,vbrsv,bf,vbcrc;
static u2Byte HLength,htcrc8,Length;
static u2Byte vpaid;
static u2Byte vLength,vhtcrc8,vMCSS,vTail,vbTail;
static u1Byte HMCSS,HRX_BW;
u1Byte pwDB;
s1Byte RXEVM_0, RXEVM_1, RXEVM_2 ;
u1Byte RF_gain_pathA, RF_gain_pathB, RF_gain_pathC, RF_gain_pathD;
u1Byte RX_SNR_pathA, RX_SNR_pathB, RX_SNR_pathC, RX_SNR_pathD;
s4Byte sig_power;
const char *RXHT_table[] = {"legacy", "HT", "VHT"};
const char *BW_table[] = {"20M", "40M", "80M"};
const char *RXSC_table[] = {"duplicate/full bw", "usc20-1", "lsc20-1", "usc20-2", "lsc20-2", "usc40", "lsc40"};
const char *L_rate[]={"6M","9M","12M","18M","24M","36M","48M","54M"};
/*
const double evm_comp_20M = 0.579919469776867; //10*log10(64.0/56.0)
const double evm_comp_40M = 0.503051183113957; //10*log10(128.0/114.0)
const double evm_comp_80M = 0.244245993314183; //10*log10(256.0/242.0)
const double evm_comp_160M = 0.244245993314183; //10*log10(512.0/484.0)
*/
if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES)
return;
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s \n", "BB Report Info");
DCMD_Printf(BbDbgBuf);
//BW & Mode Detection
///////////////////////////////////////////////////////
value32 = ODM_GetBBReg(pDM_Odm, 0xf80 ,bMaskDWord);
value32_2 =value32;
RX_HT_BW = (u1Byte)(value32&0x1) ;
RX_VHT_BW = (u1Byte)((value32>>1)&0x3);
RXSC = (u1Byte)(value32&0x78);
value32_1= (value32&0x180)>>7;
RX_HT = (u1Byte)(value32_1);
/*
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "F80", value32_2);
DCMD_Printf(BbDbgBuf);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "RX_HT_BW", RX_HT_BW);
DCMD_Printf(BbDbgBuf);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "RX_VHT_BW", RX_VHT_BW);
DCMD_Printf(BbDbgBuf);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "RX_SC", RXSC);
DCMD_Printf(BbDbgBuf);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "RX_HT", RX_HT);
DCMD_Printf(BbDbgBuf);
*/
//rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n RX_HT:%s ", RXHT_table[RX_HT]);
//DCMD_Printf(BbDbgBuf);
RX_BW = 0;
if(RX_HT == 2)
{
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n Mode: VHT Mode");
DCMD_Printf(BbDbgBuf);
if(RX_VHT_BW==0)
{
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, " BW=20M");
DCMD_Printf(BbDbgBuf);
}
else if(RX_VHT_BW==1)
{
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, " BW=40M");
DCMD_Printf(BbDbgBuf);
}
else
{
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, " BW=80M");
DCMD_Printf(BbDbgBuf);
}
RX_BW = RX_VHT_BW;
}
else if(RX_HT == 1)
{
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n Mode: HT Mode");
DCMD_Printf(BbDbgBuf);
if(RX_HT_BW==0)
{
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, " BW=20M");
DCMD_Printf(BbDbgBuf);
}
else if(RX_HT_BW==1)
{
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, " BW=40M");
DCMD_Printf(BbDbgBuf);
}
RX_BW = RX_HT_BW;
}
else
{
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n Mode: Legeacy Mode");
DCMD_Printf(BbDbgBuf);
}
if(RX_HT !=0)
{
if(RXSC==0)
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n duplicate/full bw");
else if(RXSC==1)
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n usc20-1");
else if(RXSC==2)
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n lsc20-1");
else if(RXSC==3)
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n usc20-2");
else if(RXSC==4)
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n lsc20-2");
else if(RXSC==9)
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n usc40");
else if(RXSC==10)
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n lsc40");
DCMD_Printf(BbDbgBuf);
}
/*
if(RX_HT == 2){
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, " BW:%s", BW_table[RX_VHT_BW]);
RX_BW = RX_VHT_BW;
}
else if(RX_HT == 1){
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, " BW:%s", BW_table[RX_HT_BW]);
RX_BW = RX_HT_BW;
}
else
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "");
DCMD_Printf(BbDbgBuf);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, " RXSC:%s", RXSC_table[RXSC]);
DCMD_Printf(BbDbgBuf);
*/
///////////////////////////////////////////////////////
// rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "dB Conversion: 10log(65)", ODM_PWdB_Conversion(65,10,0));
// DCMD_Printf(BbDbgBuf);
// RX signal power and AGC related info
///////////////////////////////////////////////////////
value32 = ODM_GetBBReg(pDM_Odm, 0xF90 ,bMaskDWord);
pwDB = (u1Byte) ((value32 & bMaskByte1) >> 8);
pwDB=pwDB>>1;
sig_power = -110+pwDB;
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "OFDM RX Signal Power(dB)", sig_power);
DCMD_Printf(BbDbgBuf);
value32 = ODM_GetBBReg(pDM_Odm, 0xd14 ,bMaskDWord);
RX_SNR_pathA = (u1Byte)(value32&0xFF)>>1;
RF_gain_pathA = (s1Byte) ((value32 & bMaskByte1) >> 8);
RF_gain_pathA *=2;
value32 = ODM_GetBBReg(pDM_Odm, 0xd54 ,bMaskDWord);
RX_SNR_pathB = (u1Byte)(value32&0xFF)>>1;
RF_gain_pathB = (s1Byte) ((value32 & bMaskByte1) >> 8);
RF_gain_pathB *=2;
value32 = ODM_GetBBReg(pDM_Odm, 0xd94 ,bMaskDWord);
RX_SNR_pathC = (u1Byte)(value32&0xFF)>>1;
RF_gain_pathC = (s1Byte) ((value32 & bMaskByte1) >> 8);
RF_gain_pathC *=2;
value32 = ODM_GetBBReg(pDM_Odm, 0xdd4 ,bMaskDWord);
RX_SNR_pathD = (u1Byte)(value32&0xFF)>>1;
RF_gain_pathD = (s1Byte) ((value32 & bMaskByte1) >> 8);
RF_gain_pathD *=2;
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "OFDM RX RF Gain(A/B/C/D)", RF_gain_pathA, RF_gain_pathA, RF_gain_pathC, RF_gain_pathD);
DCMD_Printf(BbDbgBuf);
///////////////////////////////////////////////////////
// RX Counter related info
///////////////////////////////////////////////////////
value32 = ODM_GetBBReg(pDM_Odm, 0xF08 ,bMaskDWord);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "OFDM CCA Counter", ((value32&0xFFFF0000)>>16));
DCMD_Printf(BbDbgBuf);
value32 = ODM_GetBBReg(pDM_Odm, 0xFD0 ,bMaskDWord);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "OFDM SBD Fail Counter", value32&0xFFFF);
DCMD_Printf(BbDbgBuf);
value32 = ODM_GetBBReg(pDM_Odm, 0xFC4 ,bMaskDWord);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d", "VHT SIGA/SIGB CRC8 Fail Counter", value32&0xFFFF, ((value32&0xFFFF0000)>>16));
DCMD_Printf(BbDbgBuf);
value32 = ODM_GetBBReg(pDM_Odm, 0xFCC ,bMaskDWord);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "CCK CCA Counter", value32&0xFFFF);
DCMD_Printf(BbDbgBuf);
value32 = ODM_GetBBReg(pDM_Odm, 0xFBC ,bMaskDWord);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d", "LSIG (\"Parity Fail\"/\"Rate Illegal\") Counter", value32&0xFFFF, ((value32&0xFFFF0000)>>16));
DCMD_Printf(BbDbgBuf);
value32_1 = ODM_GetBBReg(pDM_Odm, 0xFC8 ,bMaskDWord);
value32_2 = ODM_GetBBReg(pDM_Odm, 0xFC0 ,bMaskDWord);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d", "HT/VHT MCS NOT SUPPORT counter", ((value32_2&0xFFFF0000)>>16), value32_1&0xFFFF);
DCMD_Printf(BbDbgBuf);
///////////////////////////////////////////////////////
// PostFFT related info
///////////////////////////////////////////////////////
value32 = ODM_GetBBReg(pDM_Odm, 0xF8c ,bMaskDWord);
RXEVM_0 = (s1Byte) ((value32 & bMaskByte2) >> 16);
RXEVM_0 /=2;
if(RXEVM_0 < -63)
RXEVM_0=0;
DCMD_Printf(BbDbgBuf);
RXEVM_1 = (s1Byte) ((value32 & bMaskByte3) >> 24);
RXEVM_1 /=2;
value32 = ODM_GetBBReg(pDM_Odm, 0xF88 ,bMaskDWord);
RXEVM_2 = (s1Byte) ((value32 & bMaskByte2) >> 16);
RXEVM_2 /=2;
if(RXEVM_1 < -63)
RXEVM_1=0;
if(RXEVM_2 < -63)
RXEVM_2=0;
/*
if(RX_BW == 0){
RXEVM_0 -= evm_comp_20M;
RXEVM_1 -= evm_comp_20M;
RXEVM_2 -= evm_comp_20M;
}
else if(RX_BW == 1){
RXEVM_0 -= evm_comp_40M;
RXEVM_1 -= evm_comp_40M;
RXEVM_2 -= evm_comp_40M;
}
else if (RX_BW == 2){
RXEVM_0 -= evm_comp_80M;
RXEVM_1 -= evm_comp_80M;
RXEVM_2 -= evm_comp_80M;
}
*/
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d", "RXEVM (1ss/2ss/3ss)", RXEVM_0, RXEVM_1, RXEVM_2);
DCMD_Printf(BbDbgBuf);
// value32 = ODM_GetBBReg(pDM_Odm, 0xD14 ,bMaskDWord);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "RXSNR(A/B/C/D, dB)", RX_SNR_pathA, RX_SNR_pathB, RX_SNR_pathC, RX_SNR_pathD);
DCMD_Printf(BbDbgBuf);
// rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "B_RXSNR", (value32&0xFF00)>>9);
// DCMD_Printf(BbDbgBuf);
value32 = ODM_GetBBReg(pDM_Odm, 0xF8C ,bMaskDWord);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d", "CSI_1st /CSI_2nd", value32&0xFFFF, ((value32&0xFFFF0000)>>16));
DCMD_Printf(BbDbgBuf);
///////////////////////////////////////////////////////
//BW & Mode Detection
//Reset Page F Counter
ODM_SetBBReg(pDM_Odm, 0xB58 ,BIT0, 1);
ODM_SetBBReg(pDM_Odm, 0xB58 ,BIT0, 0);
//CFO Report Info
//Short CFO
value32 = ODM_GetBBReg(pDM_Odm, 0xd0c ,bMaskDWord);
value32_1 = ODM_GetBBReg(pDM_Odm, 0xd4c ,bMaskDWord);
value32_2 = ODM_GetBBReg(pDM_Odm, 0xd8c ,bMaskDWord);
value32_3 = ODM_GetBBReg(pDM_Odm, 0xdcc ,bMaskDWord);
SFO_A=(s4Byte)(value32&bMask12Bits);
SFO_B=(s4Byte)(value32_1&bMask12Bits);
SFO_C=(s4Byte)(value32_2&bMask12Bits);
SFO_D=(s4Byte)(value32_3&bMask12Bits);
LFO_A=(s4Byte)(value32>>16);
LFO_B=(s4Byte)(value32_1>>16);
LFO_C=(s4Byte)(value32_2>>16);
LFO_D=(s4Byte)(value32_3>>16);
//SFO 2's to dec
if(SFO_A >2047)
{
SFO_A=SFO_A-4096;
}
SFO_A=(SFO_A*312500)/2048;
if(SFO_B >2047)
{
SFO_B=SFO_B-4096;
}
SFO_B=(SFO_B*312500)/2048;
if(SFO_C >2047)
{
SFO_C=SFO_C-4096;
}
SFO_C=(SFO_C*312500)/2048;
if(SFO_D >2047)
{
SFO_D=SFO_D-4096;
}
SFO_D=(SFO_D*312500)/2048;
//LFO 2's to dec
if(LFO_A >4095)
{
LFO_A=LFO_A-8192;
}
if(LFO_B >4095)
{
LFO_B=LFO_B-8192;
}
if(LFO_C>4095)
{
LFO_C=LFO_C-8192;
}
if(LFO_D >4095)
{
LFO_D=LFO_D-8192;
}
LFO_A=LFO_A*312500/4096;
LFO_B=LFO_B*312500/4096;
LFO_C=LFO_C*312500/4096;
LFO_D=LFO_D*312500/4096;
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "CFO Report Info");
DCMD_Printf(BbDbgBuf);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d/ %d/ %d", " Short CFO(Hz) <A/B/C/D>", SFO_A,SFO_B,SFO_C,SFO_D);
DCMD_Printf(BbDbgBuf);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d/ %d/ %d", " Long CFO(Hz) <A/B/C/D>", LFO_A,LFO_B,LFO_C,LFO_D);
DCMD_Printf(BbDbgBuf);
//SCFO
value32 = ODM_GetBBReg(pDM_Odm, 0xd10 ,bMaskDWord);
value32_1 = ODM_GetBBReg(pDM_Odm, 0xd50 ,bMaskDWord);
value32_2 = ODM_GetBBReg(pDM_Odm, 0xd90 ,bMaskDWord);
value32_3 = ODM_GetBBReg(pDM_Odm, 0xdd0 ,bMaskDWord);
SFO_A=(s4Byte)(value32&0x7ff);
SFO_B=(s4Byte)(value32_1&0x7ff);
SFO_C=(s4Byte)(value32_2&0x7ff);
SFO_D=(s4Byte)(value32_3&0x7ff);
if(SFO_A >1023)
{
SFO_A=SFO_A-2048;
}
if(SFO_B >2047)
{
SFO_B=SFO_B-4096;
}
if(SFO_C >2047)
{
SFO_C=SFO_C-4096;
}
if(SFO_D >2047)
{
SFO_D=SFO_D-4096;
}
SFO_A=SFO_A*312500/1024;
SFO_B=SFO_B*312500/1024;
SFO_C=SFO_C*312500/1024;
SFO_D=SFO_D*312500/1024;
LFO_A=(s4Byte)(value32>>16);
LFO_B=(s4Byte)(value32_1>>16);
LFO_C=(s4Byte)(value32_2>>16);
LFO_D=(s4Byte)(value32_3>>16);
if(LFO_A >4095)
{
LFO_A=LFO_A-8192;
}
if(LFO_B >4095)
{
LFO_B=LFO_B-8192;
}
if(LFO_C>4095)
{
LFO_C=LFO_C-8192;
}
if(LFO_D >4095)
{
LFO_D=LFO_D-8192;
}
LFO_A=LFO_A*312500/4096;
LFO_B=LFO_B*312500/4096;
LFO_C=LFO_C*312500/4096;
LFO_D=LFO_D*312500/4096;
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d/ %d/ %d", " Value SCFO(Hz) <A/B/C/D>", SFO_A,SFO_B,SFO_C,SFO_D);
DCMD_Printf(BbDbgBuf);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d/ %d/ %d", " ACQ CFO(Hz) <A/B/C/D>", LFO_A,LFO_B,LFO_C,LFO_D);
DCMD_Printf(BbDbgBuf);
value32 = ODM_GetBBReg(pDM_Odm, 0xd14 ,bMaskDWord);
value32_1 = ODM_GetBBReg(pDM_Odm, 0xd54 ,bMaskDWord);
value32_2 = ODM_GetBBReg(pDM_Odm, 0xd94 ,bMaskDWord);
value32_3 = ODM_GetBBReg(pDM_Odm, 0xdd4 ,bMaskDWord);
LFO_A=(s4Byte)(value32>>16);
LFO_B=(s4Byte)(value32_1>>16);
LFO_C=(s4Byte)(value32_2>>16);
LFO_D=(s4Byte)(value32_3>>16);
if(LFO_A >4095)
{
LFO_A=LFO_A-8192;
}
if(LFO_B >4095)
{
LFO_B=LFO_B-8192;
}
if(LFO_C>4095)
{
LFO_C=LFO_C-8192;
}
if(LFO_D >4095)
{
LFO_D=LFO_D-8192;
}
LFO_A=LFO_A*312500/4096;
LFO_B=LFO_B*312500/4096;
LFO_C=LFO_C*312500/4096;
LFO_D=LFO_D*312500/4096;
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d/ %d/ %d", " End CFO(Hz) <A/B/C/D>", LFO_A,LFO_B,LFO_C,LFO_D);
DCMD_Printf(BbDbgBuf);
value32 = ODM_GetBBReg(pDM_Odm, 0xf20 ,bMaskDWord); //L SIG
Tail=(u1Byte)((value32&0xfc0000)>>16);
Parity = (u1Byte)((value32&0x20000)>>16);
Length =(u2Byte)((value32&0x1ffe00)>>8);
rsv = (u1Byte)(value32&0x10);
MCSS=(u1Byte)(value32&0x0f);
switch(MCSS)
{
case 0x0b:
idx=0;
break;
case 0x0f:
idx=1;
break;
case 0x0a:
idx=2;
break;
case 0x0e:
idx=3;
break;
case 0x09:
idx=4;
break;
case 0x08:
idx=5;
break;
case 0x0c:
idx=6;
break;
default:
idx=6;
break;
}
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "L-SIG");
DCMD_Printf(BbDbgBuf);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n Rate:%s", L_rate[idx]);
DCMD_Printf(BbDbgBuf);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x/ %x /%x", " Rsv/Length/Parity",rsv,RX_BW,Length);
DCMD_Printf(BbDbgBuf);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "HT-SIG1");
DCMD_Printf(BbDbgBuf);
value32 = ODM_GetBBReg(pDM_Odm, 0xf2c ,bMaskDWord); //HT SIG
if(RX_HT == 1)
{
HMCSS=(u1Byte)(value32&0x7F);
HRX_BW = (u1Byte)(value32&0x80);
HLength =(u2Byte)((value32>>8)&0xffff);
}
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x / %x/ %x", " MCS/BW/Length",HMCSS,HRX_BW,HLength);
DCMD_Printf(BbDbgBuf);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "HT-SIG2");
DCMD_Printf(BbDbgBuf);
value32 = ODM_GetBBReg(pDM_Odm, 0xf30 ,bMaskDWord); //HT SIG
if(RX_HT == 1)
{
smooth = (u1Byte)(value32&0x01);
htsound = (u1Byte)(value32&0x02);
rsv=(u1Byte)(value32&0x04);
agg =(u1Byte)(value32&0x08);
stbc =(u1Byte)(value32&0x30);
fec=(u1Byte)(value32&0x40);
sgi=(u1Byte)(value32&0x80);
htltf=(u1Byte)((value32&0x300)>>8);
htcrc8=(u2Byte)((value32&0x3fc00)>>8);
Tail=(u1Byte)((value32&0xfc0000)>>16);
}
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x / %x/ %x/ %x/ %x/ %x", " Smooth/NoSound/Rsv/Aggregate/STBC/LDPC",smooth,htsound,rsv,agg,stbc,fec);
DCMD_Printf(BbDbgBuf);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x / %x/ %x/ %x", " SGI/E-HT-LTFs/CRC/Tail",sgi,htltf,htcrc8,Tail);
DCMD_Printf(BbDbgBuf);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "VHT-SIG-A1");
DCMD_Printf(BbDbgBuf);
value32 = ODM_GetBBReg(pDM_Odm, 0xf2c ,bMaskDWord); //VHT SIG A1
if(RX_HT == 2)
{
//value32 = ODM_GetBBReg(pDM_Odm, 0xf2c ,bMaskDWord); //VHT SIG A1
vRX_BW=(u1Byte)(value32&0x03);
vrsv=(u1Byte)(value32&0x04);
vstbc =(u1Byte)(value32&0x08);
vgid = (u1Byte)((value32&0x3f0)>>4);
vNsts = (u1Byte)(((value32&0x1c00)>>8)+1);
vpaid = (u2Byte)(value32&0x3fe);
vtxops =(u1Byte)((value32&0x400000)>>20);
vrsv2 = (u1Byte)((value32&0x800000)>>20);
}
//rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x", "F2C", value32);
//DCMD_Printf(BbDbgBuf);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x / %x/ %x/ %x/ %x/ %x /%x /%x", " BW/Rsv1/STBC/GID/Nsts/PAID/TXOPPS/Rsv2",vRX_BW,vrsv,vstbc,vgid,vNsts,vpaid,vtxops,vrsv2);
DCMD_Printf(BbDbgBuf);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "VHT-SIG-A2");
DCMD_Printf(BbDbgBuf);
value32 = ODM_GetBBReg(pDM_Odm, 0xf30 ,bMaskDWord); //VHT SIG
if(RX_HT == 2)
{
//value32 = ODM_GetBBReg(pDM_Odm, 0xf30 ,bMaskDWord); //VHT SIG
//sgi=(u1Byte)(value32&0x01);
sgiext =(u1Byte)(value32&0x03);
//fec = (u1Byte)(value32&0x04);
fecext = (u1Byte)(value32&0x0C);
vMCSS =(u1Byte)(value32&0xf0);
bf = (u1Byte)((value32&0x100)>>8);
vrsv =(u1Byte)((value32&0x200)>>8);
vhtcrc8=(u2Byte)((value32&0x3fc00)>>8);
vTail=(u1Byte)((value32&0xfc0000)>>16);
}
//rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x", "F30", value32);
//DCMD_Printf(BbDbgBuf);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x / %x/ %x/ %x/ %x/ %x/ %x", " SGI/FEC/MCS/BF/Rsv/CRC/Tail",sgiext,fecext,vMCSS,bf,vrsv,vhtcrc8,vTail);
DCMD_Printf(BbDbgBuf);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "VHT-SIG-B");
DCMD_Printf(BbDbgBuf);
value32 = ODM_GetBBReg(pDM_Odm, 0xf34 ,bMaskDWord); //VHT SIG
{
vLength=(u2Byte)(value32&0x1fffff);
vbrsv = (u1Byte)((value32&0x600000)>>20);
vbTail =(u2Byte)((value32&0x1f800000)>>20);
vbcrc = (u1Byte)((value32&0x80000000)>>28);
}
//rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x", "F34", value32);
//DCMD_Printf(BbDbgBuf);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %x / %x/ %x/ %x/", " Length/Rsv/Tail/CRC",vLength,vbrsv,vbTail,vbcrc);
DCMD_Printf(BbDbgBuf);
}
VOID phydm_BasicProfile(
IN PVOID pDM_VOID
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
PADAPTER Adapter = pDM_Odm->Adapter;
char* Cut = NULL;
char* ICType = NULL;
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n%-35s", "% Basic Profile %");
DCMD_Printf(BbDbgBuf);
if(pDM_Odm->SupportICType == ODM_RTL8192C)
ICType = "RTL8192C";
else if(pDM_Odm->SupportICType == ODM_RTL8192D)
ICType = "RTL8192D";
else if(pDM_Odm->SupportICType == ODM_RTL8723A)
ICType = "RTL8723A";
else if(pDM_Odm->SupportICType == ODM_RTL8188E)
ICType = "RTL8188E";
else if(pDM_Odm->SupportICType == ODM_RTL8812)
ICType = "RTL8812A";
else if(pDM_Odm->SupportICType == ODM_RTL8821)
ICType = "RTL8821A";
else if(pDM_Odm->SupportICType == ODM_RTL8192E)
ICType = "RTL8192E";
else if(pDM_Odm->SupportICType == ODM_RTL8723B)
ICType = "RTL8723B";
else if(pDM_Odm->SupportICType == ODM_RTL8814A)
ICType = "RTL8814A";
else if(pDM_Odm->SupportICType == ODM_RTL8881A)
ICType = "RTL8881A";
else if(pDM_Odm->SupportICType == ODM_RTL8821B)
ICType = "RTL8821B";
else if(pDM_Odm->SupportICType == ODM_RTL8822B)
ICType = "RTL8822B";
else if(pDM_Odm->SupportICType == ODM_RTL8703B)
ICType = "RTL8703B";
else if(pDM_Odm->SupportICType == ODM_RTL8195A)
ICType = "RTL8195A";
else if(pDM_Odm->SupportICType == ODM_RTL8188F)
ICType = "RTL8188F";
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s: %s (MP Chip: %s)","IC Type", ICType, pDM_Odm->bIsMPChip?"Yes":"No");
DCMD_Printf(BbDbgBuf);
if(pDM_Odm->CutVersion==ODM_CUT_A)
Cut = "A";
else if(pDM_Odm->CutVersion==ODM_CUT_B)
Cut = "B";
else if(pDM_Odm->CutVersion==ODM_CUT_C)
Cut = "C";
else if(pDM_Odm->CutVersion==ODM_CUT_D)
Cut = "D";
else if(pDM_Odm->CutVersion==ODM_CUT_E)
Cut = "E";
else if(pDM_Odm->CutVersion==ODM_CUT_F)
Cut = "F";
else if(pDM_Odm->CutVersion==ODM_CUT_I)
Cut = "I";
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s: %s","Cut Version", Cut);
DCMD_Printf(BbDbgBuf);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s: %d","PHY Parameter Version", ODM_GetHWImgVersion(pDM_Odm));
DCMD_Printf(BbDbgBuf);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s: %d (Subversion: %d)","FW Version", Adapter->MgntInfo.FirmwareVersion, Adapter->MgntInfo.FirmwareSubVersion);
DCMD_Printf(BbDbgBuf);
//1 PHY DM Version List
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n%-35s","% PHYDM Version %");
DCMD_Printf(BbDbgBuf);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s: %s","Adaptivity", ADAPTIVITY_VERSION);
DCMD_Printf(BbDbgBuf);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s: %s","DIG", DIG_VERSION);
DCMD_Printf(BbDbgBuf);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s: %s","Dynamic BB PowerSaving", DYNAMIC_BBPWRSAV_VERSION);
DCMD_Printf(BbDbgBuf);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s: %s","CFO Tracking", CFO_TRACKING_VERSION);
DCMD_Printf(BbDbgBuf);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s: %s","Antenna Diversity", ANTDIV_VERSION);
DCMD_Printf(BbDbgBuf);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s: %s","Power Tracking", POWRTRACKING_VERSION);
DCMD_Printf(BbDbgBuf);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s: %s","Dynamic TxPower", DYNAMIC_TXPWR_VERSION);
DCMD_Printf(BbDbgBuf);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s: %s","RA Info", RAINFO_VERSION);
DCMD_Printf(BbDbgBuf);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s: %s","Antenna Detection", ANTDECT_VERSION);
DCMD_Printf(BbDbgBuf);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s: %s","Auto Channel Selection", ACS_VERSION);
DCMD_Printf(BbDbgBuf);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s: %s","EDCA Turbo", EDCATURBO_VERSION);
DCMD_Printf(BbDbgBuf);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s: %s","Path Diversity", PATHDIV_VERSION);
DCMD_Printf(BbDbgBuf);
rsprintf(BbDbgBuf, BT_TMP_BUF_SIZE, "\r\n %-35s: %s","RxHP", RXHP_VERSION);
DCMD_Printf(BbDbgBuf);
}
#endif
VOID
phydm_BasicDbgMessage
(
IN PVOID pDM_VOID
)
{
#if( DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm , PHYDM_FALSEALMCNT);
pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_BasicDbgMsg==>\n"));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("bLinked = %d, RSSI_Min = %d, CurrentIGI = 0x%x \n",
pDM_Odm->bLinked, pDM_Odm->RSSI_Min, pDM_DigTable->CurIGValue) );
ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("Cnt_Cck_fail = %d, Cnt_Ofdm_fail = %d, Total False Alarm = %d\n",
FalseAlmCnt->Cnt_Cck_fail, FalseAlmCnt->Cnt_Ofdm_fail, FalseAlmCnt->Cnt_all));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("RxRate = 0x%x, RSSI_A = %d, RSSI_B = %d\n",
pDM_Odm->RxRate, pDM_Odm->RSSI_A, pDM_Odm->RSSI_B));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("RSSI_C = %d, RSSI_D = %d\n", pDM_Odm->RSSI_C, pDM_Odm->RSSI_D));
#endif
}
#if( DM_ODM_SUPPORT_TYPE & ODM_CE)
struct _PHYDM_COMMAND {
char name[16];
u1Byte id;
};
enum PHYDM_CMD_ID {
PHYDM_ANTDIV,
};
struct _PHYDM_COMMAND phy_dm_ary[] = {
{"antdiv", PHYDM_ANTDIV},
};
s4Byte
PhyDM_Cmd(
IN PDM_ODM_T pDM_Odm,
IN char *input,
IN u4Byte in_len,
IN u1Byte flag,
OUT char *output,
IN u4Byte out_len
)
{
u4Byte used = 0;
if (flag == 0) {
if (out_len > used)
used += snprintf(output+used, out_len-used, "GET, nothing to print\n");
} else {
char *token;
u1Byte id = 0;
int var = 0;
token = strsep(&input, ", ");
if (token) {
int n, i;
n = sizeof(phy_dm_ary)/sizeof(struct _PHYDM_COMMAND);
for (i = 0; i < n; i++) {
if (strcmp(phy_dm_ary[i].name, token) == 0) {
id = phy_dm_ary[i].id;
break;
}
}
if (i == n) {
if (out_len > used)
used += snprintf(output+used, out_len-used, "SET, command not found!\n");
goto exit;
}
}
switch (id) {
case PHYDM_ANTDIV:
token = strsep(&input, ", ");
sscanf(token, "%d", &var);
if (out_len > used)
used += snprintf(output+used, out_len-used, "SET, old antdiv_select=%d\n", pDM_Odm->antdiv_select);
pDM_Odm->antdiv_select = var;
if (out_len > used)
used += snprintf(output+used, out_len-used, "SET, new antdiv_select=%d\n", pDM_Odm->antdiv_select);
break;
default:
if (out_len > used)
used += snprintf(output+used, out_len-used, "SET, unknown command!\n");
break;
}
}
exit:
return 0;
}
#endif

202
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_debug.h Executable file
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@ -0,0 +1,202 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __ODM_DBG_H__
#define __ODM_DBG_H__
//-----------------------------------------------------------------------------
// Define the debug levels
//
// 1. DBG_TRACE and DBG_LOUD are used for normal cases.
// So that, they can help SW engineer to develope or trace states changed
// and also help HW enginner to trace every operation to and from HW,
// e.g IO, Tx, Rx.
//
// 2. DBG_WARNNING and DBG_SERIOUS are used for unusual or error cases,
// which help us to debug SW or HW.
//
//-----------------------------------------------------------------------------
//
// Never used in a call to ODM_RT_TRACE()!
//
#define ODM_DBG_OFF 1
//
// Fatal bug.
// For example, Tx/Rx/IO locked up, OS hangs, memory access violation,
// resource allocation failed, unexpected HW behavior, HW BUG and so on.
//
#define ODM_DBG_SERIOUS 2
//
// Abnormal, rare, or unexpeted cases.
// For example, IRP/Packet/OID canceled, device suprisely unremoved and so on.
//
#define ODM_DBG_WARNING 3
//
// Normal case with useful information about current SW or HW state.
// For example, Tx/Rx descriptor to fill, Tx/Rx descriptor completed status,
// SW protocol state change, dynamic mechanism state change and so on.
//
#define ODM_DBG_LOUD 4
//
// Normal case with detail execution flow or information.
//
#define ODM_DBG_TRACE 5
//-----------------------------------------------------------------------------
// Define the tracing components
//
//-----------------------------------------------------------------------------
//BB Functions
#define ODM_COMP_DIG BIT0
#define ODM_COMP_RA_MASK BIT1
#define ODM_COMP_DYNAMIC_TXPWR BIT2
#define ODM_COMP_FA_CNT BIT3
#define ODM_COMP_RSSI_MONITOR BIT4
#define ODM_COMP_CCK_PD BIT5
#define ODM_COMP_ANT_DIV BIT6
#define ODM_COMP_PWR_SAVE BIT7
#define ODM_COMP_PWR_TRAIN BIT8
#define ODM_COMP_RATE_ADAPTIVE BIT9
#define ODM_COMP_PATH_DIV BIT10
#define ODM_COMP_PSD BIT11
#define ODM_COMP_DYNAMIC_PRICCA BIT12
#define ODM_COMP_RXHP BIT13
#define ODM_COMP_MP BIT14
#define ODM_COMP_CFO_TRACKING BIT15
#define ODM_COMP_ACS BIT16
#define PHYDM_COMP_ADAPTIVITY BIT17
//MAC Functions
#define ODM_COMP_EDCA_TURBO BIT20
#define ODM_COMP_EARLY_MODE BIT21
//RF Functions
#define ODM_COMP_TX_PWR_TRACK BIT24
#define ODM_COMP_RX_GAIN_TRACK BIT25
#define ODM_COMP_CALIBRATION BIT26
//Common Functions
#define ODM_COMP_COMMON BIT30
#define ODM_COMP_INIT BIT31
/*------------------------Export Marco Definition---------------------------*/
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
#define RT_PRINTK DbgPrint
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
#define DbgPrint printk
#define RT_PRINTK(fmt, args...) DbgPrint( "%s(): " fmt, __FUNCTION__, ## args);
#define RT_DISP(dbgtype, dbgflag, printstr)
#else
#define DbgPrint panic_printk
#define RT_PRINTK(fmt, args...) DbgPrint( "%s(): " fmt, __FUNCTION__, ## args);
#endif
#ifndef ASSERT
#define ASSERT(expr)
#endif
#if DBG
#define ODM_RT_TRACE(pDM_Odm, comp, level, fmt) \
if(((comp) & pDM_Odm->DebugComponents) && (level <= pDM_Odm->DebugLevel || level == ODM_DBG_SERIOUS)) \
{ \
if(pDM_Odm->SupportICType == ODM_RTL8192C) \
DbgPrint("[ODM-92C] "); \
else if(pDM_Odm->SupportICType == ODM_RTL8192D) \
DbgPrint("[ODM-92D] "); \
else if(pDM_Odm->SupportICType == ODM_RTL8723A) \
DbgPrint("[ODM-8723A] "); \
else if(pDM_Odm->SupportICType == ODM_RTL8188E) \
DbgPrint("[ODM-8188E] "); \
else if(pDM_Odm->SupportICType == ODM_RTL8192E) \
DbgPrint("[ODM-8192E] "); \
else if(pDM_Odm->SupportICType == ODM_RTL8812) \
DbgPrint("[ODM-8812] "); \
else if(pDM_Odm->SupportICType == ODM_RTL8821) \
DbgPrint("[ODM-8821] "); \
else if(pDM_Odm->SupportICType == ODM_RTL8814A) \
DbgPrint("[ODM-8814] "); \
RT_PRINTK fmt; \
}
#define ODM_RT_TRACE_F(pDM_Odm, comp, level, fmt) \
if(((comp) & pDM_Odm->DebugComponents) && (level <= pDM_Odm->DebugLevel)) \
{ \
RT_PRINTK fmt; \
}
#define ODM_RT_ASSERT(pDM_Odm, expr, fmt) \
if(!(expr)) { \
DbgPrint( "Assertion failed! %s at ......\n", #expr); \
DbgPrint( " ......%s,%s,line=%d\n",__FILE__,__FUNCTION__,__LINE__); \
RT_PRINTK fmt; \
ASSERT(FALSE); \
}
#define ODM_dbg_enter() { DbgPrint("==> %s\n", __FUNCTION__); }
#define ODM_dbg_exit() { DbgPrint("<== %s\n", __FUNCTION__); }
#define ODM_dbg_trace(str) { DbgPrint("%s:%s\n", __FUNCTION__, str); }
#define ODM_PRINT_ADDR(pDM_Odm, comp, level, title_str, ptr) \
if(((comp) & pDM_Odm->DebugComponents) && (level <= pDM_Odm->DebugLevel)) \
{ \
int __i; \
pu1Byte __ptr = (pu1Byte)ptr; \
DbgPrint("[ODM] "); \
DbgPrint(title_str); \
DbgPrint(" "); \
for( __i=0; __i<6; __i++ ) \
DbgPrint("%02X%s", __ptr[__i], (__i==5)?"":"-"); \
DbgPrint("\n"); \
}
#else
#define ODM_RT_TRACE(pDM_Odm, comp, level, fmt)
#define ODM_RT_TRACE_F(pDM_Odm, comp, level, fmt)
#define ODM_RT_ASSERT(pDM_Odm, expr, fmt)
#define ODM_dbg_enter()
#define ODM_dbg_exit()
#define ODM_dbg_trace(str)
#define ODM_PRINT_ADDR(pDM_Odm, comp, level, title_str, ptr)
#endif
VOID
PHYDM_InitDebugSetting(IN PDM_ODM_T pDM_Odm);
#define BB_TMP_BUF_SIZE 100
VOID phydm_BB_Debug_Info(IN PDM_ODM_T pDM_Odm);
VOID phydm_BasicProfile(IN PVOID pDM_VOID);
VOID phydm_BasicDbgMessage( IN PVOID pDM_VOID);
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
s4Byte
PhyDM_Cmd(
IN PDM_ODM_T pDM_Odm,
IN char *input,
IN u4Byte in_len,
IN u1Byte flag,
OUT char *output,
IN u4Byte out_len
);
#endif
#endif // __ODM_DBG_H__

835
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_interface.c Executable file
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@ -0,0 +1,835 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
//============================================================
// include files
//============================================================
#include "Mp_Precomp.h"
#include "phydm_precomp.h"
//
// ODM IO Relative API.
//
u1Byte
ODM_Read1Byte(
IN PDM_ODM_T pDM_Odm,
IN u4Byte RegAddr
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
prtl8192cd_priv priv = pDM_Odm->priv;
return RTL_R8(RegAddr);
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
PADAPTER Adapter = pDM_Odm->Adapter;
return rtw_read8(Adapter,RegAddr);
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
PADAPTER Adapter = pDM_Odm->Adapter;
return PlatformEFIORead1Byte(Adapter, RegAddr);
#endif
}
u2Byte
ODM_Read2Byte(
IN PDM_ODM_T pDM_Odm,
IN u4Byte RegAddr
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
prtl8192cd_priv priv = pDM_Odm->priv;
return RTL_R16(RegAddr);
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
PADAPTER Adapter = pDM_Odm->Adapter;
return rtw_read16(Adapter,RegAddr);
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
PADAPTER Adapter = pDM_Odm->Adapter;
return PlatformEFIORead2Byte(Adapter, RegAddr);
#endif
}
u4Byte
ODM_Read4Byte(
IN PDM_ODM_T pDM_Odm,
IN u4Byte RegAddr
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
prtl8192cd_priv priv = pDM_Odm->priv;
return RTL_R32(RegAddr);
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
PADAPTER Adapter = pDM_Odm->Adapter;
return rtw_read32(Adapter,RegAddr);
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
PADAPTER Adapter = pDM_Odm->Adapter;
return PlatformEFIORead4Byte(Adapter, RegAddr);
#endif
}
VOID
ODM_Write1Byte(
IN PDM_ODM_T pDM_Odm,
IN u4Byte RegAddr,
IN u1Byte Data
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
prtl8192cd_priv priv = pDM_Odm->priv;
RTL_W8(RegAddr, Data);
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
PADAPTER Adapter = pDM_Odm->Adapter;
rtw_write8(Adapter,RegAddr, Data);
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
PADAPTER Adapter = pDM_Odm->Adapter;
PlatformEFIOWrite1Byte(Adapter, RegAddr, Data);
#endif
}
VOID
ODM_Write2Byte(
IN PDM_ODM_T pDM_Odm,
IN u4Byte RegAddr,
IN u2Byte Data
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
prtl8192cd_priv priv = pDM_Odm->priv;
RTL_W16(RegAddr, Data);
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
PADAPTER Adapter = pDM_Odm->Adapter;
rtw_write16(Adapter,RegAddr, Data);
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
PADAPTER Adapter = pDM_Odm->Adapter;
PlatformEFIOWrite2Byte(Adapter, RegAddr, Data);
#endif
}
VOID
ODM_Write4Byte(
IN PDM_ODM_T pDM_Odm,
IN u4Byte RegAddr,
IN u4Byte Data
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
prtl8192cd_priv priv = pDM_Odm->priv;
RTL_W32(RegAddr, Data);
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
PADAPTER Adapter = pDM_Odm->Adapter;
rtw_write32(Adapter,RegAddr, Data);
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
PADAPTER Adapter = pDM_Odm->Adapter;
PlatformEFIOWrite4Byte(Adapter, RegAddr, Data);
#endif
}
VOID
ODM_SetMACReg(
IN PDM_ODM_T pDM_Odm,
IN u4Byte RegAddr,
IN u4Byte BitMask,
IN u4Byte Data
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
PHY_SetBBReg(pDM_Odm->priv, RegAddr, BitMask, Data);
#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN))
PADAPTER Adapter = pDM_Odm->Adapter;
PHY_SetBBReg(Adapter, RegAddr, BitMask, Data);
#endif
}
u4Byte
ODM_GetMACReg(
IN PDM_ODM_T pDM_Odm,
IN u4Byte RegAddr,
IN u4Byte BitMask
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
return PHY_QueryBBReg(pDM_Odm->priv, RegAddr, BitMask);
#elif(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
return PHY_QueryMacReg(pDM_Odm->Adapter, RegAddr, BitMask);
#endif
}
VOID
ODM_SetBBReg(
IN PDM_ODM_T pDM_Odm,
IN u4Byte RegAddr,
IN u4Byte BitMask,
IN u4Byte Data
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
PHY_SetBBReg(pDM_Odm->priv, RegAddr, BitMask, Data);
#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN))
PADAPTER Adapter = pDM_Odm->Adapter;
PHY_SetBBReg(Adapter, RegAddr, BitMask, Data);
#endif
}
u4Byte
ODM_GetBBReg(
IN PDM_ODM_T pDM_Odm,
IN u4Byte RegAddr,
IN u4Byte BitMask
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
return PHY_QueryBBReg(pDM_Odm->priv, RegAddr, BitMask);
#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN))
PADAPTER Adapter = pDM_Odm->Adapter;
return PHY_QueryBBReg(Adapter, RegAddr, BitMask);
#endif
}
VOID
ODM_SetRFReg(
IN PDM_ODM_T pDM_Odm,
IN ODM_RF_RADIO_PATH_E eRFPath,
IN u4Byte RegAddr,
IN u4Byte BitMask,
IN u4Byte Data
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
PHY_SetRFReg(pDM_Odm->priv, eRFPath, RegAddr, BitMask, Data);
#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN))
PADAPTER Adapter = pDM_Odm->Adapter;
PHY_SetRFReg(Adapter, eRFPath, RegAddr, BitMask, Data);
#endif
}
u4Byte
ODM_GetRFReg(
IN PDM_ODM_T pDM_Odm,
IN ODM_RF_RADIO_PATH_E eRFPath,
IN u4Byte RegAddr,
IN u4Byte BitMask
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
return PHY_QueryRFReg(pDM_Odm->priv, eRFPath, RegAddr, BitMask, 1);
#elif(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN))
PADAPTER Adapter = pDM_Odm->Adapter;
return PHY_QueryRFReg(Adapter, eRFPath, RegAddr, BitMask);
#endif
}
//
// ODM Memory relative API.
//
VOID
ODM_AllocateMemory(
IN PDM_ODM_T pDM_Odm,
OUT PVOID *pPtr,
IN u4Byte length
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
*pPtr = kmalloc(length, GFP_ATOMIC);
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE )
*pPtr = rtw_zvmalloc(length);
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
PADAPTER Adapter = pDM_Odm->Adapter;
PlatformAllocateMemory(Adapter, pPtr, length);
#endif
}
// length could be ignored, used to detect memory leakage.
VOID
ODM_FreeMemory(
IN PDM_ODM_T pDM_Odm,
OUT PVOID pPtr,
IN u4Byte length
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
kfree(pPtr);
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE )
rtw_vmfree(pPtr, length);
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
//PADAPTER Adapter = pDM_Odm->Adapter;
PlatformFreeMemory(pPtr, length);
#endif
}
VOID
ODM_MoveMemory(
IN PDM_ODM_T pDM_Odm,
OUT PVOID pDest,
IN PVOID pSrc,
IN u4Byte Length
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
memcpy(pDest, pSrc, Length);
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE )
_rtw_memcpy(pDest, pSrc, Length);
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
PlatformMoveMemory(pDest, pSrc, Length);
#endif
}
void ODM_Memory_Set
(IN PDM_ODM_T pDM_Odm,
IN PVOID pbuf,
IN s1Byte value,
IN u4Byte length)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE )
_rtw_memset(pbuf,value, length);
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
PlatformFillMemory(pbuf,length,value);
#endif
}
s4Byte ODM_CompareMemory(
IN PDM_ODM_T pDM_Odm,
IN PVOID pBuf1,
IN PVOID pBuf2,
IN u4Byte length
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
return memcmp(pBuf1,pBuf2,length);
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE )
return _rtw_memcmp(pBuf1,pBuf2,length);
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
return PlatformCompareMemory(pBuf1,pBuf2,length);
#endif
}
//
// ODM MISC relative API.
//
VOID
ODM_AcquireSpinLock(
IN PDM_ODM_T pDM_Odm,
IN RT_SPINLOCK_TYPE type
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
PADAPTER Adapter = pDM_Odm->Adapter;
rtw_odm_acquirespinlock(Adapter, type);
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
PADAPTER Adapter = pDM_Odm->Adapter;
PlatformAcquireSpinLock(Adapter, type);
#endif
}
VOID
ODM_ReleaseSpinLock(
IN PDM_ODM_T pDM_Odm,
IN RT_SPINLOCK_TYPE type
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE )
PADAPTER Adapter = pDM_Odm->Adapter;
rtw_odm_releasespinlock(Adapter, type);
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
PADAPTER Adapter = pDM_Odm->Adapter;
PlatformReleaseSpinLock(Adapter, type);
#endif
}
//
// Work item relative API. FOr MP driver only~!
//
VOID
ODM_InitializeWorkItem(
IN PDM_ODM_T pDM_Odm,
IN PRT_WORK_ITEM pRtWorkItem,
IN RT_WORKITEM_CALL_BACK RtWorkItemCallback,
IN PVOID pContext,
IN const char* szID
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
PADAPTER Adapter = pDM_Odm->Adapter;
PlatformInitializeWorkItem(Adapter, pRtWorkItem, RtWorkItemCallback, pContext, szID);
#endif
}
VOID
ODM_StartWorkItem(
IN PRT_WORK_ITEM pRtWorkItem
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
PlatformStartWorkItem(pRtWorkItem);
#endif
}
VOID
ODM_StopWorkItem(
IN PRT_WORK_ITEM pRtWorkItem
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
PlatformStopWorkItem(pRtWorkItem);
#endif
}
VOID
ODM_FreeWorkItem(
IN PRT_WORK_ITEM pRtWorkItem
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
PlatformFreeWorkItem(pRtWorkItem);
#endif
}
VOID
ODM_ScheduleWorkItem(
IN PRT_WORK_ITEM pRtWorkItem
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
PlatformScheduleWorkItem(pRtWorkItem);
#endif
}
VOID
ODM_IsWorkItemScheduled(
IN PRT_WORK_ITEM pRtWorkItem
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
PlatformIsWorkItemScheduled(pRtWorkItem);
#endif
}
//
// ODM Timer relative API.
//
VOID
ODM_StallExecution(
IN u4Byte usDelay
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
rtw_udelay_os(usDelay);
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
PlatformStallExecution(usDelay);
#endif
}
VOID
ODM_delay_ms(IN u4Byte ms)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
delay_ms(ms);
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
rtw_mdelay_os(ms);
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
delay_ms(ms);
#endif
}
VOID
ODM_delay_us(IN u4Byte us)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
delay_us(us);
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
rtw_udelay_os(us);
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
PlatformStallExecution(us);
#endif
}
VOID
ODM_sleep_ms(IN u4Byte ms)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
rtw_msleep_os(ms);
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
#endif
}
VOID
ODM_sleep_us(IN u4Byte us)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
rtw_usleep_os(us);
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
#endif
}
VOID
ODM_SetTimer(
IN PDM_ODM_T pDM_Odm,
IN PRT_TIMER pTimer,
IN u4Byte msDelay
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
mod_timer(pTimer, jiffies + RTL_MILISECONDS_TO_JIFFIES(msDelay));
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
_set_timer(pTimer,msDelay ); //ms
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
PADAPTER Adapter = pDM_Odm->Adapter;
PlatformSetTimer(Adapter, pTimer, msDelay);
#endif
}
VOID
ODM_InitializeTimer(
IN PDM_ODM_T pDM_Odm,
IN PRT_TIMER pTimer,
IN RT_TIMER_CALL_BACK CallBackFunc,
IN PVOID pContext,
IN const char* szID
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
init_timer(pTimer);
pTimer->function = CallBackFunc;
pTimer->data = (unsigned long)pDM_Odm;
mod_timer(pTimer, jiffies+RTL_MILISECONDS_TO_JIFFIES(10));
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
PADAPTER Adapter = pDM_Odm->Adapter;
_init_timer(pTimer,Adapter->pnetdev,CallBackFunc,pDM_Odm);
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
PADAPTER Adapter = pDM_Odm->Adapter;
PlatformInitializeTimer(Adapter, pTimer, CallBackFunc,pContext,szID);
#endif
}
VOID
ODM_CancelTimer(
IN PDM_ODM_T pDM_Odm,
IN PRT_TIMER pTimer
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
del_timer_sync(pTimer);
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
_cancel_timer_ex(pTimer);
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
PADAPTER Adapter = pDM_Odm->Adapter;
PlatformCancelTimer(Adapter, pTimer);
#endif
}
VOID
ODM_ReleaseTimer(
IN PDM_ODM_T pDM_Odm,
IN PRT_TIMER pTimer
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
PADAPTER Adapter = pDM_Odm->Adapter;
// <20120301, Kordan> If the initilization fails, InitializeAdapterXxx will return regardless of InitHalDm.
// Hence, uninitialized timers cause BSOD when the driver releases resources since the init fail.
if (pTimer == 0)
{
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_SERIOUS, ("=====>ODM_ReleaseTimer(), The timer is NULL! Please check it!\n"));
return;
}
PlatformReleaseTimer(Adapter, pTimer);
#endif
}
//
// ODM FW relative API.
//
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
VOID
ODM_FillH2CCmd(
IN PDM_ODM_T pDM_Odm,
IN u1Byte ElementID,
IN u4Byte CmdLen,
IN pu1Byte pCmdBuffer
)
{
PADAPTER Adapter = pDM_Odm->Adapter;
if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES)
{
switch(ElementID)
{
case ODM_H2C_RSSI_REPORT:
#if(DM_ODM_SUPPORT_TYPE & ODM_WIN)
FillH2CCmd(Adapter, H2C_RSSI_REPORT, CmdLen, pCmdBuffer);
#else
#if((RTL8812A_SUPPORT==1) ||(RTL8821A_SUPPORT==1))
FillH2CCmd_8812(Adapter, H2C_8812_RSSI_REPORT, CmdLen, pCmdBuffer);
#endif
#endif
break;
case ODM_H2C_IQ_CALIBRATION:
#if(DM_ODM_SUPPORT_TYPE & ODM_WIN)
FillH2CCmd(Adapter, H2C_IQ_CALIBRATION, CmdLen, pCmdBuffer);
#else
#if((RTL8812A_SUPPORT==1) ||(RTL8821A_SUPPORT==1))
FillH2CCmd_8812(Adapter, H2C_8812_IQ_CALIBRATION, CmdLen, pCmdBuffer);
#endif
#endif
break;
default:
break;
}
}
else if(pDM_Odm->SupportICType == ODM_RTL8192E)
{
switch(ElementID)
{
case ODM_H2C_RSSI_REPORT:
#if(DM_ODM_SUPPORT_TYPE & ODM_WIN)
FillH2CCmd(Adapter, H2C_RSSI_REPORT, CmdLen, pCmdBuffer);
#else
#if(RTL8192E_SUPPORT==1)
FillH2CCmd_8192E(Adapter, H2C_8192E_RSSI_REPORT, CmdLen, pCmdBuffer);
#endif
#endif
break;
default:
break;
}
}
else if(pDM_Odm->SupportICType == ODM_RTL8723B)
{
switch(ElementID)
{
case ODM_H2C_RSSI_REPORT:
#if(DM_ODM_SUPPORT_TYPE & ODM_WIN)
FillH2CCmd(Adapter, H2C_RSSI_REPORT, CmdLen, pCmdBuffer);
#else
#if(RTL8723B_SUPPORT==1)
FillH2CCmd8723B(Adapter, H2C_8723B_RSSI_SETTING, CmdLen, pCmdBuffer);
#endif
#endif
break;
case ODM_H2C_WIFI_CALIBRATION:
#if(DM_ODM_SUPPORT_TYPE & ODM_WIN)
FillH2CCmd(Adapter, H2C_WIFI_CALIBRATION, CmdLen, pCmdBuffer);
#else
#if(RTL8723B_SUPPORT==1)
FillH2CCmd8723B(Adapter, H2C_8723B_BT_WLAN_CALIBRATION, CmdLen, pCmdBuffer);
#endif
#endif
break;
default:
break;
}
}
else if(pDM_Odm->SupportICType == ODM_RTL8188E)
{
switch(ElementID)
{
case ODM_H2C_RSSI_REPORT:
//if((pDM_Odm->CutVersion == ODM_CUT_I) && (!pDM_Odm->RaSupport88E)){
if(!pDM_Odm->RaSupport88E){
#if(DM_ODM_SUPPORT_TYPE & ODM_WIN)
FillH2CCmd88E(Adapter, H2C_88E_RSSI_REPORT, CmdLen, pCmdBuffer);
#else
#if(RTL8188E_SUPPORT==1)
FillH2CCmd_88E(Adapter, H2C_RSSI_REPORT, CmdLen, pCmdBuffer);
#endif
#endif
}
break;
default:
break;
}
}
#if(DM_ODM_SUPPORT_TYPE & ODM_CE)
else if(pDM_Odm->SupportICType == ODM_RTL8723A)
{
switch(ElementID)
{
case ODM_H2C_RSSI_REPORT:
#if(RTL8723A_SUPPORT==1)
FillH2CCmd(Adapter, RSSI_SETTING_EID, CmdLen, pCmdBuffer);
#endif
break;
default:
break;
}
}
else if(pDM_Odm->SupportICType == ODM_RTL8192D)
{
switch(ElementID)
{
case ODM_H2C_RSSI_REPORT:
#if(RTL8192D_SUPPORT==1)
FillH2CCmd92D(Adapter, H2C_RSSI_REPORT, CmdLen, pCmdBuffer);
#endif
break;
default:
break;
}
}
#endif
else
{
switch(ElementID)
{
case ODM_H2C_RSSI_REPORT:
#if(DM_ODM_SUPPORT_TYPE & ODM_WIN)
FillH2CCmd92C(Adapter, H2C_RSSI_REPORT, CmdLen, pCmdBuffer);
#else
#if(RTL8192C_SUPPORT==1)
rtl8192c_FillH2CCmd(Adapter, RSSI_SETTING_EID, CmdLen, pCmdBuffer);
#endif
#endif
break;
default:
break;
}
}
}
#else
u4Byte
ODM_FillH2CCmd(
IN pu1Byte pH2CBuffer,
IN u4Byte H2CBufferLen,
IN u4Byte CmdNum,
IN pu4Byte pElementID,
IN pu4Byte pCmdLen,
IN pu1Byte* pCmbBuffer,
IN pu1Byte CmdStartSeq
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
//FillH2CCmd(pH2CBuffer, H2CBufferLen, CmdNum, pElementID, pCmdLen, pCmbBuffer, CmdStartSeq);
return FALSE;
#endif
return TRUE;
}
#endif
u8Byte
ODM_GetCurrentTime(
IN PDM_ODM_T pDM_Odm
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
return 0;
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
return (u8Byte)rtw_get_current_time();
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
return PlatformGetCurrentTime();
#endif
}
u8Byte
ODM_GetProgressingTime(
IN PDM_ODM_T pDM_Odm,
IN u8Byte Start_Time
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
return 0;
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
return rtw_get_passing_time_ms((u4Byte)Start_Time);
#elif(DM_ODM_SUPPORT_TYPE & ODM_WIN)
return ((PlatformGetCurrentTime() - Start_Time)>>10);
#endif
}

414
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_interface.h Executable file
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@ -0,0 +1,414 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __ODM_INTERFACE_H__
#define __ODM_INTERFACE_H__
//
// =========== Constant/Structure/Enum/... Define
//
//
// =========== Macro Define
//
#define _reg_all(_name) ODM_##_name
#define _reg_ic(_name, _ic) ODM_##_name##_ic
#define _bit_all(_name) BIT_##_name
#define _bit_ic(_name, _ic) BIT_##_name##_ic
// _cat: implemented by Token-Pasting Operator.
#if 0
#define _cat(_name, _ic_type, _func) \
( \
_func##_all(_name) \
)
#endif
/*===================================
#define ODM_REG_DIG_11N 0xC50
#define ODM_REG_DIG_11AC 0xDDD
ODM_REG(DIG,_pDM_Odm)
=====================================*/
#define _reg_11N(_name) ODM_REG_##_name##_11N
#define _reg_11AC(_name) ODM_REG_##_name##_11AC
#define _bit_11N(_name) ODM_BIT_##_name##_11N
#define _bit_11AC(_name) ODM_BIT_##_name##_11AC
#ifdef __ECOS
#define _rtk_cat(_name, _ic_type, _func) \
( \
((_ic_type) & ODM_IC_11N_SERIES)? _func##_11N(_name): \
_func##_11AC(_name) \
)
#else
#define _cat(_name, _ic_type, _func) \
( \
((_ic_type) & ODM_IC_11N_SERIES)? _func##_11N(_name): \
_func##_11AC(_name) \
)
#endif
/*
// only sample code
//#define _cat(_name, _ic_type, _func) \
// ( \
// ((_ic_type) & ODM_RTL8192C)? _func##_ic(_name, _8192C): \
// ((_ic_type) & ODM_RTL8192D)? _func##_ic(_name, _8192D): \
// ((_ic_type) & ODM_RTL8192S)? _func##_ic(_name, _8192S): \
// ((_ic_type) & ODM_RTL8723A)? _func##_ic(_name, _8723A): \
// ((_ic_type) & ODM_RTL8188E)? _func##_ic(_name, _8188E): \
// _func##_ic(_name, _8195) \
// )
*/
// _name: name of register or bit.
// Example: "ODM_REG(R_A_AGC_CORE1, pDM_Odm)"
// gets "ODM_R_A_AGC_CORE1" or "ODM_R_A_AGC_CORE1_8192C", depends on SupportICType.
#ifdef __ECOS
#define ODM_REG(_name, _pDM_Odm) _rtk_cat(_name, _pDM_Odm->SupportICType, _reg)
#define ODM_BIT(_name, _pDM_Odm) _rtk_cat(_name, _pDM_Odm->SupportICType, _bit)
#else
#define ODM_REG(_name, _pDM_Odm) _cat(_name, _pDM_Odm->SupportICType, _reg)
#define ODM_BIT(_name, _pDM_Odm) _cat(_name, _pDM_Odm->SupportICType, _bit)
#endif
typedef enum _ODM_H2C_CMD
{
ODM_H2C_RSSI_REPORT = 0,
ODM_H2C_PSD_RESULT=1,
ODM_H2C_PathDiv = 2,
ODM_H2C_WIFI_CALIBRATION = 3,
ODM_H2C_IQ_CALIBRATION = 4,
ODM_MAX_H2CCMD
}ODM_H2C_CMD;
//
// 2012/02/17 MH For non-MP compile pass only. Linux does not support workitem.
// Suggest HW team to use thread instead of workitem. Windows also support the feature.
//
#if (DM_ODM_SUPPORT_TYPE != ODM_WIN)
typedef void *PRT_WORK_ITEM ;
typedef void RT_WORKITEM_HANDLE,*PRT_WORKITEM_HANDLE;
typedef VOID (*RT_WORKITEM_CALL_BACK)(PVOID pContext);
#if 0
typedef struct tasklet_struct RT_WORKITEM_HANDLE, *PRT_WORKITEM_HANDLE;
typedef struct _RT_WORK_ITEM
{
RT_WORKITEM_HANDLE Handle; // Platform-dependent handle for this workitem, e.g. Ndis Workitem object.
PVOID Adapter; // Pointer to Adapter object.
PVOID pContext; // Parameter to passed to CallBackFunc().
RT_WORKITEM_CALL_BACK CallbackFunc; // Callback function of the workitem.
u1Byte RefCount; // 0: driver is going to unload, 1: No such workitem scheduled, 2: one workitem is schedueled.
PVOID pPlatformExt; // Pointer to platform-dependent extension.
BOOLEAN bFree;
char szID[36]; // An identity string of this workitem.
}RT_WORK_ITEM, *PRT_WORK_ITEM;
#endif
#endif
//
// =========== Extern Variable ??? It should be forbidden.
//
//
// =========== EXtern Function Prototype
//
u1Byte
ODM_Read1Byte(
IN PDM_ODM_T pDM_Odm,
IN u4Byte RegAddr
);
u2Byte
ODM_Read2Byte(
IN PDM_ODM_T pDM_Odm,
IN u4Byte RegAddr
);
u4Byte
ODM_Read4Byte(
IN PDM_ODM_T pDM_Odm,
IN u4Byte RegAddr
);
VOID
ODM_Write1Byte(
IN PDM_ODM_T pDM_Odm,
IN u4Byte RegAddr,
IN u1Byte Data
);
VOID
ODM_Write2Byte(
IN PDM_ODM_T pDM_Odm,
IN u4Byte RegAddr,
IN u2Byte Data
);
VOID
ODM_Write4Byte(
IN PDM_ODM_T pDM_Odm,
IN u4Byte RegAddr,
IN u4Byte Data
);
VOID
ODM_SetMACReg(
IN PDM_ODM_T pDM_Odm,
IN u4Byte RegAddr,
IN u4Byte BitMask,
IN u4Byte Data
);
u4Byte
ODM_GetMACReg(
IN PDM_ODM_T pDM_Odm,
IN u4Byte RegAddr,
IN u4Byte BitMask
);
VOID
ODM_SetBBReg(
IN PDM_ODM_T pDM_Odm,
IN u4Byte RegAddr,
IN u4Byte BitMask,
IN u4Byte Data
);
u4Byte
ODM_GetBBReg(
IN PDM_ODM_T pDM_Odm,
IN u4Byte RegAddr,
IN u4Byte BitMask
);
VOID
ODM_SetRFReg(
IN PDM_ODM_T pDM_Odm,
IN ODM_RF_RADIO_PATH_E eRFPath,
IN u4Byte RegAddr,
IN u4Byte BitMask,
IN u4Byte Data
);
u4Byte
ODM_GetRFReg(
IN PDM_ODM_T pDM_Odm,
IN ODM_RF_RADIO_PATH_E eRFPath,
IN u4Byte RegAddr,
IN u4Byte BitMask
);
//
// Memory Relative Function.
//
VOID
ODM_AllocateMemory(
IN PDM_ODM_T pDM_Odm,
OUT PVOID *pPtr,
IN u4Byte length
);
VOID
ODM_FreeMemory(
IN PDM_ODM_T pDM_Odm,
OUT PVOID pPtr,
IN u4Byte length
);
VOID
ODM_MoveMemory(
IN PDM_ODM_T pDM_Odm,
OUT PVOID pDest,
IN PVOID pSrc,
IN u4Byte Length
);
s4Byte ODM_CompareMemory(
IN PDM_ODM_T pDM_Odm,
IN PVOID pBuf1,
IN PVOID pBuf2,
IN u4Byte length
);
void ODM_Memory_Set
(IN PDM_ODM_T pDM_Odm,
IN PVOID pbuf,
IN s1Byte value,
IN u4Byte length);
//
// ODM MISC-spin lock relative API.
//
VOID
ODM_AcquireSpinLock(
IN PDM_ODM_T pDM_Odm,
IN RT_SPINLOCK_TYPE type
);
VOID
ODM_ReleaseSpinLock(
IN PDM_ODM_T pDM_Odm,
IN RT_SPINLOCK_TYPE type
);
//
// ODM MISC-workitem relative API.
//
VOID
ODM_InitializeWorkItem(
IN PDM_ODM_T pDM_Odm,
IN PRT_WORK_ITEM pRtWorkItem,
IN RT_WORKITEM_CALL_BACK RtWorkItemCallback,
IN PVOID pContext,
IN const char* szID
);
VOID
ODM_StartWorkItem(
IN PRT_WORK_ITEM pRtWorkItem
);
VOID
ODM_StopWorkItem(
IN PRT_WORK_ITEM pRtWorkItem
);
VOID
ODM_FreeWorkItem(
IN PRT_WORK_ITEM pRtWorkItem
);
VOID
ODM_ScheduleWorkItem(
IN PRT_WORK_ITEM pRtWorkItem
);
VOID
ODM_IsWorkItemScheduled(
IN PRT_WORK_ITEM pRtWorkItem
);
//
// ODM Timer relative API.
//
VOID
ODM_StallExecution(
IN u4Byte usDelay
);
VOID
ODM_delay_ms(IN u4Byte ms);
VOID
ODM_delay_us(IN u4Byte us);
VOID
ODM_sleep_ms(IN u4Byte ms);
VOID
ODM_sleep_us(IN u4Byte us);
VOID
ODM_SetTimer(
IN PDM_ODM_T pDM_Odm,
IN PRT_TIMER pTimer,
IN u4Byte msDelay
);
VOID
ODM_InitializeTimer(
IN PDM_ODM_T pDM_Odm,
IN PRT_TIMER pTimer,
IN RT_TIMER_CALL_BACK CallBackFunc,
IN PVOID pContext,
IN const char* szID
);
VOID
ODM_CancelTimer(
IN PDM_ODM_T pDM_Odm,
IN PRT_TIMER pTimer
);
VOID
ODM_ReleaseTimer(
IN PDM_ODM_T pDM_Odm,
IN PRT_TIMER pTimer
);
//
// ODM FW relative API.
//
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
VOID
ODM_FillH2CCmd(
IN PDM_ODM_T pDM_Odm,
IN u1Byte ElementID,
IN u4Byte CmdLen,
IN pu1Byte pCmdBuffer
);
#else
u4Byte
ODM_FillH2CCmd(
IN pu1Byte pH2CBuffer,
IN u4Byte H2CBufferLen,
IN u4Byte CmdNum,
IN pu4Byte pElementID,
IN pu4Byte pCmdLen,
IN pu1Byte* pCmbBuffer,
IN pu1Byte CmdStartSeq
);
#endif
u8Byte
ODM_GetCurrentTime(
IN PDM_ODM_T pDM_Odm
);
u8Byte
ODM_GetProgressingTime(
IN PDM_ODM_T pDM_Odm,
IN u8Byte Start_Time
);
#endif // __ODM_INTERFACE_H__

296
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_precomp.h Executable file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __ODM_PRECOMP_H__
#define __ODM_PRECOMP_H__
#include "phydm_types.h"
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
#include "Precomp.h" // We need to include mp_precomp.h due to batch file setting.
#else
#define TEST_FALG___ 1
#endif
//2 Config Flags and Structs - defined by each ODM Type
#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
#include "../8192cd_cfg.h"
#include "../odm_inc.h"
#include "../8192cd.h"
#include "../8192cd_util.h"
#ifdef _BIG_ENDIAN_
#define ODM_ENDIAN_TYPE ODM_ENDIAN_BIG
#else
#define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE
#endif
#ifdef AP_BUILD_WORKAROUND
#include "../8192cd_headers.h"
#include "../8192cd_debug.h"
#endif
#elif (DM_ODM_SUPPORT_TYPE == ODM_ADSL)
// Flags
#include "../8192cd_cfg.h" // OUTSRC needs ADSL config flags.
#include "../odm_inc.h" // OUTSRC needs some extra flags.
// Data Structure
#include "../common_types.h" // OUTSRC and rtl8192cd both needs basic type such as UINT8 and BIT0.
#include "../8192cd.h" // OUTSRC needs basic ADSL struct definition.
#include "../8192cd_util.h" // OUTSRC needs basic I/O function.
#ifdef _BIG_ENDIAN_
#define ODM_ENDIAN_TYPE ODM_ENDIAN_BIG
#else
#define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE
#endif
#ifdef ADSL_AP_BUILD_WORKAROUND
// NESTED_INC: Functions defined outside should not be included!! Marked by Annie, 2011-10-14.
#include "../8192cd_headers.h"
#include "../8192cd_debug.h"
#endif
#elif (DM_ODM_SUPPORT_TYPE ==ODM_CE)
//#include <drv_conf.h>
//#include <basic_types.h>
//#include <osdep_service.h>
//#include <drv_types.h>
//#include <rtw_byteorder.h>
//#include <hal_intf.h>
#define BEAMFORMING_SUPPORT 0
#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN)
#include "Mp_Precomp.h"
#define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE
#endif
//2 Hardware Parameter Files
#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
#if (RTL8192C_SUPPORT==1)
#include "rtl8192c/Hal8192CEFWImg_AP.h"
#include "rtl8192c/Hal8192CEPHYImg_AP.h"
#include "rtl8192c/Hal8192CEMACImg_AP.h"
#endif
#elif (DM_ODM_SUPPORT_TYPE == ODM_ADSL)
#include "rtl8192c/Hal8192CEFWImg_ADSL.h"
#include "rtl8192c/Hal8192CEPHYImg_ADSL.h"
#include "rtl8192c/Hal8192CEMACImg_ADSL.h"
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
#if(RTL8192CE_SUPPORT ==1)
#include "rtl8192c/Hal8192CEFWImg_CE.h"
#include "rtl8192c/Hal8192CEPHYImg_CE.h"
#include "rtl8192c/Hal8192CEMACImg_CE.h"
#endif
#if(RTL8192CU_SUPPORT ==1)
#include "rtl8192c/Hal8192CUFWImg_CE.h"
#include "rtl8192c/Hal8192CUPHYImg_CE.h"
#include "rtl8192c/Hal8192CUMACImg_CE.h"
#endif
#if(RTL8192DE_SUPPORT ==1)
#include "rtl8192d/Hal8192DEFWImg_CE.h"
#include "rtl8192d/Hal8192DEPHYImg_CE.h"
#include "rtl8192d/Hal8192DEMACImg_CE.h"
#endif
#if(RTL8192DU_SUPPORT ==1)
#include "rtl8192d/Hal8192DUFWImg_CE.h"
#include "rtl8192d/Hal8192DUPHYImg_CE.h"
#include "rtl8192d/Hal8192DUMACImg_CE.h"
#endif
#if(RTL8723AS_SUPPORT==1)
#include "rtl8723a/Hal8723SHWImg_CE.h"
#endif
#if(RTL8723AU_SUPPORT==1)
#include "rtl8723a/Hal8723UHWImg_CE.h"
#endif
#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN)
#endif
//2 OutSrc Header Files
#include "phydm.h"
#include "phydm_HWConfig.h"
#include "phydm_debug.h"
#include "phydm_RegDefine11AC.h"
#include "phydm_RegDefine11N.h"
#include "phydm_AntDiv.h"
#include "phydm_interface.h"
#include "phydm_reg.h"
#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
#if (RTL8192C_SUPPORT==1)
#include "rtl8192c/HalDMOutSrc8192C_AP.h"
#endif
#if (RTL8188E_SUPPORT==1)
#include "rtl8188e/Hal8188ERateAdaptive.h"//for RA,Power training
#endif
#elif (DM_ODM_SUPPORT_TYPE == ODM_ADSL)
#include "rtl8192c/HalDMOutSrc8192C_ADSL.h"
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
//#include "hal_com.h"
#include "HalPhyRf.h"
#if (RTL8192C_SUPPORT==1)
#ifdef CONFIG_INTEL_PROXIM
#include "../proxim/intel_proxim.h"
#endif
#include "rtl8192c/HalDMOutSrc8192C_CE.h"
#include <rtl8192c_hal.h>
#endif
#if (RTL8192D_SUPPORT==1)
#include "rtl8192d/HalDMOutSrc8192D_CE.h"
#include "rtl8192d_hal.h"
#endif
#if (RTL8723A_SUPPORT==1)
#include "rtl8192c/HalDMOutSrc8192C_CE.h" //for IQK,LCK,Power-tracking
#include "rtl8723a_hal.h"
#endif
#if (RTL8188E_SUPPORT==1)
#include "rtl8188e/HalPhyRf_8188e.h"//for IQK,LCK,Power-tracking
#include "rtl8188e/Hal8188ERateAdaptive.h"//for RA,Power training
#include "rtl8188e_hal.h"
#endif
#if (RTL8192E_SUPPORT==1)
#include "rtl8192e/HalPhyRf_8192e.h"//for IQK,LCK,Power-tracking
#include "rtl8192e_hal.h"
#endif
#if (RTL8812A_SUPPORT==1)
#include "rtl8812a/HalPhyRf_8812A.h"//for IQK,LCK,Power-tracking
#include "rtl8812a_hal.h"
#endif
#if (RTL8821A_SUPPORT==1)
#include "rtl8821a/HalPhyRf_8821A.h"//for IQK,LCK,Power-tracking
#include "rtl8812a/HalPhyRf_8812A.h"//for IQK,LCK,Power-tracking
#include "rtl8812a_hal.h"
#include "rtl8821a/PhyDM_IQK_8821A.h"
#endif
#if (RTL8723B_SUPPORT==1)
#include "rtl8723b/HalPhyRf_8723B.h"//for IQK,LCK,Power-tracking
#include "rtl8723b_hal.h"
#endif
#endif
#if (RTL8192C_SUPPORT==1)
#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
#include "rtl8192c/Hal8192CHWImg_MAC.h"
#include "rtl8192c/Hal8192CHWImg_RF.h"
#include "rtl8192c/Hal8192CHWImg_BB.h"
#include "rtl8192c/Hal8192CHWImg_FW.h"
#endif
#include "rtl8192c/phydm_RTL8192C.h"
#endif
#if (RTL8192D_SUPPORT==1)
#include "rtl8192d/phydm_RTL8192D.h"
#endif
#if (RTL8723A_SUPPORT==1)
#include "rtl8723a/HalHWImg8723A_MAC.h"
#include "rtl8723a/HalHWImg8723A_RF.h"
#include "rtl8723a/HalHWImg8723A_BB.h"
#include "rtl8723a/HalHWImg8723A_FW.h"
#include "rtl8723a/phydm_RegConfig8723A.h"
#endif
#if (RTL8188E_SUPPORT==1)
#include "rtl8188e/HalHWImg8188E_MAC.h"
#include "rtl8188e/HalHWImg8188E_RF.h"
#include "rtl8188e/HalHWImg8188E_BB.h"
#include "rtl8188e/HalHWImg8188E_FW.h"
#include "rtl8188e/Hal8188EReg.h"
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
#include "rtl8188e/HalPhyRf_8188e.h"
#endif
#if (TESTCHIP_SUPPORT == 1)
#include "rtl8188e/HalHWImg8188E_TestChip_MAC.h"
#include "rtl8188e/HalHWImg8188E_TestChip_RF.h"
#include "rtl8188e/HalHWImg8188E_TestChip_BB.h"
#endif
#include "rtl8188e/phydm_RegConfig8188E.h"
#include "rtl8188e/phydm_RTL8188E.h"
#endif
#if (RTL8192E_SUPPORT==1)
#include "rtl8192e/HalHWImg8192E_MAC.h"
#include "rtl8192e/HalHWImg8192E_RF.h"
#include "rtl8192e/HalHWImg8192E_BB.h"
#include "rtl8192e/HalHWImg8192E_FW.h"
#include "rtl8192e/Hal8192EReg.h"
#include "rtl8192e/phydm_RegConfig8192E.h"
#include "rtl8192e/phydm_RTL8192E.h"
#endif
#if (RTL8723B_SUPPORT==1)
#include "rtl8723b/HalHWImg8723B_MAC.h"
#include "rtl8723b/HalHWImg8723B_RF.h"
#include "rtl8723b/HalHWImg8723B_BB.h"
#include "rtl8723b/HalHWImg8723B_FW.h"
#include "rtl8723b/HalHWImg8723B_MP.h"
#include "rtl8723b/Hal8723BReg.h"
#include "rtl8723b/phydm_RTL8723B.h"
#include "rtl8723b/phydm_RegConfig8723B.h"
#endif
#if (RTL8812A_SUPPORT==1)
#include "rtl8812a/HalHWImg8812A_MAC.h"
#include "rtl8812a/HalHWImg8812A_RF.h"
#include "rtl8812a/HalHWImg8812A_BB.h"
#include "rtl8812a/HalHWImg8812A_FW.h"
#include "rtl8812a/phydm_RegConfig8812A.h"
#include "rtl8812a/phydm_RTL8812A.h"
#endif
#if (RTL8821A_SUPPORT==1)
#include "rtl8821a/HalHWImg8821A_MAC.h"
#include "rtl8821a/HalHWImg8821A_RF.h"
#include "rtl8821a/HalHWImg8821A_BB.h"
#include "rtl8821a/HalHWImg8821A_FW.h"
#include "rtl8821a/phydm_RegConfig8821A.h"
#include "rtl8821a/phydm_RTL8821A.h"
#endif
#endif // __ODM_PRECOMP_H__

208
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_reg.h Executable file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
//============================================================
// File Name: odm_reg.h
//
// Description:
//
// This file is for general register definition.
//
//
//============================================================
#ifndef __HAL_ODM_REG_H__
#define __HAL_ODM_REG_H__
//
// Register Definition
//
//MAC REG
#define ODM_BB_RESET 0x002
#define ODM_DUMMY 0x4fe
#define RF_T_METER_OLD 0x24
#define RF_T_METER_NEW 0x42
#define ODM_EDCA_VO_PARAM 0x500
#define ODM_EDCA_VI_PARAM 0x504
#define ODM_EDCA_BE_PARAM 0x508
#define ODM_EDCA_BK_PARAM 0x50C
#define ODM_TXPAUSE 0x522
//BB REG
#define ODM_FPGA_PHY0_PAGE8 0x800
#define ODM_PSD_SETTING 0x808
#define ODM_AFE_SETTING 0x818
#define ODM_TXAGC_B_6_18 0x830
#define ODM_TXAGC_B_24_54 0x834
#define ODM_TXAGC_B_MCS32_5 0x838
#define ODM_TXAGC_B_MCS0_MCS3 0x83c
#define ODM_TXAGC_B_MCS4_MCS7 0x848
#define ODM_TXAGC_B_MCS8_MCS11 0x84c
#define ODM_ANALOG_REGISTER 0x85c
#define ODM_RF_INTERFACE_OUTPUT 0x860
#define ODM_TXAGC_B_MCS12_MCS15 0x868
#define ODM_TXAGC_B_11_A_2_11 0x86c
#define ODM_AD_DA_LSB_MASK 0x874
#define ODM_ENABLE_3_WIRE 0x88c
#define ODM_PSD_REPORT 0x8b4
#define ODM_R_ANT_SELECT 0x90c
#define ODM_CCK_ANT_SELECT 0xa07
#define ODM_CCK_PD_THRESH 0xa0a
#define ODM_CCK_RF_REG1 0xa11
#define ODM_CCK_MATCH_FILTER 0xa20
#define ODM_CCK_RAKE_MAC 0xa2e
#define ODM_CCK_CNT_RESET 0xa2d
#define ODM_CCK_TX_DIVERSITY 0xa2f
#define ODM_CCK_FA_CNT_MSB 0xa5b
#define ODM_CCK_FA_CNT_LSB 0xa5c
#define ODM_CCK_NEW_FUNCTION 0xa75
#define ODM_OFDM_PHY0_PAGE_C 0xc00
#define ODM_OFDM_RX_ANT 0xc04
#define ODM_R_A_RXIQI 0xc14
#define ODM_R_A_AGC_CORE1 0xc50
#define ODM_R_A_AGC_CORE2 0xc54
#define ODM_R_B_AGC_CORE1 0xc58
#define ODM_R_AGC_PAR 0xc70
#define ODM_R_HTSTF_AGC_PAR 0xc7c
#define ODM_TX_PWR_TRAINING_A 0xc90
#define ODM_TX_PWR_TRAINING_B 0xc98
#define ODM_OFDM_FA_CNT1 0xcf0
#define ODM_OFDM_PHY0_PAGE_D 0xd00
#define ODM_OFDM_FA_CNT2 0xda0
#define ODM_OFDM_FA_CNT3 0xda4
#define ODM_OFDM_FA_CNT4 0xda8
#define ODM_TXAGC_A_6_18 0xe00
#define ODM_TXAGC_A_24_54 0xe04
#define ODM_TXAGC_A_1_MCS32 0xe08
#define ODM_TXAGC_A_MCS0_MCS3 0xe10
#define ODM_TXAGC_A_MCS4_MCS7 0xe14
#define ODM_TXAGC_A_MCS8_MCS11 0xe18
#define ODM_TXAGC_A_MCS12_MCS15 0xe1c
//RF REG
#define ODM_GAIN_SETTING 0x00
#define ODM_CHANNEL 0x18
#define ODM_RF_T_METER 0x24
#define ODM_RF_T_METER_92D 0x42
#define ODM_RF_T_METER_88E 0x42
#define ODM_RF_T_METER_92E 0x42
#define ODM_RF_T_METER_8812 0x42
//Ant Detect Reg
#define ODM_DPDT 0x300
//PSD Init
#define ODM_PSDREG 0x808
//92D Path Div
#define PATHDIV_REG 0xB30
#define PATHDIV_TRI 0xBA0
//
// Bitmap Definition
//
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP))
// TX AGC
#define rTxAGC_A_CCK11_CCK1_JAguar 0xc20
#define rTxAGC_A_Ofdm18_Ofdm6_JAguar 0xc24
#define rTxAGC_A_Ofdm54_Ofdm24_JAguar 0xc28
#define rTxAGC_A_MCS3_MCS0_JAguar 0xc2c
#define rTxAGC_A_MCS7_MCS4_JAguar 0xc30
#define rTxAGC_A_MCS11_MCS8_JAguar 0xc34
#define rTxAGC_A_MCS15_MCS12_JAguar 0xc38
#define rTxAGC_A_Nss1Index3_Nss1Index0_JAguar 0xc3c
#define rTxAGC_A_Nss1Index7_Nss1Index4_JAguar 0xc40
#define rTxAGC_A_Nss2Index1_Nss1Index8_JAguar 0xc44
#define rTxAGC_A_Nss2Index5_Nss2Index2_JAguar 0xc48
#define rTxAGC_A_Nss2Index9_Nss2Index6_JAguar 0xc4c
#if defined(CONFIG_WLAN_HAL_8814AE)
#define rTxAGC_A_MCS19_MCS16_JAguar 0xcd8
#define rTxAGC_A_MCS23_MCS20_JAguar 0xcdc
#define rTxAGC_A_Nss3Index3_Nss3Index0_JAguar 0xce0
#define rTxAGC_A_Nss3Index7_Nss3Index4_JAguar 0xce4
#define rTxAGC_A_Nss3Index9_Nss3Index8_JAguar 0xce8
#endif
#define rTxAGC_B_CCK11_CCK1_JAguar 0xe20
#define rTxAGC_B_Ofdm18_Ofdm6_JAguar 0xe24
#define rTxAGC_B_Ofdm54_Ofdm24_JAguar 0xe28
#define rTxAGC_B_MCS3_MCS0_JAguar 0xe2c
#define rTxAGC_B_MCS7_MCS4_JAguar 0xe30
#define rTxAGC_B_MCS11_MCS8_JAguar 0xe34
#define rTxAGC_B_MCS15_MCS12_JAguar 0xe38
#define rTxAGC_B_Nss1Index3_Nss1Index0_JAguar 0xe3c
#define rTxAGC_B_Nss1Index7_Nss1Index4_JAguar 0xe40
#define rTxAGC_B_Nss2Index1_Nss1Index8_JAguar 0xe44
#define rTxAGC_B_Nss2Index5_Nss2Index2_JAguar 0xe48
#define rTxAGC_B_Nss2Index9_Nss2Index6_JAguar 0xe4c
#if defined(CONFIG_WLAN_HAL_8814AE)
#define rTxAGC_B_MCS19_MCS16_JAguar 0xed8
#define rTxAGC_B_MCS23_MCS20_JAguar 0xedc
#define rTxAGC_B_Nss3Index3_Nss3Index0_JAguar 0xee0
#define rTxAGC_B_Nss3Index7_Nss3Index4_JAguar 0xee4
#define rTxAGC_B_Nss3Index9_Nss3Index8_JAguar 0xee8
#define rTxAGC_C_CCK11_CCK1_JAguar 0x1820
#define rTxAGC_C_Ofdm18_Ofdm6_JAguar 0x1824
#define rTxAGC_C_Ofdm54_Ofdm24_JAguar 0x1828
#define rTxAGC_C_MCS3_MCS0_JAguar 0x182c
#define rTxAGC_C_MCS7_MCS4_JAguar 0x1830
#define rTxAGC_C_MCS11_MCS8_JAguar 0x1834
#define rTxAGC_C_MCS15_MCS12_JAguar 0x1838
#define rTxAGC_C_Nss1Index3_Nss1Index0_JAguar 0x183c
#define rTxAGC_C_Nss1Index7_Nss1Index4_JAguar 0x1840
#define rTxAGC_C_Nss2Index1_Nss1Index8_JAguar 0x1844
#define rTxAGC_C_Nss2Index5_Nss2Index2_JAguar 0x1848
#define rTxAGC_C_Nss2Index9_Nss2Index6_JAguar 0x184c
#define rTxAGC_C_MCS19_MCS16_JAguar 0x18d8
#define rTxAGC_C_MCS23_MCS20_JAguar 0x18dc
#define rTxAGC_C_Nss3Index3_Nss3Index0_JAguar 0x18e0
#define rTxAGC_C_Nss3Index7_Nss3Index4_JAguar 0x18e4
#define rTxAGC_C_Nss3Index9_Nss3Index8_JAguar 0x18e8
#define rTxAGC_D_CCK11_CCK1_JAguar 0x1a20
#define rTxAGC_D_Ofdm18_Ofdm6_JAguar 0x1a24
#define rTxAGC_D_Ofdm54_Ofdm24_JAguar 0x1a28
#define rTxAGC_D_MCS3_MCS0_JAguar 0x1a2c
#define rTxAGC_D_MCS7_MCS4_JAguar 0x1a30
#define rTxAGC_D_MCS11_MCS8_JAguar 0x1a34
#define rTxAGC_D_MCS15_MCS12_JAguar 0x1a38
#define rTxAGC_D_Nss1Index3_Nss1Index0_JAguar 0x1a3c
#define rTxAGC_D_Nss1Index7_Nss1Index4_JAguar 0x1a40
#define rTxAGC_D_Nss2Index1_Nss1Index8_JAguar 0x1a44
#define rTxAGC_D_Nss2Index5_Nss2Index2_JAguar 0x1a48
#define rTxAGC_D_Nss2Index9_Nss2Index6_JAguar 0x1a4c
#define rTxAGC_D_MCS19_MCS16_JAguar 0x1ad8
#define rTxAGC_D_MCS23_MCS20_JAguar 0x1adc
#define rTxAGC_D_Nss3Index3_Nss3Index0_JAguar 0x1ae0
#define rTxAGC_D_Nss3Index7_Nss3Index4_JAguar 0x1ae4
#define rTxAGC_D_Nss3Index9_Nss3Index8_JAguar 0x1ae8
#endif
#define bTxAGC_byte0_Jaguar 0xff
#define bTxAGC_byte1_Jaguar 0xff00
#define bTxAGC_byte2_Jaguar 0xff0000
#define bTxAGC_byte3_Jaguar 0xff000000
#endif
#define BIT_FA_RESET BIT0
#endif

409
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_types.h Executable file
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __ODM_TYPES_H__
#define __ODM_TYPES_H__
#define ODM_RATEMCS15_SG 0x1c
#define ODM_RATEMCS32 0x20
// CCK Rates, TxHT = 0
#define ODM_RATE1M 0x00
#define ODM_RATE2M 0x01
#define ODM_RATE5_5M 0x02
#define ODM_RATE11M 0x03
// OFDM Rates, TxHT = 0
#define ODM_RATE6M 0x04
#define ODM_RATE9M 0x05
#define ODM_RATE12M 0x06
#define ODM_RATE18M 0x07
#define ODM_RATE24M 0x08
#define ODM_RATE36M 0x09
#define ODM_RATE48M 0x0A
#define ODM_RATE54M 0x0B
// MCS Rates, TxHT = 1
#define ODM_RATEMCS0 0x0C
#define ODM_RATEMCS1 0x0D
#define ODM_RATEMCS2 0x0E
#define ODM_RATEMCS3 0x0F
#define ODM_RATEMCS4 0x10
#define ODM_RATEMCS5 0x11
#define ODM_RATEMCS6 0x12
#define ODM_RATEMCS7 0x13
#define ODM_RATEMCS8 0x14
#define ODM_RATEMCS9 0x15
#define ODM_RATEMCS10 0x16
#define ODM_RATEMCS11 0x17
#define ODM_RATEMCS12 0x18
#define ODM_RATEMCS13 0x19
#define ODM_RATEMCS14 0x1A
#define ODM_RATEMCS15 0x1B
#define ODM_RATEMCS16 0x1C
#define ODM_RATEMCS17 0x1D
#define ODM_RATEMCS18 0x1E
#define ODM_RATEMCS19 0x1F
#define ODM_RATEMCS20 0x20
#define ODM_RATEMCS21 0x21
#define ODM_RATEMCS22 0x22
#define ODM_RATEMCS23 0x23
#define ODM_RATEMCS24 0x24
#define ODM_RATEMCS25 0x25
#define ODM_RATEMCS26 0x26
#define ODM_RATEMCS27 0x27
#define ODM_RATEMCS28 0x28
#define ODM_RATEMCS29 0x29
#define ODM_RATEMCS30 0x2A
#define ODM_RATEMCS31 0x2B
#define ODM_RATEVHTSS1MCS0 0x2C
#define ODM_RATEVHTSS1MCS1 0x2D
#define ODM_RATEVHTSS1MCS2 0x2E
#define ODM_RATEVHTSS1MCS3 0x2F
#define ODM_RATEVHTSS1MCS4 0x30
#define ODM_RATEVHTSS1MCS5 0x31
#define ODM_RATEVHTSS1MCS6 0x32
#define ODM_RATEVHTSS1MCS7 0x33
#define ODM_RATEVHTSS1MCS8 0x34
#define ODM_RATEVHTSS1MCS9 0x35
#define ODM_RATEVHTSS2MCS0 0x36
#define ODM_RATEVHTSS2MCS1 0x37
#define ODM_RATEVHTSS2MCS2 0x38
#define ODM_RATEVHTSS2MCS3 0x39
#define ODM_RATEVHTSS2MCS4 0x3A
#define ODM_RATEVHTSS2MCS5 0x3B
#define ODM_RATEVHTSS2MCS6 0x3C
#define ODM_RATEVHTSS2MCS7 0x3D
#define ODM_RATEVHTSS2MCS8 0x3E
#define ODM_RATEVHTSS2MCS9 0x3F
#define ODM_RATEVHTSS3MCS0 0x40
#define ODM_RATEVHTSS3MCS1 0x41
#define ODM_RATEVHTSS3MCS2 0x42
#define ODM_RATEVHTSS3MCS3 0x43
#define ODM_RATEVHTSS3MCS4 0x44
#define ODM_RATEVHTSS3MCS5 0x45
#define ODM_RATEVHTSS3MCS6 0x46
#define ODM_RATEVHTSS3MCS7 0x47
#define ODM_RATEVHTSS3MCS8 0x48
#define ODM_RATEVHTSS3MCS9 0x49
#define ODM_RATEVHTSS4MCS0 0x4A
#define ODM_RATEVHTSS4MCS1 0x4B
#define ODM_RATEVHTSS4MCS2 0x4C
#define ODM_RATEVHTSS4MCS3 0x4D
#define ODM_RATEVHTSS4MCS4 0x4E
#define ODM_RATEVHTSS4MCS5 0x4F
#define ODM_RATEVHTSS4MCS6 0x50
#define ODM_RATEVHTSS4MCS7 0x51
#define ODM_RATEVHTSS4MCS8 0x52
#define ODM_RATEVHTSS4MCS9 0x53
//
// Define Different SW team support
//
#define ODM_AP 0x01 //BIT0
#define ODM_ADSL 0x02 //BIT1
#define ODM_CE 0x04 //BIT2
#define ODM_WIN 0x08 //BIT3
#define DM_ODM_SUPPORT_TYPE ODM_CE
// Deifne HW endian support
#define ODM_ENDIAN_BIG 0
#define ODM_ENDIAN_LITTLE 1
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
#define GET_PDM_ODM(__pAdapter) ((PDM_ODM_T)(&((GET_HAL_DATA(__pAdapter))->DM_OutSrc)))
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
#define GET_PDM_ODM(__pAdapter) ((PDM_ODM_T)(&((GET_HAL_DATA(__pAdapter))->odmpriv)))
#endif
#if (DM_ODM_SUPPORT_TYPE != ODM_WIN)
#define RT_PCI_INTERFACE 1
#define RT_USB_INTERFACE 2
#define RT_SDIO_INTERFACE 3
#endif
typedef enum _HAL_STATUS{
HAL_STATUS_SUCCESS,
HAL_STATUS_FAILURE,
/*RT_STATUS_PENDING,
RT_STATUS_RESOURCE,
RT_STATUS_INVALID_CONTEXT,
RT_STATUS_INVALID_PARAMETER,
RT_STATUS_NOT_SUPPORT,
RT_STATUS_OS_API_FAILED,*/
}HAL_STATUS,*PHAL_STATUS;
#if( DM_ODM_SUPPORT_TYPE == ODM_AP)
#define MP_DRIVER 0
#endif
#if(DM_ODM_SUPPORT_TYPE != ODM_WIN)
#define VISTA_USB_RX_REVISE 0
//
// Declare for ODM spin lock defintion temporarily fro compile pass.
//
typedef enum _RT_SPINLOCK_TYPE{
RT_TX_SPINLOCK = 1,
RT_RX_SPINLOCK = 2,
RT_RM_SPINLOCK = 3,
RT_CAM_SPINLOCK = 4,
RT_SCAN_SPINLOCK = 5,
RT_LOG_SPINLOCK = 7,
RT_BW_SPINLOCK = 8,
RT_CHNLOP_SPINLOCK = 9,
RT_RF_OPERATE_SPINLOCK = 10,
RT_INITIAL_SPINLOCK = 11,
RT_RF_STATE_SPINLOCK = 12, // For RF state. Added by Bruce, 2007-10-30.
#if VISTA_USB_RX_REVISE
RT_USBRX_CONTEXT_SPINLOCK = 13,
RT_USBRX_POSTPROC_SPINLOCK = 14, // protect data of Adapter->IndicateW/ IndicateR
#endif
//Shall we define Ndis 6.2 SpinLock Here ?
RT_PORT_SPINLOCK=16,
RT_VNIC_SPINLOCK=17,
RT_HVL_SPINLOCK=18,
RT_H2C_SPINLOCK = 20, // For H2C cmd. Added by tynli. 2009.11.09.
RT_BTData_SPINLOCK=25,
RT_WAPI_OPTION_SPINLOCK=26,
RT_WAPI_RX_SPINLOCK=27,
// add for 92D CCK control issue
RT_CCK_PAGEA_SPINLOCK = 28,
RT_BUFFER_SPINLOCK = 29,
RT_CHANNEL_AND_BANDWIDTH_SPINLOCK = 30,
RT_GEN_TEMP_BUF_SPINLOCK = 31,
RT_AWB_SPINLOCK = 32,
RT_FW_PS_SPINLOCK = 33,
RT_HW_TIMER_SPIN_LOCK = 34,
RT_MPT_WI_SPINLOCK = 35,
RT_P2P_SPIN_LOCK = 36, // Protect P2P context
RT_DBG_SPIN_LOCK = 37,
RT_IQK_SPINLOCK = 38,
RT_PENDED_OID_SPINLOCK = 39,
RT_CHNLLIST_SPINLOCK = 40,
RT_INDIC_SPINLOCK = 41, //protect indication
RT_RFD_SPINLOCK = 42,
RT_LAST_SPINLOCK,
}RT_SPINLOCK_TYPE;
#endif
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
#define STA_INFO_T RT_WLAN_STA
#define PSTA_INFO_T PRT_WLAN_STA
// typedef unsigned long u4Byte,*pu4Byte;
#define CONFIG_HW_ANTENNA_DIVERSITY
#define CONFIG_SW_ANTENNA_DIVERSITY
#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
// To let ADSL/AP project compile ok; it should be removed after all conflict are solved. Added by Annie, 2011-10-07.
#define ADSL_AP_BUILD_WORKAROUND
#define AP_BUILD_WORKAROUND
//2 [ Configure Antenna Diversity ]
#if defined(CONFIG_RTL_8881A_ANT_SWITCH) || defined(CONFIG_SLOT_0_ANT_SWITCH) || defined(CONFIG_SLOT_1_ANT_SWITCH)
#define CONFIG_HW_ANTENNA_DIVERSITY
#define ODM_EVM_ENHANCE_ANTDIV
//----------
#if(!defined(CONFIG_NO_2G_DIVERSITY) && !defined(CONFIG_2G_CGCS_RX_DIVERSITY) && !defined(CONFIG_2G_CG_TRX_DIVERSITY) && !defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY))
#define CONFIG_NO_2G_DIVERSITY
#endif
#ifdef CONFIG_NO_5G_DIVERSITY_8881A
#define CONFIG_NO_5G_DIVERSITY
#elif defined(CONFIG_5G_CGCS_RX_DIVERSITY_8881A)
#define CONFIG_5G_CGCS_RX_DIVERSITY
#elif defined(CONFIG_5G_CG_TRX_DIVERSITY_8881A)
#define CONFIG_5G_CG_TRX_DIVERSITY
#endif
#if(!defined(CONFIG_NO_5G_DIVERSITY) && !defined(CONFIG_5G_CGCS_RX_DIVERSITY) && !defined(CONFIG_5G_CG_TRX_DIVERSITY) && !defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY))
#define CONFIG_NO_5G_DIVERSITY
#endif
//----------
#if ( defined(CONFIG_NO_2G_DIVERSITY) && defined(CONFIG_NO_5G_DIVERSITY) )
#define CONFIG_NOT_SUPPORT_ANTDIV
#elif( !defined(CONFIG_NO_2G_DIVERSITY) && defined(CONFIG_NO_5G_DIVERSITY) )
#define CONFIG_2G_SUPPORT_ANTDIV
#elif( defined(CONFIG_NO_2G_DIVERSITY) && !defined(CONFIG_NO_5G_DIVERSITY) )
#define CONFIG_5G_SUPPORT_ANTDIV
#elif( !defined(CONFIG_NO_2G_DIVERSITY) && !defined(CONFIG_NO_5G_DIVERSITY) )
#define CONFIG_2G5G_SUPPORT_ANTDIV
#endif
//----------
#endif
#ifdef AP_BUILD_WORKAROUND
#include "../typedef.h"
#else
typedef void VOID,*PVOID;
typedef unsigned char BOOLEAN,*PBOOLEAN;
typedef unsigned char u1Byte,*pu1Byte;
typedef unsigned short u2Byte,*pu2Byte;
typedef unsigned int u4Byte,*pu4Byte;
typedef unsigned long long u8Byte,*pu8Byte;
#if 1
/* In ARM platform, system would use the type -- "char" as "unsigned char"
* And we only use s1Byte/ps1Byte as INT8 now, so changes the type of s1Byte.*/
typedef signed char s1Byte,*ps1Byte;
#else
typedef char s1Byte,*ps1Byte;
#endif
typedef short s2Byte,*ps2Byte;
typedef long s4Byte,*ps4Byte;
typedef long long s8Byte,*ps8Byte;
#endif
typedef struct rtl8192cd_priv *prtl8192cd_priv;
typedef struct stat_info STA_INFO_T,*PSTA_INFO_T;
typedef struct timer_list RT_TIMER, *PRT_TIMER;
typedef void * RT_TIMER_CALL_BACK;
#ifdef CONFIG_PCI_HCI
#define DEV_BUS_TYPE RT_PCI_INTERFACE
#endif
#define _TRUE 1
#define _FALSE 0
#elif (DM_ODM_SUPPORT_TYPE == ODM_ADSL)
// To let ADSL/AP project compile ok; it should be removed after all conflict are solved. Added by Annie, 2011-10-07.
#define ADSL_AP_BUILD_WORKAROUND
#define ADSL_BUILD_WORKAROUND
//
typedef unsigned char BOOLEAN,*PBOOLEAN;
typedef unsigned char u1Byte,*pu1Byte;
typedef unsigned short u2Byte,*pu2Byte;
typedef unsigned int u4Byte,*pu4Byte;
typedef unsigned long long u8Byte,*pu8Byte;
#if 1
/* In ARM platform, system would use the type -- "char" as "unsigned char"
* And we only use s1Byte/ps1Byte as INT8 now, so changes the type of s1Byte.*/
typedef signed char s1Byte,*ps1Byte;
#else
typedef char s1Byte,*ps1Byte;
#endif
typedef short s2Byte,*ps2Byte;
typedef long s4Byte,*ps4Byte;
typedef long long s8Byte,*ps8Byte;
typedef struct rtl8192cd_priv *prtl8192cd_priv;
typedef struct stat_info STA_INFO_T,*PSTA_INFO_T;
typedef struct timer_list RT_TIMER, *PRT_TIMER;
typedef void * RT_TIMER_CALL_BACK;
#define DEV_BUS_TYPE RT_PCI_INTERFACE
#define _TRUE 1
#define _FALSE 0
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
#include <drv_types.h>
#if 0
typedef u8 u1Byte, *pu1Byte;
typedef u16 u2Byte,*pu2Byte;
typedef u32 u4Byte,*pu4Byte;
typedef u64 u8Byte,*pu8Byte;
typedef s8 s1Byte,*ps1Byte;
typedef s16 s2Byte,*ps2Byte;
typedef s32 s4Byte,*ps4Byte;
typedef s64 s8Byte,*ps8Byte;
#else
#define u1Byte u8
#define pu1Byte u8*
#define u2Byte u16
#define pu2Byte u16*
#define u4Byte u32
#define pu4Byte u32*
#define u8Byte u64
#define pu8Byte u64*
#define s1Byte s8
#define ps1Byte s8*
#define s2Byte s16
#define ps2Byte s16*
#define s4Byte s32
#define ps4Byte s32*
#define s8Byte s64
#define ps8Byte s64*
#endif
#ifdef CONFIG_USB_HCI
#define DEV_BUS_TYPE RT_USB_INTERFACE
#elif defined(CONFIG_PCI_HCI)
#define DEV_BUS_TYPE RT_PCI_INTERFACE
#elif defined(CONFIG_SDIO_HCI)
#define DEV_BUS_TYPE RT_SDIO_INTERFACE
#elif defined(CONFIG_GSPI_HCI)
#define DEV_BUS_TYPE RT_SDIO_INTERFACE
#endif
#if defined(CONFIG_LITTLE_ENDIAN)
#define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE
#elif defined (CONFIG_BIG_ENDIAN)
#define ODM_ENDIAN_TYPE ODM_ENDIAN_BIG
#endif
typedef struct timer_list RT_TIMER, *PRT_TIMER;
typedef void * RT_TIMER_CALL_BACK;
#define STA_INFO_T struct sta_info
#define PSTA_INFO_T struct sta_info *
#define TRUE _TRUE
#define FALSE _FALSE
#define SET_TX_DESC_ANTSEL_A_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 1, __Value)
#define SET_TX_DESC_ANTSEL_B_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 25, 1, __Value)
#define SET_TX_DESC_ANTSEL_C_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 29, 1, __Value)
//define useless flag to avoid compile warning
#define USE_WORKITEM 0
#define FOR_BRAZIL_PRETEST 0
#define FPGA_TWO_MAC_VERIFICATION 0
#define RTL8881A_SUPPORT 0
#endif
#define READ_NEXT_PAIR(v1, v2, i) do { if (i+2 >= ArrayLen) break; i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0)
#define COND_ELSE 2
#define COND_ENDIF 3
#endif // __ODM_TYPES_H__

218
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/rtl8723b/HalHWImg8723B_BB.c
View File

@ -18,8 +18,8 @@
*
******************************************************************************/
#include "../odm_precomp.h"
#include "Mp_Precomp.h"
#include "../phydm_precomp.h"
#if (RTL8723B_SUPPORT == 1)
static BOOLEAN
@ -252,72 +252,69 @@ ODM_ReadAndConfig_MP_8723B_AGC_TAB(
)
{
u4Byte i = 0;
u1Byte cCond;
BOOLEAN bMatched = TRUE, bSkipped = FALSE;
//ask by Luke.Lee
u4Byte ArrayLen = sizeof(Array_MP_8723B_AGC_TAB)/sizeof(u4Byte);
pu4Byte Array = Array_MP_8723B_AGC_TAB;
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8723B_AGC_TAB\n"));
for (i = 0; i < ArrayLen; i += 2 )
{
u4Byte v1 = Array[i];
u4Byte v2 = Array[i+1];
// This (offset, data) pair doesn't care the condition.
if ( v1 < 0x40000000 )
{
odm_ConfigBB_AGC_8723B(pDM_Odm, v1, bMaskDWord, v2);
continue;
}
else
{ // This line is the beginning of branch.
BOOLEAN bMatched = TRUE;
u1Byte cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28);
while(( i+1) < ArrayLen)
{
u4Byte v1 = Array[i];
u4Byte v2 = Array[i+1];
if (cCond == COND_ELSE) { // ELSE, ENDIF
bMatched = TRUE;
READ_NEXT_PAIR(v1, v2, i);
} else if ( ! CheckPositive(pDM_Odm, v1, v2) ) {
bMatched = FALSE;
READ_NEXT_PAIR(v1, v2, i);
READ_NEXT_PAIR(v1, v2, i);
} else {
READ_NEXT_PAIR(v1, v2, i);
if ( ! CheckNegative(pDM_Odm, v1, v2) )
bMatched = FALSE;
else
bMatched = TRUE;
READ_NEXT_PAIR(v1, v2, i);
}
if ( bMatched == FALSE )
{ // Condition isn't matched. Discard the following (offset, data) pairs.
while (v1 < 0x40000000 && i < ArrayLen -2)
READ_NEXT_PAIR(v1, v2, i);
i -= 2; // prevent from for-loop += 2
}
else // Configure matched pairs and skip to end of if-else.
{
while (v1 < 0x40000000 && i < ArrayLen-2) {
odm_ConfigBB_AGC_8723B(pDM_Odm, v1, bMaskDWord, v2);
READ_NEXT_PAIR(v1, v2, i);
}
// Keeps reading until ENDIF.
cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28);
while (cCond != COND_ENDIF && i < ArrayLen-2) {
READ_NEXT_PAIR(v1, v2, i);
cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28);
}
}
}
}
if(v1 & (BIT31|BIT30)) //positive & negative condition
{
if(v1 & BIT31) // positive condition
{
cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28);
if(cCond == COND_ENDIF) //end
{
bMatched = TRUE;
bSkipped = FALSE;
}
else if(cCond == COND_ELSE) //else
{
bMatched = bSkipped?FALSE:TRUE;
}
else //if , else if
{
if(bSkipped)
bMatched = FALSE;
else
{
if(CheckPositive(pDM_Odm, v1, v2))
{
bMatched = TRUE;
bSkipped = TRUE;
}
else
{
bMatched = FALSE;
bSkipped = FALSE;
}
}
}
}
else if(v1 & BIT30){ //negative condition
//do nothing
}
}
else
{
if(bMatched)
odm_ConfigBB_AGC_8723B(pDM_Odm, v1, bMaskDWord, v2);
}
i = i + 2;
}
}
u4Byte
ODM_GetVersion_MP_8723B_AGC_TAB(void)
{
return 11;
return 12;
}
/******************************************************************************
@ -527,72 +524,69 @@ ODM_ReadAndConfig_MP_8723B_PHY_REG(
)
{
u4Byte i = 0;
u1Byte cCond;
BOOLEAN bMatched = TRUE, bSkipped = FALSE;
//ask by Luke.Lee
u4Byte ArrayLen = sizeof(Array_MP_8723B_PHY_REG)/sizeof(u4Byte);
pu4Byte Array = Array_MP_8723B_PHY_REG;
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8723B_PHY_REG\n"));
for (i = 0; i < ArrayLen; i += 2 )
{
u4Byte v1 = Array[i];
u4Byte v2 = Array[i+1];
// This (offset, data) pair doesn't care the condition.
if ( v1 < 0x40000000 )
{
odm_ConfigBB_PHY_8723B(pDM_Odm, v1, bMaskDWord, v2);
continue;
}
else
{ // This line is the beginning of branch.
BOOLEAN bMatched = TRUE;
u1Byte cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28);
while(( i+1) < ArrayLen)
{
u4Byte v1 = Array[i];
u4Byte v2 = Array[i+1];
if (cCond == COND_ELSE) { // ELSE, ENDIF
bMatched = TRUE;
READ_NEXT_PAIR(v1, v2, i);
} else if ( ! CheckPositive(pDM_Odm, v1, v2) ) {
bMatched = FALSE;
READ_NEXT_PAIR(v1, v2, i);
READ_NEXT_PAIR(v1, v2, i);
} else {
READ_NEXT_PAIR(v1, v2, i);
if ( ! CheckNegative(pDM_Odm, v1, v2) )
bMatched = FALSE;
else
bMatched = TRUE;
READ_NEXT_PAIR(v1, v2, i);
}
if ( bMatched == FALSE )
{ // Condition isn't matched. Discard the following (offset, data) pairs.
while (v1 < 0x40000000 && i < ArrayLen -2)
READ_NEXT_PAIR(v1, v2, i);
i -= 2; // prevent from for-loop += 2
}
else // Configure matched pairs and skip to end of if-else.
{
while (v1 < 0x40000000 && i < ArrayLen-2) {
odm_ConfigBB_PHY_8723B(pDM_Odm, v1, bMaskDWord, v2);
READ_NEXT_PAIR(v1, v2, i);
}
// Keeps reading until ENDIF.
cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28);
while (cCond != COND_ENDIF && i < ArrayLen-2) {
READ_NEXT_PAIR(v1, v2, i);
cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28);
}
}
}
}
if(v1 & (BIT31|BIT30)) //positive & negative condition
{
if(v1 & BIT31) // positive condition
{
cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28);
if(cCond == COND_ENDIF) //end
{
bMatched = TRUE;
bSkipped = FALSE;
}
else if(cCond == COND_ELSE) //else
{
bMatched = bSkipped?FALSE:TRUE;
}
else //if , else if
{
if(bSkipped)
bMatched = FALSE;
else
{
if(CheckPositive(pDM_Odm, v1, v2))
{
bMatched = TRUE;
bSkipped = TRUE;
}
else
{
bMatched = FALSE;
bSkipped = FALSE;
}
}
}
}
else if(v1 & BIT30){ //negative condition
//do nothing
}
}
else
{
if(bMatched)
odm_ConfigBB_PHY_8723B(pDM_Odm, v1, bMaskDWord, v2);
}
i = i + 2;
}
}
u4Byte
ODM_GetVersion_MP_8723B_PHY_REG(void)
{
return 11;
return 12;
}
/******************************************************************************

6503
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/rtl8723b/HalHWImg8723B_FW.c
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File diff suppressed because it is too large Load Diff

111
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/rtl8723b/HalHWImg8723B_MAC.c
View File

@ -18,8 +18,8 @@
*
******************************************************************************/
#include "../odm_precomp.h"
#include "Mp_Precomp.h"
#include "../phydm_precomp.h"
#if (RTL8723B_SUPPORT == 1)
static BOOLEAN
@ -224,72 +224,69 @@ ODM_ReadAndConfig_MP_8723B_MAC_REG(
)
{
u4Byte i = 0;
u1Byte cCond;
BOOLEAN bMatched = TRUE, bSkipped = FALSE;
//ask by Luke.Lee
u4Byte ArrayLen = sizeof(Array_MP_8723B_MAC_REG)/sizeof(u4Byte);
pu4Byte Array = Array_MP_8723B_MAC_REG;
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8723B_MAC_REG\n"));
for (i = 0; i < ArrayLen; i += 2 )
{
u4Byte v1 = Array[i];
u4Byte v2 = Array[i+1];
// This (offset, data) pair doesn't care the condition.
if ( v1 < 0x40000000 )
{
odm_ConfigMAC_8723B(pDM_Odm, v1, (u1Byte)v2);
continue;
}
else
{ // This line is the beginning of branch.
BOOLEAN bMatched = TRUE;
u1Byte cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28);
while(( i+1) < ArrayLen)
{
u4Byte v1 = Array[i];
u4Byte v2 = Array[i+1];
if (cCond == COND_ELSE) { // ELSE, ENDIF
bMatched = TRUE;
READ_NEXT_PAIR(v1, v2, i);
} else if ( ! CheckPositive(pDM_Odm, v1, v2) ) {
bMatched = FALSE;
READ_NEXT_PAIR(v1, v2, i);
READ_NEXT_PAIR(v1, v2, i);
} else {
READ_NEXT_PAIR(v1, v2, i);
if ( ! CheckNegative(pDM_Odm, v1, v2) )
bMatched = FALSE;
else
bMatched = TRUE;
READ_NEXT_PAIR(v1, v2, i);
}
if ( bMatched == FALSE )
{ // Condition isn't matched. Discard the following (offset, data) pairs.
while (v1 < 0x40000000 && i < ArrayLen -2)
READ_NEXT_PAIR(v1, v2, i);
i -= 2; // prevent from for-loop += 2
}
else // Configure matched pairs and skip to end of if-else.
{
while (v1 < 0x40000000 && i < ArrayLen-2) {
odm_ConfigMAC_8723B(pDM_Odm, v1, (u1Byte)v2);
READ_NEXT_PAIR(v1, v2, i);
}
// Keeps reading until ENDIF.
cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28);
while (cCond != COND_ENDIF && i < ArrayLen-2) {
READ_NEXT_PAIR(v1, v2, i);
cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28);
}
}
}
}
if(v1 & (BIT31|BIT30)) //positive & negative condition
{
if(v1 & BIT31) // positive condition
{
cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28);
if(cCond == COND_ENDIF) //end
{
bMatched = TRUE;
bSkipped = FALSE;
}
else if(cCond == COND_ELSE) //else
{
bMatched = bSkipped?FALSE:TRUE;
}
else //if , else if
{
if(bSkipped)
bMatched = FALSE;
else
{
if(CheckPositive(pDM_Odm, v1, v2))
{
bMatched = TRUE;
bSkipped = TRUE;
}
else
{
bMatched = FALSE;
bSkipped = FALSE;
}
}
}
}
else if(v1 & BIT30){ //negative condition
//do nothing
}
}
else
{
if(bMatched)
odm_ConfigMAC_8723B(pDM_Odm, v1, (u1Byte)v2);
}
i = i + 2;
}
}
u4Byte
ODM_GetVersion_MP_8723B_MAC_REG(void)
{
return 11;
return 12;
}
#endif // end of HWIMG_SUPPORT

38
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/rtl8723b/HalHWImg8723B_MP.c
View File

@ -1,24 +1,24 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include "../odm_precomp.h"
#include "../phydm_precomp.h"
#if (RTL8723B_SUPPORT==1)

36
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/rtl8723b/HalHWImg8723B_MP.h
View File

@ -1,21 +1,21 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#if (RTL8723B_SUPPORT==1)

111
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/rtl8723b/HalHWImg8723B_RF.c
View File

@ -18,8 +18,8 @@
*
******************************************************************************/
#include "../odm_precomp.h"
#include "Mp_Precomp.h"
#include "../phydm_precomp.h"
#if (RTL8723B_SUPPORT == 1)
static BOOLEAN
@ -245,72 +245,69 @@ ODM_ReadAndConfig_MP_8723B_RadioA(
)
{
u4Byte i = 0;
u1Byte cCond;
BOOLEAN bMatched = TRUE, bSkipped = FALSE;
//ask by Luke.Lee
u4Byte ArrayLen = sizeof(Array_MP_8723B_RadioA)/sizeof(u4Byte);
pu4Byte Array = Array_MP_8723B_RadioA;
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_8723B_RadioA\n"));
for (i = 0; i < ArrayLen; i += 2 )
{
u4Byte v1 = Array[i];
u4Byte v2 = Array[i+1];
// This (offset, data) pair doesn't care the condition.
if ( v1 < 0x40000000 )
{
odm_ConfigRF_RadioA_8723B(pDM_Odm, v1, v2);
continue;
}
else
{ // This line is the beginning of branch.
BOOLEAN bMatched = TRUE;
u1Byte cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28);
while(( i+1) < ArrayLen)
{
u4Byte v1 = Array[i];
u4Byte v2 = Array[i+1];
if (cCond == COND_ELSE) { // ELSE, ENDIF
bMatched = TRUE;
READ_NEXT_PAIR(v1, v2, i);
} else if ( ! CheckPositive(pDM_Odm, v1, v2) ) {
bMatched = FALSE;
READ_NEXT_PAIR(v1, v2, i);
READ_NEXT_PAIR(v1, v2, i);
} else {
READ_NEXT_PAIR(v1, v2, i);
if ( ! CheckNegative(pDM_Odm, v1, v2) )
bMatched = FALSE;
else
bMatched = TRUE;
READ_NEXT_PAIR(v1, v2, i);
}
if ( bMatched == FALSE )
{ // Condition isn't matched. Discard the following (offset, data) pairs.
while (v1 < 0x40000000 && i < ArrayLen -2)
READ_NEXT_PAIR(v1, v2, i);
i -= 2; // prevent from for-loop += 2
}
else // Configure matched pairs and skip to end of if-else.
{
while (v1 < 0x40000000 && i < ArrayLen-2) {
odm_ConfigRF_RadioA_8723B(pDM_Odm, v1, v2);
READ_NEXT_PAIR(v1, v2, i);
}
// Keeps reading until ENDIF.
cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28);
while (cCond != COND_ENDIF && i < ArrayLen-2) {
READ_NEXT_PAIR(v1, v2, i);
cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28);
}
}
}
}
if(v1 & (BIT31|BIT30)) //positive & negative condition
{
if(v1 & BIT31) // positive condition
{
cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28);
if(cCond == COND_ENDIF) //end
{
bMatched = TRUE;
bSkipped = FALSE;
}
else if(cCond == COND_ELSE) //else
{
bMatched = bSkipped?FALSE:TRUE;
}
else //if , else if
{
if(bSkipped)
bMatched = FALSE;
else
{
if(CheckPositive(pDM_Odm, v1, v2))
{
bMatched = TRUE;
bSkipped = TRUE;
}
else
{
bMatched = FALSE;
bSkipped = FALSE;
}
}
}
}
else if(v1 & BIT30){ //negative condition
//do nothing
}
}
else
{
if(bMatched)
odm_ConfigRF_RadioA_8723B(pDM_Odm, v1, v2);
}
i = i + 2;
}
}
u4Byte
ODM_GetVersion_MP_8723B_RadioA(void)
{
return 11;
return 12;
}
/******************************************************************************

148
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/rtl8723b/HalPhyRf_8723B.c
View File

@ -18,7 +18,8 @@
*
******************************************************************************/
#include "../odm_precomp.h"
#include "Mp_Precomp.h"
#include "../phydm_precomp.h"
@ -65,8 +66,6 @@ void setIqkMatrix_8723B(
if (OFDM_index >= OFDM_TABLE_SIZE)
OFDM_index = OFDM_TABLE_SIZE-1;
else if (OFDM_index < 0)
OFDM_index = 0;
ele_D = (OFDMSwingTable_New[OFDM_index] & 0xFFC00000)>>22;
@ -251,8 +250,7 @@ ODM_TxPwrTrackSetPwr_8723B(
u1Byte Final_CCK_Swing_Index = 0;
u1Byte i = 0;
#if (MP_DRIVER==1)
if ( *(pDM_Odm->mp_mode) == 1)
if (pDM_Odm->mp_mode == TRUE)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE ))
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
@ -264,7 +262,6 @@ ODM_TxPwrTrackSetPwr_8723B(
#endif
}
else
#endif
{
u2Byte rate = *(pDM_Odm->pForcedDataRate);
@ -320,8 +317,8 @@ ODM_TxPwrTrackSetPwr_8723B(
pDM_Odm->Remnant_OFDMSwingIdx[RFPath] = pDM_Odm->Absolute_OFDMSwingIdx[RFPath];
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE ))
#if (MP_DRIVER == 1)
if ( *(pDM_Odm->mp_mode) == 1) {
if (pDM_Odm->mp_mode == TRUE)
{
pwr = PHY_QueryBBReg(Adapter, rTxAGC_A_Rate18_06, 0xFF);
pwr += pDM_Odm->RFCalibrateInfo.PowerIndexOffset[RFPath];
PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, pwr);
@ -341,7 +338,6 @@ ODM_TxPwrTrackSetPwr_8723B(
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("ODM_TxPwrTrackSetPwr8723B: OFDM Tx-rf(A) Power = 0x%x\n", TxAGC));
}
else
#endif
{
pDM_Odm->Modify_TxAGC_Flag_PathA = TRUE;
pDM_Odm->Modify_TxAGC_Flag_PathA_CCK = TRUE;
@ -590,7 +586,7 @@ phy_PathA_IQK_8723B(
// enable path A PA in TXIQK mode
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1);
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x18000 );
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x20000 );
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0003f );
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xc7f87 );
// disable path B PA in TXIQK mode
@ -608,7 +604,7 @@ phy_PathA_IQK_8723B(
ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
// ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x8214010a);
ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x821303ea);
ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x821403ea);
ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28110000);
ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_B, bMaskDWord, 0x82110000);
ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_B, bMaskDWord, 0x28110000);
@ -661,21 +657,12 @@ phy_PathA_IQK_8723B(
ODM_GetBBReg(pDM_Odm, 0xe90, bMaskDWord), ODM_GetBBReg(pDM_Odm, 0xe98, bMaskDWord)));
//Allen 20131125
tmp=(regE9C & 0x03FF0000)>>16;
if ((tmp & 0x200)> 0)
tmp = 0x400 - tmp;
if(!(regEAC & BIT28) &&
(((regE94 & 0x03FF0000)>>16) != 0x142) &&
(((regE9C & 0x03FF0000)>>16) != 0x42) &&
(((regE94 & 0x03FF0000)>>16) <0x110) &&
(((regE94 & 0x03FF0000)>>16) >0xf0) &&
(tmp <0xf))
(((regE9C & 0x03FF0000)>>16) != 0x42))
result |= 0x01;
else //if Tx not OK, ignore Rx
return result;
return result;
#if 0
if(!(regEAC & BIT27) && //if Tx is OK, check whether Rx is OK
@ -685,10 +672,6 @@ phy_PathA_IQK_8723B(
else
RT_DISP(FINIT, INIT_IQK, ("Path A Rx IQK fail!!\n"));
#endif
return result;
}
u1Byte //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK
@ -726,7 +709,7 @@ phy_PathA_RxIQK8723B(
//modify RXIQK mode table
// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A Rx IQK modify RXIQK mode table!\n"));
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1);
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x18000);
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000);
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0001f);
//LNA2 off, PA on for Dcut
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7fb7);
@ -744,7 +727,7 @@ phy_PathA_RxIQK8723B(
ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
// ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82160c1f);
ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82130ff0);
ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82160ff0);
ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28110000);
ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_B, bMaskDWord, 0x82110000);
ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_B, bMaskDWord, 0x28110000);
@ -795,17 +778,9 @@ phy_PathA_RxIQK8723B(
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe90(before IQK)= 0x%x, 0xe98(afer IQK) = 0x%x\n",
ODM_GetBBReg(pDM_Odm, 0xe90, bMaskDWord), ODM_GetBBReg(pDM_Odm, 0xe98, bMaskDWord)));
//Allen 20131125
tmp=(regE9C & 0x03FF0000)>>16;
if ((tmp & 0x200)> 0)
tmp = 0x400 - tmp;
if(!(regEAC & BIT28) &&
(((regE94 & 0x03FF0000)>>16) != 0x142) &&
(((regE9C & 0x03FF0000)>>16) != 0x42) &&
(((regE94 & 0x03FF0000)>>16) <0x110) &&
(((regE94 & 0x03FF0000)>>16) >0xf0) &&
(tmp <0xf))
(((regE9C & 0x03FF0000)>>16) != 0x42))
result |= 0x01;
else //if Tx not OK, ignore Rx
@ -824,7 +799,7 @@ phy_PathA_RxIQK8723B(
// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A Rx IQK modify RXIQK mode table 2!\n"));
ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1);
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x18000 );
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000 );
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0001f );
//LAN2 on, PA off for Dcut
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7d77 );
@ -846,7 +821,7 @@ phy_PathA_RxIQK8723B(
ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82110000);
// ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x281604c2);
ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x2813001f);
ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x2816001f);
ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_B, bMaskDWord, 0x82110000);
ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_B, bMaskDWord, 0x28110000);
@ -900,16 +875,7 @@ phy_PathA_RxIQK8723B(
ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x780 );
#if 0
if(!(regEAC & BIT28) &&
(((regE94 & 0x03FF0000)>>16) != 0x142) &&
(((regE9C & 0x03FF0000)>>16) != 0x42) )
result |= 0x01;
else //if Tx not OK, ignore Rx
return result;
#endif
//Allen 20131125
/* Allen 20141201 */
tmp=(regEAC & 0x03FF0000)>>16;
if ((tmp & 0x200)> 0)
tmp = 0x400 - tmp;
@ -917,9 +883,9 @@ phy_PathA_RxIQK8723B(
if(!(regEAC & BIT27) && //if Tx is OK, check whether Rx is OK
(((regEA4 & 0x03FF0000)>>16) != 0x132) &&
(((regEAC & 0x03FF0000)>>16) != 0x36)&&
(((regEA4 & 0x03FF0000)>>16) < 0x110) &&
(((regEA4 & 0x03FF0000)>>16) > 0xf0) &&
(tmp <0xf))
(((regEA4 & 0x03FF0000)>>16) < 0x11a) &&
(((regEA4 & 0x03FF0000)>>16) > 0xe6) &&
(tmp < 0x1a))
result |= 0x02;
else //if Tx not OK, ignore Rx
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK fail!!\n"));
@ -965,7 +931,7 @@ phy_PathB_IQK_8723B(
// ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xc7f87 );
// enable path B PA in TXIQK mode
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xed, 0x20, 0x1);
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x43, bRFRegOffsetMask, 0x30fc1);
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x43, bRFRegOffsetMask, 0x40fc1);
@ -981,7 +947,7 @@ phy_PathB_IQK_8723B(
ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
// ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82140114);
ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x821303ea);
ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x821403ea);
ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28110000);
ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_B, bMaskDWord, 0x82110000);
ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_B, bMaskDWord, 0x28110000);
@ -1031,20 +997,12 @@ phy_PathB_IQK_8723B(
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe90(before IQK)= 0x%x, 0xe98(afer IQK) = 0x%x\n",
ODM_GetBBReg(pDM_Odm, 0xe90, bMaskDWord), ODM_GetBBReg(pDM_Odm, 0xe98, bMaskDWord)));
//Allen 20131125
tmp=(regE9C & 0x03FF0000)>>16;
if ((tmp & 0x200)> 0)
tmp = 0x400 - tmp;
if(!(regEAC & BIT28) &&
(((regE94 & 0x03FF0000)>>16) != 0x142) &&
(((regE9C & 0x03FF0000)>>16) != 0x42)&&
(((regE94 & 0x03FF0000)>>16) <0x110) &&
(((regE94 & 0x03FF0000)>>16) >0xf0) &&
(tmp <0xf))
(((regE9C & 0x03FF0000)>>16) != 0x42))
result |= 0x01;
else
return result;
return result;
#if 0
if(!(regEAC & BIT30) &&
@ -1055,7 +1013,6 @@ phy_PathB_IQK_8723B(
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B Rx IQK fail!!\n"));
#endif
return result;
}
@ -1096,12 +1053,12 @@ phy_PathB_RxIQK8723B(
//modify RXIQK mode table
// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A Rx IQK modify RXIQK mode table!\n"));
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1 );
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x18000 );
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000 );
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0001f );
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7fb7 );
//open PA S1 & SMIXER
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xed, 0x20, 0x1 );
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x43, bRFRegOffsetMask, 0x30fcd );
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x43, bRFRegOffsetMask, 0x60fcd );
//IQK setting
@ -1116,7 +1073,7 @@ phy_PathB_RxIQK8723B(
ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_B, bMaskDWord, 0x38008c1c);
// ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82160c1f );
ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82130ff0);
ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82160ff0);
ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28110000);
ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_B, bMaskDWord, 0x82110000);
ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_B, bMaskDWord, 0x28110000);
@ -1164,19 +1121,10 @@ phy_PathB_RxIQK8723B(
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe90(before IQK)= 0x%x, 0xe98(afer IQK) = 0x%x\n",
ODM_GetBBReg(pDM_Odm, 0xe90, bMaskDWord), ODM_GetBBReg(pDM_Odm, 0xe98, bMaskDWord)));
//Allen 20131125
tmp=(regE9C & 0x03FF0000)>>16;
// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("tmp1 = 0x%x\n", tmp));
if ((tmp & 0x200)> 0)
tmp = 0x400 - tmp;
// ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("tmp2 = 0x%x\n", tmp));
if(!(regEAC & BIT28) &&
(((regE94 & 0x03FF0000)>>16) != 0x142) &&
(((regE9C & 0x03FF0000)>>16) != 0x42) &&
(((regE94 & 0x03FF0000)>>16) <0x110) &&
(((regE94 & 0x03FF0000)>>16) >0xf0) &&
(tmp <0xf))
(((regE9C & 0x03FF0000)>>16) != 0x42))
result |= 0x01;
else //if Tx not OK, ignore Rx
return result;
@ -1195,14 +1143,14 @@ phy_PathB_RxIQK8723B(
//<20121009, Kordan> RF Mode = 3
ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1);
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x18000);
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000);
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0001f);
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7d77);
// ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x0);
//open PA S1 & close SMIXER
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xed, 0x20, 0x1);
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x43, bRFRegOffsetMask, 0x30ebd);
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x43, bRFRegOffsetMask, 0x60ebd);
//PA, PAD setting
// ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xdf, bRFRegOffsetMask, 0xf80);
@ -1221,7 +1169,7 @@ phy_PathB_RxIQK8723B(
ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82110000);
// ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x281604c2);
ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x2813001f);
ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x2816001f);
ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_B, bMaskDWord, 0x82110000);
ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_B, bMaskDWord, 0x28110000);
@ -1284,7 +1232,7 @@ phy_PathB_RxIQK8723B(
#endif
//Allen 20131125
/* Allen 20141201 */
tmp=(regEAC & 0x03FF0000)>>16;
if ((tmp & 0x200)> 0)
tmp = 0x400 - tmp;
@ -1292,9 +1240,9 @@ phy_PathB_RxIQK8723B(
if(!(regEAC & BIT27) && //if Tx is OK, check whether Rx is OK
(((regEA4 & 0x03FF0000)>>16) != 0x132) &&
(((regEAC & 0x03FF0000)>>16) != 0x36) &&
(((regEA4 & 0x03FF0000)>>16) <0x110) &&
(((regEA4 & 0x03FF0000)>>16) >0xf0) &&
(tmp <0xf))
(((regEA4 & 0x03FF0000)>>16) < 0x11a) &&
(((regEA4 & 0x03FF0000)>>16) > 0xe6) &&
(tmp < 0x1a))
result |= 0x02;
else
@ -3026,13 +2974,13 @@ PHY_IQCalibrate_8723B(
//#define PATH_S0 1 // RF_PATH_B
//#define PATH_S1 0 // RF_PATH_A
path = (ODM_GetBBReg(pDM_Odm,rS0S1_PathSwitch,bMaskByte0)==0x00) ? ODM_RF_PATH_A : ODM_RF_PATH_B;
path = (RF_Path==0 ? ODM_RF_PATH_A : ODM_RF_PATH_B);
// Restore TX IQK
for (i = 0; i < 3; ++i) {
offset = pRFCalibrateInfo->TxIQC_8723B[path][i][0];
data = pRFCalibrateInfo->TxIQC_8723B[path][i][1];
if ((offset==0) || (data==0)) {
if ((offset==0) || (i==1 && data==0)) { // 0xc80, 0xc88 ==> index=1
DBG_871X("%s =>path:%s Restore TX IQK result failed \n",__FUNCTION__,(path==ODM_RF_PATH_A)?"A":"B");
bResult = FAIL;
break;
@ -3045,7 +2993,7 @@ PHY_IQCalibrate_8723B(
for (i = 0; i < 2; ++i) {
offset = pRFCalibrateInfo->RxIQC_8723B[path][i][0];
data = pRFCalibrateInfo->RxIQC_8723B[path][i][1];
if ((offset==0) || (data==0)) {
if ((offset==0) || (i==0 && data==0)) { // 0xc14, 0xc1c ==> index=0
DBG_871X("%s =>path:%s Restore RX IQK result failed \n",__FUNCTION__,(path==ODM_RF_PATH_A)?"A":"B");
bResult = FAIL;
break;
@ -3063,7 +3011,7 @@ PHY_IQCalibrate_8723B(
}
if (bResult == SUCCESS)
return;
goto out;
}
#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_AP))
@ -3078,8 +3026,9 @@ PHY_IQCalibrate_8723B(
#else
_PHY_ReloadADDARegisters8723B(pDM_Odm, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup_recover, 9);
#endif
return;
goto out;
}
StartTime = ODM_GetCurrentTime( pDM_Odm);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK:Start!!!\n"));
@ -3206,7 +3155,7 @@ PHY_IQCalibrate_8723B(
}
#if MP_DRIVER == 1
if ((pMptCtx->MptRfPath == ODM_RF_PATH_A) || ( *(pDM_Odm->mp_mode) == 0))
if ((pMptCtx->MptRfPath == ODM_RF_PATH_A) || (pDM_Odm->mp_mode == FALSE))
#endif
{
if (RegE94 != 0)
@ -3221,7 +3170,7 @@ PHY_IQCalibrate_8723B(
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
#if MP_DRIVER == 1
if ((pMptCtx->MptRfPath == ODM_RF_PATH_A) || ( *(pDM_Odm->mp_mode) == 0))
if ((pMptCtx->MptRfPath == ODM_RF_PATH_A) || (pDM_Odm->mp_mode == FALSE))
#endif
{
if (RegEB4 != 0)
@ -3279,15 +3228,14 @@ PHY_IQCalibrate_8723B(
ODM_SetIQCbyRFpath(pDM_Odm, 1);
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK finished\n"));
ProgressingTime = ODM_GetProgressingTime( pDM_Odm, StartTime);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK ProgressingTime = %d\n", ProgressingTime));
out:
ODM_AcquireSpinLock(pDM_Odm, RT_IQK_SPINLOCK);
pDM_Odm->RFCalibrateInfo.bIQKInProgress = FALSE;
ODM_ReleaseSpinLock(pDM_Odm, RT_IQK_SPINLOCK);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK finished\n"));
ProgressingTime = ODM_GetProgressingTime( pDM_Odm, StartTime);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK ProgressingTime = %d\n", ProgressingTime));
}

24
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/rtl8723b/Mp_Precomp.h Executable file
View File

@ -0,0 +1,24 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
//#include <Precomp.h>
//#include "phydm_precomp.h"
//#include "../phydm_precomp.h"

71
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/rtl8723b/phydm_RTL8723B.c Executable file
View File

@ -0,0 +1,71 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
//============================================================
// include files
//============================================================
#include "Mp_Precomp.h"
#include "../phydm_precomp.h"
#if (RTL8723B_SUPPORT == 1)
s1Byte
odm_CCKRSSI_8723B(
IN u1Byte LNA_idx,
IN u1Byte VGA_idx
)
{
s1Byte rx_pwr_all=0x00;
switch(LNA_idx)
{
//46 53 73 95 201301231630
// 46 53 77 99 201301241630
case 6:
rx_pwr_all = -34 - (2 * VGA_idx);
break;
case 4:
rx_pwr_all = -14 - (2 * VGA_idx);
break;
case 1:
rx_pwr_all = 6 - (2 * VGA_idx);
break;
case 0:
rx_pwr_all = 16 - (2 * VGA_idx);
break;
default:
//rx_pwr_all = -53+(2*(31-VGA_idx));
//DbgPrint("wrong LNA index\n");
break;
}
return rx_pwr_all;
}
#endif // end if RTL8723B

29
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/rtl8723b/phydm_RTL8723B.h Executable file
View File

@ -0,0 +1,29 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __ODM_RTL8723B_H__
#define __ODM_RTL8723B_H__
s1Byte
odm_CCKRSSI_8723B(
IN u1Byte LNA_idx,
IN u1Byte VGA_idx
);
#endif

235
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/rtl8723b/phydm_RegConfig8723B.c Executable file
View File

@ -0,0 +1,235 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include "Mp_Precomp.h"
#include "../phydm_precomp.h"
#if (RTL8723B_SUPPORT == 1)
void
odm_ConfigRFReg_8723B(
IN PDM_ODM_T pDM_Odm,
IN u4Byte Addr,
IN u4Byte Data,
IN ODM_RF_RADIO_PATH_E RF_PATH,
IN u4Byte RegAddr
)
{
if(Addr == 0xfe || Addr == 0xffe)
{
#ifdef CONFIG_LONG_DELAY_ISSUE
ODM_sleep_ms(50);
#else
ODM_delay_ms(50);
#endif
}
else
{
ODM_SetRFReg(pDM_Odm, RF_PATH, RegAddr, bRFRegOffsetMask, Data);
// Add 1us delay between BB/RF register setting.
ODM_delay_us(1);
//For disable/enable test in high temperature, the B6 value will fail to fill. Suggestion by BB Stanley, 2013.06.25.
if(Addr == 0xb6)
{
u4Byte getvalue=0;
u1Byte count =0;
getvalue = ODM_GetRFReg(pDM_Odm, RF_PATH, Addr, bMaskDWord);
ODM_delay_us(1);
while((getvalue>>8)!=(Data>>8))
{
count++;
ODM_SetRFReg(pDM_Odm, RF_PATH, RegAddr, bRFRegOffsetMask, Data);
ODM_delay_us(1);
getvalue = ODM_GetRFReg(pDM_Odm, RF_PATH, Addr, bMaskDWord);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [B6] getvalue 0x%x, Data 0x%x, count %d\n", getvalue, Data,count));
if(count>5)
break;
}
}
if(Addr == 0xb2)
{
u4Byte getvalue=0;
u1Byte count =0;
getvalue = ODM_GetRFReg(pDM_Odm, RF_PATH, Addr, bMaskDWord);
ODM_delay_us(1);
while(getvalue!=Data)
{
count++;
ODM_SetRFReg(pDM_Odm, RF_PATH, RegAddr, bRFRegOffsetMask, Data);
ODM_delay_us(1);
//Do LCK againg
ODM_SetRFReg(pDM_Odm, RF_PATH, 0x18, bRFRegOffsetMask, 0x0fc07);
ODM_delay_us(1);
getvalue = ODM_GetRFReg(pDM_Odm, RF_PATH, Addr, bMaskDWord);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [B2] getvalue 0x%x, Data 0x%x, count %d\n", getvalue, Data,count));
if(count>5)
break;
}
}
}
}
void
odm_ConfigRF_RadioA_8723B(
IN PDM_ODM_T pDM_Odm,
IN u4Byte Addr,
IN u4Byte Data
)
{
u4Byte content = 0x1000; // RF_Content: radioa_txt
u4Byte maskforPhySet= (u4Byte)(content&0xE000);
odm_ConfigRFReg_8723B(pDM_Odm, Addr, Data, ODM_RF_PATH_A, Addr|maskforPhySet);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioA] %08X %08X\n", Addr, Data));
}
void
odm_ConfigRF_RadioB_8723B(
IN PDM_ODM_T pDM_Odm,
IN u4Byte Addr,
IN u4Byte Data
)
{
u4Byte content = 0x1001; // RF_Content: radiob_txt
u4Byte maskforPhySet= (u4Byte)(content&0xE000);
odm_ConfigRFReg_8723B(pDM_Odm, Addr, Data, ODM_RF_PATH_B, Addr|maskforPhySet);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioB] %08X %08X\n", Addr, Data));
}
void
odm_ConfigMAC_8723B(
IN PDM_ODM_T pDM_Odm,
IN u4Byte Addr,
IN u1Byte Data
)
{
ODM_Write1Byte(pDM_Odm, Addr, Data);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigMACWithHeaderFile: [MAC_REG] %08X %08X\n", Addr, Data));
}
void
odm_ConfigBB_AGC_8723B(
IN PDM_ODM_T pDM_Odm,
IN u4Byte Addr,
IN u4Byte Bitmask,
IN u4Byte Data
)
{
ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data);
// Add 1us delay between BB/RF register setting.
ODM_delay_us(1);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigBBWithHeaderFile: [AGC_TAB] %08X %08X\n", Addr, Data));
}
void
odm_ConfigBB_PHY_REG_PG_8723B(
IN PDM_ODM_T pDM_Odm,
IN u4Byte Band,
IN u4Byte RfPath,
IN u4Byte TxNum,
IN u4Byte Addr,
IN u4Byte Bitmask,
IN u4Byte Data
)
{
if (Addr == 0xfe || Addr == 0xffe)
#ifdef CONFIG_LONG_DELAY_ISSUE
ODM_sleep_ms(50);
#else
ODM_delay_ms(50);
#endif
else
{
#if !(DM_ODM_SUPPORT_TYPE&ODM_AP)
PHY_StoreTxPowerByRate(pDM_Odm->Adapter, Band, RfPath, TxNum, Addr, Bitmask, Data);
#endif
}
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X %08X\n", Addr, Bitmask, Data));
}
void
odm_ConfigBB_PHY_8723B(
IN PDM_ODM_T pDM_Odm,
IN u4Byte Addr,
IN u4Byte Bitmask,
IN u4Byte Data
)
{
if (Addr == 0xfe)
#ifdef CONFIG_LONG_DELAY_ISSUE
ODM_sleep_ms(50);
#else
ODM_delay_ms(50);
#endif
else if (Addr == 0xfd)
ODM_delay_ms(5);
else if (Addr == 0xfc)
ODM_delay_ms(1);
else if (Addr == 0xfb)
ODM_delay_us(50);
else if (Addr == 0xfa)
ODM_delay_us(5);
else if (Addr == 0xf9)
ODM_delay_us(1);
else
{
ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data);
}
// Add 1us delay between BB/RF register setting.
ODM_delay_us(1);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X\n", Addr, Data));
}
void
odm_ConfigBB_TXPWR_LMT_8723B(
IN PDM_ODM_T pDM_Odm,
IN pu1Byte Regulation,
IN pu1Byte Band,
IN pu1Byte Bandwidth,
IN pu1Byte RateSection,
IN pu1Byte RfPath,
IN pu1Byte Channel,
IN pu1Byte PowerLimit
)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
PHY_SetTxPowerLimit(pDM_Odm, Regulation, Band,
Bandwidth, RateSection, RfPath, Channel, PowerLimit);
#elif (DM_ODM_SUPPORT_TYPE & (ODM_CE))
PHY_SetTxPowerLimit(pDM_Odm->Adapter, Regulation, Band,
Bandwidth, RateSection, RfPath, Channel, PowerLimit);
#endif
}
#endif

96
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/rtl8723b/phydm_RegConfig8723B.h Executable file
View File

@ -0,0 +1,96 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __INC_ODM_REGCONFIG_H_8723B
#define __INC_ODM_REGCONFIG_H_8723B
#if (RTL8723B_SUPPORT == 1)
void
odm_ConfigRFReg_8723B(
IN PDM_ODM_T pDM_Odm,
IN u4Byte Addr,
IN u4Byte Data,
IN ODM_RF_RADIO_PATH_E RF_PATH,
IN u4Byte RegAddr
);
void
odm_ConfigRF_RadioA_8723B(
IN PDM_ODM_T pDM_Odm,
IN u4Byte Addr,
IN u4Byte Data
);
void
odm_ConfigRF_RadioB_8723B(
IN PDM_ODM_T pDM_Odm,
IN u4Byte Addr,
IN u4Byte Data
);
void
odm_ConfigMAC_8723B(
IN PDM_ODM_T pDM_Odm,
IN u4Byte Addr,
IN u1Byte Data
);
void
odm_ConfigBB_AGC_8723B(
IN PDM_ODM_T pDM_Odm,
IN u4Byte Addr,
IN u4Byte Bitmask,
IN u4Byte Data
);
void
odm_ConfigBB_PHY_REG_PG_8723B(
IN PDM_ODM_T pDM_Odm,
IN u4Byte Band,
IN u4Byte RfPath,
IN u4Byte TxNum,
IN u4Byte Addr,
IN u4Byte Bitmask,
IN u4Byte Data
);
void
odm_ConfigBB_PHY_8723B(
IN PDM_ODM_T pDM_Odm,
IN u4Byte Addr,
IN u4Byte Bitmask,
IN u4Byte Data
);
void
odm_ConfigBB_TXPWR_LMT_8723B(
IN PDM_ODM_T pDM_Odm,
IN pu1Byte Regulation,
IN pu1Byte Band,
IN pu1Byte Bandwidth,
IN pu1Byte RateSection,
IN pu1Byte RfPath,
IN pu1Byte Channel,
IN pu1Byte PowerLimit
);
#endif
#endif // end of SUPPORT

630
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/hal_btcoex.c
View File

@ -77,9 +77,27 @@ const char *const ioStaString[] =
"h2c stopped",
};
const char *const GLBtcWifiBwString[]={
"11bg",
"HT20",
"HT40",
"HT80",
"HT160"
};
const char *const GLBtcWifiFreqString[]={
"2.4G",
"5G"
};
#define HALBTCOUTSRC_AGG_CHK_WINDOW_IN_MS 8000
BTC_COEXIST GLBtCoexist;
u8 GLBtcWiFiInScanState;
u8 GLBtcWiFiInIQKState;
u8 GLBtcWiFiInIPS;
u8 GLBtcWiFiInLPS;
u8 GLBtcBtCoexAliveRegistered;
u32 GLBtcDbgType[BTC_MSG_MAX];
u8 GLBtcDbgBuf[BT_TMP_BUF_SIZE];
@ -167,9 +185,24 @@ static void halbtcoutsrc_DbgInit(void)
0;
}
static u8 halbtcoutsrc_IsCsrBtCoex(PBTC_COEXIST pBtCoexist)
{
if (pBtCoexist->boardInfo.btChipType == BTC_CHIP_CSR_BC4
|| pBtCoexist->boardInfo.btChipType == BTC_CHIP_CSR_BC8
){
return _TRUE;
}
return _FALSE;
}
static u8 halbtcoutsrc_IsHwMailboxExist(PBTC_COEXIST pBtCoexist)
{
if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter))
if (pBtCoexist->boardInfo.btChipType == BTC_CHIP_CSR_BC4
|| pBtCoexist->boardInfo.btChipType == BTC_CHIP_CSR_BC8
){
return _FALSE;
}
else if (IS_HARDWARE_TYPE_8812(pBtCoexist->Adapter))
{
return _FALSE;
}
@ -254,6 +287,9 @@ void halbtcoutsrc_LeaveLowPower(PBTC_COEXIST pBtCoexist)
timeout = 30;
#endif // !LPS_RPWM_WAIT_MS
if (GLBtcBtCoexAliveRegistered == _TRUE)
return;
stime = rtw_get_current_time();
do {
ready = rtw_register_task_alive(padapter, BTCOEX_ALIVE);
@ -266,6 +302,8 @@ void halbtcoutsrc_LeaveLowPower(PBTC_COEXIST pBtCoexist)
rtw_msleep_os(1);
} while (1);
GLBtcBtCoexAliveRegistered = _TRUE;
#endif // CONFIG_LPS_LCLK
}
@ -278,9 +316,13 @@ void halbtcoutsrc_NormalLowPower(PBTC_COEXIST pBtCoexist)
#ifdef CONFIG_LPS_LCLK
PADAPTER padapter;
if (GLBtcBtCoexAliveRegistered == _FALSE)
return;
padapter = pBtCoexist->Adapter;
rtw_unregister_task_alive(padapter, BTCOEX_ALIVE);
GLBtcBtCoexAliveRegistered = _FALSE;
#endif // CONFIG_LPS_LCLK
}
@ -296,16 +338,41 @@ void halbtcoutsrc_DisableLowPower(PBTC_COEXIST pBtCoexist, u8 bLowPwrDisable)
void halbtcoutsrc_AggregationCheck(PBTC_COEXIST pBtCoexist)
{
PADAPTER padapter;
BOOLEAN bNeedToAct;
BOOLEAN bNeedToAct = _FALSE;
static u32 preTime = 0;
u32 curTime = 0;
padapter = pBtCoexist->Adapter;
bNeedToAct = _FALSE;
if (pBtCoexist->btInfo.bRejectAggPkt)
rtw_btcoex_RejectApAggregatedPacket(padapter, _TRUE);
//=====================================
// To void continuous deleteBA=>addBA=>deleteBA=>addBA
// This function is not allowed to continuous called.
// It can only be called after 8 seconds.
//=====================================
curTime = rtw_systime_to_ms(rtw_get_current_time());
if((curTime - preTime) < HALBTCOUTSRC_AGG_CHK_WINDOW_IN_MS) // over 8 seconds you can execute this function again.
{
return;
}
else
{
preTime = curTime;
}
if (pBtCoexist->btInfo.bRejectAggPkt)
{
rtw_btcoex_RejectApAggregatedPacket(padapter, _TRUE);
pBtCoexist->btInfo.bPreRejectAggPkt = pBtCoexist->btInfo.bRejectAggPkt;
}
else
{
if(pBtCoexist->btInfo.bPreRejectAggPkt)
{
bNeedToAct = _TRUE;
pBtCoexist->btInfo.bPreRejectAggPkt = pBtCoexist->btInfo.bRejectAggPkt;
}
if (pBtCoexist->btInfo.bPreBtCtrlAggBufSize !=
pBtCoexist->btInfo.bBtCtrlAggBufSize)
{
@ -500,10 +567,10 @@ static u8 halbtcoutsrc_GetWifiScanAPNum(PADAPTER padapter)
pmlmeext = &padapter->mlmeextpriv;
if (GLBtcWiFiInScanState == _FALSE) {
if (pmlmeext->sitesurvey_res.bss_cnt > 0xFF)
if (pmlmepriv->num_of_scanned > 0xFF)
scan_AP_num = 0xFF;
else
scan_AP_num = (u8)pmlmeext->sitesurvey_res.bss_cnt;
scan_AP_num = (u8)pmlmepriv->num_of_scanned;
}
return scan_AP_num;
@ -643,6 +710,10 @@ u8 halbtcoutsrc_Get(void *pBtcContext, u8 getType, void *pOutBuf)
case BTC_GET_BL_EXT_SWITCH:
*pu8 = _FALSE;
break;
case BTC_GET_BL_IS_ASUS_8723B:
/* Always return FALSE in linux driver since this case is added only for windows driver */
*pu8 = _FALSE;
break;
case BTC_GET_S4_WIFI_RSSI:
*pS4Tmp = halbtcoutsrc_GetWifiRssi(padapter);
@ -712,6 +783,9 @@ u8 halbtcoutsrc_Get(void *pBtcContext, u8 getType, void *pOutBuf)
case BTC_GET_U1_AP_NUM:
*pU1Tmp = halbtcoutsrc_GetWifiScanAPNum(padapter);
break;
case BTC_GET_U1_ANT_TYPE:
*pU1Tmp = (u1Byte)BTC_ANT_TYPE_0;
break;
//=======1Ant===========
case BTC_GET_U1_LPS_MODE:
@ -783,6 +857,10 @@ u8 halbtcoutsrc_Set(void *pBtcContext, u8 setType, void *pInBuf)
pBtCoexist->btInfo.bBtTxRxMask = *pu8;
break;
case BTC_SET_BL_MIRACAST_PLUS_BT:
pBtCoexist->btInfo.bMiracastPlusBt = *pu8;
break;
// set some u8 type variables.
case BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON:
pBtCoexist->btInfo.rssiAdjustForAgcTableOn = *pU1Tmp;
@ -851,15 +929,24 @@ u8 halbtcoutsrc_Set(void *pBtcContext, u8 setType, void *pInBuf)
break;
case BTC_SET_ACT_SEND_MIMO_PS:
#if 0 // not implement yet
{
u8 newMimoPsMode = *pU1Tmp;
u8 newMimoPsMode = 3;
struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
// *pU1Tmp = 0 use SM_PS static type
// *pU1Tmp = 1 disable SM_PS
if(*pU1Tmp==0)
newMimoPsMode = WLAN_HT_CAP_SM_PS_STATIC;
else if(*pU1Tmp==1)
newMimoPsMode = WLAN_HT_CAP_SM_PS_DISABLED;
if (check_fwstate(&padapter->mlmepriv, WIFI_ASOC_STATE) == _TRUE)
SendMimoPsFrame(padapter, padapter->MgntInfo.Bssid, newMimoPsMode);
{
//issue_action_SM_PS(padapter, get_my_bssid(&(pmlmeinfo->network)), newMimoPsMode);
issue_action_SM_PS_wait_ack(padapter, get_my_bssid(&(pmlmeinfo->network)), newMimoPsMode, 3, 1);
}
}
#else
ret = _FALSE;
#endif
break;
case BTC_SET_ACT_CTRL_BT_INFO:
@ -917,6 +1004,48 @@ u8 halbtcoutsrc_Set(void *pBtcContext, u8 setType, void *pInBuf)
return ret;
}
u8 halbtcoutsrc_UnderIps(PBTC_COEXIST pBtCoexist)
{
PADAPTER padapter;
struct pwrctrl_priv *pwrpriv;
u8 bMacPwrCtrlOn;
padapter = pBtCoexist->Adapter;
pwrpriv = &padapter->dvobj->pwrctl_priv;
bMacPwrCtrlOn = _FALSE;
if ((_TRUE == pwrpriv->bips_processing)
&& (IPS_NONE != pwrpriv->ips_mode_req)
)
{
return _TRUE;
}
if (rf_off == pwrpriv->rf_pwrstate)
{
return _TRUE;
}
rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn);
if (_FALSE == bMacPwrCtrlOn)
{
return _TRUE;
}
return _FALSE;
}
u8 halbtcoutsrc_UnderLps(PBTC_COEXIST pBtCoexist)
{
return GLBtcWiFiInLPS;
}
u8 halbtcoutsrc_Under32K(PBTC_COEXIST pBtCoexist)
{
/* todo: the method to check whether wifi is under 32K or not */
return _FALSE;
}
void halbtcoutsrc_DisplayCoexStatistics(PBTC_COEXIST pBtCoexist)
{
#if 0
@ -1017,17 +1146,95 @@ void halbtcoutsrc_DisplayBtLinkInfo(PBTC_COEXIST pBtCoexist)
#endif
}
void halbtcoutsrc_DisplayFwPwrModeCmd(PBTC_COEXIST pBtCoexist)
void halbtcoutsrc_DisplayWifiStatus(PBTC_COEXIST pBtCoexist)
{
u8 *cliBuf = pBtCoexist->cliBuf;
PADAPTER padapter = pBtCoexist->Adapter;
struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
u8* cliBuf=pBtCoexist->cliBuf;
s32 wifiRssi=0, btHsRssi=0;
BOOLEAN bScan=_FALSE, bLink=_FALSE, bRoam=_FALSE, bWifiBusy=_FALSE, bWifiUnderBMode=_FALSE;
u32 wifiBw=BTC_WIFI_BW_HT20, wifiTrafficDir=BTC_WIFI_TRAFFIC_TX, wifiFreq=BTC_FREQ_2_4G;
u32 wifiLinkStatus=0x0;
BOOLEAN bBtHsOn=_FALSE, bLowPower=_FALSE;
u8 wifiChnl=0, wifiHsChnl=0, nScanAPNum = 0, FwPSState;
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x ", "Power mode cmd ", \
wifiLinkStatus = halbtcoutsrc_GetWifiLinkStatus(pBtCoexist);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d/ %d", "STA/vWifi/HS/p2pGo/p2pGc", \
((wifiLinkStatus&WIFI_STA_CONNECTED)? 1:0), ((wifiLinkStatus&WIFI_AP_CONNECTED)? 1:0),
((wifiLinkStatus&WIFI_HS_CONNECTED)? 1:0), ((wifiLinkStatus&WIFI_P2P_GO_CONNECTED)? 1:0),
((wifiLinkStatus&WIFI_P2P_GC_CONNECTED)? 1:0) );
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_DOT11_CHNL, &wifiChnl);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_HS_CHNL, &wifiHsChnl); CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d(%d)", "Dot11 channel / HsChnl(High Speed)", \
wifiChnl, wifiHsChnl, bBtHsOn);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_HS_RSSI, &btHsRssi);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "Wifi rssi/ HS rssi", \
wifiRssi-100, btHsRssi-100);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "Wifi bLink/ bRoam/ bScan", \
bLink, bRoam, bScan);
CL_PRINTF(cliBuf);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifiFreq);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifiTrafficDir);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode);
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &nScanAPNum);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %s/ %s/ AP=%d ", "Wifi freq/ bw/ traffic", \
GLBtcWifiFreqString[wifiFreq], ((bWifiUnderBMode)? "11b": GLBtcWifiBwString[wifiBw]),
((!bWifiBusy)? "idle": ((BTC_WIFI_TRAFFIC_TX==wifiTrafficDir)? "uplink":"downlink")),
nScanAPNum);
CL_PRINTF(cliBuf);
// power status
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s%s%s", "Power Status", \
((halbtcoutsrc_UnderIps(pBtCoexist) == _TRUE)? "IPS ON":"IPS OFF"),
((halbtcoutsrc_UnderLps(pBtCoexist) == _TRUE)? ", LPS ON":", LPS OFF"),
((halbtcoutsrc_Under32K(pBtCoexist) == _TRUE)? ", 32k":""));
CL_PRINTF(cliBuf);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x (0x%x/0x%x)", "Power mode cmd(lps/rpwm)", \
pBtCoexist->pwrModeVal[0], pBtCoexist->pwrModeVal[1],
pBtCoexist->pwrModeVal[2], pBtCoexist->pwrModeVal[3],
pBtCoexist->pwrModeVal[4], pBtCoexist->pwrModeVal[5]);
pBtCoexist->pwrModeVal[4], pBtCoexist->pwrModeVal[5],
pBtCoexist->btInfo.lpsVal,
pBtCoexist->btInfo.rpwmVal);
CL_PRINTF(cliBuf);
}
void halbtcoutsrc_DisplayDbgMsg(void *pBtcContext, u8 dispType)
{
PBTC_COEXIST pBtCoexist;
pBtCoexist = (PBTC_COEXIST)pBtcContext;
switch(dispType)
{
case BTC_DBG_DISP_COEX_STATISTICS:
halbtcoutsrc_DisplayCoexStatistics(pBtCoexist);
break;
case BTC_DBG_DISP_BT_LINK_INFO:
halbtcoutsrc_DisplayBtLinkInfo(pBtCoexist);
break;
case BTC_DBG_DISP_WIFI_STATUS:
halbtcoutsrc_DisplayWifiStatus(pBtCoexist);
break;
default:
break;
}
}
//====================================
// IO related function
//====================================
@ -1092,7 +1299,7 @@ void halbtcoutsrc_BitMaskWrite1Byte(void *pBtcContext, u32 regAddr, u8 bitMask,
originalValue = 0;
bitShift = 0;
if (bitMask != 0xFF)
if(bitMask != 0xff)
{
originalValue = rtw_read8(padapter, regAddr);
@ -1248,59 +1455,6 @@ void halbtcoutsrc_FillH2cCmd(void *pBtcContext, u8 elementId, u32 cmdLen, u8 *pC
rtw_hal_fill_h2c_cmd(padapter, elementId, cmdLen, pCmdBuffer);
}
void halbtcoutsrc_DisplayDbgMsg(void *pBtcContext, u8 dispType)
{
PBTC_COEXIST pBtCoexist;
pBtCoexist = (PBTC_COEXIST)pBtcContext;
switch(dispType)
{
case BTC_DBG_DISP_COEX_STATISTICS:
halbtcoutsrc_DisplayCoexStatistics(pBtCoexist);
break;
case BTC_DBG_DISP_BT_LINK_INFO:
halbtcoutsrc_DisplayBtLinkInfo(pBtCoexist);
break;
case BTC_DBG_DISP_FW_PWR_MODE_CMD:
halbtcoutsrc_DisplayFwPwrModeCmd(pBtCoexist);
break;
default:
break;
}
}
u8 halbtcoutsrc_UnderIps(PBTC_COEXIST pBtCoexist)
{
PADAPTER padapter;
struct pwrctrl_priv *pwrpriv;
u8 bMacPwrCtrlOn;
padapter = pBtCoexist->Adapter;
pwrpriv = &padapter->dvobj->pwrctl_priv;
bMacPwrCtrlOn = _FALSE;
if ((_TRUE == pwrpriv->bips_processing)
&& (IPS_NONE != pwrpriv->ips_mode_req)
)
{
return _TRUE;
}
if (rf_off == pwrpriv->rf_pwrstate)
{
return _TRUE;
}
rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn);
if (_FALSE == bMacPwrCtrlOn)
{
return _TRUE;
}
return _FALSE;
}
//====================================
// Extern functions called by other module
//====================================
@ -1324,6 +1478,7 @@ u8 EXhalbtcoutsrc_BindBtCoexWithAdapter(void *padapter)
pBtCoexist->btInfo.aggBufSize = 5;
pBtCoexist->btInfo.bIncreaseScanDevNum = _FALSE;
pBtCoexist->btInfo.bMiracastPlusBt = _FALSE;
#if 0
chipType = HALBT_GetBtChipType(Adapter);
@ -1388,6 +1543,12 @@ u8 EXhalbtcoutsrc_InitlizeVariables(void *padapter)
GLBtcWiFiInIQKState = _FALSE;
GLBtcWiFiInIPS = _FALSE;
GLBtcWiFiInLPS = _FALSE;
GLBtcBtCoexAliveRegistered = _FALSE;
return _TRUE;
}
@ -1406,6 +1567,22 @@ void EXhalbtcoutsrc_PowerOnSetting(PBTC_COEXIST pBtCoexist)
}
}
void EXhalbtcoutsrc_PreLoadFirmware(PBTC_COEXIST pBtCoexist)
{
if(!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist))
return;
pBtCoexist->statistics.cntPreLoadFirmware++;
if(IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter))
{
if(pBtCoexist->boardInfo.btdmAntNum == 2)
EXhalbtc8723b2ant_PreLoadFirmware(pBtCoexist);
else if(pBtCoexist->boardInfo.btdmAntNum == 1)
EXhalbtc8723b1ant_PreLoadFirmware(pBtCoexist);
}
}
void EXhalbtcoutsrc_InitHwConfig(PBTC_COEXIST pBtCoexist, u8 bWifiOnly)
{
if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist))
@ -1415,7 +1592,9 @@ void EXhalbtcoutsrc_InitHwConfig(PBTC_COEXIST pBtCoexist, u8 bWifiOnly)
if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter))
{
if (pBtCoexist->boardInfo.btdmAntNum == 2)
if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE)
EXhalbtc8821aCsr2ant_InitHwConfig(pBtCoexist, bWifiOnly);
else if (pBtCoexist->boardInfo.btdmAntNum == 2)
EXhalbtc8821a2ant_InitHwConfig(pBtCoexist, bWifiOnly);
else if (pBtCoexist->boardInfo.btdmAntNum == 1)
EXhalbtc8821a1ant_InitHwConfig(pBtCoexist, bWifiOnly);
@ -1467,7 +1646,9 @@ void EXhalbtcoutsrc_InitCoexDm(PBTC_COEXIST pBtCoexist)
if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter))
{
if (pBtCoexist->boardInfo.btdmAntNum == 2)
if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE)
EXhalbtc8821aCsr2ant_InitCoexDm(pBtCoexist);
else if (pBtCoexist->boardInfo.btdmAntNum == 2)
EXhalbtc8821a2ant_InitCoexDm(pBtCoexist);
else if (pBtCoexist->boardInfo.btdmAntNum == 1)
EXhalbtc8821a1ant_InitCoexDm(pBtCoexist);
@ -1524,16 +1705,24 @@ void EXhalbtcoutsrc_IpsNotify(PBTC_COEXIST pBtCoexist, u8 type)
return;
if (IPS_NONE == type)
{
ipsType = BTC_IPS_LEAVE;
GLBtcWiFiInIPS = _FALSE;
}
else
{
ipsType = BTC_IPS_ENTER;
GLBtcWiFiInIPS = _TRUE;
}
// All notify is called in cmd thread, don't need to leave low power again
// halbtcoutsrc_LeaveLowPower(pBtCoexist);
if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter))
{
if (pBtCoexist->boardInfo.btdmAntNum == 2)
if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE)
EXhalbtc8821aCsr2ant_IpsNotify(pBtCoexist, ipsType);
else if (pBtCoexist->boardInfo.btdmAntNum == 2)
EXhalbtc8821a2ant_IpsNotify(pBtCoexist, ipsType);
else if (pBtCoexist->boardInfo.btdmAntNum == 1)
EXhalbtc8821a1ant_IpsNotify(pBtCoexist, ipsType);
@ -1591,13 +1780,21 @@ void EXhalbtcoutsrc_LpsNotify(PBTC_COEXIST pBtCoexist, u8 type)
return;
if (PS_MODE_ACTIVE == type)
{
lpsType = BTC_LPS_DISABLE;
GLBtcWiFiInLPS = _FALSE;
}
else
{
lpsType = BTC_LPS_ENABLE;
GLBtcWiFiInLPS = _TRUE;
}
if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter))
{
if (pBtCoexist->boardInfo.btdmAntNum == 2)
if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE)
EXhalbtc8821aCsr2ant_LpsNotify(pBtCoexist, lpsType);
else if (pBtCoexist->boardInfo.btdmAntNum == 2)
EXhalbtc8821a2ant_LpsNotify(pBtCoexist, lpsType);
else if (pBtCoexist->boardInfo.btdmAntNum == 1)
EXhalbtc8821a1ant_LpsNotify(pBtCoexist, lpsType);
@ -1666,7 +1863,9 @@ void EXhalbtcoutsrc_ScanNotify(PBTC_COEXIST pBtCoexist, u8 type)
if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter))
{
if (pBtCoexist->boardInfo.btdmAntNum == 2)
if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE)
EXhalbtc8821aCsr2ant_ScanNotify(pBtCoexist, scanType);
else if (pBtCoexist->boardInfo.btdmAntNum == 2)
EXhalbtc8821a2ant_ScanNotify(pBtCoexist, scanType);
else if (pBtCoexist->boardInfo.btdmAntNum == 1)
EXhalbtc8821a1ant_ScanNotify(pBtCoexist, scanType);
@ -1731,7 +1930,9 @@ void EXhalbtcoutsrc_ConnectNotify(PBTC_COEXIST pBtCoexist, u8 action)
if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter))
{
if (pBtCoexist->boardInfo.btdmAntNum == 2)
if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE)
EXhalbtc8821aCsr2ant_ConnectNotify(pBtCoexist, assoType);
else if (pBtCoexist->boardInfo.btdmAntNum == 2)
EXhalbtc8821a2ant_ConnectNotify(pBtCoexist, assoType);
else if (pBtCoexist->boardInfo.btdmAntNum == 1)
EXhalbtc8821a1ant_ConnectNotify(pBtCoexist, assoType);
@ -1797,7 +1998,9 @@ void EXhalbtcoutsrc_MediaStatusNotify(PBTC_COEXIST pBtCoexist, RT_MEDIA_STATUS m
if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter))
{
if (pBtCoexist->boardInfo.btdmAntNum == 2)
if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE)
EXhalbtc8821aCsr2ant_MediaStatusNotify(pBtCoexist, mStatus);
else if (pBtCoexist->boardInfo.btdmAntNum == 2)
EXhalbtc8821a2ant_MediaStatusNotify(pBtCoexist, mStatus);
else if (pBtCoexist->boardInfo.btdmAntNum == 1)
EXhalbtc8821a1ant_MediaStatusNotify(pBtCoexist, mStatus);
@ -1869,7 +2072,9 @@ void EXhalbtcoutsrc_SpecialPacketNotify(PBTC_COEXIST pBtCoexist, u8 pktType)
if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter))
{
if (pBtCoexist->boardInfo.btdmAntNum == 2)
if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE)
EXhalbtc8821aCsr2ant_SpecialPacketNotify(pBtCoexist, packetType);
else if (pBtCoexist->boardInfo.btdmAntNum == 2)
EXhalbtc8821a2ant_SpecialPacketNotify(pBtCoexist, packetType);
else if (pBtCoexist->boardInfo.btdmAntNum == 1)
EXhalbtc8821a1ant_SpecialPacketNotify(pBtCoexist, packetType);
@ -1926,7 +2131,9 @@ void EXhalbtcoutsrc_BtInfoNotify(PBTC_COEXIST pBtCoexist, u8 *tmpBuf, u8 length)
if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter))
{
if (pBtCoexist->boardInfo.btdmAntNum == 2)
if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE)
EXhalbtc8821aCsr2ant_BtInfoNotify(pBtCoexist, tmpBuf, length);
else if (pBtCoexist->boardInfo.btdmAntNum == 2)
EXhalbtc8821a2ant_BtInfoNotify(pBtCoexist, tmpBuf, length);
else if (pBtCoexist->boardInfo.btdmAntNum == 1)
EXhalbtc8821a1ant_BtInfoNotify(pBtCoexist, tmpBuf, length);
@ -2041,7 +2248,9 @@ void EXhalbtcoutsrc_HaltNotify(PBTC_COEXIST pBtCoexist)
if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter))
{
if (pBtCoexist->boardInfo.btdmAntNum == 2)
if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE)
EXhalbtc8821aCsr2ant_HaltNotify(pBtCoexist);
else if (pBtCoexist->boardInfo.btdmAntNum == 2)
EXhalbtc8821a2ant_HaltNotify(pBtCoexist);
else if (pBtCoexist->boardInfo.btdmAntNum == 1)
EXhalbtc8821a1ant_HaltNotify(pBtCoexist);
@ -2122,7 +2331,9 @@ void EXhalbtcoutsrc_PnpNotify(PBTC_COEXIST pBtCoexist, u8 pnpState)
}
else if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter))
{
if (pBtCoexist->boardInfo.btdmAntNum == 1)
if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE)
EXhalbtc8821aCsr2ant_PnpNotify(pBtCoexist, pnpState);
else if (pBtCoexist->boardInfo.btdmAntNum == 1)
EXhalbtc8821a1ant_PnpNotify(pBtCoexist,pnpState);
else if(pBtCoexist->boardInfo.btdmAntNum == 2)
EXhalbtc8821a2ant_PnpNotify(pBtCoexist,pnpState);
@ -2175,7 +2386,9 @@ void EXhalbtcoutsrc_Periodical(PBTC_COEXIST pBtCoexist)
if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter))
{
if (pBtCoexist->boardInfo.btdmAntNum == 2)
if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE)
EXhalbtc8821aCsr2ant_Periodical(pBtCoexist);
else if (pBtCoexist->boardInfo.btdmAntNum == 2)
EXhalbtc8821a2ant_Periodical(pBtCoexist);
else if (pBtCoexist->boardInfo.btdmAntNum == 1)
{
@ -2257,6 +2470,35 @@ void EXhalbtcoutsrc_DbgControl(PBTC_COEXIST pBtCoexist, u8 opCode, u8 opLen, u8
// halbtcoutsrc_NormalLowPower(pBtCoexist);
}
#if 0
VOID
EXhalbtcoutsrc_AntennaDetection(
IN PBTC_COEXIST pBtCoexist,
IN u4Byte centFreq,
IN u4Byte offset,
IN u4Byte span,
IN u4Byte seconds
)
{
if(!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist))
return;
/* Need to refine the following power save operations to enable this function in the future */
#if 0
IPSDisable(pBtCoexist->Adapter, FALSE, 0);
LeisurePSLeave(pBtCoexist->Adapter, LPS_DISABLE_BT_COEX);
#endif
if(IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter))
{
if(pBtCoexist->boardInfo.btdmAntNum == 1)
EXhalbtc8723b1ant_AntennaDetection(pBtCoexist, centFreq, offset, span, seconds);
}
//IPSReturn(pBtCoexist->Adapter, 0xff);
}
#endif
void EXhalbtcoutsrc_StackUpdateProfileInfo(void)
{
#if 0
@ -2428,7 +2670,9 @@ void EXhalbtcoutsrc_DisplayBtCoexInfo(PBTC_COEXIST pBtCoexist)
if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter))
{
if (pBtCoexist->boardInfo.btdmAntNum == 2)
if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE)
EXhalbtc8821aCsr2ant_DisplayCoexInfo(pBtCoexist);
else if (pBtCoexist->boardInfo.btdmAntNum == 2)
EXhalbtc8821a2ant_DisplayCoexInfo(pBtCoexist);
else if (pBtCoexist->boardInfo.btdmAntNum == 1)
EXhalbtc8821a1ant_DisplayCoexInfo(pBtCoexist);
@ -2475,6 +2719,25 @@ void EXhalbtcoutsrc_DisplayBtCoexInfo(PBTC_COEXIST pBtCoexist)
halbtcoutsrc_NormalLowPower(pBtCoexist);
}
VOID
EXhalbtcoutsrc_DisplayAntIsolation(
IN PBTC_COEXIST pBtCoexist
)
{
if(!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist))
return;
halbtcoutsrc_LeaveLowPower(pBtCoexist);
if(IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter))
{
if(pBtCoexist->boardInfo.btdmAntNum == 1)
EXhalbtc8723b1ant_DisplayAntIsolation(pBtCoexist);
}
halbtcoutsrc_NormalLowPower(pBtCoexist);
}
static void halbt_InitHwConfig92C(PADAPTER padapter)
{
PHAL_DATA_TYPE pHalData;
@ -2634,6 +2897,11 @@ void hal_btcoex_PowerOnSetting(PADAPTER padapter)
EXhalbtcoutsrc_PowerOnSetting(&GLBtCoexist);
}
void hal_btcoex_PreLoadFirmware(PADAPTER padapter)
{
EXhalbtcoutsrc_PreLoadFirmware(&GLBtCoexist);
}
void hal_btcoex_InitHwConfig(PADAPTER padapter, u8 bWifiOnly)
{
if (!hal_btcoex_IsBtExist(padapter))
@ -2787,13 +3055,15 @@ u8 hal_btcoex_LpsVal(PADAPTER padapter)
u32 hal_btcoex_GetRaMask(PADAPTER padapter)
{
if (!hal_btcoex_IsBtExist(padapter))
return 0;
return 0;
if (GLBtCoexist.btInfo.bBtDisabled)
return 0;
return 0;
if (GLBtCoexist.boardInfo.btdmAntNum != 1)
return 0;
// Modify by YiWei , suggest by Cosa and Jenyu
// Remove the limit antenna number , because 2 antenna case (ex: 8192eu)also want to get BT coex report rate mask.
//if (GLBtCoexist.boardInfo.btdmAntNum != 1)
// return 0;
return GLBtCoexist.btInfo.raMask;
}
@ -2975,5 +3245,183 @@ u8 hal_btcoex_IsBtLinkExist(PADAPTER padapter)
return _FALSE;
}
/*
* Description:
* Setting BT coex antenna isolation type .
* coex mechanisn/ spital stream/ best throughput
* anttype = 0 , PSTDMA / 2SS / 0.5T , bad isolation (<20dB) for 2,3 antenna
* anttype = 1 , PSTDMA / 1SS / 0.5T , normal isolaiton (>20dB) for 2 antenna
* anttype = 2 , TDMA / 2SS / T , normal isolaiton (>20dB) for 3 antenna
* anttype = 3 , no TDMA / 1SS / 0.5T , good isolation (>40dB) for 2 antenna
* anttype = 4 , no TDMA / 2SS / T , good isolation (>40dB) for 3 antenna
* wifi only throughput ~ T
* wifi/BT share one antenna with SPDT
*/
void hal_btcoex_SetAntIsolationType(PADAPTER padapter, u8 anttype)
{
PHAL_DATA_TYPE pHalData;
//DBG_871X("####%s , anttype = %d , %d \n", __FUNCTION__,anttype,__LINE__);
pHalData = GET_HAL_DATA(padapter);
pHalData->bt_coexist.btAntisolation= anttype;
}
#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
int
hal_btcoex_ParseAntIsolationConfigFile(
PADAPTER Adapter,
char* buffer
)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
u32 i = 0 , j=0;
char *szLine, *ptmp;
int rtStatus = _SUCCESS;
char param_value_string[10];
u8 param_value;
u8 anttype = 4;
u8 ant_num=3, ant_distance=50;
typedef struct ant_isolation
{
char *param_name; // antenna isolation config parameter name
u8 *value; // antenna isolation config parameter value
}ANT_ISOLATION;
ANT_ISOLATION ant_isolation_param[]= {
{"ANT_NUMBER",&ant_num},
{"ANT_DISTANCE",&ant_distance},
{NULL,0}
};
//DBG_871X("===>Hal_ParseAntIsolationConfigFile()\n" );
ptmp = buffer;
for (szLine = GetLineFromBuffer(ptmp); szLine != NULL; szLine = GetLineFromBuffer(ptmp))
{
// skip comment
if ( IsCommentString( szLine ) ) {
continue;
}
//DBG_871X("%s : szLine = %s , strlen(szLine) = %d \n", __FUNCTION__,szLine,strlen(szLine));
for ( j=0 ;ant_isolation_param[j].param_name != NULL ; j++ )
{
if ( strstr(szLine,ant_isolation_param[j].param_name)!= NULL )
{
i=0;
while ( i < strlen(szLine) )
{
if (szLine[i] != '"')
++i;
else
{
// skip only has one "
if( strpbrk(szLine, "\"") == strrchr(szLine, '"'))
{
DBG_871X("Fail to parse parameters , format error!\n");
break;
}
_rtw_memset( ( PVOID ) param_value_string, 0, 10 );
if ( ! ParseQualifiedString( szLine, &i, param_value_string, '"' , '"' ) ) {
DBG_871X("Fail to parse parameters \n");
return _FAIL;
}
else
{
GetU1ByteIntegerFromStringInDecimal( param_value_string, ant_isolation_param[j].value );
}
break;
}
}
}
}
}
// YiWei 20140716 , for BT coex antenna isolation control
if ( ant_num==3 && ant_distance>=50)
{
pHalData->EEPROMBluetoothCoexist = 0;
anttype = 4;
}
else if ( ant_num==2 && ant_distance>=50 )
{
anttype = 3;
}
else if ( ant_num==3 && ant_distance>=15 && ant_distance<50 )
{
anttype = 2;
}
else if ( ant_num==2 && ant_distance>=15 && ant_distance<50 )
{
anttype = 1;
}
else if ( (ant_num==2 && ant_distance<15) || (ant_num==3 && ant_distance<15))
{
anttype = 0;
}
else
{
pHalData->EEPROMBluetoothCoexist = 1;
anttype = 1;
}
hal_btcoex_SetAntIsolationType(Adapter, anttype);
DBG_871X("%s : ant_num = %d \n", __FUNCTION__,ant_num);
DBG_871X("%s : ant_distance = %d \n", __FUNCTION__,ant_distance);
//DBG_871X("<===Hal_ParseAntIsolationConfigFile()\n");
return rtStatus;
}
int
hal_btcoex_AntIsolationConfig_ParaFile(
IN PADAPTER Adapter,
IN char* pFileName
)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
int rlen = 0, rtStatus = _FAIL;
//char file_path[1024];
//if(!(Adapter->registrypriv.load_phy_file & LOAD_RF_TXPWR_LMT_PARA_FILE))
// return rtStatus;
_rtw_memset(pHalData->para_file_buf, 0, MAX_PARA_FILE_BUF_LEN);
rtw_merge_string(file_path, PATH_LENGTH_MAX, rtw_phy_file_path, pFileName);
if (rtw_is_file_readable(file_path) == _TRUE)
{
rlen = rtw_retrive_from_file(file_path, pHalData->para_file_buf, MAX_PARA_FILE_BUF_LEN);
if (rlen > 0)
{
rtStatus = _SUCCESS;
}
}
if(rtStatus == _SUCCESS)
{
//DBG_871X("%s(): read %s ok\n", __FUNCTION__, pFileName);
rtStatus = hal_btcoex_ParseAntIsolationConfigFile( Adapter, pHalData->para_file_buf );
}
else
{
DBG_871X("%s(): No File %s, Load from *** Array!\n", __FUNCTION__, pFileName);
}
return rtStatus;
}
#endif // CONFIG_LOAD_PHY_PARA_FROM_FILE
#endif // CONFIG_BT_COEXIST

4627
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/hal_com.c
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14
drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/hal_com_phycfg.c
View File

@ -2410,7 +2410,9 @@ Hal_ChannelPlanToRegulation(
IN u16 ChannelPlan
)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
DM_ODM_T *odm = &pHalData->odmpriv;
pHalData->Regulation2_4G = TXPWR_LMT_WW;
pHalData->Regulation5G = TXPWR_LMT_WW;
@ -2570,15 +2572,13 @@ Hal_ChannelPlanToRegulation(
default:
break;
}
DBG_871X("%s ChannelPlan:0x%02x,Regulation(2_4G/5G):0x%02x,0x%02x\n",
__FUNCTION__,ChannelPlan,pHalData->Regulation2_4G,pHalData->Regulation5G);
}
#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
extern char *rtw_phy_file_path;
char file_path[PATH_LENGTH_MAX];
#define GetLineFromBuffer(buffer) strsep(&buffer, "\n")
int
phy_ConfigMACWithParaFile(
IN PADAPTER Adapter,

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