Renesas RZ/V2N and RZ/V2H USB3.0 Core Clock DT Binding Definitions

USB3.0 core clock DT binding definitions for the Renesas RZ/V2N
 (R9A09G056) and RZ/V2H (R9A09G057) SoCs, shared by driver and DT source
 files.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCaRY8dQAKCRCKwlD9ZEnx
 cB+kAP9weww1/68Z4fOK9Dm2qunKQAS3IOAJPUU8kezAyj78SAEAnBoGBV4nhf5U
 8jXuBrQy5N+5vfNePyF3psbXy50Ejgk=
 =gvFo
 -----END PGP SIGNATURE-----

Merge tag 'renesas-r9a09g057-dt-binding-defs-tag5' into renesas-clk-for-v6.19

Renesas RZ/V2N and RZ/V2H USB3.0 Core Clock DT Binding Definitions

USB3.0 core clock DT binding definitions for the Renesas RZ/V2N
(R9A09G056) and RZ/V2H (R9A09G057) SoCs, shared by driver and DT source
files.
This commit is contained in:
Geert Uytterhoeven 2025-11-13 21:17:37 +01:00
commit c23be4242b
2 changed files with 6 additions and 0 deletions

View File

@ -21,5 +21,7 @@
#define R9A09G056_GBETH_0_CLK_PTP_REF_I 10
#define R9A09G056_GBETH_1_CLK_PTP_REF_I 11
#define R9A09G056_SPI_CLK_SPI 12
#define R9A09G056_USB3_0_REF_ALT_CLK_P 13
#define R9A09G056_USB3_0_CLKCORE 14
#endif /* __DT_BINDINGS_CLOCK_RENESAS_R9A09G056_CPG_H__ */

View File

@ -22,5 +22,9 @@
#define R9A09G057_GBETH_0_CLK_PTP_REF_I 11
#define R9A09G057_GBETH_1_CLK_PTP_REF_I 12
#define R9A09G057_SPI_CLK_SPI 13
#define R9A09G057_USB3_0_REF_ALT_CLK_P 14
#define R9A09G057_USB3_0_CLKCORE 15
#define R9A09G057_USB3_1_REF_ALT_CLK_P 16
#define R9A09G057_USB3_1_CLKCORE 17
#endif /* __DT_BINDINGS_CLOCK_RENESAS_R9A09G057_CPG_H__ */