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KVM: arm64: Expose ID_AA64MMFR4_EL1 to guests
We can now expose ID_AA64MMFR4_EL1 to guests, and let NV guests understand that they cannot really switch HCR_EL2.E2H to 0 on some platforms. Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20240122181344.258974-9-maz@kernel.org Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
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@ -133,6 +133,13 @@ static u64 limit_nv_id_reg(u32 id, u64 val)
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val |= FIELD_PREP(NV_FTR(MMFR2, TTL), 0b0001);
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break;
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case SYS_ID_AA64MMFR4_EL1:
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val = 0;
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if (!cpus_have_final_cap(ARM64_HAS_HCR_NV1))
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val |= FIELD_PREP(NV_FTR(MMFR4, E2H0),
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ID_AA64MMFR4_EL1_E2H0_NI_NV1);
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break;
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case SYS_ID_AA64DFR0_EL1:
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/* Only limited support for PMU, Debug, BPs and WPs */
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val &= (NV_FTR(DFR0, PMUVer) |
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@ -2350,7 +2350,7 @@ static const struct sys_reg_desc sys_reg_descs[] = {
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ID_AA64MMFR2_EL1_NV |
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ID_AA64MMFR2_EL1_CCIDX)),
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ID_SANITISED(ID_AA64MMFR3_EL1),
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ID_UNALLOCATED(7,4),
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ID_SANITISED(ID_AA64MMFR4_EL1),
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ID_UNALLOCATED(7,5),
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ID_UNALLOCATED(7,6),
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ID_UNALLOCATED(7,7),
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