mirror of
https://github.com/torvalds/linux.git
synced 2026-06-07 22:14:04 +02:00
arm64: dts: qcom: sm8150: add ref clock to PCIe PHYs
Follow the rest of the platforms and add "ref" clocks to both PCIe PHYs
found on the Qualcomm SM8150 platform.
Fixes: a1c86c6805 ("arm64: dts: qcom: sm8150: Add PCIe nodes")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230820142035.89903-15-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
parent
c588c9691f
commit
c204b37094
|
|
@ -1895,8 +1895,12 @@ pcie0_phy: phy@1c06000 {
|
|||
ranges;
|
||||
clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>,
|
||||
<&gcc GCC_PCIE_0_CFG_AHB_CLK>,
|
||||
<&gcc GCC_PCIE_0_CLKREF_CLK>,
|
||||
<&gcc GCC_PCIE0_PHY_REFGEN_CLK>;
|
||||
clock-names = "aux", "cfg_ahb", "refgen";
|
||||
clock-names = "aux",
|
||||
"cfg_ahb",
|
||||
"ref",
|
||||
"refgen";
|
||||
|
||||
resets = <&gcc GCC_PCIE_0_PHY_BCR>;
|
||||
reset-names = "phy";
|
||||
|
|
@ -1993,8 +1997,12 @@ pcie1_phy: phy@1c0e000 {
|
|||
ranges;
|
||||
clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>,
|
||||
<&gcc GCC_PCIE_1_CFG_AHB_CLK>,
|
||||
<&gcc GCC_PCIE_1_CLKREF_CLK>,
|
||||
<&gcc GCC_PCIE1_PHY_REFGEN_CLK>;
|
||||
clock-names = "aux", "cfg_ahb", "refgen";
|
||||
clock-names = "aux",
|
||||
"cfg_ahb",
|
||||
"ref",
|
||||
"refgen";
|
||||
|
||||
resets = <&gcc GCC_PCIE_1_PHY_BCR>;
|
||||
reset-names = "phy";
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user