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dt-bindings: pinctrl: add Ambarella CV75 pinctrl
Document the CV75 pin controller binding using generic function and groups properties for pinmux configuration. Reviewed-by: Linus Walleij <linusw@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Long Zhao <longzhao@ambarella.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
This commit is contained in:
Long Zhao
Linus Walleij
parent
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commit
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pinctrl/ambarella,cv75-pinctrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Ambarella CV75 Pin Controller
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maintainers:
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- Long Zhao <longzhao@ambarella.com>
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description:
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The Ambarella CV75 pin controller configures pin multiplexing, bias and
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drive strength for the main GPIO banks. Pin groups and their mux settings
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are defined by the pin controller driver and selected by function and group
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names.
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allOf:
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- $ref: pinctrl.yaml#
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properties:
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compatible:
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const: ambarella,cv75-pinctrl
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reg:
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maxItems: 1
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description: IOMUX registers
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ambarella,drive-strength-syscon:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: RCT syscon containing the drive-strength registers.
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ambarella,pull-syscon:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: Secure scratchpad syscon containing the pull registers.
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patternProperties:
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"^[a-z0-9-]+-pins$":
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type: object
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allOf:
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- $ref: pinmux-node.yaml#
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- $ref: pincfg-node.yaml#
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additionalProperties: false
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properties:
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function:
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enum:
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- can0
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- can1
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- dmic0
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- enet0
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- hsync0
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- hsync1
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- i2c0
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- i2c1
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- i2c2
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- i2c3
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- i2cs
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- i2s0
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- i2s1
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- ir
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- pwm0
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- pwm1
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- pwm2
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- pwm3
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- pwm4
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- pwm5
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- pwm6
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- pwm7
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- pwm8
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- pwm9
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- pwm10
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- pwm11
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- sdmmc0
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- sdmmc1
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- snand
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- spi0
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- spi1
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- spi2
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- spi3
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- spi_slave
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- spinor
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- uart0
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- uart1
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- uart2
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- uart3
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- uart4
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- vin_master_sync
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- vsync0
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- vsync1
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- vsync2
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- vsync3
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- wdt
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groups:
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items:
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enum:
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- can0
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- can1
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- dmic0
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- enet_2nd_ref_clk_a
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- enet_2nd_ref_clk_b
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- enet_ext_osc_clk
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- enet0_ptp_pps_o
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- hsync0
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- hsync1
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- i2c0_a
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- i2c0_b
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- i2c1_a
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- i2c1_b
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- i2c2
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- i2c3_a
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- i2c3_b
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- i2c3_c
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- i2cs_a
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- i2cs_b
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- i2cs_c
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- i2cs_d
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- i2s0
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- i2s1
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- ir
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- pwm0
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- pwm1
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- pwm2
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- pwm3
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- pwm4_a
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- pwm4_b
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- pwm5_a
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- pwm5_b
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- pwm6_a
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- pwm6_b
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- pwm7_a
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- pwm7_b
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- pwm8_a
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- pwm8_b
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- pwm9_a
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- pwm9_b
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- pwm10_a
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- pwm10_b
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- pwm11_a
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- pwm11_b
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- rgmii0
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- rmii0
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- sdmmc0_1bit
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- sdmmc0_4bit
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- sdmmc0_cd
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- sdmmc0_hs_sel
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- sdmmc0_reset
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- sdmmc0_wp
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- sdmmc1_1bit
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- sdmmc1_4bit
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- sdmmc1_cd
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- sdmmc1_hs_sel
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- sdmmc1_reset
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- sdmmc1_wp
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- snand
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- spi0
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- spi1
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- spi2
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- spi3_a
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- spi3_b
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- spi3_c
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- spi_slave_a
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- spi_slave_b
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- spi_slave_c
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- spi_slave_d
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- spi_slave_e
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- spinor
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- uart0
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- uart1
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- uart1_flow
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- uart2_a
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- uart2_b
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- uart2_c
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- uart2_flow_a
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- uart2_flow_b
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- uart3_a
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- uart3_b
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- uart3_flow_a
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- uart3_flow_b
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- uart4_a
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- uart4_b
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- uart4_flow_a
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- uart4_flow_b
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- vin_master_sync_a
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- vin_master_sync_b
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- vin_master_sync_c
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- vin_master_sync_d
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- vin_master_sync_e
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- vsync0
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- vsync1
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- vsync2
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- vsync3
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- wdt_a
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- wdt_b
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- wdt_c
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- wdt_d
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- wdt_e
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- wdt_f
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minItems: 1
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maxItems: 6
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uniqueItems: true
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bias-disable: true
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bias-pull-down: true
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bias-pull-up: true
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drive-strength:
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enum: [3, 4, 5, 6, 7, 8, 9, 12]
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required:
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- function
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- groups
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required:
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- compatible
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- reg
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- ambarella,drive-strength-syscon
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- ambarella,pull-syscon
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unevaluatedProperties: false
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examples:
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- |
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pinctrl: pinctrl@e4010000 {
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compatible = "ambarella,cv75-pinctrl";
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reg = <0xe4010000 0x1000>;
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ambarella,drive-strength-syscon = <&rct>;
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ambarella,pull-syscon = <&scratchpad>;
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uart0-pins {
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function = "uart0";
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groups = "uart0";
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bias-disable;
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drive-strength = <8>;
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};
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};
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