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arm64: dts: renesas: r8a779g0: Add ISP core function block
All ISP instances on V4H have both a channel select and core function block, describe the core region in addition to the existing cs region. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Jacopo Mondi <jacopo.mondi@ideasonboard.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250423163113.2961049-4-niklas.soderlund+renesas@ragnatech.se Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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@ -2277,13 +2277,20 @@ du_out_dsi1: endpoint {
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isp0: isp@fed00000 {
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compatible = "renesas,r8a779g0-isp",
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"renesas,rcar-gen4-isp";
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reg = <0 0xfed00000 0 0x10000>;
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interrupts = <GIC_SPI 473 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&cpg CPG_MOD 612>;
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reg = <0 0xfed00000 0 0x10000>, <0 0xfec00000 0 0x100000>;
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reg-names = "cs", "core";
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interrupts = <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "cs", "core";
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clocks = <&cpg CPG_MOD 612>, <&cpg CPG_MOD 16>;
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clock-names = "cs", "core";
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power-domains = <&sysc R8A779G0_PD_A3ISP0>;
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resets = <&cpg 612>;
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resets = <&cpg 612>, <&cpg 16>;
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reset-names = "cs", "core";
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status = "disabled";
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renesas,vspx = <&vspx0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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@ -2361,13 +2368,20 @@ isp0vin07: endpoint {
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isp1: isp@fed20000 {
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compatible = "renesas,r8a779g0-isp",
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"renesas,rcar-gen4-isp";
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reg = <0 0xfed20000 0 0x10000>;
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interrupts = <GIC_SPI 474 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&cpg CPG_MOD 613>;
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reg = <0 0xfed20000 0 0x10000>, <0 0xfee00000 0 0x100000>;
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reg-names = "cs", "core";
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interrupts = <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "cs", "core";
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clocks = <&cpg CPG_MOD 613>, <&cpg CPG_MOD 17>;
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clock-names = "cs", "core";
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power-domains = <&sysc R8A779G0_PD_A3ISP1>;
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resets = <&cpg 613>;
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resets = <&cpg 613>, <&cpg 17>;
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reset-names = "cs", "core";
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status = "disabled";
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renesas,vspx = <&vspx1>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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