github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-06-03 20:14:06 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

MIPS: mobileye: eyeq5: add 5 I2C controller nodes

Browse Source 
Add the SoC I2C controller nodes to the platform devicetree. Use a
default bus frequency of 400kHz. They are AMBA devices that are matched
on PeriphID.

Set transfer timeout to 10ms instead of Linux's default of 200ms.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Andi Shyti <andi.shyti@kernel.org>
Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
This commit is contained in:
Théo Lebrun 2025-07-04 13:47:07 +02:00 committed by Thomas Bogendoerfer
parent daf3082f89
commit c1dbf4c8c2
1 changed files with 75 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

75
arch/mips/boot/dts/mobileye/eyeq5.dtsi
View File

@ -110,6 +110,81 @@ soc: soc {
ranges;
compatible = "simple-bus";
i2c0: i2c@300000 {
compatible = "mobileye,eyeq5-i2c", "arm,primecell";
reg = <0 0x300000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 1 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <400000>; /* Fast mode */
#address-cells = <1>;
#size-cells = <0>;
clocks = <&olb 35>, <&olb EQ5C_PER_I2C>;
clock-names = "i2cclk", "apb_pclk";
resets = <&olb 0 13>;
i2c-transfer-timeout-us = <10000>;
mobileye,olb = <&olb 0>;
};
i2c1: i2c@400000 {
compatible = "mobileye,eyeq5-i2c", "arm,primecell";
reg = <0 0x400000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 2 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <400000>; /* Fast mode */
#address-cells = <1>;
#size-cells = <0>;
clocks = <&olb 35>, <&olb EQ5C_PER_I2C>;
clock-names = "i2cclk", "apb_pclk";
resets = <&olb 0 14>;
i2c-transfer-timeout-us = <10000>;
mobileye,olb = <&olb 1>;
};
i2c2: i2c@500000 {
compatible = "mobileye,eyeq5-i2c", "arm,primecell";
reg = <0 0x500000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <400000>; /* Fast mode */
#address-cells = <1>;
#size-cells = <0>;
clocks = <&olb 35>, <&olb EQ5C_PER_I2C>;
clock-names = "i2cclk", "apb_pclk";
resets = <&olb 0 15>;
i2c-transfer-timeout-us = <10000>;
mobileye,olb = <&olb 2>;
};
i2c3: i2c@600000 {
compatible = "mobileye,eyeq5-i2c", "arm,primecell";
reg = <0 0x600000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 4 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <400000>; /* Fast mode */
#address-cells = <1>;
#size-cells = <0>;
clocks = <&olb 35>, <&olb EQ5C_PER_I2C>;
clock-names = "i2cclk", "apb_pclk";
resets = <&olb 0 16>;
i2c-transfer-timeout-us = <10000>;
mobileye,olb = <&olb 3>;
};
i2c4: i2c@700000 {
compatible = "mobileye,eyeq5-i2c", "arm,primecell";
reg = <0 0x700000 0x0 0x1000>;
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 5 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <400000>; /* Fast mode */
#address-cells = <1>;
#size-cells = <0>;
clocks = <&olb 35>, <&olb EQ5C_PER_I2C>;
clock-names = "i2cclk", "apb_pclk";
resets = <&olb 0 17>;
i2c-transfer-timeout-us = <10000>;
mobileye,olb = <&olb 4>;
};
uart0: serial@800000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0 0x800000 0x0 0x1000>;