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perf vendor metrics s390: Avoid has_event(INSTRUCTIONS)
The instructions event is now provided in json meaning the has_event
test always succeeds. Switch to using non-legacy event names in the
affected metrics.
Reported-by: Thomas Richter <tmricht@linux.ibm.com>
Closes: https://lore.kernel.org/linux-perf-users/3e80f453-f015-4f4f-93d3-8df6bb6b3c95@linux.ibm.com/
Fixes: 0012e0fa22 ("perf jevents: Add legacy-hardware and legacy-cache json")
Signed-off-by: Ian Rogers <irogers@google.com>
Reviewed-by: Thomas Richter <tmricht@linux.ibm.com>
Tested-by: Thomas Richter <tmricht@linux.ibm.com>
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
This commit is contained in:
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@ -7,17 +7,17 @@
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{
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"BriefDescription": "Cycles per Instruction",
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"MetricName": "cpi",
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"MetricExpr": "CPU_CYCLES / INSTRUCTIONS if has_event(INSTRUCTIONS) else 0"
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"MetricExpr": "CPU_CYCLES / INSTRUCTIONS if has_event(CPU_CYCLES) else 0"
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},
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{
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"BriefDescription": "Problem State Instruction Ratio",
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"MetricName": "prbstate",
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"MetricExpr": "(PROBLEM_STATE_INSTRUCTIONS / INSTRUCTIONS) * 100 if has_event(INSTRUCTIONS) else 0"
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"MetricExpr": "(PROBLEM_STATE_INSTRUCTIONS / INSTRUCTIONS) * 100 if has_event(PROBLEM_STATE_INSTRUCTIONS) else 0"
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},
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{
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"BriefDescription": "Level One Miss per 100 Instructions",
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"MetricName": "l1mp",
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"MetricExpr": "((L1I_DIR_WRITES + L1D_DIR_WRITES) / INSTRUCTIONS) * 100 if has_event(INSTRUCTIONS) else 0"
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"MetricExpr": "((L1I_DIR_WRITES + L1D_DIR_WRITES) / INSTRUCTIONS) * 100 if has_event(L1I_DIR_WRITES) else 0"
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},
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{
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"BriefDescription": "Percentage sourced from Level 2 cache",
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@ -52,7 +52,7 @@
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{
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"BriefDescription": "Estimated Instruction Complexity CPI infinite Level 1",
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"MetricName": "est_cpi",
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"MetricExpr": "(CPU_CYCLES / INSTRUCTIONS) - (L1C_TLB2_MISSES / INSTRUCTIONS) if has_event(INSTRUCTIONS) else 0"
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"MetricExpr": "(CPU_CYCLES / INSTRUCTIONS) - (L1C_TLB2_MISSES / INSTRUCTIONS) if has_event(CPU_CYCLES) else 0"
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},
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{
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"BriefDescription": "Estimated Sourcing Cycles per Level 1 Miss",
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@ -7,17 +7,17 @@
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{
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"BriefDescription": "Cycles per Instruction",
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"MetricName": "cpi",
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"MetricExpr": "CPU_CYCLES / INSTRUCTIONS if has_event(INSTRUCTIONS) else 0"
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"MetricExpr": "CPU_CYCLES / INSTRUCTIONS if has_event(CPU_CYCLES) else 0"
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},
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{
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"BriefDescription": "Problem State Instruction Ratio",
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"MetricName": "prbstate",
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"MetricExpr": "(PROBLEM_STATE_INSTRUCTIONS / INSTRUCTIONS) * 100 if has_event(INSTRUCTIONS) else 0"
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"MetricExpr": "(PROBLEM_STATE_INSTRUCTIONS / INSTRUCTIONS) * 100 if has_event(PROBLEM_STATE_INSTRUCTIONS) else 0"
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},
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{
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"BriefDescription": "Level One Miss per 100 Instructions",
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"MetricName": "l1mp",
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"MetricExpr": "((L1I_DIR_WRITES + L1D_DIR_WRITES) / INSTRUCTIONS) * 100 if has_event(INSTRUCTIONS) else 0"
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"MetricExpr": "((L1I_DIR_WRITES + L1D_DIR_WRITES) / INSTRUCTIONS) * 100 if has_event(L1I_DIR_WRITES) else 0"
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},
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{
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"BriefDescription": "Percentage sourced from Level 2 cache",
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@ -52,7 +52,7 @@
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{
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"BriefDescription": "Estimated Instruction Complexity CPI infinite Level 1",
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"MetricName": "est_cpi",
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"MetricExpr": "(CPU_CYCLES / INSTRUCTIONS) - (L1C_TLB2_MISSES / INSTRUCTIONS) if has_event(INSTRUCTIONS) else 0"
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"MetricExpr": "(CPU_CYCLES / INSTRUCTIONS) - (L1C_TLB2_MISSES / INSTRUCTIONS) if has_event(L1C_TLB2_MISSES) else 0"
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},
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{
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"BriefDescription": "Estimated Sourcing Cycles per Level 1 Miss",
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