media: dt-bindings: ti,omap3isp: Convert to DT schema

Convert binding for ti,omap3isp from TXT to YAML format.

Signed-off-by: Alex Tran <alex.t.tran@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
This commit is contained in:
Alex Tran 2025-12-25 13:03:08 -08:00 committed by Hans Verkuil
parent d71bd243ef
commit c16b58a455
2 changed files with 189 additions and 71 deletions

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OMAP 3 ISP Device Tree bindings
===============================
The DT definitions can be found in include/dt-bindings/media/omap3-isp.h.
Required properties
===================
compatible : must contain "ti,omap3-isp"
reg : the two registers sets (physical address and length) for the
ISP. The first set contains the core ISP registers up to
the end of the SBL block. The second set contains the
CSI PHYs and receivers registers.
interrupts : the ISP interrupt specifier
iommus : phandle and IOMMU specifier for the IOMMU that serves the ISP
syscon : the phandle and register offset to the Complex I/O or CSI-PHY
register
ti,phy-type : 0 -- OMAP3ISP_PHY_TYPE_COMPLEX_IO (e.g. 3430)
1 -- OMAP3ISP_PHY_TYPE_CSIPHY (e.g. 3630)
#clock-cells : Must be 1 --- the ISP provides two external clocks,
cam_xclka and cam_xclkb, at indices 0 and 1,
respectively. Please find more information on common
clock bindings in ../clock/clock-bindings.txt.
Port nodes (optional)
---------------------
More documentation on these bindings is available in
video-interfaces.txt in the same directory.
reg : The interface:
0 - parallel (CCDC)
1 - CSIPHY1 -- CSI2C / CCP2B on 3630;
CSI1 -- CSIb on 3430
2 - CSIPHY2 -- CSI2A / CCP2B on 3630;
CSI2 -- CSIa on 3430
Optional properties
===================
vdd-csiphy1-supply : voltage supply of the CSI-2 PHY 1
vdd-csiphy2-supply : voltage supply of the CSI-2 PHY 2
Endpoint nodes
--------------
lane-polarities : lane polarity (required on CSI-2)
0 -- not inverted; 1 -- inverted
data-lanes : an array of data lanes from 1 to 3. The length can
be either 1 or 2. (required on CSI-2)
clock-lanes : the clock lane (from 1 to 3). (required on CSI-2)
Example
=======
isp@480bc000 {
compatible = "ti,omap3-isp";
reg = <0x480bc000 0x12fc
0x480bd800 0x0600>;
interrupts = <24>;
iommus = <&mmu_isp>;
syscon = <&scm_conf 0x2f0>;
ti,phy-type = <OMAP3ISP_PHY_TYPE_CSIPHY>;
#clock-cells = <1>;
ports {
#address-cells = <1>;
#size-cells = <0>;
};
};

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/media/ti,omap3isp.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Texas Instruments OMAP 3 Image Signal Processor (ISP)
maintainers:
- Laurent Pinchart <laurent.pinchart@ideasonboard.com>
- Sakari Ailus <sakari.ailus@iki.fi>
description:
The OMAP 3 ISP is an image signal processor present in OMAP 3 SoCs.
properties:
compatible:
const: ti,omap3-isp
reg:
items:
- description: Core ISP registers up to the end of the SBL block
- description: CSI PHYs and receivers registers
interrupts:
maxItems: 1
iommus:
maxItems: 1
syscon:
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
- items:
- description: phandle to System Control Module
- description: register offset to Complex I/O or CSI-PHY register
description:
Phandle and register offset to the Complex I/O or CSI-PHY register
ti,phy-type:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1]
description:
0 - OMAP3ISP_PHY_TYPE_COMPLEX_IO (e.g. OMAP 3430)
1 - OMAP3ISP_PHY_TYPE_CSIPHY (e.g. OMAP 3630)
'#clock-cells':
const: 1
description:
The ISP provides two external clocks, cam_xclka and cam_xclkb,
at indices 0 and 1 respectively.
vdd-csiphy1-supply:
description: Voltage supply of the CSI-2 PHY 1
vdd-csiphy2-supply:
description: Voltage supply of the CSI-2 PHY 2
ports:
$ref: /schemas/graph.yaml#/properties/ports
properties:
port@0:
$ref: /schemas/graph.yaml#/$defs/port-base
unevaluatedProperties: false
description: Parallel (CCDC) interface
properties:
endpoint:
$ref: /schemas/media/video-interfaces.yaml#
unevaluatedProperties: false
port@1:
$ref: /schemas/graph.yaml#/$defs/port-base
unevaluatedProperties: false
description: |
CSIPHY1 interface:
OMAP 3630: CSI2C / CCP2B
OMAP 3430: CSI1 (CSIb)
properties:
endpoint:
$ref: /schemas/media/video-interfaces.yaml#
unevaluatedProperties: false
properties:
lane-polarities:
minItems: 2
maxItems: 3
data-lanes:
minItems: 1
maxItems: 2
items:
minimum: 1
maximum: 3
clock-lanes:
minimum: 1
maximum: 3
port@2:
$ref: /schemas/graph.yaml#/$defs/port-base
unevaluatedProperties: false
description: |
CSIPHY2 interface:
OMAP 3630: CSI2A / CCP2B
OMAP 3430: CSI2 (CSIa)
properties:
endpoint:
$ref: /schemas/media/video-interfaces.yaml#
unevaluatedProperties: false
properties:
lane-polarities:
minItems: 2
maxItems: 3
data-lanes:
minItems: 1
maxItems: 2
items:
minimum: 1
maximum: 3
clock-lanes:
minimum: 1
maximum: 3
required:
- compatible
- reg
- interrupts
- iommus
- syscon
- ti,phy-type
- '#clock-cells'
additionalProperties: false
examples:
- |
#include <dt-bindings/media/omap3-isp.h>
isp@480bc000 {
compatible = "ti,omap3-isp";
reg = <0x480bc000 0x12fc>,
<0x480bd800 0x0600>;
interrupts = <24>;
iommus = <&mmu_isp>;
syscon = <&scm_conf 0x2f0>;
ti,phy-type = <OMAP3ISP_PHY_TYPE_CSIPHY>;
#clock-cells = <1>;
vdd-csiphy1-supply = <&vaux2>;
vdd-csiphy2-supply = <&vaux2>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
parallel_ep: endpoint {
remote-endpoint = <&parallel>;
};
};
port@1 {
reg = <1>;
csi1_ep: endpoint {
remote-endpoint = <&smia_1>;
clock-lanes = <1>;
data-lanes = <2>;
lane-polarities = <0 0>;
};
};
port@2 {
reg = <2>;
csi2a_ep: endpoint {
remote-endpoint = <&smia_2>;
clock-lanes = <2>;
data-lanes = <1 3>;
lane-polarities = <1 1 1>;
};
};
};
};