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media: dt-bindings: ti,omap3isp: Convert to DT schema
Convert binding for ti,omap3isp from TXT to YAML format. Signed-off-by: Alex Tran <alex.t.tran@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
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OMAP 3 ISP Device Tree bindings
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===============================
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The DT definitions can be found in include/dt-bindings/media/omap3-isp.h.
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Required properties
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===================
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compatible : must contain "ti,omap3-isp"
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reg : the two registers sets (physical address and length) for the
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ISP. The first set contains the core ISP registers up to
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the end of the SBL block. The second set contains the
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CSI PHYs and receivers registers.
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interrupts : the ISP interrupt specifier
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iommus : phandle and IOMMU specifier for the IOMMU that serves the ISP
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syscon : the phandle and register offset to the Complex I/O or CSI-PHY
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register
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ti,phy-type : 0 -- OMAP3ISP_PHY_TYPE_COMPLEX_IO (e.g. 3430)
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1 -- OMAP3ISP_PHY_TYPE_CSIPHY (e.g. 3630)
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#clock-cells : Must be 1 --- the ISP provides two external clocks,
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cam_xclka and cam_xclkb, at indices 0 and 1,
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respectively. Please find more information on common
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clock bindings in ../clock/clock-bindings.txt.
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Port nodes (optional)
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---------------------
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More documentation on these bindings is available in
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video-interfaces.txt in the same directory.
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reg : The interface:
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0 - parallel (CCDC)
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1 - CSIPHY1 -- CSI2C / CCP2B on 3630;
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CSI1 -- CSIb on 3430
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2 - CSIPHY2 -- CSI2A / CCP2B on 3630;
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CSI2 -- CSIa on 3430
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Optional properties
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===================
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vdd-csiphy1-supply : voltage supply of the CSI-2 PHY 1
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vdd-csiphy2-supply : voltage supply of the CSI-2 PHY 2
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Endpoint nodes
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--------------
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lane-polarities : lane polarity (required on CSI-2)
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0 -- not inverted; 1 -- inverted
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data-lanes : an array of data lanes from 1 to 3. The length can
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be either 1 or 2. (required on CSI-2)
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clock-lanes : the clock lane (from 1 to 3). (required on CSI-2)
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Example
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=======
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isp@480bc000 {
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compatible = "ti,omap3-isp";
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reg = <0x480bc000 0x12fc
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0x480bd800 0x0600>;
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interrupts = <24>;
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iommus = <&mmu_isp>;
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syscon = <&scm_conf 0x2f0>;
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ti,phy-type = <OMAP3ISP_PHY_TYPE_CSIPHY>;
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#clock-cells = <1>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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189
Documentation/devicetree/bindings/media/ti,omap3isp.yaml
Normal file
189
Documentation/devicetree/bindings/media/ti,omap3isp.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/media/ti,omap3isp.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Texas Instruments OMAP 3 Image Signal Processor (ISP)
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maintainers:
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- Laurent Pinchart <laurent.pinchart@ideasonboard.com>
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- Sakari Ailus <sakari.ailus@iki.fi>
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description:
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The OMAP 3 ISP is an image signal processor present in OMAP 3 SoCs.
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properties:
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compatible:
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const: ti,omap3-isp
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reg:
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items:
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- description: Core ISP registers up to the end of the SBL block
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- description: CSI PHYs and receivers registers
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interrupts:
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maxItems: 1
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iommus:
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maxItems: 1
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syscon:
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$ref: /schemas/types.yaml#/definitions/phandle-array
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items:
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- items:
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- description: phandle to System Control Module
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- description: register offset to Complex I/O or CSI-PHY register
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description:
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Phandle and register offset to the Complex I/O or CSI-PHY register
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ti,phy-type:
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [0, 1]
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description:
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0 - OMAP3ISP_PHY_TYPE_COMPLEX_IO (e.g. OMAP 3430)
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1 - OMAP3ISP_PHY_TYPE_CSIPHY (e.g. OMAP 3630)
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'#clock-cells':
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const: 1
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description:
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The ISP provides two external clocks, cam_xclka and cam_xclkb,
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at indices 0 and 1 respectively.
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vdd-csiphy1-supply:
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description: Voltage supply of the CSI-2 PHY 1
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vdd-csiphy2-supply:
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description: Voltage supply of the CSI-2 PHY 2
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ports:
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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port@0:
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$ref: /schemas/graph.yaml#/$defs/port-base
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unevaluatedProperties: false
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description: Parallel (CCDC) interface
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properties:
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endpoint:
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$ref: /schemas/media/video-interfaces.yaml#
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unevaluatedProperties: false
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port@1:
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$ref: /schemas/graph.yaml#/$defs/port-base
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unevaluatedProperties: false
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description: |
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CSIPHY1 interface:
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OMAP 3630: CSI2C / CCP2B
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OMAP 3430: CSI1 (CSIb)
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properties:
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endpoint:
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$ref: /schemas/media/video-interfaces.yaml#
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unevaluatedProperties: false
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properties:
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lane-polarities:
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minItems: 2
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maxItems: 3
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data-lanes:
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minItems: 1
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maxItems: 2
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items:
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minimum: 1
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maximum: 3
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clock-lanes:
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minimum: 1
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maximum: 3
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port@2:
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$ref: /schemas/graph.yaml#/$defs/port-base
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unevaluatedProperties: false
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description: |
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CSIPHY2 interface:
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OMAP 3630: CSI2A / CCP2B
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OMAP 3430: CSI2 (CSIa)
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properties:
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endpoint:
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$ref: /schemas/media/video-interfaces.yaml#
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unevaluatedProperties: false
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properties:
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lane-polarities:
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minItems: 2
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maxItems: 3
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data-lanes:
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minItems: 1
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maxItems: 2
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items:
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minimum: 1
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maximum: 3
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clock-lanes:
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minimum: 1
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maximum: 3
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required:
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- compatible
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- reg
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- interrupts
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- iommus
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- syscon
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- ti,phy-type
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- '#clock-cells'
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/media/omap3-isp.h>
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isp@480bc000 {
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compatible = "ti,omap3-isp";
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reg = <0x480bc000 0x12fc>,
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<0x480bd800 0x0600>;
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interrupts = <24>;
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iommus = <&mmu_isp>;
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syscon = <&scm_conf 0x2f0>;
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ti,phy-type = <OMAP3ISP_PHY_TYPE_CSIPHY>;
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#clock-cells = <1>;
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vdd-csiphy1-supply = <&vaux2>;
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vdd-csiphy2-supply = <&vaux2>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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parallel_ep: endpoint {
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remote-endpoint = <¶llel>;
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};
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};
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port@1 {
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reg = <1>;
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csi1_ep: endpoint {
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remote-endpoint = <&smia_1>;
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clock-lanes = <1>;
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data-lanes = <2>;
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lane-polarities = <0 0>;
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};
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};
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port@2 {
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reg = <2>;
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csi2a_ep: endpoint {
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remote-endpoint = <&smia_2>;
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clock-lanes = <2>;
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data-lanes = <1 3>;
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lane-polarities = <1 1 1>;
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};
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};
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};
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};
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