Regulator/supply fixes for a number of boards, removed too fast

cpu OPPs from rk3576 (not supported in newer vendor TF-A and never
 supported in upstream TF-A). As well as some DTS validation fixes
 and one pinctrl fix for the odroid-m1.
 -----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmkZpf8QHGhlaWtvQHNu
 dGVjaC5kZQAKCRDzpnnJnNEdgff6CACnCa3tpWDB/nLRQNd8iBWlzk323yA94DB2
 k2I9ZoSvOfMZ2KWbpfEk2ODW40jSMWEZEIJg2SDX7yagfmH1ZNtNuTi3Q48HcDmv
 z79Pxqt512/umysRjPrr5rXBRywG7WWybjbYYpeLLdkvYQg/jfoiLeB7sHGUvRMV
 aFRp7SIaEKVWTx2BptcrUmu6HSO6tVMRuAHB+7HRTpIU71SXULbnva4qOsmaGpDx
 dNNX8XKiYzHdpx6Ip9MbWCDjYnysJiEo+cldwrRmHzRv4n56vCbA/oXrNB9v03I4
 TFqQvSPAe+FA64gmqUaKx1jeUL54tf8L/GldDn7+n3xDjB59TE/E
 =rVu+
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmkc6Q8ACgkQmmx57+YA
 GNk7aQ//c+Nb6ZFLwmIDG7c7e+6FAiygbhmF3XDSX5k0wGN6maqBxPDaxOWH9BsA
 3rx+87G3efsybE7D7h9EQIdDbMXw4twxTDyeFKotMCAapoQAFm1+vgKRCyQnKCuZ
 OwwYK+29cHIBuuSnCa3RoWC/pETWGrpLbnRPP0nkV7hnzSqzKSrUWIqmCczTw2Uc
 C3lQjhDsUV1D5tXweNwf/MBQ9tcA0QG6A+xt80R007o80Nmkj4zbIALTcVZ/ve/J
 waejwjwGyIFdjemp3JCRkmAz5M6xh9C0+nJlmZNQ9jh/fC7HMskD/4tBUzJaXwzw
 mma4i4HubtIaySchXxCJul20ASeHfDm7uZV76TAl17oqQ4JWdCC6Gi1T4F/P1QsG
 xO1ArmH+bxINEj5958TaDkD5qGs8lhTFlFWzxeTglgshlwQjHi2EPAujNmzEQd73
 fhjfRgDMnOwkd2Jjo5U5G6ID7nAeMkLhX8BBWXP6L0iEkvoV6afgEpPnasGojJbR
 0LGvJnAn29NCfw/0yMJTS14GPcE9EEYccVxzfr6lFFvWt+r72koJ0NbDaFEvmZ/s
 pu3fVlXPVgrM/uaPjDKmCusc5hifOpiMFxc2MnzDCpPPDwiM9MrdLkmCnmHJqDyv
 9R9wFf09Q5GZj3uce8uL7n4goAJAL8oayncR7wiwPly1JFTpZ58=
 =KB+O
 -----END PGP SIGNATURE-----

Merge tag 'v6.18-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/fixes

Regulator/supply fixes for a number of boards, removed too fast
cpu OPPs from rk3576 (not supported in newer vendor TF-A and never
supported in upstream TF-A). As well as some DTS validation fixes
and one pinctrl fix for the odroid-m1.

* tag 'v6.18-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  arm64: dts: rockchip: fix PCIe 3.3V regulator voltage on orangepi-5
  arm64: dts: rockchip: disable HS400 on RK3588 Tiger
  arm64: dts: rockchip: drop reset from rk3576 i2c9 node
  arm64: dts: rockchip: Fix USB power enable pin for BTT CB2 and Pi2
  arm64: dts: rockchip: Fix vccio4-supply on rk3566-pinetab2
  arm64: dts: rockchip: include rk3399-base instead of rk3399 in rk3399-op1
  arm64: dts: rockchip: Fix indentation on rk3399 haikou demo dtso
  arm64: dts: rockchip: Make RK3588 GPU OPP table naming less generic
  arm64: dts: rockchip: Drop 'rockchip,grf' prop from tsadc on rk3328
  arm64: dts: rockchip: Remove non-functioning CPU OPPs from RK3576
  arm64: dts: rockchip: Fix PCIe power enable pin for BigTreeTech CB2 and Pi2
  arm64: dts: rockchip: Set correct pinctrl for I2S1 8ch TX on odroid-m1

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2025-11-18 22:45:25 +01:00
commit c10519c8c8
11 changed files with 17 additions and 32 deletions

View File

@ -598,7 +598,6 @@ tsadc: tsadc@ff250000 {
pinctrl-2 = <&otp_pin>;
resets = <&cru SRST_TSADC>;
reset-names = "tsadc-apb";
rockchip,grf = <&grf>;
rockchip,hw-tshut-temp = <100000>;
#thermal-sensor-cells = <1>;
status = "disabled";

View File

@ -3,7 +3,7 @@
* Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd
*/
#include "rk3399.dtsi"
#include "rk3399-base.dtsi"
/ {
cluster0_opp: opp-table-0 {

View File

@ -45,11 +45,11 @@ cam_avdd_2v8: regulator-cam-avdd-2v8 {
cam_dovdd_1v8: regulator-cam-dovdd-1v8 {
compatible = "regulator-fixed";
gpio = <&pca9670 3 GPIO_ACTIVE_LOW>;
regulator-max-microvolt = <1800000>;
regulator-min-microvolt = <1800000>;
regulator-name = "cam-dovdd-1v8";
vin-supply = <&vcc1v8_video>;
gpio = <&pca9670 3 GPIO_ACTIVE_LOW>;
regulator-max-microvolt = <1800000>;
regulator-min-microvolt = <1800000>;
regulator-name = "cam-dovdd-1v8";
vin-supply = <&vcc1v8_video>;
};
cam_dvdd_1v2: regulator-cam-dvdd-1v2 {

View File

@ -120,7 +120,7 @@ vcc3v3_pcie: regulator-vcc3v3-pcie {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_pcie";
enable-active-high;
gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_drv>;
regulator-always-on;
@ -187,7 +187,7 @@ vcc5v0_usb: regulator-vcc5v0-usb {
vcc5v0_usb2b: regulator-vcc5v0-usb2b {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_usb2b_en>;
regulator-name = "vcc5v0_usb2b";
@ -199,7 +199,7 @@ vcc5v0_usb2b: regulator-vcc5v0-usb2b {
vcc5v0_usb2t: regulator-vcc5v0-usb2t {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_usb2t_en>;
regulator-name = "vcc5v0_usb2t";

View File

@ -789,7 +789,7 @@ &pmu_io_domains {
vccio1-supply = <&vccio_acodec>;
vccio2-supply = <&vcc_1v8>;
vccio3-supply = <&vccio_sd>;
vccio4-supply = <&vcc_1v8>;
vccio4-supply = <&vcca1v8_pmu>;
vccio5-supply = <&vcc_1v8>;
vccio6-supply = <&vcc1v8_dvp>;
vccio7-supply = <&vcc_3v3>;

View File

@ -482,6 +482,8 @@ &i2s0_8ch {
};
&i2s1_8ch {
pinctrl-names = "default";
pinctrl-0 = <&i2s1m0_sclktx &i2s1m0_lrcktx &i2s1m0_sdi0 &i2s1m0_sdo0>;
rockchip,trcm-sync-tx-only;
status = "okay";
};

View File

@ -276,12 +276,6 @@ opp-2016000000 {
opp-microvolt = <900000 900000 950000>;
clock-latency-ns = <40000>;
};
opp-2208000000 {
opp-hz = /bits/ 64 <2208000000>;
opp-microvolt = <950000 950000 950000>;
clock-latency-ns = <40000>;
};
};
cluster1_opp_table: opp-table-cluster1 {
@ -348,12 +342,6 @@ opp-2208000000 {
opp-microvolt = <925000 925000 950000>;
clock-latency-ns = <40000>;
};
opp-2304000000 {
opp-hz = /bits/ 64 <2304000000>;
opp-microvolt = <950000 950000 950000>;
clock-latency-ns = <40000>;
};
};
gpu_opp_table: opp-table-gpu {
@ -2561,8 +2549,6 @@ i2c9: i2c@2ae80000 {
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&i2c9m0_xfer>;
resets = <&cru SRST_I2C9>, <&cru SRST_P_I2C9>;
reset-names = "i2c", "apb";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";

View File

@ -115,7 +115,7 @@ opp-2400000000 {
};
};
gpu_opp_table: opp-table {
gpu_opp_table: opp-table-gpu {
compatible = "operating-points-v2";
opp-300000000 {

View File

@ -382,14 +382,12 @@ &sdhci {
cap-mmc-highspeed;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
mmc-pwrseq = <&emmc_pwrseq>;
no-sdio;
no-sd;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&emmc_bus8 &emmc_cmd &emmc_clk &emmc_data_strobe>;
pinctrl-0 = <&emmc_bus8 &emmc_cmd &emmc_clk>;
vmmc-supply = <&vcc_3v3_s3>;
vqmmc-supply = <&vcc_1v8_s3>;
status = "okay";

View File

@ -66,7 +66,7 @@ opp-1608000000 {
};
};
gpu_opp_table: opp-table {
gpu_opp_table: opp-table-gpu {
compatible = "operating-points-v2";
opp-300000000 {

View File

@ -14,8 +14,8 @@ vcc3v3_pcie20: regulator-vcc3v3-pcie20 {
gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
regulator-name = "vcc3v3_pcie20";
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <50000>;
vin-supply = <&vcc5v0_sys>;
};