github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-05-25 23:52:08 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

drm/amd/display: Drop CONFIG_DRM_AMD_DC_HDR

Browse Source 
[Why & How]
Remove dead code.

Reviewed-by: Sun peng Li <Sunpeng.Li@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Harry Wentland 2023-02-13 11:35:20 -05:00 committed by Alex Deucher
parent 0215ce9057
commit c0a561d96a
1 changed files with 0 additions and 129 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

129
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
View File

@ -741,24 +741,6 @@ static int get_plane_formats(const struct drm_plane *plane,
return num_formats;
}
#ifdef CONFIG_DRM_AMD_DC_HDR
static int attach_color_mgmt_properties(struct amdgpu_display_manager *dm, struct drm_plane *plane)
{
drm_object_attach_property(&plane->base,
dm->degamma_lut_property,
0);
drm_object_attach_property(&plane->base,
dm->degamma_lut_size_property,
MAX_COLOR_LUT_ENTRIES);
drm_object_attach_property(&plane->base, dm->ctm_property,
0);
drm_object_attach_property(&plane->base, dm->sdr_boost_property,
DEFAULT_SDR_BOOST);
return 0;
}
#endif
int fill_plane_buffer_attributes(struct amdgpu_device *adev,
const struct amdgpu_framebuffer *afb,
const enum surface_pixel_format format,
@ -1337,10 +1319,6 @@ static void dm_drm_plane_reset(struct drm_plane *plane)
if (amdgpu_state)
__drm_atomic_helper_plane_reset(plane, &amdgpu_state->base);
#ifdef CONFIG_DRM_AMD_DC_HDR
if (amdgpu_state)
amdgpu_state->sdr_boost = DEFAULT_SDR_BOOST;
#endif
}
static struct drm_plane_state *
@ -1360,15 +1338,6 @@ dm_drm_plane_duplicate_state(struct drm_plane *plane)
dc_plane_state_retain(dm_plane_state->dc_state);
}
#ifdef CONFIG_DRM_AMD_DC_HDR
if (dm_plane_state->degamma_lut)
drm_property_blob_get(dm_plane_state->degamma_lut);
if (dm_plane_state->ctm)
drm_property_blob_get(dm_plane_state->ctm);
dm_plane_state->sdr_boost = old_dm_plane_state->sdr_boost;
#endif
return &dm_plane_state->base;
}
@ -1436,103 +1405,12 @@ static void dm_drm_plane_destroy_state(struct drm_plane *plane,
{
struct dm_plane_state *dm_plane_state = to_dm_plane_state(state);
#ifdef CONFIG_DRM_AMD_DC_HDR
drm_property_blob_put(dm_plane_state->degamma_lut);
drm_property_blob_put(dm_plane_state->ctm);
#endif
if (dm_plane_state->dc_state)
dc_plane_state_release(dm_plane_state->dc_state);
drm_atomic_helper_plane_destroy_state(plane, state);
}
#ifdef CONFIG_DRM_AMD_DC_HDR
/* copied from drm_atomic_uapi.c */
static int atomic_replace_property_blob_from_id(struct drm_device *dev,
struct drm_property_blob **blob,
uint64_t blob_id,
ssize_t expected_size,
ssize_t expected_elem_size,
bool *replaced)
{
struct drm_property_blob *new_blob = NULL;
if (blob_id != 0) {
new_blob = drm_property_lookup_blob(dev, blob_id);
if (new_blob == NULL)
return -EINVAL;
if (expected_size > 0 &&
new_blob->length != expected_size) {
drm_property_blob_put(new_blob);
return -EINVAL;
}
if (expected_elem_size > 0 &&
new_blob->length % expected_elem_size != 0) {
drm_property_blob_put(new_blob);
return -EINVAL;
}
}
*replaced |= drm_property_replace_blob(blob, new_blob);
drm_property_blob_put(new_blob);
return 0;
}
int dm_drm_plane_set_property(struct drm_plane *plane,
struct drm_plane_state *state,
struct drm_property *property,
uint64_t val)
{
struct amdgpu_device *adev = drm_to_adev(plane->dev);
struct dm_plane_state *dm_plane_state = to_dm_plane_state(state);
int ret = 0;
bool replaced;
if (property == adev->dm.degamma_lut_property) {
ret = atomic_replace_property_blob_from_id(adev_to_drm(adev),
&dm_plane_state->degamma_lut,
val, -1, sizeof(struct drm_color_lut),
&replaced);
} else if (property == adev->dm.ctm_property) {
ret = atomic_replace_property_blob_from_id(adev_to_drm(adev),
&dm_plane_state->ctm,
val,
sizeof(struct drm_color_ctm), -1,
&replaced);
} else if (property == adev->dm.sdr_boost_property) {
dm_plane_state->sdr_boost = val;
} else {
return -EINVAL;
}
return ret;
}
int dm_drm_plane_get_property(struct drm_plane *plane,
const struct drm_plane_state *state,
struct drm_property *property,
uint64_t *val)
{
struct dm_plane_state *dm_plane_state = to_dm_plane_state(state);
struct amdgpu_device *adev = drm_to_adev(plane->dev);
if (property == adev->dm.degamma_lut_property) {
*val = (dm_plane_state->degamma_lut) ?
dm_plane_state->degamma_lut->base.id : 0;
} else if (property == adev->dm.ctm_property) {
*val = (dm_plane_state->ctm) ? dm_plane_state->ctm->base.id : 0;
} else if (property == adev->dm.sdr_boost_property) {
*val = dm_plane_state->sdr_boost;
} else {
return -EINVAL;
}
return 0;
}
#endif
static const struct drm_plane_funcs dm_plane_funcs = {
.update_plane = drm_atomic_helper_update_plane,
.disable_plane = drm_atomic_helper_disable_plane,
@ -1541,10 +1419,6 @@ static const struct drm_plane_funcs dm_plane_funcs = {
.atomic_duplicate_state = dm_drm_plane_duplicate_state,
.atomic_destroy_state = dm_drm_plane_destroy_state,
.format_mod_supported = dm_plane_format_mod_supported,
#ifdef CONFIG_DRM_AMD_DC_HDR
.atomic_set_property = dm_drm_plane_set_property,
.atomic_get_property = dm_drm_plane_get_property,
#endif
};
int amdgpu_dm_plane_init(struct amdgpu_display_manager *dm,
@ -1615,9 +1489,6 @@ int amdgpu_dm_plane_init(struct amdgpu_display_manager *dm,
drm_plane_helper_add(plane, &dm_plane_helper_funcs);
#ifdef CONFIG_DRM_AMD_DC_HDR
attach_color_mgmt_properties(dm, plane);
#endif
/* Create (reset) the plane state */
if (plane->funcs->reset)
plane->funcs->reset(plane);