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drm/xe/xe3p_lpg: Add Wa_18044193044

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Add engine workaround Wa_18044193044 for graphics version
35.10 stepping A0..B0.

Signed-off-by: Varun Gupta <varun.gupta@intel.com>
Reviewed-by: Tejas Upadhyay <tejas.upadhyay@intel.com>
Link: https://patch.msgid.link/20260326161628.3566067-1-varun.gupta@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
This commit is contained in:
Varun Gupta 2026-03-26 21:46:28 +05:30 committed by Matt Roper
parent ec7cae5899
commit c027f1a191
2 changed files with 6 additions and 0 deletions
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1
drivers/gpu/drm/xe/regs/xe_gt_regs.h
View File

@ -564,6 +564,7 @@
#define DIS_ATOMIC_CHAINING_TYPED_WRITES REG_BIT(3)
#define TDL_CHICKEN XE_REG_MCR(0xe5f4, XE_REG_OPTION_MASKED)
#define BIT_APQ_OPT_DIS REG_BIT(14)
#define QID_WAIT_FOR_THREAD_NOT_RUN_DISABLE REG_BIT(12)
#define EUSTALL_PERF_SAMPLING_DISABLE REG_BIT(5)

5
drivers/gpu/drm/xe/xe_wa.c
View File

@ -609,6 +609,11 @@ static const struct xe_rtp_entry_sr engine_was[] = {
FUNC(xe_rtp_match_first_render_or_compute)),
XE_RTP_ACTIONS(SET(ROW_CHICKEN3, DIS_EU_GRF_POISON_TO_LSC))
},
{ XE_RTP_NAME("18044193044"),
XE_RTP_RULES(GRAPHICS_VERSION(3510), GRAPHICS_STEP(A0, B0),
FUNC(xe_rtp_match_first_render_or_compute)),
XE_RTP_ACTIONS(SET(TDL_CHICKEN, BIT_APQ_OPT_DIS))
},
};
static const struct xe_rtp_entry_sr lrc_was[] = {