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ASoC: qdsp6: q6afe: add internal mi2s support

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The bindings for LPI MI2S ports, originally exclusive to q6apm, can be
used for internal MI2S ports on q6afe. Add the port mappings for
internal MI2S, found on the Snapdragon 660 internal sound card.

Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Reviewed-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
Link: https://patch.msgid.link/20260730174353.108023-8-mailingradian@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Richard Acayan 2026-07-30 13:43:45 -04:00 committed by Mark Brown
parent 68400191e0
commit bfe9098dc2
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GPG Key ID: 24D68B725D5487D0
1 changed files with 56 additions and 0 deletions
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56
sound/soc/qcom/qdsp6/q6afe.c
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@ -132,6 +132,20 @@
#define AFE_PORT_ID_QUINARY_MI2S_TX 0x1017
#define AFE_PORT_ID_SENARY_MI2S_RX 0x1018
#define AFE_PORT_ID_SENARY_MI2S_TX 0x1019
#define AFE_PORT_ID_INT0_MI2S_RX 0x102e
#define AFE_PORT_ID_INT0_MI2S_TX 0x102f
#define AFE_PORT_ID_INT1_MI2S_RX 0x1030
#define AFE_PORT_ID_INT1_MI2S_TX 0x1031
#define AFE_PORT_ID_INT2_MI2S_RX 0x1032
#define AFE_PORT_ID_INT2_MI2S_TX 0x1033
#define AFE_PORT_ID_INT3_MI2S_RX 0x1034
#define AFE_PORT_ID_INT3_MI2S_TX 0x1035
#define AFE_PORT_ID_INT4_MI2S_RX 0x1036
#define AFE_PORT_ID_INT4_MI2S_TX 0x1037
#define AFE_PORT_ID_INT5_MI2S_RX 0x1038
#define AFE_PORT_ID_INT5_MI2S_TX 0x1039
#define AFE_PORT_ID_INT6_MI2S_RX 0x103a
#define AFE_PORT_ID_INT6_MI2S_TX 0x103b
/* Start of the range of port IDs for TDM devices. */
#define AFE_PORT_ID_TDM_PORT_RANGE_START 0x9000
@ -931,6 +945,34 @@ static struct afe_port_map port_maps[AFE_PORT_MAX] = {
[RX_CODEC_DMA_RX_7] = { AFE_PORT_ID_RX_CODEC_DMA_RX_7,
RX_CODEC_DMA_RX_7, 1, 1},
[USB_RX] = { AFE_PORT_ID_USB_RX, USB_RX, 1, 1},
[LPI_MI2S_RX_0] = { AFE_PORT_ID_INT0_MI2S_RX,
LPI_MI2S_RX_0, 1, 1},
[LPI_MI2S_TX_0] = { AFE_PORT_ID_INT0_MI2S_TX,
LPI_MI2S_TX_0, 0, 1},
[LPI_MI2S_RX_1] = { AFE_PORT_ID_INT1_MI2S_RX,
LPI_MI2S_RX_1, 1, 1},
[LPI_MI2S_TX_1] = { AFE_PORT_ID_INT1_MI2S_TX,
LPI_MI2S_TX_1, 0, 1},
[LPI_MI2S_RX_2] = { AFE_PORT_ID_INT2_MI2S_RX,
LPI_MI2S_RX_2, 1, 1},
[LPI_MI2S_TX_2] = { AFE_PORT_ID_INT2_MI2S_TX,
LPI_MI2S_TX_2, 0, 1},
[LPI_MI2S_RX_3] = { AFE_PORT_ID_INT3_MI2S_RX,
LPI_MI2S_RX_3, 1, 1},
[LPI_MI2S_TX_3] = { AFE_PORT_ID_INT3_MI2S_TX,
LPI_MI2S_TX_3, 0, 1},
[LPI_MI2S_RX_4] = { AFE_PORT_ID_INT4_MI2S_RX,
LPI_MI2S_RX_4, 1, 1},
[LPI_MI2S_TX_4] = { AFE_PORT_ID_INT4_MI2S_TX,
LPI_MI2S_TX_4, 0, 1},
[LPI_MI2S_RX_5] = { AFE_PORT_ID_INT5_MI2S_RX,
LPI_MI2S_RX_5, 1, 1},
[LPI_MI2S_TX_5] = { AFE_PORT_ID_INT5_MI2S_TX,
LPI_MI2S_TX_5, 0, 1},
[LPI_MI2S_RX_6] = { AFE_PORT_ID_INT6_MI2S_RX,
LPI_MI2S_RX_6, 1, 1},
[LPI_MI2S_TX_6] = { AFE_PORT_ID_INT6_MI2S_TX,
LPI_MI2S_TX_6, 0, 1},
};
static void q6afe_port_free(struct kref *ref)
@ -1785,6 +1827,20 @@ struct q6afe_port *q6afe_port_get_from_id(struct device *dev, int id)
case AFE_PORT_ID_QUINARY_MI2S_TX:
case AFE_PORT_ID_SENARY_MI2S_RX:
case AFE_PORT_ID_SENARY_MI2S_TX:
case AFE_PORT_ID_INT0_MI2S_RX:
case AFE_PORT_ID_INT0_MI2S_TX:
case AFE_PORT_ID_INT1_MI2S_RX:
case AFE_PORT_ID_INT1_MI2S_TX:
case AFE_PORT_ID_INT2_MI2S_RX:
case AFE_PORT_ID_INT2_MI2S_TX:
case AFE_PORT_ID_INT3_MI2S_RX:
case AFE_PORT_ID_INT3_MI2S_TX:
case AFE_PORT_ID_INT4_MI2S_RX:
case AFE_PORT_ID_INT4_MI2S_TX:
case AFE_PORT_ID_INT5_MI2S_RX:
case AFE_PORT_ID_INT5_MI2S_TX:
case AFE_PORT_ID_INT6_MI2S_RX:
case AFE_PORT_ID_INT6_MI2S_TX:
cfg_type = AFE_PARAM_ID_I2S_CONFIG;
break;
case AFE_PORT_ID_PRIMARY_TDM_RX ... AFE_PORT_ID_QUINARY_TDM_TX_7: