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arm64: dts: qcom: ipq5332: Add USB related nodes

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Add USB phy and controller nodes.

Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Link: https://lore.kernel.org/r/f25777bfe2c84e203b7615527607900b756c51bd.1693468292.git.quic_varada@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Varadarajan Narayanan 2023-08-31 14:47:44 +05:30 committed by Bjorn Andersson
parent e34d0497f3
commit bfb9614015
1 changed files with 55 additions and 0 deletions
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55
arch/arm64/boot/dts/qcom/ipq5332.dtsi
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@ -145,6 +145,19 @@ soc@0 {
#size-cells = <1>;
ranges = <0 0 0 0xffffffff>;
usbphy0: phy@7b000 {
compatible = "qcom,ipq5332-usb-hsphy";
reg = <0x0007b000 0x12c>;
clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>;
resets = <&gcc GCC_QUSB2_0_PHY_BCR>;
#phy-cells = <0>;
status = "disabled";
};
qfprom: efuse@a4000 {
compatible = "qcom,ipq5332-qfprom", "qcom,qfprom";
reg = <0x000a4000 0x721>;
@ -290,6 +303,48 @@ blsp1_spi2: spi@78b7000 {
status = "disabled";
};
usb: usb@8af8800 {
compatible = "qcom,ipq5332-dwc3", "qcom,dwc3";
reg = <0x08af8800 0x400>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hs_phy_irq";
clocks = <&gcc GCC_USB0_MASTER_CLK>,
<&gcc GCC_SNOC_USB_CLK>,
<&gcc GCC_USB0_SLEEP_CLK>,
<&gcc GCC_USB0_MOCK_UTMI_CLK>;
clock-names = "core",
"iface",
"sleep",
"mock_utmi";
resets = <&gcc GCC_USB_BCR>;
qcom,select-utmi-as-pipe-clk;
#address-cells = <1>;
#size-cells = <1>;
ranges;
status = "disabled";
usb_dwc: usb@8a00000 {
compatible = "snps,dwc3";
reg = <0x08a00000 0xe000>;
clocks = <&gcc GCC_USB0_MOCK_UTMI_CLK>;
clock-names = "ref";
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
phy-names = "usb2-phy";
phys = <&usbphy0>;
tx-fifo-resize;
snps,is-utmi-l1-suspend;
snps,hird-threshold = /bits/ 8 <0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
};
};
intc: interrupt-controller@b000000 {
compatible = "qcom,msm-qgic2";
reg = <0x0b000000 0x1000>, /* GICD */