drm/msm/adreno: use new helper to set min_acc length

Use freshly defined helper instead of hardcoding the checks in the
driver.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/726495/
Link: https://lore.kernel.org/r/20260520-ubwc-rework-v5-7-72f2749bc807@oss.qualcomm.com
This commit is contained in:
Dmitry Baryshkov 2026-05-20 17:51:14 +03:00
parent 4faca4742c
commit bfa4d53b72

View File

@ -748,7 +748,7 @@ static void a6xx_set_ubwc_config(struct msm_gpu *gpu)
u32 level2_swizzling_dis = !(cfg->ubwc_swizzle & UBWC_SWIZZLE_ENABLE_LVL2);
bool ubwc_mode = qcom_ubwc_get_ubwc_mode(cfg);
bool amsbc = cfg->ubwc_enc_version >= UBWC_3_0;
bool min_acc_len_64b = false;
bool min_acc_len_64b;
u8 uavflagprd_inv = 0;
u32 hbb_hi = hbb >> 2;
u32 hbb_lo = hbb & 3;
@ -756,8 +756,7 @@ static void a6xx_set_ubwc_config(struct msm_gpu *gpu)
if (adreno_is_a650_family(adreno_gpu) || adreno_is_a7xx(adreno_gpu))
uavflagprd_inv = 2;
if (adreno_is_a610(adreno_gpu) || adreno_is_a702(adreno_gpu))
min_acc_len_64b = true;
min_acc_len_64b = qcom_ubwc_min_acc_length_64b(cfg);
gpu_write(gpu, REG_A6XX_RB_NC_MODE_CNTL,
level2_swizzling_dis << 12 |