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arm64: dts: qcom: qcs8300: add video node

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Add the IRIS video-codec node on QCS8300 platform to support video
functionality.

Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250501-qcs8300_iris-v7-4-b229d5347990@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Vikash Garodia 2025-05-01 02:16:50 +05:30 committed by Bjorn Andersson
parent ec04e5b4a1
commit bf6ec39c3f
1 changed files with 71 additions and 0 deletions
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71
arch/arm64/boot/dts/qcom/qcs8300.dtsi
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@ -4211,6 +4211,77 @@ usb_2_dwc3: usb@a400000 {
};
};
iris: video-codec@aa00000 {
compatible = "qcom,qcs8300-iris";
reg = <0x0 0x0aa00000 0x0 0xf0000>;
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&videocc VIDEO_CC_MVS0C_GDSC>,
<&videocc VIDEO_CC_MVS0_GDSC>,
<&rpmhpd RPMHPD_MX>,
<&rpmhpd RPMHPD_MMCX>;
power-domain-names = "venus",
"vcodec0",
"mxc",
"mmcx";
operating-points-v2 = <&iris_opp_table>;
clocks = <&gcc GCC_VIDEO_AXI0_CLK>,
<&videocc VIDEO_CC_MVS0C_CLK>,
<&videocc VIDEO_CC_MVS0_CLK>;
clock-names = "iface",
"core",
"vcodec0_core";
interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
&config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ACTIVE_ONLY>,
<&mmss_noc MASTER_VIDEO_P0 QCOM_ICC_TAG_ALWAYS
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
interconnect-names = "cpu-cfg",
"video-mem";
memory-region = <&video_mem>;
resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>;
reset-names = "bus";
iommus = <&apps_smmu 0x0880 0x0400>,
<&apps_smmu 0x0887 0x0400>;
dma-coherent;
status = "disabled";
iris_opp_table: opp-table {
compatible = "operating-points-v2";
opp-366000000 {
opp-hz = /bits/ 64 <366000000>;
required-opps = <&rpmhpd_opp_svs_l1>,
<&rpmhpd_opp_svs_l1>;
};
opp-444000000 {
opp-hz = /bits/ 64 <444000000>;
required-opps = <&rpmhpd_opp_nom>,
<&rpmhpd_opp_nom>;
};
opp-533000000 {
opp-hz = /bits/ 64 <533000000>;
required-opps = <&rpmhpd_opp_turbo>,
<&rpmhpd_opp_turbo>;
};
opp-560000000 {
opp-hz = /bits/ 64 <560000000>;
required-opps = <&rpmhpd_opp_turbo_l1>,
<&rpmhpd_opp_turbo_l1>;
};
};
};
videocc: clock-controller@abf0000 {
compatible = "qcom,qcs8300-videocc";
reg = <0x0 0x0abf0000 0x0 0x10000>;