ASoC: mediatek: mt8195: mt8365-afe-clk: Use guard() for mutex & spin locks

Clean up the code using guard() for mutex & spin locks.
Merely code refactoring, and no behavior change.

Signed-off-by: bui duc phuc <phucduc.bui@gmail.com>
Link: https://patch.msgid.link/20260610102021.83273-9-phucduc.bui@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
bui duc phuc 2026-06-10 17:20:19 +07:00 committed by Mark Brown
parent a57e39c7ff
commit befae7299a
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GPG Key ID: 24D68B725D5487D0

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@ -194,16 +194,13 @@ int mt8365_afe_enable_top_cg(struct mtk_base_afe *afe, unsigned int cg_type)
unsigned int reg = get_top_cg_reg(cg_type);
unsigned int mask = get_top_cg_mask(cg_type);
unsigned int val = get_top_cg_on_val(cg_type);
unsigned long flags;
spin_lock_irqsave(&afe_priv->afe_ctrl_lock, flags);
guard(spinlock_irqsave)(&afe_priv->afe_ctrl_lock);
afe_priv->top_cg_ref_cnt[cg_type]++;
if (afe_priv->top_cg_ref_cnt[cg_type] == 1)
regmap_update_bits(afe->regmap, reg, mask, val);
spin_unlock_irqrestore(&afe_priv->afe_ctrl_lock, flags);
return 0;
}
@ -213,9 +210,8 @@ int mt8365_afe_disable_top_cg(struct mtk_base_afe *afe, unsigned int cg_type)
unsigned int reg = get_top_cg_reg(cg_type);
unsigned int mask = get_top_cg_mask(cg_type);
unsigned int val = get_top_cg_off_val(cg_type);
unsigned long flags;
spin_lock_irqsave(&afe_priv->afe_ctrl_lock, flags);
guard(spinlock_irqsave)(&afe_priv->afe_ctrl_lock);
afe_priv->top_cg_ref_cnt[cg_type]--;
if (afe_priv->top_cg_ref_cnt[cg_type] == 0)
@ -223,8 +219,6 @@ int mt8365_afe_disable_top_cg(struct mtk_base_afe *afe, unsigned int cg_type)
else if (afe_priv->top_cg_ref_cnt[cg_type] < 0)
afe_priv->top_cg_ref_cnt[cg_type] = 0;
spin_unlock_irqrestore(&afe_priv->afe_ctrl_lock, flags);
return 0;
}
@ -263,25 +257,21 @@ int mt8365_afe_emi_clk_off(struct mtk_base_afe *afe)
int mt8365_afe_enable_afe_on(struct mtk_base_afe *afe)
{
struct mt8365_afe_private *afe_priv = afe->platform_priv;
unsigned long flags;
spin_lock_irqsave(&afe_priv->afe_ctrl_lock, flags);
guard(spinlock_irqsave)(&afe_priv->afe_ctrl_lock);
afe_priv->afe_on_ref_cnt++;
if (afe_priv->afe_on_ref_cnt == 1)
regmap_update_bits(afe->regmap, AFE_DAC_CON0, 0x1, 0x1);
spin_unlock_irqrestore(&afe_priv->afe_ctrl_lock, flags);
return 0;
}
int mt8365_afe_disable_afe_on(struct mtk_base_afe *afe)
{
struct mt8365_afe_private *afe_priv = afe->platform_priv;
unsigned long flags;
spin_lock_irqsave(&afe_priv->afe_ctrl_lock, flags);
guard(spinlock_irqsave)(&afe_priv->afe_ctrl_lock);
afe_priv->afe_on_ref_cnt--;
if (afe_priv->afe_on_ref_cnt == 0)
@ -289,8 +279,6 @@ int mt8365_afe_disable_afe_on(struct mtk_base_afe *afe)
else if (afe_priv->afe_on_ref_cnt < 0)
afe_priv->afe_on_ref_cnt = 0;
spin_unlock_irqrestore(&afe_priv->afe_ctrl_lock, flags);
return 0;
}
@ -322,13 +310,11 @@ int mt8365_afe_enable_apll_tuner_cfg(struct mtk_base_afe *afe, unsigned int apll
{
struct mt8365_afe_private *afe_priv = afe->platform_priv;
mutex_lock(&afe_priv->afe_clk_mutex);
guard(mutex)(&afe_priv->afe_clk_mutex);
afe_priv->apll_tuner_ref_cnt[apll]++;
if (afe_priv->apll_tuner_ref_cnt[apll] != 1) {
mutex_unlock(&afe_priv->afe_clk_mutex);
if (afe_priv->apll_tuner_ref_cnt[apll] != 1)
return 0;
}
if (apll == MT8365_AFE_APLL1) {
regmap_update_bits(afe->regmap, AFE_APLL_TUNER_CFG,
@ -342,7 +328,6 @@ int mt8365_afe_enable_apll_tuner_cfg(struct mtk_base_afe *afe, unsigned int apll
AFE_APLL_TUNER_CFG1_EN_MASK, 0x1);
}
mutex_unlock(&afe_priv->afe_clk_mutex);
return 0;
}
@ -350,7 +335,7 @@ int mt8365_afe_disable_apll_tuner_cfg(struct mtk_base_afe *afe, unsigned int apl
{
struct mt8365_afe_private *afe_priv = afe->platform_priv;
mutex_lock(&afe_priv->afe_clk_mutex);
guard(mutex)(&afe_priv->afe_clk_mutex);
afe_priv->apll_tuner_ref_cnt[apll]--;
if (afe_priv->apll_tuner_ref_cnt[apll] == 0) {
@ -365,7 +350,6 @@ int mt8365_afe_disable_apll_tuner_cfg(struct mtk_base_afe *afe, unsigned int apl
afe_priv->apll_tuner_ref_cnt[apll] = 0;
}
mutex_unlock(&afe_priv->afe_clk_mutex);
return 0;
}