drm/amdgpu: Fix refclk reporting for SMU v13.0.6

[ Upstream commit 6b7d211740 ]

SMU v13.0.6 SOCs have 100MHz reference clock.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Stable-dep-of: 6fce23a4d8 ("drm/amdgpu: Restrict extended wait to PSP v13.0.6")
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Lijo Lazar 2023-09-06 09:21:39 +05:30 committed by Greg Kroah-Hartman
parent 48411bc4c3
commit bebe0c07b8

View File

@ -325,7 +325,8 @@ static u32 soc15_get_xclk(struct amdgpu_device *adev)
u32 reference_clock = adev->clock.spll.reference_freq;
if (adev->ip_versions[MP1_HWIP][0] == IP_VERSION(12, 0, 0) ||
adev->ip_versions[MP1_HWIP][0] == IP_VERSION(12, 0, 1))
adev->ip_versions[MP1_HWIP][0] == IP_VERSION(12, 0, 1) ||
adev->ip_versions[MP1_HWIP][0] == IP_VERSION(13, 0, 6))
return 10000;
if (adev->ip_versions[MP1_HWIP][0] == IP_VERSION(10, 0, 0) ||
adev->ip_versions[MP1_HWIP][0] == IP_VERSION(10, 0, 1))