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ARM: dts: dra7: add second SHA instance
DRA7 SoC has two SHA instances, add the missing second one under the main dts file. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -932,7 +932,7 @@ aes2: aes@0 {
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};
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};
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sham_target: target-module@4b101000 {
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sham1_target: target-module@4b101000 {
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compatible = "ti,sysc-omap3-sham", "ti,sysc";
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reg = <0x4b101100 0x4>,
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<0x4b101110 0x4>,
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@ -951,7 +951,7 @@ sham_target: target-module@4b101000 {
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#size-cells = <1>;
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ranges = <0x0 0x4b101000 0x1000>;
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sham: sham@0 {
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sham1: sham@0 {
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compatible = "ti,omap5-sham";
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reg = <0 0x300>;
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interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
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@ -962,6 +962,36 @@ sham: sham@0 {
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};
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};
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sham2_target: target-module@42701000 {
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compatible = "ti,sysc-omap3-sham", "ti,sysc";
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reg = <0x42701100 0x4>,
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<0x42701110 0x4>,
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<0x42701114 0x4>;
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reg-names = "rev", "sysc", "syss";
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ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
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SYSC_OMAP2_AUTOIDLE)>;
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ti,sysc-sidle = <SYSC_IDLE_FORCE>,
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<SYSC_IDLE_NO>,
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<SYSC_IDLE_SMART>;
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ti,syss-mask = <1>;
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/* Domains (P, C): l4per_pwrdm, l4sec_clkdm */
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clocks = <&l4sec_clkctrl DRA7_L4SEC_SHAM2_CLKCTRL 0>;
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clock-names = "fck";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x42701000 0x1000>;
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sham2: sham@0 {
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compatible = "ti,omap5-sham";
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reg = <0 0x300>;
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interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&edma_xbar 165 0>;
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dma-names = "rx";
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clocks = <&l3_iclk_div>;
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clock-names = "fck";
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};
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};
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opp_supply_mpu: opp-supply@4a003b20 {
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compatible = "ti,omap5-opp-supply";
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reg = <0x4a003b20 0xc>;
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