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Revert "RK3368 GPU: Rogue N Init."

Browse Source 
This reverts commit 418c01275a.

Remove unused driver.

Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I8f7efe30eb9c8cc356ffca8cc198882e62b07360
This commit is contained in:
Tao Huang 2023-02-24 19:45:06 +08:00
parent efc029bba1
commit be50b5edcb
525 changed files with 0 additions and 227478 deletions
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15
drivers/staging/imgtec/Kconfig
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@ -1,15 +0,0 @@
# SPDX-License-Identifier: GPL-2.0
config POWERVR_ADF_FBDEV
tristate "ADF driver for fbdev-only systems"
depends on ADF
depends on FB
help
Driver for systems with only fbdev video drivers.
Say Y here if your SoC has a pre-existing fbdev driver, but
no native ADF driver. This driver will wrap the fbdev driver
to provide minimal compatibility with ADF.
source "drivers/staging/imgtec/rogue/Kconfig"
source "drivers/staging/imgtec/apollo/Kconfig"

10
drivers/staging/imgtec/Makefile
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@ -1,10 +0,0 @@
# SPDX-License-Identifier: GPL-2.0
obj-$(CONFIG_POWERVR_ADF_FBDEV) += powervr_adf_fbdev.o
powervr_adf_fbdev-y += adf_common.o adf_fbdev.o
ccflags-y += \
-include $(srctree)/drivers/staging/imgtec/config_kernel.h \
-I$(srctree)/$(src) \
-I$(srctree)/drivers/staging/android
obj-y += rogue/
obj-y += apollo/

99
drivers/staging/imgtec/adf/adf_ext.h
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@ -1,99 +0,0 @@
/*************************************************************************/ /*!
@File adf_ext.h
@Title IMG extension ioctls and ioctl packages for ADF
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
/* vi: set ts=8: */
#ifndef __ADF_EXT_H__
#define __ADF_EXT_H__
#include <drm/drm.h>
#define ADF_BUFFER_TRANSFORM_NONE_EXT (0 << 0)
#define ADF_BUFFER_TRANSFORM_FLIP_H_EXT (1 << 0)
#define ADF_BUFFER_TRANSFORM_FLIP_V_EXT (1 << 1)
#define ADF_BUFFER_TRANSFORM_ROT_90_EXT (1 << 2)
#define ADF_BUFFER_TRANSFORM_ROT_180_EXT ((1 << 0) + (1 << 1))
#define ADF_BUFFER_TRANSFORM_ROT_270_EXT ((1 << 0) + (1 << 1) + (1 << 2))
#define ADF_BUFFER_BLENDING_NONE_EXT 0
#define ADF_BUFFER_BLENDING_PREMULT_EXT 1
#define ADF_BUFFER_BLENDING_COVERAGE_EXT 2
struct adf_buffer_config_ext {
/* Crop applied to surface (BEFORE transformation) */
struct drm_clip_rect crop;
/* Region of screen to display surface in (AFTER scaling) */
struct drm_clip_rect display;
/* Surface rotation / flip / mirror */
__u32 transform;
/* Alpha blending mode e.g. none / premult / coverage */
__u32 blend_type;
/* Plane alpha */
__u8 plane_alpha;
__u8 reserved[3];
} __packed;
struct adf_post_ext {
__u32 post_id;
struct adf_buffer_config_ext bufs_ext[];
} __packed;
struct adf_validate_config_ext {
__u32 n_interfaces;
__u32 __user *interfaces;
__u32 n_bufs;
struct adf_buffer_config __user *bufs;
struct adf_post_ext __user *post_ext;
} __packed;
#define ADF_IOCTL_NR_VALIDATE_IMG (ADF_IOCTL_NR_CUSTOM + 0)
#define ADF_VALIDATE_CONFIG_EXT \
_IOW(ADF_IOCTL_TYPE, ADF_IOCTL_NR_VALIDATE_IMG, \
struct adf_validate_config_ext)
#endif /* __ADF_EXT_H__ */

592
drivers/staging/imgtec/adf_common.c
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@ -1,592 +0,0 @@
/* -*- mode: c; indent-tabs-mode: t; c-basic-offset: 8; tab-width: 8 -*- */
/* vi: set ts=8 sw=8 sts=8: */
/*************************************************************************/ /*!
@File
@Codingstyle LinuxKernel
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#include "adf_common.h"
#include <linux/uaccess.h>
#include <linux/slab.h>
#include <linux/dma-buf.h>
#include <linux/compat.h>
#include <linux/bug.h>
#include <video/adf_client.h>
#ifdef DEBUG_VALIDATE
#define val_dbg(dev, fmt, x...) dev_dbg(dev, fmt, x)
#else
#define val_dbg(dev, fmt, x...) do { } while (0)
#endif
static long validate(struct adf_device *dev,
struct adf_validate_config_ext __user *arg)
{
struct adf_interface **intfs = NULL;
struct adf_validate_config_ext data;
struct adf_buffer *bufs = NULL;
struct adf_post post_cfg;
void *post_ext = NULL;
u32 post_ext_size;
void *driver_state;
int err = 0;
size_t i, j;
if (copy_from_user(&data, arg, sizeof(data))) {
err = -EFAULT;
goto err_out;
}
if (data.n_interfaces > ADF_MAX_INTERFACES) {
err = -EINVAL;
goto err_out;
}
if (data.n_bufs > ADF_MAX_BUFFERS) {
err = -EINVAL;
goto err_out;
}
post_ext_size = sizeof(struct adf_post_ext) +
data.n_bufs * sizeof(struct adf_buffer_config_ext);
if (!access_ok(VERIFY_READ, data.bufs,
sizeof(*data.bufs) * data.n_bufs)) {
err = -EFAULT;
goto err_out;
}
post_ext = kmalloc(post_ext_size, GFP_KERNEL);
if (!post_ext) {
err = -ENOMEM;
goto err_out;
}
if (!access_ok(VERIFY_READ, data.post_ext, post_ext_size)) {
err = -EFAULT;
goto err_out;
}
if (copy_from_user(post_ext, data.post_ext, post_ext_size)) {
err = -EFAULT;
goto err_out;
}
if (data.n_interfaces) {
if (!access_ok(VERIFY_READ, data.interfaces,
sizeof(*data.interfaces) *data.n_interfaces)) {
err = -EFAULT;
goto err_out;
}
intfs = kmalloc_array(data.n_interfaces, sizeof(intfs[0]),
GFP_KERNEL);
if (!intfs) {
err = -ENOMEM;
goto err_out;
}
}
for (i = 0; i < data.n_interfaces; i++) {
u32 intf_id;
if (get_user(intf_id, &data.interfaces[i])) {
err = -EFAULT;
goto err_out;
}
intfs[i] = idr_find(&dev->interfaces, intf_id);
if (!intfs[i]) {
err = -EINVAL;
goto err_out;
}
}
if (data.n_bufs) {
bufs = kcalloc(data.n_bufs, sizeof(bufs[0]), GFP_KERNEL);
if (!bufs) {
err = -ENOMEM;
goto err_out;
}
}
for (i = 0; i < data.n_bufs; i++) {
struct adf_buffer_config config;
if (copy_from_user(&config, &data.bufs[i], sizeof(config))) {
err = -EFAULT;
goto err_out;
}
memset(&bufs[i], 0, sizeof(bufs[i]));
if (config.n_planes > ADF_MAX_PLANES) {
err = -EINVAL;
goto err_import;
}
bufs[i].overlay_engine = idr_find(&dev->overlay_engines,
config.overlay_engine);
if (!bufs[i].overlay_engine) {
err = -ENOENT;
goto err_import;
}
bufs[i].w = config.w;
bufs[i].h = config.h;
bufs[i].format = config.format;
for (j = 0; j < config.n_planes; j++) {
bufs[i].dma_bufs[j] = dma_buf_get(config.fd[j]);
if (IS_ERR_OR_NULL(bufs[i].dma_bufs[j])) {
err = PTR_ERR(bufs[i].dma_bufs[j]);
bufs[i].dma_bufs[j] = NULL;
goto err_import;
}
bufs[i].offset[j] = config.offset[j];
bufs[i].pitch[j] = config.pitch[j];
}
bufs[i].n_planes = config.n_planes;
bufs[i].acquire_fence = NULL;
}
/* Fake up a post configuration to validate */
post_cfg.custom_data_size = post_ext_size;
post_cfg.custom_data = post_ext;
post_cfg.n_bufs = data.n_bufs;
post_cfg.bufs = bufs;
/* Mapping dma bufs is too expensive for validate, and we don't
* need to do it at the moment.
*/
post_cfg.mappings = NULL;
err = dev->ops->validate(dev, &post_cfg, &driver_state);
if (err)
goto err_import;
/* For the validate ioctl, we don't need the driver state. If it
* was allocated, free it immediately.
*/
if (dev->ops->state_free)
dev->ops->state_free(dev, driver_state);
err_import:
for (i = 0; i < data.n_bufs; i++)
for (j = 0; j < ARRAY_SIZE(bufs[i].dma_bufs); j++)
if (bufs[i].dma_bufs[j])
dma_buf_put(bufs[i].dma_bufs[j]);
err_out:
kfree(post_ext);
kfree(intfs);
kfree(bufs);
return err;
}
static long adf_img_ioctl_validate(struct adf_device *dev,
struct adf_validate_config_ext __user *arg)
{
int err;
if (!access_ok(VERIFY_READ, arg, sizeof(*arg))) {
err = -EFAULT;
goto err_out;
}
err = validate(dev, arg);
err_out:
return err;
}
#ifdef CONFIG_COMPAT
#define ADF_VALIDATE_CONFIG_EXT32 \
_IOW(ADF_IOCTL_TYPE, ADF_IOCTL_NR_VALIDATE_IMG, \
struct adf_validate_config_ext32)
struct adf_validate_config_ext32 {
__u32 n_interfaces;
compat_uptr_t interfaces;
__u32 n_bufs;
compat_uptr_t bufs;
compat_uptr_t post_ext;
} __packed;
/* adf_validate_config_ext32 must map to the adf_validate_config_ext struct.
* Changes to struct adf_validate_config_ext will likely be needed to be
* mirrored in adf_validate_config_ext32, so put a sanity check here to try
* to notice if the size has changed from what's expected.
*/
static long adf_img_ioctl_validate_compat(struct adf_device *dev,
struct adf_validate_config_ext32 __user *arg_compat)
{
struct adf_validate_config_ext arg;
int err = 0;
BUILD_BUG_ON_MSG(sizeof(struct adf_validate_config_ext) != 32,
"adf_validate_config_ext has unexpected size");
if (!access_ok(VERIFY_READ, arg_compat, sizeof(*arg_compat))) {
err = -EFAULT;
goto err_out;
}
arg.n_interfaces = arg_compat->n_interfaces;
arg.interfaces = compat_ptr(arg_compat->interfaces);
arg.n_bufs = arg_compat->n_bufs;
arg.bufs = compat_ptr(arg_compat->bufs);
arg.post_ext = compat_ptr(arg_compat->post_ext);
err = validate(dev, &arg);
err_out:
return err;
}
#endif /* CONFIG_COMPAT */
long adf_img_ioctl(struct adf_obj *obj, unsigned int cmd, unsigned long arg)
{
struct adf_device *dev =
(struct adf_device *)obj->parent;
switch (cmd) {
case ADF_VALIDATE_CONFIG_EXT:
return adf_img_ioctl_validate(dev,
(struct adf_validate_config_ext __user *)arg);
#ifdef CONFIG_COMPAT
case ADF_VALIDATE_CONFIG_EXT32:
return adf_img_ioctl_validate_compat(dev,
(struct adf_validate_config_ext32 __user *)
compat_ptr(arg));
#endif
}
return -ENOTTY;
}
/* Callers of this function should have taken the dev->client_lock */
static struct adf_interface *
get_interface_attached_to_overlay(struct adf_device *dev,
struct adf_overlay_engine *overlay)
{
struct adf_interface *interface = NULL;
struct adf_attachment_list *entry;
/* We are open-coding adf_attachment_list_to_array. We can't use the
* adf_device_attachments helper because it takes the client lock,
* which is already held for calls to validate.
*/
list_for_each_entry(entry, &dev->attached, head) {
/* If there are multiple interfaces attached to an overlay,
* this will return the last.
*/
if (entry->attachment.overlay_engine == overlay)
interface = entry->attachment.interface;
}
return interface;
}
int adf_img_validate_simple(struct adf_device *dev, struct adf_post *cfg,
void **driver_state)
{
struct adf_post_ext *post_ext = cfg->custom_data;
struct adf_overlay_engine *overlay;
struct adf_interface *interface;
struct adf_buffer *buffer;
int i = 0;
struct device *device = dev->dev;
size_t expected_custom_data_size;
/* "Null" flip handling */
if (cfg->n_bufs == 0)
return 0;
expected_custom_data_size = sizeof(struct adf_post_ext)
+ cfg->n_bufs * sizeof(struct adf_buffer_config_ext);
if (cfg->custom_data_size != expected_custom_data_size) {
val_dbg(device, "Custom data size %zu not expected size %zu",
cfg->custom_data_size,
sizeof(struct adf_buffer_config_ext));
return -EINVAL;
}
if (cfg->n_bufs != 1) {
val_dbg(device, "Got %zu buffers in post. Should be 1.\n",
cfg->n_bufs);
return -EINVAL;
}
buffer = &cfg->bufs[0];
overlay = buffer->overlay_engine;
if (!overlay) {
dev_err(device, "Buffer without an overlay engine.\n");
return -EINVAL;
}
for (i = 0; i < overlay->ops->n_supported_formats; i++) {
if (buffer->format == overlay->ops->supported_formats[i])
break;
}
if (i == overlay->ops->n_supported_formats) {
char req_format_str[ADF_FORMAT_STR_SIZE];
adf_format_str(buffer->format, req_format_str);
val_dbg(device, "Unsupported buffer format %s.\n",
req_format_str);
return -EINVAL;
}
interface = get_interface_attached_to_overlay(dev, overlay);
if (!interface) {
dev_err(device, "No interface attached to overlay\n");
return -EINVAL;
}
if (buffer->w != interface->current_mode.hdisplay) {
val_dbg(device, "Buffer width %u is not expected %u.\n",
buffer->w, interface->current_mode.hdisplay);
return -EINVAL;
}
if (buffer->h != interface->current_mode.vdisplay) {
val_dbg(device, "Buffer height %u is not expected %u.\n",
buffer->h, interface->current_mode.vdisplay);
return -EINVAL;
}
if (buffer->n_planes != 1) {
val_dbg(device, "Buffer n_planes %u is not 1.\n",
buffer->n_planes);
return -EINVAL;
}
if (buffer->offset[0] != 0) {
val_dbg(device, "Buffer offset %u is not 0.\n",
buffer->offset[0]);
return -EINVAL;
}
for (i = 0; i < cfg->n_bufs; i++) {
struct adf_buffer_config_ext *buf_ext = &post_ext->bufs_ext[i];
u16 hdisplay = interface->current_mode.hdisplay;
u16 vdisplay = interface->current_mode.vdisplay;
if (buf_ext->crop.x1 != 0 ||
buf_ext->crop.y1 != 0 ||
buf_ext->crop.x2 != hdisplay ||
buf_ext->crop.y2 != vdisplay) {
val_dbg(device, "Buffer crop {%u,%u,%u,%u} not expected {%u,%u,%u,%u}.\n",
buf_ext->crop.x1, buf_ext->crop.y1,
buf_ext->crop.x2, buf_ext->crop.y2,
0, 0, hdisplay, vdisplay);
/* Userspace might be emulating a lower resolution */
if (buf_ext->crop.x2 > hdisplay ||
buf_ext->crop.y2 > vdisplay)
return -EINVAL;
}
if (buf_ext->display.x1 != 0 ||
buf_ext->display.y1 != 0 ||
buf_ext->display.x2 != hdisplay ||
buf_ext->display.y2 != vdisplay) {
val_dbg(device, "Buffer display {%u,%u,%u,%u} not expected {%u,%u,%u,%u}.\n",
buf_ext->display.x1, buf_ext->display.y1,
buf_ext->display.x2, buf_ext->display.y2,
0, 0, hdisplay, vdisplay);
/* Userspace might be emulating a lower resolution */
if (buf_ext->display.x2 > hdisplay ||
buf_ext->display.y2 > vdisplay)
return -EINVAL;
}
if (buf_ext->transform != ADF_BUFFER_TRANSFORM_NONE_EXT) {
val_dbg(device, "Buffer transform 0x%x not expected transform 0x%x.\n",
buf_ext->transform,
ADF_BUFFER_TRANSFORM_NONE_EXT);
return -EINVAL;
}
if (buf_ext->blend_type != ADF_BUFFER_BLENDING_PREMULT_EXT &&
buf_ext->blend_type != ADF_BUFFER_BLENDING_NONE_EXT) {
val_dbg(device, "Buffer blend type %u not supported.\n",
buf_ext->blend_type);
return -EINVAL;
}
if (buf_ext->plane_alpha != 0xff) {
val_dbg(device, "Buffer plane alpha %u not expected plane alpha %u.\n",
buf_ext->plane_alpha, 0xff);
return -EINVAL;
}
}
return 0;
}
bool adf_img_buffer_sanity_check(const struct adf_interface *intf,
const struct adf_buffer *buf,
const struct adf_buffer_config_ext *buf_ext)
{
struct device *dev = intf->base.parent->dev;
int plane;
if (buf->w == 0) {
dev_err(dev, "Buffer sanity failed: Zero width\n");
return false;
}
if (buf->h == 0) {
dev_err(dev, "Buffer sanity failed: Zero height\n");
return false;
}
if (buf->format == 0) {
dev_err(dev, "Buffer sanity failed: Zero format\n");
return false;
}
if (buf->pitch == 0) {
dev_err(dev, "Buffer sanity failed: Zero pitch\n");
return false;
}
if (buf->n_planes == 0) {
dev_err(dev, "Buffer sanity failed: Zero plane count\n");
return false;
}
if (buf->overlay_engine == NULL) {
dev_err(dev, "Buffer sanity failed: NULL assigned overlay\n");
return false;
}
for (plane = 0; plane < buf->n_planes; plane++) {
if (buf->dma_bufs[plane] == NULL) {
dev_err(dev, "Buffer sanity failed: NULL dma buf for plane %d\n",
plane);
return false;
}
if (buf->pitch[plane] == 0) {
dev_err(dev, "Buffer sanity failed: Zero pitch for plane %d\n",
plane);
return false;
}
/* The offset may be zero, so we can't check that here */
}
if (buf_ext->crop.x1 >= buf_ext->crop.x2 ||
buf_ext->crop.y1 >= buf_ext->crop.y2) {
dev_err(dev, "Buffer sanity failed: Invalid crop rect (%d,%d)(%d,%d)\n",
buf_ext->crop.x1, buf_ext->crop.y1,
buf_ext->crop.x2, buf_ext->crop.y2);
return false;
}
if (buf_ext->crop.x1 > buf->w ||
buf_ext->crop.x2 > buf->w ||
buf_ext->crop.y1 > buf->h ||
buf_ext->crop.y2 > buf->h) {
dev_err(dev, "Buffer sanity failed: Crop rect (%d,%d)(%d,%d) outside of %dx%d source buffer\n",
buf_ext->crop.x1, buf_ext->crop.y1,
buf_ext->crop.x2, buf_ext->crop.y2,
buf->w, buf->h);
return false;
}
if (buf_ext->display.x1 >= buf_ext->display.x2 ||
buf_ext->display.y1 >= buf_ext->display.y2) {
dev_err(dev, "Buffer sanity failed: Invalid display rect (%d,%d)(%d,%d)\n",
buf_ext->display.x1, buf_ext->display.y1,
buf_ext->display.x2, buf_ext->display.y2);
return false;
}
if (buf_ext->crop.x1 > buf->w ||
buf_ext->crop.x2 > buf->w ||
buf_ext->crop.y1 > buf->h ||
buf_ext->crop.y2 > buf->h) {
dev_err(dev, "Buffer sanity failed: Display rect (%d,%d)(%d,%d) outside of %dx%d current interface mode\n",
buf_ext->crop.x1, buf_ext->crop.y1,
buf_ext->crop.x2, buf_ext->crop.y2,
intf->current_mode.hdisplay,
intf->current_mode.vdisplay);
return false;
}
switch (buf_ext->transform) {
case ADF_BUFFER_TRANSFORM_NONE_EXT:
case ADF_BUFFER_TRANSFORM_FLIP_H_EXT:
case ADF_BUFFER_TRANSFORM_FLIP_V_EXT:
case ADF_BUFFER_TRANSFORM_ROT_90_EXT:
case ADF_BUFFER_TRANSFORM_ROT_180_EXT:
case ADF_BUFFER_TRANSFORM_ROT_270_EXT:
break;
default:
dev_err(dev, "Invalid transform 0x%x\n", buf_ext->transform);
return false;
}
switch (buf_ext->blend_type) {
case ADF_BUFFER_BLENDING_NONE_EXT:
case ADF_BUFFER_BLENDING_PREMULT_EXT:
case ADF_BUFFER_BLENDING_COVERAGE_EXT:
break;
default:
dev_err(dev, "Invalid blend type 0x%x\n", buf_ext->blend_type);
return false;
}
return true;
}
bool adf_img_rects_intersect(const struct drm_clip_rect *rect1,
const struct drm_clip_rect *rect2)
{
if (rect1->x1 < rect2->x2 &&
rect1->x2 > rect2->x1 &&
rect1->y1 < rect2->y2 &&
rect1->y2 > rect2->y1)
return true;
return false;
}

78
drivers/staging/imgtec/adf_common.h
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@ -1,78 +0,0 @@
/* -*- mode: c; indent-tabs-mode: t; c-basic-offset: 8; tab-width: 8 -*- */
/* vi: set ts=8 sw=8 sts=8: */
/*************************************************************************/ /*!
@File
@Codingstyle LinuxKernel
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#include <video/adf.h>
#include <adf/adf_ext.h>
long
adf_img_ioctl(struct adf_obj *obj, unsigned int cmd, unsigned long arg);
/* This validates a post config with a set of assumptions for simple display
* engines:
* - The config custom data is a struct adf_buffer_config_ext
* - There is a single interface with a single overlay attached
* - There is a single non-blended layer
* - There is a single full-screen buffer
* - The buffer is of a format supported by the overlay
*/
int
adf_img_validate_simple(struct adf_device *dev, struct adf_post *cfg,
void **driver_state);
/* This does a quick sanity check of the supplied buffer, returns true if it
* passes the sanity checks.
* The calling driver must still do any device-specific validation
* of the buffer arguments.
*/
bool
adf_img_buffer_sanity_check(const struct adf_interface *intf,
const struct adf_buffer *buf,
const struct adf_buffer_config_ext *buf_ext);
/* Returns true if the two clip rects intersect
*/
bool
adf_img_rects_intersect(const struct drm_clip_rect *rect1,
const struct drm_clip_rect *rect2);

937
drivers/staging/imgtec/adf_fbdev.c
View File

@ -1,937 +0,0 @@
/* -*- mode: c; indent-tabs-mode: t; c-basic-offset: 8; tab-width: 8 -*- */
/* vi: set ts=8 sw=8 sts=8: */
/*************************************************************************/ /*!
@File
@Codingstyle LinuxKernel
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#include <linux/version.h>
#include <linux/console.h>
#include <linux/dma-buf.h>
#include <linux/uaccess.h>
#include <linux/module.h>
#include <linux/fb.h>
#include <drm/drm_fourcc.h>
#include <video/adf.h>
#include <video/adf_fbdev.h>
#include <video/adf_client.h>
#include <adf/adf_ext.h>
/* for sync_fence_put */
#include PVR_ANDROID_SYNC_HEADER
#include "adf_common.h"
#ifndef CONFIG_FB
#error adf_fbdev needs Linux framebuffer support. Enable it in your kernel.
#endif
MODULE_AUTHOR("Imagination Technologies Ltd. <gpl-support@imgtec.com>");
MODULE_LICENSE("Dual MIT/GPL");
/* NOTE: This is just an example of how to use adf. You should NOT use this
* module in a production environment. It is meaningless to layer adf
* on top of fbdev, as adf is more flexible than fbdev and adf itself
* provides fbdev emulation. Do not use this implementation generally!
*/
#define DRVNAME "adf_fbdev"
#define FALLBACK_REFRESH_RATE 60
#define FALLBACK_DPI 160
#if defined(ADF_FBDEV_NUM_PREFERRED_BUFFERS)
#define NUM_PREFERRED_BUFFERS ADF_FBDEV_NUM_PREFERRED_BUFFERS
#else
#define NUM_PREFERRED_BUFFERS 3
#endif
struct adf_fbdev_dmabuf {
struct sg_table sg_table;
size_t offset;
size_t length;
void *vaddr;
/* Used for cleanup of dmabuf private data */
spinlock_t *alloc_lock;
u8 *alloc_mask;
u8 id;
};
struct adf_fbdev_device {
struct adf_device base;
struct fb_info *fb_info;
atomic_t refcount;
};
struct adf_fbdev_interface {
struct adf_interface base;
struct drm_mode_modeinfo fb_mode;
u16 width_mm, height_mm;
struct fb_info *fb_info;
spinlock_t alloc_lock;
u8 alloc_mask;
};
/* SIMPLE BUFFER MANAGER *****************************************************/
/* Handle alloc/free from the fbdev carveout (fix.smem_start -> fix.smem_size)
* region. This simple allocator sets a bit in the alloc_mask when a buffer is
* owned by dmabuf. When the dmabuf ->release() is called, the alloc_mask bit
* is cleared and the adf_fbdev_dmabuf object is freed.
*
* Since dmabuf relies on sg_table/scatterlists, and hence struct page*, this
* code may have problems if your framebuffer uses memory that is not in the
* kernel's page tables.
*/
static struct adf_fbdev_dmabuf *
adf_fbdev_alloc_buffer(struct adf_fbdev_interface *interface)
{
struct adf_fbdev_dmabuf *fbdev_dmabuf;
struct scatterlist *sg;
size_t unitary_size;
struct page *page;
u32 offset = 0;
int i, err;
u32 id;
spin_lock(&interface->alloc_lock);
for (id = 0; id < NUM_PREFERRED_BUFFERS; id++) {
if (!(interface->alloc_mask & (1UL << id))) {
interface->alloc_mask |= (1UL << id);
break;
}
}
spin_unlock(&interface->alloc_lock);
if (id == NUM_PREFERRED_BUFFERS)
return ERR_PTR(-ENOMEM);
unitary_size = interface->fb_info->fix.line_length *
interface->fb_info->var.yres;
/* PAGE_SIZE alignment has been checked already, do NOT allow it
* through here. We are about to allocate an sg_list.
*/
BUG_ON((unitary_size % PAGE_SIZE) != 0);
fbdev_dmabuf = kmalloc(sizeof(*fbdev_dmabuf), GFP_KERNEL);
if (!fbdev_dmabuf)
return ERR_PTR(-ENOMEM);
err = sg_alloc_table(&fbdev_dmabuf->sg_table, unitary_size / PAGE_SIZE,
GFP_KERNEL);
if (err) {
kfree(fbdev_dmabuf);
return ERR_PTR(err);
}
/* Increment the reference count of this module as long as the
* adb_fbdev_dmabuf object exists. This prevents this module from
* being unloaded if the buffer is passed around by dmabuf.
*/
if (!try_module_get(THIS_MODULE)) {
pr_err("try_module_get(THIS_MODULE) failed");
kfree(fbdev_dmabuf);
return ERR_PTR(-EFAULT);
}
fbdev_dmabuf->offset = id * unitary_size;
fbdev_dmabuf->length = unitary_size;
fbdev_dmabuf->vaddr = interface->fb_info->screen_base +
fbdev_dmabuf->offset;
for_each_sg(fbdev_dmabuf->sg_table.sgl, sg,
fbdev_dmabuf->sg_table.nents, i) {
page = vmalloc_to_page(fbdev_dmabuf->vaddr + offset);
if (!page) {
pr_err("Failed to map fbdev vaddr to pages\n");
kfree(fbdev_dmabuf);
return ERR_PTR(-EFAULT);
}
sg_set_page(sg, page, PAGE_SIZE, 0);
offset += PAGE_SIZE;
/* Shadow what ion is doing currently to ensure sg_dma_address()
* is valid. This is not strictly correct as the dma address
* should only be valid after mapping (ownership changed), and
* we haven't mapped the scatter list yet.
*/
sg_dma_address(sg) = sg_phys(sg);
}
fbdev_dmabuf->alloc_mask = &interface->alloc_mask;
fbdev_dmabuf->alloc_lock = &interface->alloc_lock;
fbdev_dmabuf->id = id;
return fbdev_dmabuf;
}
static void adf_fbdev_free_buffer(struct adf_fbdev_dmabuf *fbdev_dmabuf)
{
unsigned long flags;
spin_lock_irqsave(fbdev_dmabuf->alloc_lock, flags);
(*fbdev_dmabuf->alloc_mask) &= ~(1UL << fbdev_dmabuf->id);
spin_unlock_irqrestore(fbdev_dmabuf->alloc_lock, flags);
sg_free_table(&fbdev_dmabuf->sg_table);
kfree(fbdev_dmabuf);
module_put(THIS_MODULE);
}
/* DMA BUF LAYER *************************************************************/
static struct sg_table *
adf_fbdev_d_map_dma_buf(struct dma_buf_attachment *attachment,
enum dma_data_direction direction)
{
struct adf_fbdev_dmabuf *fbdev_dmabuf = attachment->dmabuf->priv;
return &fbdev_dmabuf->sg_table;
}
static void adf_fbdev_d_unmap_dma_buf(struct dma_buf_attachment *attachment,
struct sg_table *table,
enum dma_data_direction direction)
{
/* No-op */
}
static int adf_fbdev_d_mmap(struct dma_buf *dmabuf, struct vm_area_struct *vma)
{
struct adf_fbdev_dmabuf *fbdev_dmabuf = dmabuf->priv;
unsigned long offset = vma->vm_pgoff * PAGE_SIZE;
unsigned long addr = vma->vm_start;
unsigned long remainder, len;
struct scatterlist *sg;
struct page *page;
u32 i;
for_each_sg(fbdev_dmabuf->sg_table.sgl, sg,
fbdev_dmabuf->sg_table.nents, i) {
page = sg_page(sg);
if (!page) {
pr_err("Failed to retrieve pages\n");
return -EFAULT;
}
remainder = vma->vm_end - addr;
len = sg_dma_len(sg);
if (offset >= sg_dma_len(sg)) {
offset -= sg_dma_len(sg);
continue;
} else if (offset) {
page += offset / PAGE_SIZE;
len = sg_dma_len(sg) - offset;
offset = 0;
}
len = min(len, remainder);
remap_pfn_range(vma, addr, page_to_pfn(page), len,
vma->vm_page_prot);
addr += len;
if (addr >= vma->vm_end)
return 0;
}
return 0;
}
static void adf_fbdev_d_release(struct dma_buf *dmabuf)
{
adf_fbdev_free_buffer(dmabuf->priv);
}
#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 6, 0)) && \
!defined(CHROMIUMOS_WORKAROUNDS_KERNEL318)
static int
adf_fbdev_d_begin_cpu_access(struct dma_buf *dmabuf, size_t start, size_t len,
enum dma_data_direction dir)
{
struct adf_fbdev_dmabuf *fbdev_dmabuf = dmabuf->priv;
if (start + len > fbdev_dmabuf->length)
return -EINVAL;
return 0;
}
static void adf_fbdev_d_end_cpu_access(struct dma_buf *dmabuf, size_t start,
size_t len, enum dma_data_direction dir)
{
/* Framebuffer memory is cache coherent. No-op. */
}
#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(4, 6, 0)) &&
!defined(CHROMIUMOS_WORKAROUNDS_KERNEL318) */
static void *
adf_fbdev_d_kmap(struct dma_buf *dmabuf, unsigned long page_offset)
{
struct adf_fbdev_dmabuf *fbdev_dmabuf = dmabuf->priv;
void *vaddr;
if (page_offset * PAGE_SIZE >= fbdev_dmabuf->length)
return ERR_PTR(-EINVAL);
vaddr = fbdev_dmabuf->vaddr + page_offset * PAGE_SIZE;
return vaddr;
}
static void
adf_fbdev_d_kunmap(struct dma_buf *dmabuf, unsigned long page_offset,
void *ptr)
{
/* No-op */
}
static void *adf_fbdev_d_vmap(struct dma_buf *dmabuf)
{
struct adf_fbdev_dmabuf *fbdev_dmabuf = dmabuf->priv;
return fbdev_dmabuf->vaddr;
}
static void adf_fbdev_d_vunmap(struct dma_buf *dmabuf, void *vaddr)
{
/* No-op */
}
static const struct dma_buf_ops adf_fbdev_dma_buf_ops = {
.map_dma_buf = adf_fbdev_d_map_dma_buf,
.unmap_dma_buf = adf_fbdev_d_unmap_dma_buf,
.mmap = adf_fbdev_d_mmap,
.release = adf_fbdev_d_release,
#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 6, 0)) && \
!defined(CHROMIUMOS_WORKAROUNDS_KERNEL318)
.begin_cpu_access = adf_fbdev_d_begin_cpu_access,
.end_cpu_access = adf_fbdev_d_end_cpu_access,
#endif
.kmap_atomic = adf_fbdev_d_kmap,
.kunmap_atomic = adf_fbdev_d_kunmap,
.kmap = adf_fbdev_d_kmap,
.kunmap = adf_fbdev_d_kunmap,
.vmap = adf_fbdev_d_vmap,
.vunmap = adf_fbdev_d_vunmap,
};
/* ADF LAYER *****************************************************************/
static u32 adf_fbdev_supported_format;
static int adf_fbdev_validate(struct adf_device *dev, struct adf_post *cfg,
void **driver_state)
{
int err = adf_img_validate_simple(dev, cfg, driver_state);
if (cfg->n_bufs == 0 || err != 0)
return err;
/* Everything checked out in the generic validation, but we
* additionally want to check that the dmabuf came from the
* adf_fbdev module, which the generic code can't check.
*/
if (cfg->bufs[0].dma_bufs[0]->ops != &adf_fbdev_dma_buf_ops)
return -EINVAL;
return 0;
}
static void adf_fbdev_post(struct adf_device *dev, struct adf_post *cfg,
void *driver_state)
{
struct adf_fbdev_device *device = (struct adf_fbdev_device *)dev;
struct fb_var_screeninfo new_var = device->fb_info->var;
struct adf_fbdev_dmabuf *fbdev_dmabuf;
struct adf_buffer *buffer;
int err;
/* "Null" flip handling */
if (cfg->n_bufs == 0)
return;
if (!lock_fb_info(device->fb_info)) {
pr_err("Failed to lock fb_info structure.\n");
return;
}
console_lock();
buffer = &cfg->bufs[0];
fbdev_dmabuf = buffer->dma_bufs[0]->priv;
new_var.yoffset = new_var.yres * fbdev_dmabuf->id;
/* If we're supposed to be able to flip, but the yres_virtual has been
* changed to an unsupported (smaller) value, we need to change it back
* (this is a workaround for some Linux fbdev drivers that seem to lose
* any modifications to yres_virtual after a blank.)
*/
if (new_var.yres_virtual < new_var.yres * NUM_PREFERRED_BUFFERS) {
new_var.activate = FB_ACTIVATE_NOW;
new_var.yres_virtual = new_var.yres * NUM_PREFERRED_BUFFERS;
err = fb_set_var(device->fb_info, &new_var);
if (err)
pr_err("fb_set_var failed (err=%d)\n", err);
} else {
err = fb_pan_display(device->fb_info, &new_var);
if (err)
pr_err("fb_pan_display failed (err=%d)\n", err);
}
console_unlock();
unlock_fb_info(device->fb_info);
}
static int
adf_fbdev_open2(struct adf_obj *obj, struct inode *inode, struct file *file)
{
struct adf_fbdev_device *dev =
(struct adf_fbdev_device *)obj->parent;
atomic_inc(&dev->refcount);
return 0;
}
static void
adf_fbdev_release2(struct adf_obj *obj, struct inode *inode, struct file *file)
{
struct adf_fbdev_device *dev =
(struct adf_fbdev_device *)obj->parent;
struct sync_fence *release_fence;
if (atomic_dec_return(&dev->refcount))
return;
/* This special "null" flip works around a problem with ADF
* which leaves buffers pinned by the display engine even
* after all ADF clients have closed.
*
* The "null" flip is pipelined like any other. The user won't
* be able to unload this module until it has been posted.
*/
release_fence = adf_device_post(&dev->base, NULL, 0, NULL, 0, NULL, 0);
if (IS_ERR_OR_NULL(release_fence)) {
pr_err("Failed to queue null flip command (err=%d).\n",
(int)PTR_ERR(release_fence));
return;
}
sync_fence_put(release_fence);
}
static const struct adf_device_ops adf_fbdev_device_ops = {
.owner = THIS_MODULE,
.base = {
.open = adf_fbdev_open2,
.release = adf_fbdev_release2,
.ioctl = adf_img_ioctl,
},
.validate = adf_fbdev_validate,
.post = adf_fbdev_post,
};
static bool
adf_fbdev_supports_event(struct adf_obj *obj, enum adf_event_type type)
{
switch (type) {
case ADF_EVENT_VSYNC:
case ADF_EVENT_HOTPLUG:
return true;
default:
return false;
}
}
static void
adf_fbdev_set_event(struct adf_obj *obj, enum adf_event_type type,
bool enabled)
{
switch (type) {
case ADF_EVENT_VSYNC:
case ADF_EVENT_HOTPLUG:
break;
default:
BUG();
}
}
static int adf_fbdev_blank2(struct adf_interface *intf, u8 state)
{
struct adf_fbdev_interface *interface =
(struct adf_fbdev_interface *)intf;
struct fb_info *fb_info = interface->fb_info;
if (!fb_info->fbops->fb_blank)
return -EOPNOTSUPP;
return fb_info->fbops->fb_blank(state, fb_info);
}
static int
adf_fbdev_alloc_simple_buffer(struct adf_interface *intf, u16 w, u16 h,
u32 format, struct dma_buf **dma_buf,
u32 *offset, u32 *pitch)
{
struct adf_fbdev_interface *interface =
(struct adf_fbdev_interface *)intf;
struct fb_var_screeninfo *var = &interface->fb_info->var;
struct adf_fbdev_dmabuf *fbdev_dmabuf;
if (w != var->xres) {
pr_err("Simple alloc request w=%u does not match w=%u.\n",
w, var->xres);
return -EINVAL;
}
if (h != var->yres) {
pr_err("Simple alloc request h=%u does not match h=%u.\n",
h, var->yres);
return -EINVAL;
}
if (format != adf_fbdev_supported_format) {
pr_err("Simple alloc request f=0x%x does not match f=0x%x.\n",
format, adf_fbdev_supported_format);
return -EINVAL;
}
fbdev_dmabuf = adf_fbdev_alloc_buffer(interface);
if (IS_ERR_OR_NULL(fbdev_dmabuf))
return PTR_ERR(fbdev_dmabuf);
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0))
{
DEFINE_DMA_BUF_EXPORT_INFO(export_info);
export_info.ops = &adf_fbdev_dma_buf_ops;
export_info.size = fbdev_dmabuf->length;
export_info.flags = O_RDWR;
export_info.priv = fbdev_dmabuf;
*dma_buf = dma_buf_export(&export_info);
}
#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 17, 0))
*dma_buf = dma_buf_export(fbdev_dmabuf, &adf_fbdev_dma_buf_ops,
fbdev_dmabuf->length, O_RDWR, NULL);
#else
*dma_buf = dma_buf_export(fbdev_dmabuf, &adf_fbdev_dma_buf_ops,
fbdev_dmabuf->length, O_RDWR);
#endif
if (IS_ERR(*dma_buf)) {
adf_fbdev_free_buffer(fbdev_dmabuf);
return PTR_ERR(*dma_buf);
}
*pitch = interface->fb_info->fix.line_length;
*offset = 0;
return 0;
}
static int
adf_fbdev_screen_size(struct adf_interface *intf, u16 *width_mm,
u16 *height_mm)
{
struct adf_fbdev_interface *interface =
(struct adf_fbdev_interface *)intf;
*width_mm = interface->width_mm;
*height_mm = interface->height_mm;
return 0;
}
static int adf_fbdev_modeset(struct adf_interface *intf,
struct drm_mode_modeinfo *mode)
{
struct adf_fbdev_interface *interface =
(struct adf_fbdev_interface *)intf;
return mode == &interface->fb_mode ? 0 : -EINVAL;
}
static const struct adf_interface_ops adf_fbdev_interface_ops = {
.base = {
.supports_event = adf_fbdev_supports_event,
.set_event = adf_fbdev_set_event,
},
.blank = adf_fbdev_blank2,
.alloc_simple_buffer = adf_fbdev_alloc_simple_buffer,
.screen_size = adf_fbdev_screen_size,
.modeset = adf_fbdev_modeset,
};
struct adf_overlay_engine_ops adf_fbdev_overlay_engine_ops = {
.supported_formats = &adf_fbdev_supported_format,
.n_supported_formats = 1,
};
/* If we can flip, we need to make sure we have the memory to do so.
*
* We'll assume that the fbdev device provides extra space in
* yres_virtual for panning; xres_virtual is theoretically supported,
* but it involves more work.
*
* If the fbdev device doesn't have yres_virtual > yres, we'll try
* requesting it before bailing. Userspace applications commonly do
* this with an FBIOPUT_VSCREENINFO ioctl().
*
* Another problem is with a limitation in PowerVR services -- it
* needs framebuffers to be page aligned (this is a SW limitation,
* the HW can support non-page-aligned buffers). So we have to
* check that stride * height for a single buffer is page aligned.
*/
static bool adf_fbdev_flip_possible(struct fb_info *fb_info)
{
struct fb_var_screeninfo var = fb_info->var;
int err;
if (!fb_info->fix.xpanstep && !fb_info->fix.ypanstep &&
!fb_info->fix.ywrapstep) {
pr_err("The fbdev device detected does not support ypan/ywrap.\n");
return false;
}
if ((fb_info->fix.line_length * var.yres) % PAGE_SIZE != 0) {
pr_err("Line length (in bytes) x yres is not a multiple of page size.\n");
return false;
}
/* We might already have enough space */
if (var.yres * NUM_PREFERRED_BUFFERS <= var.yres_virtual)
return true;
pr_err("No buffer space for flipping; asking for more.\n");
var.activate = FB_ACTIVATE_NOW;
var.yres_virtual = var.yres * NUM_PREFERRED_BUFFERS;
err = fb_set_var(fb_info, &var);
if (err) {
pr_err("fb_set_var failed (err=%d).\n", err);
return false;
}
if (var.yres * NUM_PREFERRED_BUFFERS > var.yres_virtual) {
pr_err("Failed to obtain additional buffer space.\n");
return false;
}
/* Some fbdev drivers allow the yres_virtual modification through,
* but don't actually update the fix. We need the fix to be updated
* and more memory allocated, so we can actually take advantage of
* the increased yres_virtual.
*/
if (fb_info->fix.smem_len < fb_info->fix.line_length *
var.yres_virtual) {
pr_err("'fix' not re-allocated with sufficient buffer space.\n");
pr_err("Check NUM_PREFERRED_BUFFERS (%u) is as intended.\n",
NUM_PREFERRED_BUFFERS);
return false;
}
return true;
}
/* Could use devres here? */
static struct {
struct adf_fbdev_device device;
struct adf_fbdev_interface interface;
struct adf_overlay_engine engine;
} dev_data;
static int __init init_adf_fbdev(void)
{
struct drm_mode_modeinfo *mode = &dev_data.interface.fb_mode;
char format_str[ADF_FORMAT_STR_SIZE];
struct fb_info *fb_info;
int err = -ENODEV;
fb_info = registered_fb[0];
if (!fb_info) {
pr_err("No Linux framebuffer (fbdev) device is registered!\n");
pr_err("Check you have a framebuffer driver compiled into your kernel\n");
pr_err("and that it is enabled on the cmdline.\n");
goto err_out;
}
if (!lock_fb_info(fb_info))
goto err_out;
console_lock();
/* Filter out broken FB devices */
if (!fb_info->fix.smem_len || !fb_info->fix.line_length) {
pr_err("The fbdev device detected had a zero smem_len or line_length,\n");
pr_err("which suggests it is a broken driver.\n");
goto err_unlock;
}
if (fb_info->fix.type != FB_TYPE_PACKED_PIXELS ||
fb_info->fix.visual != FB_VISUAL_TRUECOLOR) {
pr_err("The fbdev device detected is not truecolor with packed pixels.\n");
goto err_unlock;
}
if (fb_info->var.bits_per_pixel == 32) {
if (fb_info->var.red.length == 8 ||
fb_info->var.green.length == 8 ||
fb_info->var.blue.length == 8 ||
fb_info->var.red.offset == 16 ||
fb_info->var.green.offset == 8 ||
fb_info->var.blue.offset == 0) {
#if defined(ADF_FBDEV_FORCE_XRGB8888)
adf_fbdev_supported_format = DRM_FORMAT_BGRX8888;
#else
adf_fbdev_supported_format = DRM_FORMAT_BGRA8888;
#endif
} else if (fb_info->var.red.length == 8 ||
fb_info->var.green.length == 8 ||
fb_info->var.blue.length == 8 ||
fb_info->var.red.offset == 0 ||
fb_info->var.green.offset == 8 ||
fb_info->var.blue.offset == 16) {
adf_fbdev_supported_format = DRM_FORMAT_RGBA8888;
} else {
pr_err("The fbdev device detected uses an unrecognized 32bit pixel format (%u/%u/%u, %u/%u/%u)\n",
fb_info->var.red.length,
fb_info->var.green.length,
fb_info->var.blue.length,
fb_info->var.red.offset,
fb_info->var.green.offset,
fb_info->var.blue.offset);
goto err_unlock;
}
} else if (fb_info->var.bits_per_pixel == 16) {
if (fb_info->var.red.length != 5 ||
fb_info->var.green.length != 6 ||
fb_info->var.blue.length != 5 ||
fb_info->var.red.offset != 11 ||
fb_info->var.green.offset != 5 ||
fb_info->var.blue.offset != 0) {
pr_err("The fbdev device detected uses an unrecognized 16bit pixel format (%u/%u/%u, %u/%u/%u)\n",
fb_info->var.red.length,
fb_info->var.green.length,
fb_info->var.blue.length,
fb_info->var.red.offset,
fb_info->var.green.offset,
fb_info->var.blue.offset);
goto err_unlock;
}
adf_fbdev_supported_format = DRM_FORMAT_BGR565;
} else {
pr_err("The fbdev device detected uses an unsupported bpp (%u).\n",
fb_info->var.bits_per_pixel);
goto err_unlock;
}
#if defined(CONFIG_ARCH_MT8173)
/* Workaround for broken framebuffer driver. The wrong pixel format
* is reported to this module. It is always really RGBA8888.
*/
adf_fbdev_supported_format = DRM_FORMAT_RGBA8888;
#endif
if (!try_module_get(fb_info->fbops->owner)) {
pr_err("try_module_get() failed");
goto err_unlock;
}
if (fb_info->fbops->fb_open &&
fb_info->fbops->fb_open(fb_info, 0) != 0) {
pr_err("fb_open() failed");
goto err_module_put;
}
if (!adf_fbdev_flip_possible(fb_info)) {
pr_err("Flipping must be supported for ADF. Aborting.\n");
goto err_fb_release;
}
err = adf_device_init(&dev_data.device.base, fb_info->dev,
&adf_fbdev_device_ops, "fbdev");
if (err) {
pr_err("adf_device_init failed (%d)", err);
goto err_fb_release;
}
dev_data.device.fb_info = fb_info;
err = adf_interface_init(&dev_data.interface.base,
&dev_data.device.base,
ADF_INTF_DVI, 0, ADF_INTF_FLAG_PRIMARY,
&adf_fbdev_interface_ops, "fbdev_interface");
if (err) {
pr_err("adf_interface_init failed (%d)", err);
goto err_device_destroy;
}
spin_lock_init(&dev_data.interface.alloc_lock);
dev_data.interface.fb_info = fb_info;
/* If the fbdev mode looks viable, try to inherit from it */
if (fb_info->mode)
adf_modeinfo_from_fb_videomode(fb_info->mode, mode);
/* Framebuffer drivers aren't always very good at filling out their
* mode information, so fake up anything that's missing so we don't
* need to accommodate it in userspace.
*/
if (!mode->hdisplay)
mode->hdisplay = fb_info->var.xres;
if (!mode->vdisplay)
mode->vdisplay = fb_info->var.yres;
if (!mode->vrefresh)
mode->vrefresh = FALLBACK_REFRESH_RATE;
if (fb_info->var.width > 0 && fb_info->var.width < 1000) {
dev_data.interface.width_mm = fb_info->var.width;
} else {
dev_data.interface.width_mm = (fb_info->var.xres * 25400) /
(FALLBACK_DPI * 1000);
}
if (fb_info->var.height > 0 && fb_info->var.height < 1000) {
dev_data.interface.height_mm = fb_info->var.height;
} else {
dev_data.interface.height_mm = (fb_info->var.yres * 25400) /
(FALLBACK_DPI * 1000);
}
err = adf_hotplug_notify_connected(&dev_data.interface.base, mode, 1);
if (err) {
pr_err("adf_hotplug_notify_connected failed (%d)", err);
goto err_interface_destroy;
}
/* This doesn't really set the mode, it just updates current_mode */
err = adf_interface_set_mode(&dev_data.interface.base, mode);
if (err) {
pr_err("adf_interface_set_mode failed (%d)", err);
goto err_interface_destroy;
}
err = adf_overlay_engine_init(&dev_data.engine, &dev_data.device.base,
&adf_fbdev_overlay_engine_ops,
"fbdev_overlay_engine");
if (err) {
pr_err("adf_overlay_engine_init failed (%d)", err);
goto err_interface_destroy;
}
err = adf_attachment_allow(&dev_data.device.base,
&dev_data.engine,
&dev_data.interface.base);
if (err) {
pr_err("adf_attachment_allow failed (%d)", err);
goto err_overlay_engine_destroy;
}
adf_format_str(adf_fbdev_supported_format, format_str);
pr_info("Found usable fbdev device (%s):\n"
"range (physical) = 0x%lx-0x%lx\n"
"range (virtual) = %p-%p\n"
"size (bytes) = 0x%x\n"
"xres x yres = %ux%u\n"
"xres x yres (v) = %ux%u\n"
"physical (mm) = %ux%u\n"
"refresh (Hz) = %u\n"
"drm fourcc = %s (0x%x)\n",
fb_info->fix.id,
fb_info->fix.smem_start,
fb_info->fix.smem_start + fb_info->fix.smem_len,
fb_info->screen_base,
fb_info->screen_base + fb_info->screen_size,
fb_info->fix.smem_len,
mode->hdisplay, mode->vdisplay,
fb_info->var.xres_virtual, fb_info->var.yres_virtual,
dev_data.interface.width_mm, dev_data.interface.height_mm,
mode->vrefresh,
format_str, adf_fbdev_supported_format);
err = 0;
err_unlock:
console_unlock();
unlock_fb_info(fb_info);
err_out:
return err;
err_overlay_engine_destroy:
adf_overlay_engine_destroy(&dev_data.engine);
err_interface_destroy:
adf_interface_destroy(&dev_data.interface.base);
err_device_destroy:
adf_device_destroy(&dev_data.device.base);
err_fb_release:
if (fb_info->fbops->fb_release)
fb_info->fbops->fb_release(fb_info, 0);
err_module_put:
module_put(fb_info->fbops->owner);
goto err_unlock;
}
static void __exit exit_adf_fbdev(void)
{
struct fb_info *fb_info = dev_data.device.fb_info;
if (!lock_fb_info(fb_info)) {
pr_err("Failed to lock fb_info.\n");
return;
}
console_lock();
adf_overlay_engine_destroy(&dev_data.engine);
adf_interface_destroy(&dev_data.interface.base);
adf_device_destroy(&dev_data.device.base);
if (fb_info->fbops->fb_release)
fb_info->fbops->fb_release(fb_info, 0);
module_put(fb_info->fbops->owner);
console_unlock();
unlock_fb_info(fb_info);
}
module_init(init_adf_fbdev);
module_exit(exit_adf_fbdev);

1623
drivers/staging/imgtec/adf_sunxi.c
View File

File diff suppressed because it is too large Load Diff

86
drivers/staging/imgtec/adf_sunxi.h
View File

@ -1,86 +0,0 @@
/* -*- mode: c; indent-tabs-mode: t; c-basic-offset: 8; tab-width: 8 -*- */
/* vi: set ts=8 sw=8 sts=8: */
/*************************************************************************/ /*!
@File adf_sunxi.h
@Codingstyle LinuxKernel
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#ifndef _ADF_SUNXI_
#define _ADF_SUNXI_
extern struct ion_device *idev;
#include <video/drv_display.h>
#define DISPLAY_INTERNAL 0
#define DISPLAY_HDMI 1
#define DISPLAY_EDP 2
struct setup_dispc_data {
int layer_num[3];
disp_layer_info layer_info[3][4];
void *hConfigData;
};
struct disp_composer_ops {
int (*get_screen_width)(u32 screen_id);
int (*get_screen_height)(u32 screen_id);
int (*get_output_type)(u32 screen_id);
int (*hdmi_enable)(u32 screen_id);
int (*hdmi_disable)(u32 screen_id);
int (*hdmi_set_mode)(u32 screen_id, disp_tv_mode mode);
int (*hdmi_get_mode)(u32 screen_id);
int (*hdmi_check_support_mode)(u32 screen_id, u8 mode);
int (*is_support_scaler_layer)(unsigned int screen_id,
unsigned int src_w, unsigned int src_h, unsigned int out_w,
unsigned int out_h);
int (*dispc_gralloc_queue)(struct setup_dispc_data *psDispcData);
int (*set_retire_callback)(void (*retire_fn)(void));
int (*vsync_enable)(u32 screen_id, bool enable);
int (*vsync_callback)(void *user_data, void (*cb_fn)(void *user_data,
u32 screen_id));
int (*hotplug_enable)(u32 screen_id, bool enable);
int (*hotplug_callback)(u32 screen_id, void *user_data,
hdmi_hotplug_callback_function cb_fn);
int (*hotplug_state)(u32 screen_id);
};
extern int disp_get_composer_ops(struct disp_composer_ops *ops);
#endif

11
drivers/staging/imgtec/apollo/Kconfig
View File

@ -1,11 +0,0 @@
# SPDX-License-Identifier: GPL-2.0
config POWERVR_APOLLO
tristate "PowerVR Apollo test chip support"
depends on X86
default n
config POWERVR_ADF_PDP
tristate "ADF driver for Apollo PDP"
default y
depends on ADF
depends on POWERVR_APOLLO

9
drivers/staging/imgtec/apollo/Makefile
View File

@ -1,9 +0,0 @@
# SPDX-License-Identifier: GPL-2.0
obj-$(CONFIG_POWERVR_APOLLO) += apollo.o
apollo-y += apollo_drv.o ion_lma_heap.o pci_support.o
ccflags-y += -include drivers/staging/imgtec/config_kernel.h \
-I$(src) \
-Idrivers/staging/imgtec \
-Idrivers/staging/imgtec/rogue \
-Idrivers/staging/imgtec/rogue/hwdefs \
-Idrivers/staging/imgtec/rogue/hwdefs/km

1189
drivers/staging/imgtec/apollo/adf_pdp.c
View File

File diff suppressed because it is too large Load Diff

1262
drivers/staging/imgtec/apollo/adf_tc5_pdp.c
View File

File diff suppressed because it is too large Load Diff

2806
drivers/staging/imgtec/apollo/apollo_drv.c
View File

File diff suppressed because it is too large Load Diff

164
drivers/staging/imgtec/apollo/apollo_drv.h
View File

@ -1,164 +0,0 @@
/* -*- mode: c; indent-tabs-mode: t; c-basic-offset: 8; tab-width: 8 -*- */
/* vi: set ts=8 sw=8 sts=8: */
/*************************************************************************/ /*!
@File apollo_drv.h
@Codingstyle LinuxKernel
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#ifndef _APOLLO_DRV_H
#define _APOLLO_DRV_H
/*
* This contains the hooks for the apollo testchip driver, as used by the
* Rogue and PDP sub-devices, and the platform data passed to each of their
* drivers
*/
#include <linux/pci.h>
#include <linux/device.h>
#if defined(SUPPORT_ION)
#include PVR_ANDROID_ION_HEADER
/* NOTE: This should be kept in sync with the user side (in buffer_generic.c) */
#if defined(SUPPORT_RGX)
#define ION_HEAP_APOLLO_ROGUE (ION_HEAP_TYPE_CUSTOM+1)
#endif
#define ION_HEAP_APOLLO_PDP (ION_HEAP_TYPE_CUSTOM+2)
#if defined(SUPPORT_FAKE_SECURE_ION_HEAP)
#define ION_HEAP_APOLLO_SECURE (ION_HEAP_TYPE_CUSTOM+3)
#endif
#endif /* defined(SUPPORT_ION) */
#define APOLLO_INTERRUPT_PDP 0
#define APOLLO_INTERRUPT_EXT 1
#define APOLLO_INTERRUPT_TC5_PDP 2
#define APOLLO_INTERRUPT_COUNT 3
int apollo_enable(struct device *dev);
void apollo_disable(struct device *dev);
int apollo_enable_interrupt(struct device *dev, int interrupt_id);
int apollo_disable_interrupt(struct device *dev, int interrupt_id);
int apollo_set_interrupt_handler(struct device *dev, int interrupt_id,
void (*handler_function)(void *), void *handler_data);
int apollo_sys_info(struct device *dev, u32 *tmp, u32 *pll);
int apollo_sys_strings(struct device *dev,
char *str_fpga_rev, size_t size_fpga_rev, char *str_tcf_core_rev,
size_t size_tcf_core_rev, char *str_tcf_core_target_build_id,
size_t size_tcf_core_target_build_id, char *str_pci_ver,
size_t size_pci_ver, char *str_macro_ver, size_t size_macro_ver);
int apollo_core_clock_speed(struct device *dev);
#define APOLLO_DEVICE_NAME_PDP "apollo_pdp"
#define ODN_DEVICE_NAME_PDP "odin_pdp"
/* The following structs are initialised and passed down by the parent apollo
* driver to the respective sub-drivers
*/
struct apollo_pdp_platform_data {
#if defined(SUPPORT_ION)
struct ion_device *ion_device;
int ion_heap_id;
#endif
resource_size_t memory_base;
/* The following is used by the drm_pdp driver as it manages the
* pdp memory
*/
resource_size_t pdp_heap_memory_base;
resource_size_t pdp_heap_memory_size;
};
#if defined(SUPPORT_RGX) && defined(SUPPORT_APOLLO_FPGA)
#error Define either SUPPORT_RGX or SUPPORT_APOLLO_FGPA, not both
#endif
#if defined(SUPPORT_RGX)
#define APOLLO_DEVICE_NAME_ROGUE "apollo_rogue"
struct apollo_rogue_platform_data {
#if defined(SUPPORT_ION)
struct ion_device *ion_device;
int ion_heap_id;
#endif
/* The base address of the testchip memory (CPU physical address) -
* used to convert from CPU-Physical to device-physical addresses
*/
resource_size_t apollo_memory_base;
/* The following is used to setup the services heaps that map to the
* ion heaps
*/
resource_size_t pdp_heap_memory_base;
resource_size_t pdp_heap_memory_size;
resource_size_t rogue_heap_memory_base;
resource_size_t rogue_heap_memory_size;
#if defined(SUPPORT_FAKE_SECURE_ION_HEAP)
resource_size_t secure_heap_memory_base;
resource_size_t secure_heap_memory_size;
#endif
};
#endif /* defined(SUPPORT_RGX) */
#if defined(SUPPORT_APOLLO_FPGA)
#define APOLLO_DEVICE_NAME_FPGA "apollo_fpga"
struct apollo_fpga_platform_data {
resource_size_t apollo_memory_base;
resource_size_t pdp_heap_memory_base;
resource_size_t pdp_heap_memory_size;
};
#endif /* defined(SUPPORT_APOLLO_FPGA) */
#endif /* _APOLLO_DRV_H */

212
drivers/staging/imgtec/apollo/apollo_regs.h
View File

@ -1,212 +0,0 @@
/*************************************************************************/ /*!
@File
@Title System Description Header
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description This header provides system-specific declarations and macros
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#if !defined(__APOLLO_REGS_H__)
#define __APOLLO_REGS_H__
/*
* The core clock speed is passed through a multiplier depending on the TC version.
*
* On TC_ES1: Multiplier = x3, final speed = 270MHz
* On TC_ES2: Multiplier = x6, final speed = 540MHz
* On TCF5: Multiplier = 1x final speed = 45MHz
*
*
* The base (unmultiplied speed) can be adjusted using a module parameter called "sys_core_clk_speed",
* a number in Hz.
*
* As an example:
*
* PVR_SRVKM_PARAMS="sys_core_clk_speed=60000000" /etc/init.d/rc.pvr start
*
* would result in a core speed of 60MHz xMultiplier.
*
*
* The memory clock is unmultiplied and can be adjusted using a module parameter called
* "sys_mem_clk_speed", this should be the number in Hz for the memory clock speed.
*
* As an example:
*
* PVR_SRVKM_PARAMS="sys_mem_clk_speed=100000000" /etc/init.d/rc.pvr start
*
* would attempt to start the driver with the memory clock speed set to 100MHz.
*
*
* Same applies to the system interface clock speed sys_sysif_clk_speed.
* Needed for TCF5 but not for TC_ES2/ES1.
* As an example:
*
* PVR_SRVKM_PARAMS="sys_mem_clk_speed=45000000" /etc/init.d/rc.pvr start
*
* would attempt to start the driver with the system clock speed set to 45MHz.
*
*
* All parameters can be specified at once, eg:
* PVR_SRVKM_PARAMS="sys_mem_clk_speed=MEMORY_SPEED sys_core_clk_speed=CORE_SPEED sys_mem_clk_speed=SYSIF_SPEED" /etc/init.d/rc.pvr start
*/
#define RGX_TC_SYS_CLOCK_SPEED (50000000) /*< At the moment just used for TCF5 */
#if defined(TC_APOLLO_TCF5_12_4_1_48)
/* TC TCF5 (12.*) */
#undef RGX_TC_SYS_CLOCK_SPEED
#define RGX_TC_CORE_CLOCK_SPEED (60000000)
#define RGX_TC_MEM_CLOCK_SPEED (45000000)
#define RGX_TC_SYS_CLOCK_SPEED (45000000)
#elif defined(TC_APOLLO_TCF5_14_8_1_20) || defined(TC_APOLLO_TCF5_22_18_22_22) || \
defined(TC_APOLLO_TCF5_22_34_22_23) || defined(TC_APOLLO_TCF5_22_44_22_25) || \
defined(TC_APOLLO_TCF5_22_45_22_29) || defined(TC_APOLLO_TCF5_22_49_21_16) || \
defined(TC_APOLLO_TCF5_22_50_22_29)
/* TC TCF5 (14.* / 22.*) */
#define RGX_TC_CORE_CLOCK_SPEED (20000000)
#define RGX_TC_MEM_CLOCK_SPEED (50000000)
#elif defined(TC_APOLLO_TCF5_22_19_54_24) || defined(TC_APOLLO_TCF5_22_30_54_25) || \
defined(TC_APOLLO_TCF5_22_36_54_28) || defined(TC_APOLLO_TCF5_22_40_54_30) || \
defined(TC_APOLLO_TCF5_22_48_54_30)
/* TC TCF5 (22.*) */
#define RGX_TC_CORE_CLOCK_SPEED (100000000)
#define RGX_TC_MEM_CLOCK_SPEED (50000000)
#elif defined(TC_APOLLO_TCF5_22_26_54_24)
/* TC TCF5 (22.*) */
#define RGX_TC_CORE_CLOCK_SPEED (13000000)
#define RGX_TC_MEM_CLOCK_SPEED (50000000)
#elif defined(TC_APOLLO_TCF5_22_32_54_328) || defined(TC_APOLLO_TCF5_22_46_54_330)
/* TC TCF5 (22.*) */
#define RGX_TC_CORE_CLOCK_SPEED (50000000)
#define RGX_TC_MEM_CLOCK_SPEED (50000000)
#elif defined(TC_APOLLO_TCF5_22_33_21_11)
/* TC TCF5 (22.*) */
#undef RGX_TC_SYS_CLOCK_SPEED
#define RGX_TC_CORE_CLOCK_SPEED (20000000)
#define RGX_TC_MEM_CLOCK_SPEED (45000000)
#define RGX_TC_SYS_CLOCK_SPEED (45000000)
#elif defined(TC_APOLLO_TCF5_22_41_54_330)
/* TC TCF5 (22.*) */
#define RGX_TC_CORE_CLOCK_SPEED (80000000)
#define RGX_TC_MEM_CLOCK_SPEED (50000000)
#elif defined(TC_APOLLO_TCF5_BVNC_NOT_SUPPORTED)
/* TC TCF5 (22.*) fallback frequencies */
#undef RGX_TC_SYS_CLOCK_SPEED
#define RGX_TC_CORE_CLOCK_SPEED (20000000)
#define RGX_TC_MEM_CLOCK_SPEED (50000000)
#define RGX_TC_SYS_CLOCK_SPEED (50000000)
#elif defined(TC_APOLLO_TCF5_REFERENCE)
/* TC TCF5 (Reference bitfile) */
#undef RGX_TC_SYS_CLOCK_SPEED
#define RGX_TC_CORE_CLOCK_SPEED (50000000)
#define RGX_TC_MEM_CLOCK_SPEED (50000000)
#define RGX_TC_SYS_CLOCK_SPEED (45000000)
#elif defined(TC_APOLLO_BONNIE)
/* TC Bonnie */
#define RGX_TC_CORE_CLOCK_SPEED (18000000)
#define RGX_TC_MEM_CLOCK_SPEED (65000000)
#elif defined(TC_APOLLO_ES2)
/* TC ES2 */
#define RGX_TC_CORE_CLOCK_SPEED (90000000)
#define RGX_TC_MEM_CLOCK_SPEED (104000000)
#else
/* TC ES1 */
#define RGX_TC_CORE_CLOCK_SPEED (90000000)
#define RGX_TC_MEM_CLOCK_SPEED (65000000)
#endif
/* TC TCF5 */
#define TC5_SYS_APOLLO_REG_PCI_BASENUM (1)
#define TC5_SYS_APOLLO_REG_PDP2_OFFSET (0x800000)
#define TC5_SYS_APOLLO_REG_PDP2_SIZE (0x7C4)
#define TC5_SYS_APOLLO_REG_PDP2_FBDC_OFFSET (0xA00000)
#define TC5_SYS_APOLLO_REG_PDP2_FBDC_SIZE (0x14)
#define TC5_SYS_APOLLO_REG_HDMI_OFFSET (0xC00000)
#define TC5_SYS_APOLLO_REG_HDMI_SIZE (0x1C)
/* TC ES2 */
#define TCF_TEMP_SENSOR_SPI_OFFSET 0xe
#define TCF_TEMP_SENSOR_TO_C(raw) (((raw) * 248 / 4096) - 54)
/* Number of bytes that are broken */
#define SYS_DEV_MEM_BROKEN_BYTES (1024 * 1024)
#define SYS_DEV_MEM_REGION_SIZE (0x40000000 - SYS_DEV_MEM_BROKEN_BYTES)
/* Apollo reg on base register 0 */
#define SYS_APOLLO_REG_PCI_BASENUM (0)
#define SYS_APOLLO_REG_REGION_SIZE (0x00010000)
#define SYS_APOLLO_REG_SYS_OFFSET (0x0000)
#define SYS_APOLLO_REG_SYS_SIZE (0x0400)
#define SYS_APOLLO_REG_PLL_OFFSET (0x1000)
#define SYS_APOLLO_REG_PLL_SIZE (0x0400)
#define SYS_APOLLO_REG_HOST_OFFSET (0x4050)
#define SYS_APOLLO_REG_HOST_SIZE (0x0014)
#define SYS_APOLLO_REG_PDP1_OFFSET (0xC000)
#define SYS_APOLLO_REG_PDP1_SIZE (0x2000)
/* Offsets for flashing Apollo PROMs from base 0 */
#define APOLLO_FLASH_STAT_OFFSET (0x4058)
#define APOLLO_FLASH_DATA_WRITE_OFFSET (0x4050)
#define APOLLO_FLASH_RESET_OFFSET (0x4060)
#define APOLLO_FLASH_FIFO_STATUS_MASK (0xF)
#define APOLLO_FLASH_FIFO_STATUS_SHIFT (0)
#define APOLLO_FLASH_PROGRAM_STATUS_MASK (0xF)
#define APOLLO_FLASH_PROGRAM_STATUS_SHIFT (16)
#define APOLLO_FLASH_PROG_COMPLETE_BIT (0x1)
#define APOLLO_FLASH_PROG_PROGRESS_BIT (0x2)
#define APOLLO_FLASH_PROG_FAILED_BIT (0x4)
#define APOLLO_FLASH_INV_FILETYPE_BIT (0x8)
#define APOLLO_FLASH_FIFO_SIZE (8)
/* RGX reg on base register 1 */
#define SYS_RGX_REG_PCI_BASENUM (1)
#define SYS_RGX_REG_REGION_SIZE (0x7FFFF)
/* Device memory (including HP mapping) on base register 2 */
#define SYS_DEV_MEM_PCI_BASENUM (2)
#endif /* if !defined(__APOLLO_REGS_H__) */

277
drivers/staging/imgtec/apollo/ion_lma_heap.c
View File

@ -1,277 +0,0 @@
/* -*- mode: c; indent-tabs-mode: t; c-basic-offset: 8; tab-width: 8 -*- */
/* vi: set ts=8 sw=8 sts=8: */
/*************************************************************************/ /*!
@File ion_lma_heap.c
@Codingstyle LinuxKernel
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#include "ion_lma_heap.h"
#include <linux/mm.h>
#include <linux/slab.h>
#include <linux/genalloc.h>
#include <linux/scatterlist.h>
/* Ion heap for LMA allocations. This heap is identical to CARVEOUT except
* that it does not do any CPU cache maintenance nor does it zero the memory
* using the CPU (this is handled with PVR_ANDROID_DEFER_CLEAR in userspace).
*/
struct ion_lma_heap {
struct ion_heap heap;
struct gen_pool *pool;
ion_phys_addr_t base;
bool allow_cpu_map;
};
static ion_phys_addr_t ion_lma_allocate(struct ion_heap *heap,
unsigned long size,
unsigned long align)
{
struct ion_lma_heap *lma_heap =
container_of(heap, struct ion_lma_heap, heap);
unsigned long offset = gen_pool_alloc(lma_heap->pool, size);
if (!offset)
return ION_CARVEOUT_ALLOCATE_FAIL;
return offset;
}
static void ion_lma_free(struct ion_heap *heap, ion_phys_addr_t addr,
unsigned long size)
{
struct ion_lma_heap *lma_heap =
container_of(heap, struct ion_lma_heap, heap);
if (addr == ION_CARVEOUT_ALLOCATE_FAIL)
return;
gen_pool_free(lma_heap->pool, addr, size);
}
static int ion_lma_heap_phys(struct ion_heap *heap,
struct ion_buffer *buffer,
ion_phys_addr_t *addr, size_t *len)
{
struct sg_table *table = buffer->priv_virt;
struct page *page = sg_page(table->sgl);
ion_phys_addr_t paddr = PFN_PHYS(page_to_pfn(page));
*addr = paddr;
*len = buffer->size;
return 0;
}
static int ion_lma_heap_allocate(struct ion_heap *heap,
struct ion_buffer *buffer,
unsigned long size, unsigned long align,
unsigned long flags)
{
struct sg_table *table;
ion_phys_addr_t paddr;
int ret;
if (align > PAGE_SIZE)
return -EINVAL;
table = kzalloc(sizeof(*table), GFP_KERNEL);
if (!table)
return -ENOMEM;
ret = sg_alloc_table(table, 1, GFP_KERNEL);
if (ret)
goto err_free;
paddr = ion_lma_allocate(heap, size, align);
if (paddr == ION_CARVEOUT_ALLOCATE_FAIL) {
ret = -ENOMEM;
goto err_free_table;
}
sg_set_page(table->sgl, pfn_to_page(PFN_DOWN(paddr)), size, 0);
buffer->priv_virt = table;
return 0;
err_free_table:
sg_free_table(table);
err_free:
kfree(table);
return ret;
}
static void ion_lma_heap_free(struct ion_buffer *buffer)
{
struct ion_heap *heap = buffer->heap;
struct sg_table *table = buffer->priv_virt;
struct page *page = sg_page(table->sgl);
ion_phys_addr_t paddr = PFN_PHYS(page_to_pfn(page));
/* Do not zero the LMA heap from the CPU. This is very slow with
* the current TCF (w/ no DMA engine). We will use the TLA to clear
* the memory with Rogue in another place.
*
* We also skip the CPU cache maintenance for the heap space, as we
* statically know that the TCF PCI memory bar has UC/WC set by the
* MTRR/PAT subsystem.
*/
ion_lma_free(heap, paddr, buffer->size);
sg_free_table(table);
kfree(table);
}
static struct sg_table *ion_lma_heap_map_dma(struct ion_heap *heap,
struct ion_buffer *buffer)
{
return buffer->priv_virt;
}
static void ion_lma_heap_unmap_dma(struct ion_heap *heap,
struct ion_buffer *buffer)
{
/* No-op */
}
static int ion_lma_heap_map_user(struct ion_heap *mapper,
struct ion_buffer *buffer,
struct vm_area_struct *vma)
{
struct sg_table *table = buffer->priv_virt;
struct page *page = sg_page(table->sgl);
ion_phys_addr_t paddr = PFN_PHYS(page_to_pfn(page));
struct ion_lma_heap *lma_heap =
container_of(mapper, struct ion_lma_heap, heap);
if (!lma_heap->allow_cpu_map) {
pr_err("Trying to map_user fake secure ION handle\n");
return -EPERM;
}
return remap_pfn_range(vma, vma->vm_start,
PFN_DOWN(paddr) + vma->vm_pgoff,
vma->vm_end - vma->vm_start,
pgprot_writecombine(vma->vm_page_prot));
}
static void *ion_lma_heap_map_kernel(struct ion_heap *heap,
struct ion_buffer *buffer)
{
struct sg_table *table = buffer->priv_virt;
struct page *page = sg_page(table->sgl);
ion_phys_addr_t paddr = PFN_PHYS(page_to_pfn(page));
struct ion_lma_heap *lma_heap =
container_of(heap, struct ion_lma_heap, heap);
if (!lma_heap->allow_cpu_map) {
pr_err("Trying to map_kernel fake secure ION handle\n");
return ERR_PTR(-EPERM);
}
return ioremap_wc(paddr, buffer->size);
}
static void ion_lma_heap_unmap_kernel(struct ion_heap *heap,
struct ion_buffer *buffer)
{
iounmap(buffer->vaddr);
}
static struct ion_heap_ops lma_heap_ops = {
.allocate = ion_lma_heap_allocate,
.free = ion_lma_heap_free,
.phys = ion_lma_heap_phys,
.map_dma = ion_lma_heap_map_dma,
.unmap_dma = ion_lma_heap_unmap_dma,
.map_user = ion_lma_heap_map_user,
.map_kernel = ion_lma_heap_map_kernel,
.unmap_kernel = ion_lma_heap_unmap_kernel,
};
struct ion_heap *ion_lma_heap_create(struct ion_platform_heap *heap_data,
bool allow_cpu_map)
{
struct ion_lma_heap *lma_heap;
size_t size = heap_data->size;
struct page *page;
page = pfn_to_page(PFN_DOWN(heap_data->base));
/* Do not zero the LMA heap from the CPU. This is very slow with
* the current TCF (w/ no DMA engine). We will use the TLA to clear
* the memory with Rogue in another place.
*
* We also skip the CPU cache maintenance for the heap space, as we
* statically know that the TCF PCI memory bar has UC/WC set by the
* MTRR/PAT subsystem.
*/
lma_heap = kzalloc(sizeof(*lma_heap), GFP_KERNEL);
if (!lma_heap)
return ERR_PTR(-ENOMEM);
lma_heap->pool = gen_pool_create(12, -1);
if (!lma_heap->pool) {
kfree(lma_heap);
return ERR_PTR(-ENOMEM);
}
lma_heap->base = heap_data->base;
gen_pool_add(lma_heap->pool, lma_heap->base, size, -1);
lma_heap->heap.id = heap_data->id;
lma_heap->heap.ops = &lma_heap_ops;
lma_heap->heap.name = heap_data->name;
lma_heap->heap.type = ION_HEAP_TYPE_CUSTOM;
lma_heap->heap.flags = ION_HEAP_FLAG_DEFER_FREE;
lma_heap->allow_cpu_map = allow_cpu_map;
return &lma_heap->heap;
}
void ion_lma_heap_destroy(struct ion_heap *heap)
{
struct ion_lma_heap *lma_heap =
container_of(heap, struct ion_lma_heap, heap);
gen_pool_destroy(lma_heap->pool);
kfree(lma_heap);
lma_heap = NULL;
}

55
drivers/staging/imgtec/apollo/ion_lma_heap.h
View File

@ -1,55 +0,0 @@
/* -*- mode: c; indent-tabs-mode: t; c-basic-offset: 8; tab-width: 8 -*- */
/* vi: set ts=8 sw=8 sts=8: */
/*************************************************************************/ /*!
@File ion_lma_heap.h
@Codingstyle LinuxKernel
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#ifndef __ION_LMA_HEAP__
#define __ION_LMA_HEAP__
#include PVR_ANDROID_ION_HEADER
#include PVR_ANDROID_ION_PRIV_HEADER
struct ion_heap *ion_lma_heap_create(struct ion_platform_heap *heap_data,
bool allow_cpu_map);
void ion_lma_heap_destroy(struct ion_heap *heap);
#endif /* __ION_LMA_HEAP__ */

155
drivers/staging/imgtec/apollo/ion_support_generic.c
View File

@ -1,155 +0,0 @@
/*************************************************************************/ /*!
@File ion_support.c
@Title Generic Ion support
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description This file does the Ion initialisation and De-initialistion for
systems that don't already have Ion.
For systems that do have Ion it's expected they they init Ion
as per their requirements and then implement IonDevAcquire and
IonDevRelease which provides access to the ion device.
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#include "pvrsrv_error.h"
#include "img_types.h"
#include "pvr_debug.h"
#include "ion_support.h"
#include "ion_sys.h"
#include <linux/version.h>
#include PVR_ANDROID_ION_HEADER
#include PVR_ANDROID_ION_PRIV_HEADER
#include <linux/err.h>
#include <linux/slab.h>
/* Just the system heaps are used by the generic implementation */
static struct ion_platform_data generic_config = {
.nr = 2,
.heaps =
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,4,39))
(struct ion_platform_heap [])
#endif
{
{
.type = ION_HEAP_TYPE_SYSTEM_CONTIG,
.name = "system_contig",
.id = ION_HEAP_TYPE_SYSTEM_CONTIG,
},
{
.type = ION_HEAP_TYPE_SYSTEM,
.name = "system",
.id = ION_HEAP_TYPE_SYSTEM,
}
}
};
struct ion_heap **g_apsIonHeaps;
struct ion_device *g_psIonDev;
PVRSRV_ERROR IonInit(void *phPrivateData)
{
int uiHeapCount = generic_config.nr;
int uiError;
int i;
PVR_UNREFERENCED_PARAMETER(phPrivateData);
g_apsIonHeaps = kzalloc(sizeof(struct ion_heap *) * uiHeapCount, GFP_KERNEL);
/* Create the ion devicenode */
g_psIonDev = ion_device_create(NULL);
if (IS_ERR_OR_NULL(g_psIonDev)) {
kfree(g_apsIonHeaps);
return PVRSRV_ERROR_OUT_OF_MEMORY;
}
/* Register all the heaps */
for (i = 0; i < generic_config.nr; i++)
{
struct ion_platform_heap *psPlatHeapData = &generic_config.heaps[i];
g_apsIonHeaps[i] = ion_heap_create(psPlatHeapData);
if (IS_ERR_OR_NULL(g_apsIonHeaps[i]))
{
uiError = PTR_ERR(g_apsIonHeaps[i]);
goto failHeapCreate;
}
ion_device_add_heap(g_psIonDev, g_apsIonHeaps[i]);
}
return PVRSRV_OK;
failHeapCreate:
for (i = 0; i < uiHeapCount; i++) {
if (g_apsIonHeaps[i])
{
ion_heap_destroy(g_apsIonHeaps[i]);
}
}
kfree(g_apsIonHeaps);
ion_device_destroy(g_psIonDev);
return PVRSRV_ERROR_OUT_OF_MEMORY;
}
struct ion_device *IonDevAcquire(void)
{
return g_psIonDev;
}
void IonDevRelease(struct ion_device *psIonDev)
{
/* Nothing to do, sanity check the pointer we're passed back */
PVR_ASSERT(psIonDev == g_psIonDev);
}
void IonDeinit(void)
{
int uiHeapCount = generic_config.nr;
int i;
for (i = 0; i < uiHeapCount; i++) {
if (g_apsIonHeaps[i])
{
ion_heap_destroy(g_apsIonHeaps[i]);
}
}
kfree(g_apsIonHeaps);
ion_device_destroy(g_psIonDev);
}

666
drivers/staging/imgtec/apollo/pci_support.c
View File

@ -1,666 +0,0 @@
/*************************************************************************/ /*!
@File
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#include <linux/pci.h>
#if defined(CONFIG_MTRR)
#include <asm/mtrr.h>
#include <linux/version.h>
#endif
#include "pci_support.h"
#include "allocmem.h"
typedef struct _PVR_PCI_DEV_TAG
{
struct pci_dev *psPCIDev;
HOST_PCI_INIT_FLAGS ePCIFlags;
IMG_BOOL abPCIResourceInUse[DEVICE_COUNT_RESOURCE];
} PVR_PCI_DEV;
/*************************************************************************/ /*!
@Function OSPCISetDev
@Description Set a PCI device for subsequent use.
@Input pvPCICookie Pointer to OS specific PCI structure
@Input eFlags Flags
@Return PVRSRV_PCI_DEV_HANDLE Pointer to PCI device handle
*/ /**************************************************************************/
PVRSRV_PCI_DEV_HANDLE OSPCISetDev(void *pvPCICookie, HOST_PCI_INIT_FLAGS eFlags)
{
int err;
IMG_UINT32 i;
PVR_PCI_DEV *psPVRPCI;
psPVRPCI = OSAllocMem(sizeof(*psPVRPCI));
if (psPVRPCI == NULL)
{
printk(KERN_ERR "OSPCISetDev: Couldn't allocate PVR PCI structure\n");
return NULL;
}
psPVRPCI->psPCIDev = (struct pci_dev *)pvPCICookie;
psPVRPCI->ePCIFlags = eFlags;
err = pci_enable_device(psPVRPCI->psPCIDev);
if (err != 0)
{
printk(KERN_ERR "OSPCISetDev: Couldn't enable device (%d)\n", err);
OSFreeMem(psPVRPCI);
return NULL;
}
if (psPVRPCI->ePCIFlags & HOST_PCI_INIT_FLAG_BUS_MASTER) /* PRQA S 3358 */ /* misuse of enums */
{
pci_set_master(psPVRPCI->psPCIDev);
}
if (psPVRPCI->ePCIFlags & HOST_PCI_INIT_FLAG_MSI) /* PRQA S 3358 */ /* misuse of enums */
{
#if defined(CONFIG_PCI_MSI)
err = pci_enable_msi(psPVRPCI->psPCIDev);
if (err != 0)
{
printk(KERN_ERR "OSPCISetDev: Couldn't enable MSI (%d)", err);
psPVRPCI->ePCIFlags &= ~HOST_PCI_INIT_FLAG_MSI; /* PRQA S 1474,3358,4130 */ /* misuse of enums */
}
#else
printk(KERN_ERR "OSPCISetDev: MSI support not enabled in the kernel");
#endif
}
/* Initialise the PCI resource tracking array */
for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
{
psPVRPCI->abPCIResourceInUse[i] = IMG_FALSE;
}
return (PVRSRV_PCI_DEV_HANDLE)psPVRPCI;
}
/*************************************************************************/ /*!
@Function OSPCIAcquireDev
@Description Acquire a PCI device for subsequent use.
@Input ui16VendorID Vendor PCI ID
@Input ui16DeviceID Device PCI ID
@Input eFlags Flags
@Return PVRSRV_PCI_DEV_HANDLE Pointer to PCI device handle
*/ /**************************************************************************/
PVRSRV_PCI_DEV_HANDLE OSPCIAcquireDev(IMG_UINT16 ui16VendorID,
IMG_UINT16 ui16DeviceID,
HOST_PCI_INIT_FLAGS eFlags)
{
struct pci_dev *psPCIDev;
psPCIDev = pci_get_device(ui16VendorID, ui16DeviceID, NULL);
if (psPCIDev == NULL)
{
return NULL;
}
return OSPCISetDev((void *)psPCIDev, eFlags);
}
/*************************************************************************/ /*!
@Function OSPCIDevID
@Description Get the PCI device ID.
@Input hPVRPCI PCI device handle
@Output pui16DeviceID Pointer to where the device ID should
be returned
@Return PVRSRV_ERROR Services error code
*/ /**************************************************************************/
PVRSRV_ERROR OSPCIDevID(PVRSRV_PCI_DEV_HANDLE hPVRPCI, IMG_UINT16 *pui16DeviceID)
{
PVR_PCI_DEV *psPVRPCI = (PVR_PCI_DEV *)hPVRPCI;
if (pui16DeviceID == NULL)
{
return PVRSRV_ERROR_INVALID_PARAMS;
}
*pui16DeviceID = psPVRPCI->psPCIDev->device;
return PVRSRV_OK;
}
/*************************************************************************/ /*!
@Function OSPCIIRQ
@Description Get the interrupt number for the device.
@Input hPVRPCI PCI device handle
@Output pui16DeviceID Pointer to where the interrupt number
should be returned
@Return PVRSRV_ERROR Services error code
*/ /**************************************************************************/
PVRSRV_ERROR OSPCIIRQ(PVRSRV_PCI_DEV_HANDLE hPVRPCI, IMG_UINT32 *pui32IRQ)
{
PVR_PCI_DEV *psPVRPCI = (PVR_PCI_DEV *)hPVRPCI;
if (pui32IRQ == NULL)
{
return PVRSRV_ERROR_INVALID_PARAMS;
}
*pui32IRQ = psPVRPCI->psPCIDev->irq;
return PVRSRV_OK;
}
/* Functions supported by OSPCIAddrRangeFunc */
enum HOST_PCI_ADDR_RANGE_FUNC
{
HOST_PCI_ADDR_RANGE_FUNC_LEN,
HOST_PCI_ADDR_RANGE_FUNC_START,
HOST_PCI_ADDR_RANGE_FUNC_END,
HOST_PCI_ADDR_RANGE_FUNC_REQUEST,
HOST_PCI_ADDR_RANGE_FUNC_RELEASE
};
/*************************************************************************/ /*!
@Function OSPCIAddrRangeFunc
@Description Internal support function for various address range related
functions
@Input eFunc Function to perform
@Input hPVRPCI PCI device handle
@Input ui32Index Address range index
@Return IMG_UINT32 Function dependent value
*/ /**************************************************************************/
static IMG_UINT64 OSPCIAddrRangeFunc(enum HOST_PCI_ADDR_RANGE_FUNC eFunc,
PVRSRV_PCI_DEV_HANDLE hPVRPCI,
IMG_UINT32 ui32Index)
{
PVR_PCI_DEV *psPVRPCI = (PVR_PCI_DEV *)hPVRPCI;
if (ui32Index >= DEVICE_COUNT_RESOURCE)
{
printk(KERN_ERR "OSPCIAddrRangeFunc: Index out of range");
return 0;
}
switch (eFunc)
{
case HOST_PCI_ADDR_RANGE_FUNC_LEN:
{
return pci_resource_len(psPVRPCI->psPCIDev, ui32Index);
}
case HOST_PCI_ADDR_RANGE_FUNC_START:
{
return pci_resource_start(psPVRPCI->psPCIDev, ui32Index);
}
case HOST_PCI_ADDR_RANGE_FUNC_END:
{
return pci_resource_end(psPVRPCI->psPCIDev, ui32Index);
}
case HOST_PCI_ADDR_RANGE_FUNC_REQUEST:
{
int err = pci_request_region(psPVRPCI->psPCIDev, (IMG_INT)ui32Index, PVRSRV_MODNAME);
if (err != 0)
{
printk(KERN_ERR "OSPCIAddrRangeFunc: pci_request_region_failed (%d)", err);
return 0;
}
psPVRPCI->abPCIResourceInUse[ui32Index] = IMG_TRUE;
return 1;
}
case HOST_PCI_ADDR_RANGE_FUNC_RELEASE:
{
if (psPVRPCI->abPCIResourceInUse[ui32Index])
{
pci_release_region(psPVRPCI->psPCIDev, (IMG_INT)ui32Index);
psPVRPCI->abPCIResourceInUse[ui32Index] = IMG_FALSE;
}
return 1;
}
default:
{
printk(KERN_ERR "OSPCIAddrRangeFunc: Unknown function");
break;
}
}
return 0;
}
/*************************************************************************/ /*!
@Function OSPCIAddrRangeLen
@Description Returns length of a given address range
@Input hPVRPCI PCI device handle
@Input ui32Index Address range index
@Return IMG_UINT32 Length of address range or 0 if no
such range
*/ /**************************************************************************/
IMG_UINT64 OSPCIAddrRangeLen(PVRSRV_PCI_DEV_HANDLE hPVRPCI, IMG_UINT32 ui32Index)
{
return OSPCIAddrRangeFunc(HOST_PCI_ADDR_RANGE_FUNC_LEN, hPVRPCI, ui32Index);
}
/*************************************************************************/ /*!
@Function OSPCIAddrRangeStart
@Description Returns the start of a given address range
@Input hPVRPCI PCI device handle
@Input ui32Index Address range index
@Return IMG_UINT32 Start of address range or 0 if no
such range
*/ /**************************************************************************/
IMG_UINT64 OSPCIAddrRangeStart(PVRSRV_PCI_DEV_HANDLE hPVRPCI, IMG_UINT32 ui32Index)
{
return OSPCIAddrRangeFunc(HOST_PCI_ADDR_RANGE_FUNC_START, hPVRPCI, ui32Index);
}
/*************************************************************************/ /*!
@Function OSPCIAddrRangeEnd
@Description Returns the end of a given address range
@Input hPVRPCI PCI device handle
@Input ui32Index Address range index
@Return IMG_UINT32 End of address range or 0 if no such
range
*/ /**************************************************************************/
IMG_UINT64 OSPCIAddrRangeEnd(PVRSRV_PCI_DEV_HANDLE hPVRPCI, IMG_UINT32 ui32Index)
{
return OSPCIAddrRangeFunc(HOST_PCI_ADDR_RANGE_FUNC_END, hPVRPCI, ui32Index);
}
/*************************************************************************/ /*!
@Function OSPCIRequestAddrRange
@Description Request a given address range index for subsequent use
@Input hPVRPCI PCI device handle
@Input ui32Index Address range index
@Return PVRSRV_ERROR Services error code
*/ /**************************************************************************/
PVRSRV_ERROR OSPCIRequestAddrRange(PVRSRV_PCI_DEV_HANDLE hPVRPCI,
IMG_UINT32 ui32Index)
{
if (OSPCIAddrRangeFunc(HOST_PCI_ADDR_RANGE_FUNC_REQUEST, hPVRPCI, ui32Index) == 0)
{
return PVRSRV_ERROR_PCI_CALL_FAILED;
}
else
{
return PVRSRV_OK;
}
}
/*************************************************************************/ /*!
@Function OSPCIReleaseAddrRange
@Description Release a given address range that is no longer being used
@Input hPVRPCI PCI device handle
@Input ui32Index Address range index
@Return PVRSRV_ERROR Services error code
*/ /**************************************************************************/
PVRSRV_ERROR OSPCIReleaseAddrRange(PVRSRV_PCI_DEV_HANDLE hPVRPCI, IMG_UINT32 ui32Index)
{
if (OSPCIAddrRangeFunc(HOST_PCI_ADDR_RANGE_FUNC_RELEASE, hPVRPCI, ui32Index) == 0)
{
return PVRSRV_ERROR_PCI_CALL_FAILED;
}
else
{
return PVRSRV_OK;
}
}
/*************************************************************************/ /*!
@Function OSPCIRequestAddrRegion
@Description Request a given region from an address range for subsequent use
@Input hPVRPCI PCI device handle
@Input ui32Index Address range index
@Input uiOffset Offset into the address range that forms
the start of the region
@Input uiLength Length of the region
@Return PVRSRV_ERROR Services error code
*/ /**************************************************************************/
PVRSRV_ERROR OSPCIRequestAddrRegion(PVRSRV_PCI_DEV_HANDLE hPVRPCI,
IMG_UINT32 ui32Index,
IMG_UINT64 uiOffset,
IMG_UINT64 uiLength)
{
PVR_PCI_DEV *psPVRPCI = (PVR_PCI_DEV *)hPVRPCI;
resource_size_t start;
resource_size_t end;
start = pci_resource_start(psPVRPCI->psPCIDev, ui32Index);
end = pci_resource_end(psPVRPCI->psPCIDev, ui32Index);
/* Check that the requested region is valid */
if ((start + uiOffset + uiLength - 1) > end)
{
return PVRSRV_ERROR_BAD_REGION_SIZE_MISMATCH;
}
if (pci_resource_flags(psPVRPCI->psPCIDev, ui32Index) & IORESOURCE_IO)
{
if (request_region(start + uiOffset, uiLength, PVRSRV_MODNAME) == NULL)
{
return PVRSRV_ERROR_PCI_REGION_UNAVAILABLE;
}
}
else
{
if (request_mem_region(start + uiOffset, uiLength, PVRSRV_MODNAME) == NULL)
{
return PVRSRV_ERROR_PCI_REGION_UNAVAILABLE;
}
}
return PVRSRV_OK;
}
/*************************************************************************/ /*!
@Function OSPCIReleaseAddrRegion
@Description Release a given region, from an address range, that is no
longer in use
@Input hPVRPCI PCI device handle
@Input ui32Index Address range index
@Input ui32Offset Offset into the address range that forms
the start of the region
@Input ui32Length Length of the region
@Return PVRSRV_ERROR Services error code
*/ /**************************************************************************/
PVRSRV_ERROR OSPCIReleaseAddrRegion(PVRSRV_PCI_DEV_HANDLE hPVRPCI,
IMG_UINT32 ui32Index,
IMG_UINT64 uiOffset,
IMG_UINT64 uiLength)
{
PVR_PCI_DEV *psPVRPCI = (PVR_PCI_DEV *)hPVRPCI;
resource_size_t start;
resource_size_t end;
start = pci_resource_start(psPVRPCI->psPCIDev, ui32Index);
end = pci_resource_end(psPVRPCI->psPCIDev, ui32Index);
/* Check that the region is valid */
if ((start + uiOffset + uiLength - 1) > end)
{
return PVRSRV_ERROR_BAD_REGION_SIZE_MISMATCH;
}
if (pci_resource_flags(psPVRPCI->psPCIDev, ui32Index) & IORESOURCE_IO)
{
release_region(start + uiOffset, uiLength);
}
else
{
release_mem_region(start + uiOffset, uiLength);
}
return PVRSRV_OK;
}
/*************************************************************************/ /*!
@Function OSPCIReleaseDev
@Description Release a PCI device that is no longer being used
@Input hPVRPCI PCI device handle
@Return PVRSRV_ERROR Services error code
*/ /**************************************************************************/
PVRSRV_ERROR OSPCIReleaseDev(PVRSRV_PCI_DEV_HANDLE hPVRPCI)
{
PVR_PCI_DEV *psPVRPCI = (PVR_PCI_DEV *)hPVRPCI;
int i;
/* Release all PCI regions that are currently in use */
for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
{
if (psPVRPCI->abPCIResourceInUse[i])
{
pci_release_region(psPVRPCI->psPCIDev, i);
psPVRPCI->abPCIResourceInUse[i] = IMG_FALSE;
}
}
#if defined(CONFIG_PCI_MSI)
if (psPVRPCI->ePCIFlags & HOST_PCI_INIT_FLAG_MSI) /* PRQA S 3358 */ /* misuse of enums */
{
pci_disable_msi(psPVRPCI->psPCIDev);
}
#endif
if (psPVRPCI->ePCIFlags & HOST_PCI_INIT_FLAG_BUS_MASTER) /* PRQA S 3358 */ /* misuse of enums */
{
pci_clear_master(psPVRPCI->psPCIDev);
}
pci_disable_device(psPVRPCI->psPCIDev);
OSFreeMem(psPVRPCI);
/*not nulling pointer, copy on stack*/
return PVRSRV_OK;
}
/*************************************************************************/ /*!
@Function OSPCISuspendDev
@Description Prepare PCI device to be turned off by power management
@Input hPVRPCI PCI device handle
@Return PVRSRV_ERROR Services error code
*/ /**************************************************************************/
PVRSRV_ERROR OSPCISuspendDev(PVRSRV_PCI_DEV_HANDLE hPVRPCI)
{
PVR_PCI_DEV *psPVRPCI = (PVR_PCI_DEV *)hPVRPCI;
int i;
int err;
/* Release all PCI regions that are currently in use */
for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
{
if (psPVRPCI->abPCIResourceInUse[i])
{
pci_release_region(psPVRPCI->psPCIDev, i);
}
}
err = pci_save_state(psPVRPCI->psPCIDev);
if (err != 0)
{
printk(KERN_ERR "OSPCISuspendDev: pci_save_state_failed (%d)", err);
return PVRSRV_ERROR_PCI_CALL_FAILED;
}
pci_disable_device(psPVRPCI->psPCIDev);
err = pci_set_power_state(psPVRPCI->psPCIDev, pci_choose_state(psPVRPCI->psPCIDev, PMSG_SUSPEND));
switch(err)
{
case 0:
break;
case -EIO:
printk(KERN_ERR "OSPCISuspendDev: device doesn't support PCI PM");
break;
case -EINVAL:
printk(KERN_ERR "OSPCISuspendDev: can't enter requested power state");
break;
default:
printk(KERN_ERR "OSPCISuspendDev: pci_set_power_state failed (%d)", err);
break;
}
return PVRSRV_OK;
}
/*************************************************************************/ /*!
@Function OSPCIResumeDev
@Description Prepare a PCI device to be resumed by power management
@Input hPVRPCI PCI device handle
@Return PVRSRV_ERROR Services error code
*/ /**************************************************************************/
PVRSRV_ERROR OSPCIResumeDev(PVRSRV_PCI_DEV_HANDLE hPVRPCI)
{
PVR_PCI_DEV *psPVRPCI = (PVR_PCI_DEV *)hPVRPCI;
int err;
int i;
err = pci_set_power_state(psPVRPCI->psPCIDev, pci_choose_state(psPVRPCI->psPCIDev, PMSG_ON));
switch(err)
{
case 0:
break;
case -EIO:
printk(KERN_ERR "OSPCIResumeDev: device doesn't support PCI PM");
break;
case -EINVAL:
printk(KERN_ERR "OSPCIResumeDev: can't enter requested power state");
return PVRSRV_ERROR_UNKNOWN_POWER_STATE;
default:
printk(KERN_ERR "OSPCIResumeDev: pci_set_power_state failed (%d)", err);
return PVRSRV_ERROR_UNKNOWN_POWER_STATE;
}
pci_restore_state(psPVRPCI->psPCIDev);
err = pci_enable_device(psPVRPCI->psPCIDev);
if (err != 0)
{
printk(KERN_ERR "OSPCIResumeDev: Couldn't enable device (%d)", err);
return PVRSRV_ERROR_PCI_CALL_FAILED;
}
if (psPVRPCI->ePCIFlags & HOST_PCI_INIT_FLAG_BUS_MASTER) /* PRQA S 3358 */ /* misuse of enums */
pci_set_master(psPVRPCI->psPCIDev);
/* Restore the PCI resource tracking array */
for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
{
if (psPVRPCI->abPCIResourceInUse[i])
{
err = pci_request_region(psPVRPCI->psPCIDev, i, PVRSRV_MODNAME);
if (err != 0)
{
printk(KERN_ERR "OSPCIResumeDev: pci_request_region_failed (region %d, error %d)", i, err);
}
}
}
return PVRSRV_OK;
}
#if defined(CONFIG_MTRR)
/*************************************************************************/ /*!
@Function OSPCIClearResourceMTRRs
@Description Clear any BIOS-configured MTRRs for a PCI memory region
@Input hPVRPCI PCI device handle
@Input ui32Index Address range index
@Return PVRSRV_ERROR Services error code
*/ /**************************************************************************/
PVRSRV_ERROR OSPCIClearResourceMTRRs(PVRSRV_PCI_DEV_HANDLE hPVRPCI, IMG_UINT32 ui32Index)
{
PVR_PCI_DEV *psPVRPCI = (PVR_PCI_DEV *)hPVRPCI;
resource_size_t start, end;
int err;
start = pci_resource_start(psPVRPCI->psPCIDev, ui32Index);
end = pci_resource_end(psPVRPCI->psPCIDev, ui32Index) + 1;
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0))
err = arch_phys_wc_add(start, end - start);
if (err < 0)
{
return PVRSRV_ERROR_PCI_CALL_FAILED;
}
#else
err = mtrr_add(start, end - start, MTRR_TYPE_UNCACHABLE, 0);
if (err < 0)
{
printk(KERN_ERR "OSPCIClearResourceMTRRs: mtrr_add failed (%d)", err);
return PVRSRV_ERROR_PCI_CALL_FAILED;
}
err = mtrr_del(err, start, end - start);
if (err < 0)
{
printk(KERN_ERR "OSPCIClearResourceMTRRs: mtrr_del failed (%d)", err);
return PVRSRV_ERROR_PCI_CALL_FAILED;
}
/* Workaround for overlapping MTRRs. */
{
IMG_BOOL bGotMTRR0 = IMG_FALSE;
/* Current mobo BIOSes will normally set up a WRBACK MTRR spanning
* 0->4GB, and then another 4GB->6GB. If the PCI card's automatic &
* overlapping UNCACHABLE MTRR is deleted, we see WRBACK behaviour.
*
* WRBACK is incompatible with some PCI devices, so try to split
* the UNCACHABLE regions up and insert a WRCOMB region instead.
*/
err = mtrr_add(start, end - start, MTRR_TYPE_WRBACK, 0);
if (err < 0)
{
/* If this fails, services has probably run before and created
* a write-combined MTRR for the test chip. Assume it has, and
* don't return an error here.
*/
return PVRSRV_OK;
}
if(err == 0)
bGotMTRR0 = IMG_TRUE;
err = mtrr_del(err, start, end - start);
if(err < 0)
{
printk(KERN_ERR "OSPCIClearResourceMTRRs: mtrr_del failed (%d)", err);
return PVRSRV_ERROR_PCI_CALL_FAILED;
}
if(bGotMTRR0)
{
/* Replace 0 with a non-overlapping WRBACK MTRR */
err = mtrr_add(0, start, MTRR_TYPE_WRBACK, 0);
if(err < 0)
{
printk(KERN_ERR "OSPCIClearResourceMTRRs: mtrr_add failed (%d)", err);
return PVRSRV_ERROR_PCI_CALL_FAILED;
}
/* Add a WRCOMB MTRR for the PCI device memory bar */
err = mtrr_add(start, end - start, MTRR_TYPE_WRCOMB, 0);
if(err < 0)
{
printk(KERN_ERR "OSPCIClearResourceMTRRs: mtrr_add failed (%d)", err);
return PVRSRV_ERROR_PCI_CALL_FAILED;
}
}
}
#endif
return PVRSRV_OK;
}
#endif /* defined(CONFIG_MTRR) */

91
drivers/staging/imgtec/apollo/pci_support.h
View File

@ -1,91 +0,0 @@
/*************************************************************************/ /*!
@File
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#ifndef __PCI_SUPPORT_H__
#define __PCI_SUPPORT_H__
#include "img_types.h"
#include "pvrsrv_error.h"
#if defined(LINUX)
#include <linux/pci.h>
#define TO_PCI_COOKIE(dev) to_pci_dev((struct device *)(dev))
#else
#define TO_PCI_COOKIE(dev) (dev)
#endif
typedef enum _HOST_PCI_INIT_FLAGS_
{
HOST_PCI_INIT_FLAG_BUS_MASTER = 0x00000001,
HOST_PCI_INIT_FLAG_MSI = 0x00000002,
HOST_PCI_INIT_FLAG_FORCE_I32 = 0x7fffffff
} HOST_PCI_INIT_FLAGS;
struct _PVRSRV_PCI_DEV_OPAQUE_STRUCT_;
typedef struct _PVRSRV_PCI_DEV_OPAQUE_STRUCT_ *PVRSRV_PCI_DEV_HANDLE;
PVRSRV_PCI_DEV_HANDLE OSPCIAcquireDev(IMG_UINT16 ui16VendorID, IMG_UINT16 ui16DeviceID, HOST_PCI_INIT_FLAGS eFlags);
PVRSRV_PCI_DEV_HANDLE OSPCISetDev(void *pvPCICookie, HOST_PCI_INIT_FLAGS eFlags);
PVRSRV_ERROR OSPCIReleaseDev(PVRSRV_PCI_DEV_HANDLE hPVRPCI);
PVRSRV_ERROR OSPCIDevID(PVRSRV_PCI_DEV_HANDLE hPVRPCI, IMG_UINT16 *pui16DeviceID);
PVRSRV_ERROR OSPCIIRQ(PVRSRV_PCI_DEV_HANDLE hPVRPCI, IMG_UINT32 *pui32IRQ);
IMG_UINT64 OSPCIAddrRangeLen(PVRSRV_PCI_DEV_HANDLE hPVRPCI, IMG_UINT32 ui32Index);
IMG_UINT64 OSPCIAddrRangeStart(PVRSRV_PCI_DEV_HANDLE hPVRPCI, IMG_UINT32 ui32Index);
IMG_UINT64 OSPCIAddrRangeEnd(PVRSRV_PCI_DEV_HANDLE hPVRPCI, IMG_UINT32 ui32Index);
PVRSRV_ERROR OSPCIRequestAddrRange(PVRSRV_PCI_DEV_HANDLE hPVRPCI, IMG_UINT32 ui32Index);
PVRSRV_ERROR OSPCIReleaseAddrRange(PVRSRV_PCI_DEV_HANDLE hPVRPCI, IMG_UINT32 ui32Index);
PVRSRV_ERROR OSPCIRequestAddrRegion(PVRSRV_PCI_DEV_HANDLE hPVRPCI, IMG_UINT32 ui32Index, IMG_UINT64 uiOffset, IMG_UINT64 uiLength);
PVRSRV_ERROR OSPCIReleaseAddrRegion(PVRSRV_PCI_DEV_HANDLE hPVRPCI, IMG_UINT32 ui32Index, IMG_UINT64 uiOffset, IMG_UINT64 uiLength);
PVRSRV_ERROR OSPCISuspendDev(PVRSRV_PCI_DEV_HANDLE hPVRPCI);
PVRSRV_ERROR OSPCIResumeDev(PVRSRV_PCI_DEV_HANDLE hPVRPCI);
#if defined(CONFIG_MTRR)
PVRSRV_ERROR OSPCIClearResourceMTRRs(PVRSRV_PCI_DEV_HANDLE hPVRPCI, IMG_UINT32 ui32Index);
#else
static inline PVRSRV_ERROR OSPCIClearResourceMTRRs(PVRSRV_PCI_DEV_HANDLE hPVRPCI, IMG_UINT32 ui32Index)
{
PVR_UNREFERENCED_PARAMETER(hPVRPCI);
PVR_UNREFERENCED_PARAMETER(ui32Index);
return PVRSRV_OK;
}
#endif
#endif /* __PCI_SUPPORT_H__ */

75
drivers/staging/imgtec/apollo/pdp_regs.h
View File

@ -1,75 +0,0 @@
/*************************************************************************/ /*!
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#if !defined(__PDP_REGS_H__)
#define __PDP_REGS_H__
/*************************************************************************/ /*!
PCI Device Information
*/ /**************************************************************************/
#define DCPDP_VENDOR_ID_POWERVR (0x1010)
#define DCPDP_DEVICE_ID_PCI_APOLLO_FPGA (0x1CF1)
#define DCPDP_DEVICE_ID_PCIE_APOLLO_FPGA (0x1CF2)
/*************************************************************************/ /*!
PCI Device Base Address Information
*/ /**************************************************************************/
/* PLL and PDP registers on base address register 0 */
#define DCPDP_REG_PCI_BASENUM (0)
#define DCPDP_PCI_PLL_REG_OFFSET (0x1000)
#define DCPDP_PCI_PLL_REG_SIZE (0x0400)
#define DCPDP_PCI_PDP_REG_OFFSET (0xC000)
#define DCPDP_PCI_PDP_REG_SIZE (0x2000)
/*************************************************************************/ /*!
Misc register information
*/ /**************************************************************************/
/* This information isn't captured in tcf_rgbpdp_regs.h so define it here */
#define DCPDP_STR1SURF_FORMAT_ARGB8888 (0xE)
#define DCPDP_STR1ADDRCTRL_BASE_ADDR_SHIFT (4)
#define DCPDP_STR1POSN_STRIDE_SHIFT (4)
#endif /* !defined(__PDP_REGS_H__) */

50
drivers/staging/imgtec/apollo/pdp_tc5_fbdc_regs.h
View File

@ -1,50 +0,0 @@
/*************************************************************************/ /*!
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#ifndef _PDP_TC5_FBDC_REGS_H_
#define _PDP_TC5_FBDC_REGS_H_
#define PVR5__PDP_FBDC_INTRFC_NUM_TILES (0x00)
#define PVR5__PDP_FBDC_INTRFC_PIXEL_FORMAT (0x04)
#define PVR5__PDP_FBDC_INTRFC_BASE_ADDRESS (0x08)
#define PVR5__PDP_FBDC_INTRFC_PER_LINE (0x0C)
#define PVR5__PDP_FBDC_INTRFC_INVALIDATE_REQUEST (0x10)
#endif /* _PDP_TC5_FBDC_REGS_H_ */

1072
drivers/staging/imgtec/apollo/pdp_tc5_regs.h
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File diff suppressed because it is too large Load Diff

795
drivers/staging/imgtec/apollo/sysconfig.c
View File

@ -1,795 +0,0 @@
/*************************************************************************/ /*!
@File
@Title System Configuration
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description System Configuration functions
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#include "sysinfo.h"
#include "apollo_regs.h"
#include "pvrsrv_device.h"
#include "rgxdevice.h"
#include "syscommon.h"
#include "allocmem.h"
#include "pvr_debug.h"
#if defined(SUPPORT_ION)
#include PVR_ANDROID_ION_HEADER
#include "ion_support.h"
#include "ion_sys.h"
#endif
#include "apollo_drv.h"
#include <linux/platform_device.h>
#if !defined(LMA)
#error Apollo only supports LMA at the minute
#endif
/* Valid values for the TC_MEMORY_CONFIG configuration option */
#define TC_MEMORY_LOCAL (1)
#define TC_MEMORY_HOST (2)
#define TC_MEMORY_HYBRID (3)
#if TC_MEMORY_CONFIG != TC_MEMORY_LOCAL
#error Apollo only supports TC_MEMORY_LOCAL at the minute
#endif
/* These must be consecutive */
#define PHYS_HEAP_IDX_GENERAL 0
#define PHYS_HEAP_IDX_DMABUF 1
#define PHYS_HEAP_IDX_COUNT 2
#define SYS_RGX_ACTIVE_POWER_LATENCY_MS (10)
#if defined(PVR_DVFS) || defined(SUPPORT_PDVFS)
/* Dummy DVFS configuration used purely for testing purposes */
static const IMG_OPP asOPPTable[] =
{
{ 8, 25000000},
{ 16, 50000000},
{ 32, 75000000},
{ 64, 100000000},
};
#define LEVEL_COUNT (sizeof(asOPPTable) / sizeof(IMG_OPP))
static void SetFrequency(IMG_UINT32 ui32Frequency)
{
PVR_DPF((PVR_DBG_ERROR, "SetFrequency %u", ui32Frequency));
}
static void SetVoltage(IMG_UINT32 ui32Voltage)
{
PVR_DPF((PVR_DBG_ERROR, "SetVoltage %u", ui32Voltage));
}
#endif
static void TCLocalCpuPAddrToDevPAddr(IMG_HANDLE hPrivData,
IMG_UINT32 ui32NumOfAddr,
IMG_DEV_PHYADDR *psDevPAddr,
IMG_CPU_PHYADDR *psCpuPAddr);
static void TCLocalDevPAddrToCpuPAddr(IMG_HANDLE hPrivData,
IMG_UINT32 ui32NumOfAddr,
IMG_CPU_PHYADDR *psCpuPAddr,
IMG_DEV_PHYADDR *psDevPAddr);
static IMG_UINT32 TCLocalGetRegionId(IMG_HANDLE hPrivData,
PVRSRV_MEMALLOCFLAGS_T uiAllocFlags);
static PHYS_HEAP_FUNCTIONS gsLocalPhysHeapFuncs =
{
.pfnCpuPAddrToDevPAddr = TCLocalCpuPAddrToDevPAddr,
.pfnDevPAddrToCpuPAddr = TCLocalDevPAddrToCpuPAddr,
.pfnGetRegionId = TCLocalGetRegionId,
};
static void TCIonCpuPAddrToDevPAddr(IMG_HANDLE hPrivData,
IMG_UINT32 ui32NumOfAddr,
IMG_DEV_PHYADDR *psDevPAddr,
IMG_CPU_PHYADDR *psCpuPAddr);
static void TCIonDevPAddrToCpuPAddr(IMG_HANDLE hPrivData,
IMG_UINT32 ui32NumOfAddr,
IMG_CPU_PHYADDR *psCpuPAddr,
IMG_DEV_PHYADDR *psDevPAddr);
static IMG_UINT32 TCIonGetRegionId(IMG_HANDLE hPrivData,
PVRSRV_MEMALLOCFLAGS_T uiAllocFlags);
static PHYS_HEAP_FUNCTIONS gsIonPhysHeapFuncs =
{
.pfnCpuPAddrToDevPAddr = TCIonCpuPAddrToDevPAddr,
.pfnDevPAddrToCpuPAddr = TCIonDevPAddrToCpuPAddr,
.pfnGetRegionId = TCIonGetRegionId,
};
/* BIF Tiling mode configuration */
static RGXFWIF_BIFTILINGMODE geBIFTilingMode = RGXFWIF_BIFTILINGMODE_256x16;
/* Default BIF tiling heap x-stride configurations. */
static IMG_UINT32 gauiBIFTilingHeapXStrides[RGXFWIF_NUM_BIF_TILING_CONFIGS] =
{
0, /* BIF tiling heap 1 x-stride */
1, /* BIF tiling heap 2 x-stride */
2, /* BIF tiling heap 3 x-stride */
3 /* BIF tiling heap 4 x-stride */
};
typedef struct _SYS_DATA_ SYS_DATA;
struct _SYS_DATA_
{
struct platform_device *pdev;
struct apollo_rogue_platform_data *pdata;
struct resource *registers;
#if defined(SUPPORT_ION)
struct ion_client *ion_client;
struct ion_handle *ion_rogue_allocation;
#endif
};
#define SYSTEM_INFO_FORMAT_STRING "FPGA Revision: %s\tTCF Core Revision: %s\tTCF Core Target Build ID: %s\tPCI Version: %s\tMacro Version: %s"
static IMG_CHAR *GetDeviceVersionString(SYS_DATA *psSysData)
{
int err;
char str_fpga_rev[12];
char str_tcf_core_rev[12];
char str_tcf_core_target_build_id[4];
char str_pci_ver[4];
char str_macro_ver[8];
IMG_CHAR *pszVersion;
IMG_UINT32 ui32StringLength;
err = apollo_sys_strings(psSysData->pdev->dev.parent,
str_fpga_rev, sizeof(str_fpga_rev),
str_tcf_core_rev, sizeof(str_tcf_core_rev),
str_tcf_core_target_build_id, sizeof(str_tcf_core_target_build_id),
str_pci_ver, sizeof(str_pci_ver),
str_macro_ver, sizeof(str_macro_ver));
if (err)
{
return NULL;
}
ui32StringLength = OSStringLength(SYSTEM_INFO_FORMAT_STRING);
ui32StringLength += OSStringLength(str_fpga_rev);
ui32StringLength += OSStringLength(str_tcf_core_rev);
ui32StringLength += OSStringLength(str_tcf_core_target_build_id);
ui32StringLength += OSStringLength(str_pci_ver);
ui32StringLength += OSStringLength(str_macro_ver);
/* Create the version string */
pszVersion = OSAllocZMem(ui32StringLength * sizeof(IMG_CHAR));
if (pszVersion)
{
OSSNPrintf(&pszVersion[0], ui32StringLength,
SYSTEM_INFO_FORMAT_STRING,
str_fpga_rev,
str_tcf_core_rev,
str_tcf_core_target_build_id,
str_pci_ver,
str_macro_ver);
}
return pszVersion;
}
#if defined(SUPPORT_ION)
static SYS_DATA *gpsIonPrivateData;
PVRSRV_ERROR IonInit(void *pvPrivateData)
{
PVRSRV_ERROR eError = PVRSRV_OK;
SYS_DATA *psSysData = pvPrivateData;
gpsIonPrivateData = psSysData;
psSysData->ion_client = ion_client_create(psSysData->pdata->ion_device, SYS_RGX_DEV_NAME);
if (IS_ERR(psSysData->ion_client))
{
PVR_DPF((PVR_DBG_ERROR, "%s: Failed to create ION client (%ld)", __func__, PTR_ERR(psSysData->ion_client)));
/* FIXME: Find a better matching error code */
eError = PVRSRV_ERROR_PCI_CALL_FAILED;
goto err_out;
}
/* Allocate the whole rogue ion heap and pass that to services to manage */
psSysData->ion_rogue_allocation = ion_alloc(psSysData->ion_client, psSysData->pdata->rogue_heap_memory_size, 4096, (1 << psSysData->pdata->ion_heap_id), 0);
if (IS_ERR(psSysData->ion_rogue_allocation))
{
PVR_DPF((PVR_DBG_ERROR, "%s: Failed to allocate ION rogue buffer (%ld)", __func__, PTR_ERR(psSysData->ion_rogue_allocation)));
/* FIXME: Find a better matching error code */
eError = PVRSRV_ERROR_PCI_CALL_FAILED;
goto err_destroy_client;
}
return PVRSRV_OK;
err_destroy_client:
ion_client_destroy(psSysData->ion_client);
psSysData->ion_client = NULL;
err_out:
return eError;
}
void IonDeinit(void)
{
SYS_DATA *psSysData = gpsIonPrivateData;
ion_free(psSysData->ion_client, psSysData->ion_rogue_allocation);
psSysData->ion_rogue_allocation = NULL;
ion_client_destroy(psSysData->ion_client);
psSysData->ion_client = NULL;
}
struct ion_device *IonDevAcquire(void)
{
return gpsIonPrivateData->pdata->ion_device;
}
void IonDevRelease(struct ion_device *ion_device)
{
PVR_ASSERT(ion_device == gpsIonPrivateData->pdata->ion_device);
}
#endif /* defined(SUPPORT_ION) */
static void TCLocalCpuPAddrToDevPAddr(IMG_HANDLE hPrivData,
IMG_UINT32 ui32NumOfAddr,
IMG_DEV_PHYADDR *psDevPAddr,
IMG_CPU_PHYADDR *psCpuPAddr)
{
PVRSRV_DEVICE_CONFIG *psDevConfig = (PVRSRV_DEVICE_CONFIG *)hPrivData;
/* Optimise common case */
psDevPAddr[0].uiAddr = psCpuPAddr[0].uiAddr - psDevConfig->pasPhysHeaps[0].pasRegions[0].sStartAddr.uiAddr;
if (ui32NumOfAddr > 1)
{
IMG_UINT32 ui32Idx;
for (ui32Idx = 1; ui32Idx < ui32NumOfAddr; ++ui32Idx)
{
psDevPAddr[ui32Idx].uiAddr = psCpuPAddr[ui32Idx].uiAddr - psDevConfig->pasPhysHeaps[0].pasRegions[0].sStartAddr.uiAddr;
}
}
}
static void TCLocalDevPAddrToCpuPAddr(IMG_HANDLE hPrivData,
IMG_UINT32 ui32NumOfAddr,
IMG_CPU_PHYADDR *psCpuPAddr,
IMG_DEV_PHYADDR *psDevPAddr)
{
PVRSRV_DEVICE_CONFIG *psDevConfig = (PVRSRV_DEVICE_CONFIG *)hPrivData;
/* Optimise common case */
psCpuPAddr[0].uiAddr = psDevPAddr[0].uiAddr + psDevConfig->pasPhysHeaps[0].pasRegions[0].sStartAddr.uiAddr;
if (ui32NumOfAddr > 1)
{
IMG_UINT32 ui32Idx;
for (ui32Idx = 1; ui32Idx < ui32NumOfAddr; ++ui32Idx)
{
psCpuPAddr[ui32Idx].uiAddr = psDevPAddr[ui32Idx].uiAddr + psDevConfig->pasPhysHeaps[0].pasRegions[0].sStartAddr.uiAddr;
}
}
}
static IMG_UINT32 TCLocalGetRegionId(IMG_HANDLE hPrivData,
PVRSRV_MEMALLOCFLAGS_T uiAllocFlags)
{
/* Return first region which is always valid */
return 0;
}
static void TCIonCpuPAddrToDevPAddr(IMG_HANDLE hPrivData,
IMG_UINT32 ui32NumOfAddr,
IMG_DEV_PHYADDR *psDevPAddr,
IMG_CPU_PHYADDR *psCpuPAddr)
{
PVRSRV_DEVICE_CONFIG *psDevConfig = (PVRSRV_DEVICE_CONFIG *)hPrivData;
SYS_DATA *psSysData = psDevConfig->hSysData;
/* Optimise common case */
psDevPAddr[0].uiAddr = psCpuPAddr[0].uiAddr - psSysData->pdata->apollo_memory_base;
if (ui32NumOfAddr > 1)
{
IMG_UINT32 ui32Idx;
for (ui32Idx = 1; ui32Idx < ui32NumOfAddr; ++ui32Idx)
{
psDevPAddr[ui32Idx].uiAddr = psCpuPAddr[ui32Idx].uiAddr - psSysData->pdata->apollo_memory_base;
}
}
}
static void TCIonDevPAddrToCpuPAddr(IMG_HANDLE hPrivData,
IMG_UINT32 ui32NumOfAddr,
IMG_CPU_PHYADDR *psCpuPAddr,
IMG_DEV_PHYADDR *psDevPAddr)
{
PVRSRV_DEVICE_CONFIG *psDevConfig = (PVRSRV_DEVICE_CONFIG *)hPrivData;
SYS_DATA *psSysData = psDevConfig->hSysData;
/* Optimise common case */
psCpuPAddr[0].uiAddr = psDevPAddr[0].uiAddr + psSysData->pdata->apollo_memory_base;
if (ui32NumOfAddr > 1)
{
IMG_UINT32 ui32Idx;
for (ui32Idx = 1; ui32Idx < ui32NumOfAddr; ++ui32Idx)
{
psCpuPAddr[ui32Idx].uiAddr = psDevPAddr[ui32Idx].uiAddr + psSysData->pdata->apollo_memory_base;
}
}
}
static IMG_UINT32 TCIonGetRegionId(IMG_HANDLE hPrivData,
PVRSRV_MEMALLOCFLAGS_T uiAllocFlags)
{
/* Return first region which is always valid */
return 0;
}
static PVRSRV_ERROR PhysHeapsCreate(SYS_DATA *psSysData,
void *pvPrivData,
PHYS_HEAP_CONFIG **ppasPhysHeapsOut,
IMG_UINT32 *puiPhysHeapCountOut)
{
static IMG_UINT32 uiHeapIDBase = 0;
PHYS_HEAP_CONFIG *pasPhysHeaps;
PHYS_HEAP_REGION *psRegion;
PVRSRV_ERROR eError;
pasPhysHeaps = OSAllocMem(sizeof(*pasPhysHeaps) * PHYS_HEAP_IDX_COUNT);
if (!pasPhysHeaps)
{
return PVRSRV_ERROR_OUT_OF_MEMORY;
}
psRegion = OSAllocMem(sizeof(*psRegion));
if (!psRegion)
{
eError = PVRSRV_ERROR_OUT_OF_MEMORY;
goto ErrorFreePhysHeaps;
}
psRegion->sStartAddr.uiAddr = psSysData->pdata->rogue_heap_memory_base;
psRegion->sCardBase.uiAddr = 0;
psRegion->uiSize = psSysData->pdata->rogue_heap_memory_size;
pasPhysHeaps[PHYS_HEAP_IDX_GENERAL].ui32PhysHeapID =
uiHeapIDBase + PHYS_HEAP_IDX_GENERAL;
pasPhysHeaps[PHYS_HEAP_IDX_GENERAL].eType = PHYS_HEAP_TYPE_LMA;
pasPhysHeaps[PHYS_HEAP_IDX_GENERAL].pszPDumpMemspaceName = "LMA";
pasPhysHeaps[PHYS_HEAP_IDX_GENERAL].psMemFuncs = &gsLocalPhysHeapFuncs;
pasPhysHeaps[PHYS_HEAP_IDX_GENERAL].pasRegions = psRegion;
pasPhysHeaps[PHYS_HEAP_IDX_GENERAL].ui32NumOfRegions = 1;
pasPhysHeaps[PHYS_HEAP_IDX_GENERAL].hPrivData = pvPrivData;
psRegion = OSAllocMem(sizeof(*psRegion));
if (!psRegion)
{
eError = PVRSRV_ERROR_OUT_OF_MEMORY;
goto ErrorGeneralPhysHeapDestroy;
}
psRegion->sStartAddr.uiAddr = psSysData->pdata->pdp_heap_memory_base;
psRegion->sCardBase.uiAddr = 0;
psRegion->uiSize = psSysData->pdata->pdp_heap_memory_size;
pasPhysHeaps[PHYS_HEAP_IDX_DMABUF].ui32PhysHeapID =
uiHeapIDBase + PHYS_HEAP_IDX_DMABUF;
pasPhysHeaps[PHYS_HEAP_IDX_DMABUF].eType = PHYS_HEAP_TYPE_LMA;
pasPhysHeaps[PHYS_HEAP_IDX_DMABUF].pszPDumpMemspaceName = "LMA";
pasPhysHeaps[PHYS_HEAP_IDX_DMABUF].psMemFuncs = &gsIonPhysHeapFuncs;
pasPhysHeaps[PHYS_HEAP_IDX_DMABUF].pasRegions = psRegion;
pasPhysHeaps[PHYS_HEAP_IDX_DMABUF].ui32NumOfRegions = 1;
pasPhysHeaps[PHYS_HEAP_IDX_DMABUF].hPrivData = pvPrivData;
uiHeapIDBase += PHYS_HEAP_IDX_COUNT;
*ppasPhysHeapsOut = pasPhysHeaps;
*puiPhysHeapCountOut = PHYS_HEAP_IDX_COUNT;
return PVRSRV_OK;
ErrorGeneralPhysHeapDestroy:
OSFreeMem(pasPhysHeaps[PHYS_HEAP_IDX_GENERAL].pasRegions);
ErrorFreePhysHeaps:
OSFreeMem(pasPhysHeaps);
return eError;
}
static void PhysHeapsDestroy(PHYS_HEAP_CONFIG *pasPhysHeaps,
IMG_UINT32 uiPhysHeapCount)
{
IMG_UINT32 i;
for (i = 0; i < uiPhysHeapCount; i++)
{
if (pasPhysHeaps[i].pasRegions)
{
OSFreeMem(pasPhysHeaps[i].pasRegions);
}
}
OSFreeMem(pasPhysHeaps);
}
static PVRSRV_ERROR DeviceConfigCreate(SYS_DATA *psSysData,
PVRSRV_DEVICE_CONFIG **ppsDevConfigOut)
{
PVRSRV_DEVICE_CONFIG *psDevConfig;
RGX_DATA *psRGXData;
RGX_TIMING_INFORMATION *psRGXTimingInfo;
PHYS_HEAP_CONFIG *pasPhysHeaps;
IMG_UINT32 uiPhysHeapCount;
PVRSRV_ERROR eError;
psDevConfig = OSAllocZMem(sizeof(*psDevConfig) +
sizeof(*psRGXData) +
sizeof(*psRGXTimingInfo));
if (!psDevConfig)
{
return PVRSRV_ERROR_OUT_OF_MEMORY;
}
psRGXData = (RGX_DATA *)((IMG_CHAR *)psDevConfig + sizeof(*psDevConfig));
psRGXTimingInfo = (RGX_TIMING_INFORMATION *)((IMG_CHAR *)psRGXData + sizeof(*psRGXData));
eError = PhysHeapsCreate(psSysData, psDevConfig, &pasPhysHeaps, &uiPhysHeapCount);
if (eError != PVRSRV_OK)
{
goto ErrorFreeDevConfig;
}
/* Setup RGX specific timing data */
psRGXTimingInfo->ui32CoreClockSpeed = apollo_core_clock_speed(&psSysData->pdev->dev) * 6;
psRGXTimingInfo->bEnableActivePM = IMG_FALSE;
psRGXTimingInfo->bEnableRDPowIsland = IMG_FALSE;
psRGXTimingInfo->ui32ActivePMLatencyms = SYS_RGX_ACTIVE_POWER_LATENCY_MS;
/* Set up the RGX data */
psRGXData->psRGXTimingInfo = psRGXTimingInfo;
/* Setup the device config */
psDevConfig->pvOSDevice = &psSysData->pdev->dev;
psDevConfig->pszName = "apollo";
psDevConfig->pszVersion = GetDeviceVersionString(psSysData);
psDevConfig->sRegsCpuPBase.uiAddr = psSysData->registers->start;
psDevConfig->ui32RegsSize = resource_size(psSysData->registers);
psDevConfig->ui32IRQ = APOLLO_INTERRUPT_EXT;
psDevConfig->eCacheSnoopingMode = PVRSRV_DEVICE_SNOOP_NONE;
psDevConfig->pasPhysHeaps = pasPhysHeaps;
psDevConfig->ui32PhysHeapCount = uiPhysHeapCount;
psDevConfig->aui32PhysHeapID[PVRSRV_DEVICE_PHYS_HEAP_GPU_LOCAL] =
pasPhysHeaps[PHYS_HEAP_IDX_GENERAL].ui32PhysHeapID;
psDevConfig->aui32PhysHeapID[PVRSRV_DEVICE_PHYS_HEAP_CPU_LOCAL] =
pasPhysHeaps[PHYS_HEAP_IDX_GENERAL].ui32PhysHeapID;
psDevConfig->aui32PhysHeapID[PVRSRV_DEVICE_PHYS_HEAP_FW_LOCAL] =
pasPhysHeaps[PHYS_HEAP_IDX_GENERAL].ui32PhysHeapID;
psDevConfig->eBIFTilingMode = geBIFTilingMode;
psDevConfig->pui32BIFTilingHeapConfigs = &gauiBIFTilingHeapXStrides[0];
psDevConfig->ui32BIFTilingHeapCount = IMG_ARR_NUM_ELEMS(gauiBIFTilingHeapXStrides);
psDevConfig->hDevData = psRGXData;
psDevConfig->hSysData = psSysData;
#if defined(PVR_DVFS) || defined(SUPPORT_PDVFS)
/* Dummy DVFS configuration used purely for testing purposes */
psDevConfig->sDVFS.sDVFSDeviceCfg.pasOPPTable = asOPPTable;
psDevConfig->sDVFS.sDVFSDeviceCfg.ui32OPPTableSize = LEVEL_COUNT;
psDevConfig->sDVFS.sDVFSDeviceCfg.pfnSetFrequency = SetFrequency;
psDevConfig->sDVFS.sDVFSDeviceCfg.pfnSetVoltage = SetVoltage;
#endif
#if defined(PVR_DVFS)
psDevConfig->sDVFS.sDVFSDeviceCfg.ui32PollMs = 1000;
psDevConfig->sDVFS.sDVFSDeviceCfg.bIdleReq = IMG_TRUE;
psDevConfig->sDVFS.sDVFSGovernorCfg.ui32UpThreshold = 90;
psDevConfig->sDVFS.sDVFSGovernorCfg.ui32DownDifferential = 10;
#endif
*ppsDevConfigOut = psDevConfig;
return PVRSRV_OK;
ErrorFreeDevConfig:
OSFreeMem(psDevConfig);
return eError;
}
static void DeviceConfigDestroy(PVRSRV_DEVICE_CONFIG *psDevConfig)
{
if (psDevConfig->pszVersion)
{
OSFreeMem(psDevConfig->pszVersion);
}
PhysHeapsDestroy(psDevConfig->pasPhysHeaps, psDevConfig->ui32PhysHeapCount);
OSFreeMem(psDevConfig);
}
PVRSRV_ERROR SysDevInit(void *pvOSDevice, PVRSRV_DEVICE_CONFIG **ppsDevConfig)
{
PVRSRV_DEVICE_CONFIG *psDevConfig;
SYS_DATA *psSysData;
resource_size_t uiRegistersSize;
PVRSRV_ERROR eError;
int err = 0;
PVR_ASSERT(pvOSDevice);
psSysData = OSAllocZMem(sizeof(*psSysData));
if (psSysData == NULL)
{
return PVRSRV_ERROR_OUT_OF_MEMORY;
}
psSysData->pdev = to_platform_device((struct device *)pvOSDevice);
psSysData->pdata = psSysData->pdev->dev.platform_data;
err = apollo_enable(psSysData->pdev->dev.parent);
if (err)
{
PVR_DPF((PVR_DBG_ERROR, "%s: Failed to enable PCI device (%d)", __func__, err));
eError = PVRSRV_ERROR_PCI_CALL_FAILED;
goto ErrFreeSysData;
}
psSysData->registers = platform_get_resource_byname(psSysData->pdev,
IORESOURCE_MEM,
"rogue-regs");
if (!psSysData->registers)
{
PVR_DPF((PVR_DBG_ERROR,
"%s: Failed to get Rogue register information",
__func__));
eError = PVRSRV_ERROR_PCI_REGION_UNAVAILABLE;
goto ErrorDevDisable;
}
/* Check the address range is large enough. */
uiRegistersSize = resource_size(psSysData->registers);
if (uiRegistersSize < SYS_RGX_REG_REGION_SIZE)
{
PVR_DPF((PVR_DBG_ERROR,
"%s: Rogue register region isn't big enough (was %pa, required 0x%08x)",
__FUNCTION__, &uiRegistersSize, SYS_RGX_REG_REGION_SIZE));
eError = PVRSRV_ERROR_PCI_REGION_TOO_SMALL;
goto ErrorDevDisable;
}
/* Reserve the address range */
if (!request_mem_region(psSysData->registers->start,
resource_size(psSysData->registers),
SYS_RGX_DEV_NAME))
{
PVR_DPF((PVR_DBG_ERROR, "%s: Rogue register memory region not available", __FUNCTION__));
eError = PVRSRV_ERROR_PCI_CALL_FAILED;
goto ErrorDevDisable;
}
eError = DeviceConfigCreate(psSysData, &psDevConfig);
if (eError != PVRSRV_OK)
{
goto ErrorReleaseMemRegion;
}
#if defined(SUPPORT_ION)
eError = IonInit(psSysData);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR, "%s: Failed to initialise ION", __func__));
goto ErrorDeviceConfigDestroy;
}
#endif
*ppsDevConfig = psDevConfig;
return PVRSRV_OK;
#if defined(SUPPORT_ION)
ErrorDeviceConfigDestroy:
DeviceConfigDestroy(psDevConfig);
#endif
ErrorReleaseMemRegion:
release_mem_region(psSysData->registers->start,
resource_size(psSysData->registers));
ErrorDevDisable:
apollo_disable(psSysData->pdev->dev.parent);
ErrFreeSysData:
OSFreeMem(psSysData);
return eError;
}
void SysDevDeInit(PVRSRV_DEVICE_CONFIG *psDevConfig)
{
SYS_DATA *psSysData = (SYS_DATA *)psDevConfig->hSysData;
#if defined(SUPPORT_ION)
IonDeinit();
#endif
DeviceConfigDestroy(psDevConfig);
release_mem_region(psSysData->registers->start,
resource_size(psSysData->registers));
apollo_disable(psSysData->pdev->dev.parent);
OSFreeMem(psSysData);
}
PVRSRV_ERROR SysDebugInfo(PVRSRV_DEVICE_CONFIG *psDevConfig,
DUMPDEBUG_PRINTF_FUNC *pfnDumpDebugPrintf,
void *pvDumpDebugFile)
{
#if defined(TC_APOLLO_TCF5)
PVR_UNREFERENCED_PARAMETER(psDevConfig);
PVR_UNREFERENCED_PARAMETER(pfnDumpDebugPrintf);
return PVRSRV_OK;
#else
SYS_DATA *psSysData = psDevConfig->hSysData;
PVRSRV_ERROR eError = PVRSRV_OK;
u32 tmp = 0;
u32 pll;
PVR_DUMPDEBUG_LOG("------[ rgx_tc system debug ]------");
if (apollo_sys_info(psSysData->pdev->dev.parent, &tmp, &pll))
goto err_out;
if (tmp > 0)
PVR_DUMPDEBUG_LOG("Chip temperature: %d degrees C", tmp);
PVR_DUMPDEBUG_LOG("PLL status: %x", pll);
err_out:
return eError;
#endif
}
typedef struct
{
struct device *psDev;
int iInterruptID;
void *pvData;
SYS_PFN_LISR pfnLISR;
} LISR_DATA;
static void ApolloInterruptHandler(void* pvData)
{
LISR_DATA *psLISRData = pvData;
psLISRData->pfnLISR(psLISRData->pvData);
}
PVRSRV_ERROR SysInstallDeviceLISR(IMG_HANDLE hSysData,
IMG_UINT32 ui32IRQ,
const IMG_CHAR *pszName,
SYS_PFN_LISR pfnLISR,
void *pvData,
IMG_HANDLE *phLISRData)
{
SYS_DATA *psSysData = (SYS_DATA *)hSysData;
LISR_DATA *psLISRData;
PVRSRV_ERROR eError;
int err;
if (ui32IRQ != APOLLO_INTERRUPT_EXT)
{
PVR_DPF((PVR_DBG_ERROR, "%s: No device matching IRQ %d", __func__, ui32IRQ));
return PVRSRV_ERROR_UNABLE_TO_INSTALL_ISR;
}
psLISRData = OSAllocZMem(sizeof(*psLISRData));
if (!psLISRData)
{
eError = PVRSRV_ERROR_OUT_OF_MEMORY;
goto err_out;
}
psLISRData->pfnLISR = pfnLISR;
psLISRData->pvData = pvData;
psLISRData->iInterruptID = ui32IRQ;
psLISRData->psDev = psSysData->pdev->dev.parent;
err = apollo_set_interrupt_handler(psLISRData->psDev, psLISRData->iInterruptID, ApolloInterruptHandler, psLISRData);
if (err)
{
PVR_DPF((PVR_DBG_ERROR, "%s: apollo_set_interrupt_handler() failed (%d)", __func__, err));
eError = PVRSRV_ERROR_UNABLE_TO_INSTALL_ISR;
goto err_free_data;
}
err = apollo_enable_interrupt(psLISRData->psDev, psLISRData->iInterruptID);
if (err)
{
PVR_DPF((PVR_DBG_ERROR, "%s: apollo_enable_interrupt() failed (%d)", __func__, err));
eError = PVRSRV_ERROR_UNABLE_TO_INSTALL_ISR;
goto err_unset_interrupt_handler;
}
*phLISRData = psLISRData;
eError = PVRSRV_OK;
PVR_TRACE(("Installed device LISR %pf to irq %u", pfnLISR, ui32IRQ));
err_out:
return eError;
err_unset_interrupt_handler:
apollo_set_interrupt_handler(psLISRData->psDev, psLISRData->iInterruptID, NULL, NULL);
err_free_data:
OSFreeMem(psLISRData);
goto err_out;
}
PVRSRV_ERROR SysUninstallDeviceLISR(IMG_HANDLE hLISRData)
{
LISR_DATA *psLISRData = (LISR_DATA *) hLISRData;
int err;
err = apollo_disable_interrupt(psLISRData->psDev, psLISRData->iInterruptID);
if (err)
{
PVR_DPF((PVR_DBG_ERROR, "%s: apollo_enable_interrupt() failed (%d)", __func__, err));
}
err = apollo_set_interrupt_handler(psLISRData->psDev, psLISRData->iInterruptID, NULL, NULL);
if (err)
{
PVR_DPF((PVR_DBG_ERROR, "%s: apollo_set_interrupt_handler() failed (%d)", __func__, err));
}
PVR_TRACE(("Uninstalled device LISR %pf from irq %u", psLISRData->pfnLISR, psLISRData->iInterruptID));
OSFreeMem(psLISRData);
return PVRSRV_OK;
}

60
drivers/staging/imgtec/apollo/sysinfo.h
View File

@ -1,60 +0,0 @@
/*************************************************************************/ /*!
@File
@Title System Description Header
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description This header provides system-specific declarations and macros
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#if !defined(__SYSINFO_H__)
#define __SYSINFO_H__
/*!< System specific poll/timeout details */
#if defined (VIRTUAL_PLATFORM)
#define MAX_HW_TIME_US (240000000)
#define DEVICES_WATCHDOG_POWER_ON_SLEEP_TIMEOUT (120000)
#else
#define MAX_HW_TIME_US (500000)
#define DEVICES_WATCHDOG_POWER_ON_SLEEP_TIMEOUT (10000)
#endif
#define DEVICES_WATCHDOG_POWER_OFF_SLEEP_TIMEOUT (3600000)
#define WAIT_TRY_COUNT (10000)
#define SYS_RGX_DEV_NAME "apollo_rogue"
#endif /* !defined(__SYSINFO_H__) */

808
drivers/staging/imgtec/apollo/tcf_clk_ctrl.h
View File

@ -1,808 +0,0 @@
/*************************************************************************/ /*!
@Title Test Chip Framework system control register definitions
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Autogenerated C -- do not edit
Generated from: tcf_clk_ctrl.def
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#if !defined(_TCF_CLK_CTRL_H_)
#define _TCF_CLK_CTRL_H_
/*
Register FPGA_ID_REG
*/
#define TCF_CLK_CTRL_FPGA_ID_REG 0x0000
#define FPGA_ID_REG_CORE_CFG_MASK 0x0000FFFFU
#define FPGA_ID_REG_CORE_CFG_SHIFT 0
#define FPGA_ID_REG_CORE_CFG_SIGNED 0
#define FPGA_ID_REG_CORE_ID_MASK 0xFFFF0000U
#define FPGA_ID_REG_CORE_ID_SHIFT 16
#define FPGA_ID_REG_CORE_ID_SIGNED 0
/*
Register FPGA_REV_REG
*/
#define TCF_CLK_CTRL_FPGA_REV_REG 0x0008
#define FPGA_REV_REG_MAINT_MASK 0x000000FFU
#define FPGA_REV_REG_MAINT_SHIFT 0
#define FPGA_REV_REG_MAINT_SIGNED 0
#define FPGA_REV_REG_MINOR_MASK 0x0000FF00U
#define FPGA_REV_REG_MINOR_SHIFT 8
#define FPGA_REV_REG_MINOR_SIGNED 0
#define FPGA_REV_REG_MAJOR_MASK 0x00FF0000U
#define FPGA_REV_REG_MAJOR_SHIFT 16
#define FPGA_REV_REG_MAJOR_SIGNED 0
#define FPGA_REV_REG_DESIGNER_MASK 0xFF000000U
#define FPGA_REV_REG_DESIGNER_SHIFT 24
#define FPGA_REV_REG_DESIGNER_SIGNED 0
/*
Register FPGA_DES_REV_1
*/
#define TCF_CLK_CTRL_FPGA_DES_REV_1 0x0010
#define FPGA_DES_REV_1_MASK 0xFFFFFFFFU
#define FPGA_DES_REV_1_SHIFT 0
#define FPGA_DES_REV_1_SIGNED 0
/*
Register FPGA_DES_REV_2
*/
#define TCF_CLK_CTRL_FPGA_DES_REV_2 0x0018
#define FPGA_DES_REV_2_MASK 0xFFFFFFFFU
#define FPGA_DES_REV_2_SHIFT 0
#define FPGA_DES_REV_2_SIGNED 0
/*
Register TCF_CORE_ID_REG
*/
#define TCF_CLK_CTRL_TCF_CORE_ID_REG 0x0020
#define TCF_CORE_ID_REG_CORE_CFG_MASK 0x0000FFFFU
#define TCF_CORE_ID_REG_CORE_CFG_SHIFT 0
#define TCF_CORE_ID_REG_CORE_CFG_SIGNED 0
#define TCF_CORE_ID_REG_CORE_ID_MASK 0xFFFF0000U
#define TCF_CORE_ID_REG_CORE_ID_SHIFT 16
#define TCF_CORE_ID_REG_CORE_ID_SIGNED 0
/*
Register TCF_CORE_REV_REG
*/
#define TCF_CLK_CTRL_TCF_CORE_REV_REG 0x0028
#define TCF_CORE_REV_REG_MAINT_MASK 0x000000FFU
#define TCF_CORE_REV_REG_MAINT_SHIFT 0
#define TCF_CORE_REV_REG_MAINT_SIGNED 0
#define TCF_CORE_REV_REG_MINOR_MASK 0x0000FF00U
#define TCF_CORE_REV_REG_MINOR_SHIFT 8
#define TCF_CORE_REV_REG_MINOR_SIGNED 0
#define TCF_CORE_REV_REG_MAJOR_MASK 0x00FF0000U
#define TCF_CORE_REV_REG_MAJOR_SHIFT 16
#define TCF_CORE_REV_REG_MAJOR_SIGNED 0
#define TCF_CORE_REV_REG_DESIGNER_MASK 0xFF000000U
#define TCF_CORE_REV_REG_DESIGNER_SHIFT 24
#define TCF_CORE_REV_REG_DESIGNER_SIGNED 0
/*
Register TCF_CORE_DES_REV_1
*/
#define TCF_CLK_CTRL_TCF_CORE_DES_REV_1 0x0030
#define TCF_CORE_DES_REV_1_MASK 0xFFFFFFFFU
#define TCF_CORE_DES_REV_1_SHIFT 0
#define TCF_CORE_DES_REV_1_SIGNED 0
/*
Register TCF_CORE_DES_REV_2
*/
#define TCF_CLK_CTRL_TCF_CORE_DES_REV_2 0x0038
#define TCF_CORE_DES_REV_2_MASK 0xFFFFFFFFU
#define TCF_CORE_DES_REV_2_SHIFT 0
#define TCF_CORE_DES_REV_2_SIGNED 0
/*
Register SCB_GENERAL_CONTROL
*/
#define TCF_CLK_CTRL_SCB_GENERAL_CONTROL 0x0040
#define SCB_GC_TRANS_HALT_MASK 0x00000200U
#define SCB_GC_TRANS_HALT_SHIFT 9
#define SCB_GC_TRANS_HALT_SIGNED 0
#define SCB_GC_CKD_REGS_MASK 0x00000100U
#define SCB_GC_CKD_REGS_SHIFT 8
#define SCB_GC_CKD_REGS_SIGNED 0
#define SCB_GC_CKD_SLAVE_MASK 0x00000080U
#define SCB_GC_CKD_SLAVE_SHIFT 7
#define SCB_GC_CKD_SLAVE_SIGNED 0
#define SCB_GC_CKD_MASTER_MASK 0x00000040U
#define SCB_GC_CKD_MASTER_SHIFT 6
#define SCB_GC_CKD_MASTER_SIGNED 0
#define SCB_GC_CKD_XDATA_MASK 0x00000020U
#define SCB_GC_CKD_XDATA_SHIFT 5
#define SCB_GC_CKD_XDATA_SIGNED 0
#define SCB_GC_SFR_REG_MASK 0x00000010U
#define SCB_GC_SFR_REG_SHIFT 4
#define SCB_GC_SFR_REG_SIGNED 0
#define SCB_GC_SFR_SLAVE_MASK 0x00000008U
#define SCB_GC_SFR_SLAVE_SHIFT 3
#define SCB_GC_SFR_SLAVE_SIGNED 0
#define SCB_GC_SFR_MASTER_MASK 0x00000004U
#define SCB_GC_SFR_MASTER_SHIFT 2
#define SCB_GC_SFR_MASTER_SIGNED 0
#define SCB_GC_SFR_DET_DATA_MASK 0x00000002U
#define SCB_GC_SFR_DET_DATA_SHIFT 1
#define SCB_GC_SFR_DET_DATA_SIGNED 0
#define SCB_GC_SFR_GEN_DATA_MASK 0x00000001U
#define SCB_GC_SFR_GEN_DATA_SHIFT 0
#define SCB_GC_SFR_GEN_DATA_SIGNED 0
/*
Register SCB_MASTER_READ_COUNT
*/
#define TCF_CLK_CTRL_SCB_MASTER_READ_COUNT 0x0048
#define MASTER_READ_COUNT_MASK 0x0000FFFFU
#define MASTER_READ_COUNT_SHIFT 0
#define MASTER_READ_COUNT_SIGNED 0
/*
Register SCB_MASTER_READ_DATA
*/
#define TCF_CLK_CTRL_SCB_MASTER_READ_DATA 0x0050
#define MASTER_READ_DATA_MASK 0x000000FFU
#define MASTER_READ_DATA_SHIFT 0
#define MASTER_READ_DATA_SIGNED 0
/*
Register SCB_MASTER_ADDRESS
*/
#define TCF_CLK_CTRL_SCB_MASTER_ADDRESS 0x0058
#define SCB_MASTER_ADDRESS_MASK 0x000003FFU
#define SCB_MASTER_ADDRESS_SHIFT 0
#define SCB_MASTER_ADDRESS_SIGNED 0
/*
Register SCB_MASTER_WRITE_DATA
*/
#define TCF_CLK_CTRL_SCB_MASTER_WRITE_DATA 0x0060
#define MASTER_WRITE_DATA_MASK 0x000000FFU
#define MASTER_WRITE_DATA_SHIFT 0
#define MASTER_WRITE_DATA_SIGNED 0
/*
Register SCB_MASTER_WRITE_COUNT
*/
#define TCF_CLK_CTRL_SCB_MASTER_WRITE_COUNT 0x0068
#define MASTER_WRITE_COUNT_MASK 0x0000FFFFU
#define MASTER_WRITE_COUNT_SHIFT 0
#define MASTER_WRITE_COUNT_SIGNED 0
/*
Register SCB_BUS_SELECT
*/
#define TCF_CLK_CTRL_SCB_BUS_SELECT 0x0070
#define BUS_SELECT_MASK 0x00000003U
#define BUS_SELECT_SHIFT 0
#define BUS_SELECT_SIGNED 0
/*
Register SCB_MASTER_FILL_STATUS
*/
#define TCF_CLK_CTRL_SCB_MASTER_FILL_STATUS 0x0078
#define MASTER_WRITE_FIFO_EMPTY_MASK 0x00000008U
#define MASTER_WRITE_FIFO_EMPTY_SHIFT 3
#define MASTER_WRITE_FIFO_EMPTY_SIGNED 0
#define MASTER_WRITE_FIFO_FULL_MASK 0x00000004U
#define MASTER_WRITE_FIFO_FULL_SHIFT 2
#define MASTER_WRITE_FIFO_FULL_SIGNED 0
#define MASTER_READ_FIFO_EMPTY_MASK 0x00000002U
#define MASTER_READ_FIFO_EMPTY_SHIFT 1
#define MASTER_READ_FIFO_EMPTY_SIGNED 0
#define MASTER_READ_FIFO_FULL_MASK 0x00000001U
#define MASTER_READ_FIFO_FULL_SHIFT 0
#define MASTER_READ_FIFO_FULL_SIGNED 0
/*
Register CLK_AND_RST_CTRL
*/
#define TCF_CLK_CTRL_CLK_AND_RST_CTRL 0x0080
#define GLB_CLKG_EN_MASK 0x00020000U
#define GLB_CLKG_EN_SHIFT 17
#define GLB_CLKG_EN_SIGNED 0
#define CLK_GATE_CNTL_MASK 0x00010000U
#define CLK_GATE_CNTL_SHIFT 16
#define CLK_GATE_CNTL_SIGNED 0
#define DUT_DCM_RESETN_MASK 0x00000400U
#define DUT_DCM_RESETN_SHIFT 10
#define DUT_DCM_RESETN_SIGNED 0
#define MEM_RESYNC_BYPASS_MASK 0x00000200U
#define MEM_RESYNC_BYPASS_SHIFT 9
#define MEM_RESYNC_BYPASS_SIGNED 0
#define SYS_RESYNC_BYPASS_MASK 0x00000100U
#define SYS_RESYNC_BYPASS_SHIFT 8
#define SYS_RESYNC_BYPASS_SIGNED 0
#define SCB_RESETN_MASK 0x00000010U
#define SCB_RESETN_SHIFT 4
#define SCB_RESETN_SIGNED 0
#define PDP2_RESETN_MASK 0x00000008U
#define PDP2_RESETN_SHIFT 3
#define PDP2_RESETN_SIGNED 0
#define PDP1_RESETN_MASK 0x00000004U
#define PDP1_RESETN_SHIFT 2
#define PDP1_RESETN_SIGNED 0
#define DDR_RESETN_MASK 0x00000002U
#define DDR_RESETN_SHIFT 1
#define DDR_RESETN_SIGNED 0
#define DUT_RESETN_MASK 0x00000001U
#define DUT_RESETN_SHIFT 0
#define DUT_RESETN_SIGNED 0
/*
Register TEST_REG_OUT
*/
#define TCF_CLK_CTRL_TEST_REG_OUT 0x0088
#define TEST_REG_OUT_MASK 0xFFFFFFFFU
#define TEST_REG_OUT_SHIFT 0
#define TEST_REG_OUT_SIGNED 0
/*
Register TEST_REG_IN
*/
#define TCF_CLK_CTRL_TEST_REG_IN 0x0090
#define TEST_REG_IN_MASK 0xFFFFFFFFU
#define TEST_REG_IN_SHIFT 0
#define TEST_REG_IN_SIGNED 0
/*
Register TEST_CTRL
*/
#define TCF_CLK_CTRL_TEST_CTRL 0x0098
#define PCI_TEST_OFFSET_MASK 0xF8000000U
#define PCI_TEST_OFFSET_SHIFT 27
#define PCI_TEST_OFFSET_SIGNED 0
#define HOST_PHY_MODE_MASK 0x00000100U
#define HOST_PHY_MODE_SHIFT 8
#define HOST_PHY_MODE_SIGNED 0
#define HOST_ONLY_MODE_MASK 0x00000080U
#define HOST_ONLY_MODE_SHIFT 7
#define HOST_ONLY_MODE_SIGNED 0
#define PCI_TEST_MODE_MASK 0x00000040U
#define PCI_TEST_MODE_SHIFT 6
#define PCI_TEST_MODE_SIGNED 0
#define TURN_OFF_DDR_MASK 0x00000020U
#define TURN_OFF_DDR_SHIFT 5
#define TURN_OFF_DDR_SIGNED 0
#define SYS_RD_CLK_INV_MASK 0x00000010U
#define SYS_RD_CLK_INV_SHIFT 4
#define SYS_RD_CLK_INV_SIGNED 0
#define MEM_REQ_CLK_INV_MASK 0x00000008U
#define MEM_REQ_CLK_INV_SHIFT 3
#define MEM_REQ_CLK_INV_SIGNED 0
#define BURST_SPLIT_MASK 0x00000004U
#define BURST_SPLIT_SHIFT 2
#define BURST_SPLIT_SIGNED 0
#define CLK_INVERSION_MASK 0x00000002U
#define CLK_INVERSION_SHIFT 1
#define CLK_INVERSION_SIGNED 0
#define ADDRESS_FORCE_MASK 0x00000001U
#define ADDRESS_FORCE_SHIFT 0
#define ADDRESS_FORCE_SIGNED 0
/*
Register CLEAR_HOST_MEM_SIG
*/
#define TCF_CLK_CTRL_CLEAR_HOST_MEM_SIG 0x00A0
#define SIGNATURE_TAG_ID_MASK 0x00000F00U
#define SIGNATURE_TAG_ID_SHIFT 8
#define SIGNATURE_TAG_ID_SIGNED 0
#define CLEAR_HOST_MEM_SIGNATURE_MASK 0x00000001U
#define CLEAR_HOST_MEM_SIGNATURE_SHIFT 0
#define CLEAR_HOST_MEM_SIGNATURE_SIGNED 0
/*
Register HOST_MEM_SIGNATURE
*/
#define TCF_CLK_CTRL_HOST_MEM_SIGNATURE 0x00A8
#define HOST_MEM_SIGNATURE_MASK 0xFFFFFFFFU
#define HOST_MEM_SIGNATURE_SHIFT 0
#define HOST_MEM_SIGNATURE_SIGNED 0
/*
Register INTERRUPT_STATUS
*/
#define TCF_CLK_CTRL_INTERRUPT_STATUS 0x00C8
#define INTERRUPT_MASTER_STATUS_MASK 0x80000000U
#define INTERRUPT_MASTER_STATUS_SHIFT 31
#define INTERRUPT_MASTER_STATUS_SIGNED 0
#define OTHER_INTS_MASK 0x7FFE0000U
#define OTHER_INTS_SHIFT 17
#define OTHER_INTS_SIGNED 0
#define HOST_MST_NORESPONSE_MASK 0x00010000U
#define HOST_MST_NORESPONSE_SHIFT 16
#define HOST_MST_NORESPONSE_SIGNED 0
#define PDP2_INT_MASK 0x00008000U
#define PDP2_INT_SHIFT 15
#define PDP2_INT_SIGNED 0
#define PDP1_INT_MASK 0x00004000U
#define PDP1_INT_SHIFT 14
#define PDP1_INT_SIGNED 0
#define EXT_INT_MASK 0x00002000U
#define EXT_INT_SHIFT 13
#define EXT_INT_SIGNED 0
#define SCB_MST_HLT_BIT_MASK 0x00001000U
#define SCB_MST_HLT_BIT_SHIFT 12
#define SCB_MST_HLT_BIT_SIGNED 0
#define SCB_SLV_EVENT_MASK 0x00000800U
#define SCB_SLV_EVENT_SHIFT 11
#define SCB_SLV_EVENT_SIGNED 0
#define SCB_TDONE_RX_MASK 0x00000400U
#define SCB_TDONE_RX_SHIFT 10
#define SCB_TDONE_RX_SIGNED 0
#define SCB_SLV_WT_RD_DAT_MASK 0x00000200U
#define SCB_SLV_WT_RD_DAT_SHIFT 9
#define SCB_SLV_WT_RD_DAT_SIGNED 0
#define SCB_SLV_WT_PRV_RD_MASK 0x00000100U
#define SCB_SLV_WT_PRV_RD_SHIFT 8
#define SCB_SLV_WT_PRV_RD_SIGNED 0
#define SCB_SLV_WT_WR_DAT_MASK 0x00000080U
#define SCB_SLV_WT_WR_DAT_SHIFT 7
#define SCB_SLV_WT_WR_DAT_SIGNED 0
#define SCB_MST_WT_RD_DAT_MASK 0x00000040U
#define SCB_MST_WT_RD_DAT_SHIFT 6
#define SCB_MST_WT_RD_DAT_SIGNED 0
#define SCB_ADD_ACK_ERR_MASK 0x00000020U
#define SCB_ADD_ACK_ERR_SHIFT 5
#define SCB_ADD_ACK_ERR_SIGNED 0
#define SCB_WR_ACK_ERR_MASK 0x00000010U
#define SCB_WR_ACK_ERR_SHIFT 4
#define SCB_WR_ACK_ERR_SIGNED 0
#define SCB_SDAT_LO_TIM_MASK 0x00000008U
#define SCB_SDAT_LO_TIM_SHIFT 3
#define SCB_SDAT_LO_TIM_SIGNED 0
#define SCB_SCLK_LO_TIM_MASK 0x00000004U
#define SCB_SCLK_LO_TIM_SHIFT 2
#define SCB_SCLK_LO_TIM_SIGNED 0
#define SCB_UNEX_START_BIT_MASK 0x00000002U
#define SCB_UNEX_START_BIT_SHIFT 1
#define SCB_UNEX_START_BIT_SIGNED 0
#define SCB_BUS_INACTIVE_MASK 0x00000001U
#define SCB_BUS_INACTIVE_SHIFT 0
#define SCB_BUS_INACTIVE_SIGNED 0
/*
Register INTERRUPT_OP_CFG
*/
#define TCF_CLK_CTRL_INTERRUPT_OP_CFG 0x00D0
#define PULSE_NLEVEL_MASK 0x80000000U
#define PULSE_NLEVEL_SHIFT 31
#define PULSE_NLEVEL_SIGNED 0
#define INT_SENSE_MASK 0x40000000U
#define INT_SENSE_SHIFT 30
#define INT_SENSE_SIGNED 0
#define INTERRUPT_DEST_MASK 0x0000000FU
#define INTERRUPT_DEST_SHIFT 0
#define INTERRUPT_DEST_SIGNED 0
/*
Register INTERRUPT_ENABLE
*/
#define TCF_CLK_CTRL_INTERRUPT_ENABLE 0x00D8
#define INTERRUPT_MASTER_ENABLE_MASK 0x80000000U
#define INTERRUPT_MASTER_ENABLE_SHIFT 31
#define INTERRUPT_MASTER_ENABLE_SIGNED 0
#define INTERRUPT_ENABLE_MASK 0x7FFFFFFFU
#define INTERRUPT_ENABLE_SHIFT 0
#define INTERRUPT_ENABLE_SIGNED 0
/*
Register INTERRUPT_CLEAR
*/
#define TCF_CLK_CTRL_INTERRUPT_CLEAR 0x00E0
#define INTERRUPT_MASTER_CLEAR_MASK 0x80000000U
#define INTERRUPT_MASTER_CLEAR_SHIFT 31
#define INTERRUPT_MASTER_CLEAR_SIGNED 0
#define INTERRUPT_CLEAR_MASK 0x7FFFFFFFU
#define INTERRUPT_CLEAR_SHIFT 0
#define INTERRUPT_CLEAR_SIGNED 0
/*
Register YCC_RGB_CTRL
*/
#define TCF_CLK_CTRL_YCC_RGB_CTRL 0x00E8
#define RGB_CTRL1_MASK 0x000001FFU
#define RGB_CTRL1_SHIFT 0
#define RGB_CTRL1_SIGNED 0
#define RGB_CTRL2_MASK 0x01FF0000U
#define RGB_CTRL2_SHIFT 16
#define RGB_CTRL2_SIGNED 0
/*
Register EXP_BRD_CTRL
*/
#define TCF_CLK_CTRL_EXP_BRD_CTRL 0x00F8
#define PDP1_DATA_EN_MASK 0x00000003U
#define PDP1_DATA_EN_SHIFT 0
#define PDP1_DATA_EN_SIGNED 0
#define PDP2_DATA_EN_MASK 0x00000030U
#define PDP2_DATA_EN_SHIFT 4
#define PDP2_DATA_EN_SIGNED 0
#define EXP_BRD_OUTPUT_MASK 0xFFFFFF00U
#define EXP_BRD_OUTPUT_SHIFT 8
#define EXP_BRD_OUTPUT_SIGNED 0
/*
Register HOSTIF_CONTROL
*/
#define TCF_CLK_CTRL_HOSTIF_CONTROL 0x0100
#define HOSTIF_CTRL_MASK 0x000000FFU
#define HOSTIF_CTRL_SHIFT 0
#define HOSTIF_CTRL_SIGNED 0
/*
Register DUT_CONTROL_1
*/
#define TCF_CLK_CTRL_DUT_CONTROL_1 0x0108
#define DUT_CTRL_1_MASK 0xFFFFFFFFU
#define DUT_CTRL_1_SHIFT 0
#define DUT_CTRL_1_SIGNED 0
/* TC ES2 additional needs those: */
#define DUT_CTRL_TEST_MODE_SHIFT 0
#define DUT_CTRL_TEST_MODE_MASK 0x3
#define DUT_CTRL_VCC_0V9EN (1<<12)
#define DUT_CTRL_VCC_1V8EN (1<<13)
#define DUT_CTRL_VCC_IO_INH (1<<14)
#define DUT_CTRL_VCC_CORE_INH (1<<15)
/*
Register DUT_STATUS_1
*/
#define TCF_CLK_CTRL_DUT_STATUS_1 0x0110
#define DUT_STATUS_1_MASK 0xFFFFFFFFU
#define DUT_STATUS_1_SHIFT 0
#define DUT_STATUS_1_SIGNED 0
/*
Register DUT_CTRL_NOT_STAT_1
*/
#define TCF_CLK_CTRL_DUT_CTRL_NOT_STAT_1 0x0118
#define DUT_STAT_NOT_CTRL_1_MASK 0xFFFFFFFFU
#define DUT_STAT_NOT_CTRL_1_SHIFT 0
#define DUT_STAT_NOT_CTRL_1_SIGNED 0
/*
Register DUT_CONTROL_2
*/
#define TCF_CLK_CTRL_DUT_CONTROL_2 0x0120
#define DUT_CTRL_2_MASK 0xFFFFFFFFU
#define DUT_CTRL_2_SHIFT 0
#define DUT_CTRL_2_SIGNED 0
/*
Register DUT_STATUS_2
*/
#define TCF_CLK_CTRL_DUT_STATUS_2 0x0128
#define DUT_STATUS_2_MASK 0xFFFFFFFFU
#define DUT_STATUS_2_SHIFT 0
#define DUT_STATUS_2_SIGNED 0
/*
Register DUT_CTRL_NOT_STAT_2
*/
#define TCF_CLK_CTRL_DUT_CTRL_NOT_STAT_2 0x0130
#define DUT_CTRL_NOT_STAT_2_MASK 0xFFFFFFFFU
#define DUT_CTRL_NOT_STAT_2_SHIFT 0
#define DUT_CTRL_NOT_STAT_2_SIGNED 0
/*
Register BUS_CAP_BASE_ADDR
*/
#define TCF_CLK_CTRL_BUS_CAP_BASE_ADDR 0x0138
#define BUS_CAP_BASE_ADDR_MASK 0xFFFFFFFFU
#define BUS_CAP_BASE_ADDR_SHIFT 0
#define BUS_CAP_BASE_ADDR_SIGNED 0
/*
Register BUS_CAP_ENABLE
*/
#define TCF_CLK_CTRL_BUS_CAP_ENABLE 0x0140
#define BUS_CAP_ENABLE_MASK 0x00000001U
#define BUS_CAP_ENABLE_SHIFT 0
#define BUS_CAP_ENABLE_SIGNED 0
/*
Register BUS_CAP_COUNT
*/
#define TCF_CLK_CTRL_BUS_CAP_COUNT 0x0148
#define BUS_CAP_COUNT_MASK 0xFFFFFFFFU
#define BUS_CAP_COUNT_SHIFT 0
#define BUS_CAP_COUNT_SIGNED 0
/*
Register DCM_LOCK_STATUS
*/
#define TCF_CLK_CTRL_DCM_LOCK_STATUS 0x0150
#define DCM_LOCK_STATUS_MASK 0x00000007U
#define DCM_LOCK_STATUS_SHIFT 0
#define DCM_LOCK_STATUS_SIGNED 0
/*
Register AUX_DUT_RESETNS
*/
#define TCF_CLK_CTRL_AUX_DUT_RESETNS 0x0158
#define AUX_DUT_RESETNS_MASK 0x0000000FU
#define AUX_DUT_RESETNS_SHIFT 0
#define AUX_DUT_RESETNS_SIGNED 0
/*
Register TCF_SPI_MST_ADDR_RDNWR
*/
#define TCF_CLK_CTRL_TCF_SPI_MST_ADDR_RDNWR 0x0160
#define TCF_SPI_MST_ADDR_MASK 0x00000FFFU
#define TCF_SPI_MST_ADDR_SHIFT 0
#define TCF_SPI_MST_ADDR_SIGNED 0
#define TCF_SPI_MST_RDNWR_MASK 0x00001000U
#define TCF_SPI_MST_RDNWR_SHIFT 12
#define TCF_SPI_MST_RDNWR_SIGNED 0
#define TCF_SPI_MST_SLAVE_ID_MASK 0x00010000U
#define TCF_SPI_MST_SLAVE_ID_SHIFT 16
#define TCF_SPI_MST_SLAVE_ID_SIGNED 0
/*
Register TCF_SPI_MST_WDATA
*/
#define TCF_CLK_CTRL_TCF_SPI_MST_WDATA 0x0168
#define TCF_SPI_MST_WDATA_MASK 0xFFFFFFFFU
#define TCF_SPI_MST_WDATA_SHIFT 0
#define TCF_SPI_MST_WDATA_SIGNED 0
/*
Register TCF_SPI_MST_RDATA
*/
#define TCF_CLK_CTRL_TCF_SPI_MST_RDATA 0x0170
#define TCF_SPI_MST_RDATA_MASK 0xFFFFFFFFU
#define TCF_SPI_MST_RDATA_SHIFT 0
#define TCF_SPI_MST_RDATA_SIGNED 0
/*
Register TCF_SPI_MST_STATUS
*/
#define TCF_CLK_CTRL_TCF_SPI_MST_STATUS 0x0178
#define TCF_SPI_MST_STATUS_MASK 0x0000000FU
#define TCF_SPI_MST_STATUS_SHIFT 0
#define TCF_SPI_MST_STATUS_SIGNED 0
/*
Register TCF_SPI_MST_GO
*/
#define TCF_CLK_CTRL_TCF_SPI_MST_GO 0x0180
#define TCF_SPI_MST_GO_MASK 0x00000001U
#define TCF_SPI_MST_GO_SHIFT 0
#define TCF_SPI_MST_GO_SIGNED 0
/*
Register EXT_SIG_CTRL
*/
#define TCF_CLK_CTRL_EXT_SIG_CTRL 0x0188
#define EXT_SYS_REQ_SIG_START_MASK 0x00000001U
#define EXT_SYS_REQ_SIG_START_SHIFT 0
#define EXT_SYS_REQ_SIG_START_SIGNED 0
#define EXT_SYS_RD_SIG_START_MASK 0x00000002U
#define EXT_SYS_RD_SIG_START_SHIFT 1
#define EXT_SYS_RD_SIG_START_SIGNED 0
#define EXT_MEM_REQ_SIG_START_MASK 0x00000004U
#define EXT_MEM_REQ_SIG_START_SHIFT 2
#define EXT_MEM_REQ_SIG_START_SIGNED 0
#define EXT_MEM_RD_SIG_START_MASK 0x00000008U
#define EXT_MEM_RD_SIG_START_SHIFT 3
#define EXT_MEM_RD_SIG_START_SIGNED 0
/*
Register EXT_SYS_REQ_SIG
*/
#define TCF_CLK_CTRL_EXT_SYS_REQ_SIG 0x0190
#define EXT_SYS_REQ_SIG_MASK 0xFFFFFFFFU
#define EXT_SYS_REQ_SIG_SHIFT 0
#define EXT_SYS_REQ_SIG_SIGNED 0
/*
Register EXT_SYS_RD_SIG
*/
#define TCF_CLK_CTRL_EXT_SYS_RD_SIG 0x0198
#define EXT_SYS_RD_SIG_MASK 0xFFFFFFFFU
#define EXT_SYS_RD_SIG_SHIFT 0
#define EXT_SYS_RD_SIG_SIGNED 0
/*
Register EXT_MEM_REQ_SIG
*/
#define TCF_CLK_CTRL_EXT_MEM_REQ_SIG 0x01A0
#define EXT_MEM_REQ_SIG_MASK 0xFFFFFFFFU
#define EXT_MEM_REQ_SIG_SHIFT 0
#define EXT_MEM_REQ_SIG_SIGNED 0
/*
Register EXT_MEM_RD_SIG
*/
#define TCF_CLK_CTRL_EXT_MEM_RD_SIG 0x01A8
#define EXT_MEM_RD_SIG_MASK 0xFFFFFFFFU
#define EXT_MEM_RD_SIG_SHIFT 0
#define EXT_MEM_RD_SIG_SIGNED 0
/*
Register EXT_SYS_REQ_WR_CNT
*/
#define TCF_CLK_CTRL_EXT_SYS_REQ_WR_CNT 0x01B0
#define EXT_SYS_REQ_WR_CNT_MASK 0xFFFFFFFFU
#define EXT_SYS_REQ_WR_CNT_SHIFT 0
#define EXT_SYS_REQ_WR_CNT_SIGNED 0
/*
Register EXT_SYS_REQ_RD_CNT
*/
#define TCF_CLK_CTRL_EXT_SYS_REQ_RD_CNT 0x01B8
#define EXT_SYS_REQ_RD_CNT_MASK 0xFFFFFFFFU
#define EXT_SYS_REQ_RD_CNT_SHIFT 0
#define EXT_SYS_REQ_RD_CNT_SIGNED 0
/*
Register EXT_SYS_RD_CNT
*/
#define TCF_CLK_CTRL_EXT_SYS_RD_CNT 0x01C0
#define EXT_SYS_RD_CNT_MASK 0xFFFFFFFFU
#define EXT_SYS_RD_CNT_SHIFT 0
#define EXT_SYS_RD_CNT_SIGNED 0
/*
Register EXT_MEM_REQ_WR_CNT
*/
#define TCF_CLK_CTRL_EXT_MEM_REQ_WR_CNT 0x01C8
#define EXT_MEM_REQ_WR_CNT_MASK 0xFFFFFFFFU
#define EXT_MEM_REQ_WR_CNT_SHIFT 0
#define EXT_MEM_REQ_WR_CNT_SIGNED 0
/*
Register EXT_MEM_REQ_RD_CNT
*/
#define TCF_CLK_CTRL_EXT_MEM_REQ_RD_CNT 0x01D0
#define EXT_MEM_REQ_RD_CNT_MASK 0xFFFFFFFFU
#define EXT_MEM_REQ_RD_CNT_SHIFT 0
#define EXT_MEM_REQ_RD_CNT_SIGNED 0
/*
Register EXT_MEM_RD_CNT
*/
#define TCF_CLK_CTRL_EXT_MEM_RD_CNT 0x01D8
#define EXT_MEM_RD_CNT_MASK 0xFFFFFFFFU
#define EXT_MEM_RD_CNT_SHIFT 0
#define EXT_MEM_RD_CNT_SIGNED 0
/*
Register TCF_CORE_TARGET_BUILD_CFG
*/
#define TCF_CLK_CTRL_TCF_CORE_TARGET_BUILD_CFG 0x01E0
#define TCF_CORE_TARGET_BUILD_ID_MASK 0x000000FFU
#define TCF_CORE_TARGET_BUILD_ID_SHIFT 0
#define TCF_CORE_TARGET_BUILD_ID_SIGNED 0
/*
Register MEM_THROUGH_SYS
*/
#define TCF_CLK_CTRL_MEM_THROUGH_SYS 0x01E8
#define MEM_THROUGH_SYS_MASK 0x00000001U
#define MEM_THROUGH_SYS_SHIFT 0
#define MEM_THROUGH_SYS_SIGNED 0
/*
Register HOST_PHY_OFFSET
*/
#define TCF_CLK_CTRL_HOST_PHY_OFFSET 0x01F0
#define HOST_PHY_OFFSET_MASK 0xFFFFFFFFU
#define HOST_PHY_OFFSET_SHIFT 0
#define HOST_PHY_OFFSET_SIGNED 0
#endif /* !defined(_TCF_CLK_CTRL_H_) */
/*****************************************************************************
End of file (tcf_clk_ctrl.h)
*****************************************************************************/

311
drivers/staging/imgtec/apollo/tcf_pll.h
View File

@ -1,311 +0,0 @@
/*************************************************************************/ /*!
@Title Test Chip Framework PDP register definitions
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Autogenerated C -- do not edit
Generated from tcf_pll.def
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#if !defined(_TCF_PLL_H_)
#define _TCF_PLL_H_
/*
Register PLL_DDR2_CLK0
*/
#define TCF_PLL_PLL_DDR2_CLK0 0x0000
#define DDR2_PLL_CLK0_PHS_MASK 0x00300000U
#define DDR2_PLL_CLK0_PHS_SHIFT 20
#define DDR2_PLL_CLK0_PHS_SIGNED 0
#define DDR2_PLL_CLK0_MS_MASK 0x00030000U
#define DDR2_PLL_CLK0_MS_SHIFT 16
#define DDR2_PLL_CLK0_MS_SIGNED 0
#define DDR2_PLL_CLK0_FREQ_MASK 0x000001FFU
#define DDR2_PLL_CLK0_FREQ_SHIFT 0
#define DDR2_PLL_CLK0_FREQ_SIGNED 0
/*
Register PLL_DDR2_CLK1TO5
*/
#define TCF_PLL_PLL_DDR2_CLK1TO5 0x0008
#define DDR2_PLL_CLK1TO5_PHS_MASK 0x3FF00000U
#define DDR2_PLL_CLK1TO5_PHS_SHIFT 20
#define DDR2_PLL_CLK1TO5_PHS_SIGNED 0
#define DDR2_PLL_CLK1TO5_MS_MASK 0x000FFC00U
#define DDR2_PLL_CLK1TO5_MS_SHIFT 10
#define DDR2_PLL_CLK1TO5_MS_SIGNED 0
#define DDR2_PLL_CLK1TO5_FREQ_MASK 0x000003FFU
#define DDR2_PLL_CLK1TO5_FREQ_SHIFT 0
#define DDR2_PLL_CLK1TO5_FREQ_SIGNED 0
/*
Register PLL_DDR2_DRP_GO
*/
#define TCF_PLL_PLL_DDR2_DRP_GO 0x0010
#define PLL_DDR2_DRP_GO_MASK 0x00000001U
#define PLL_DDR2_DRP_GO_SHIFT 0
#define PLL_DDR2_DRP_GO_SIGNED 0
/*
Register PLL_PDP_CLK0
*/
#define TCF_PLL_PLL_PDP_CLK0 0x0018
#define PDP_PLL_CLK0_PHS_MASK 0x00300000U
#define PDP_PLL_CLK0_PHS_SHIFT 20
#define PDP_PLL_CLK0_PHS_SIGNED 0
#define PDP_PLL_CLK0_MS_MASK 0x00030000U
#define PDP_PLL_CLK0_MS_SHIFT 16
#define PDP_PLL_CLK0_MS_SIGNED 0
#define PDP_PLL_CLK0_FREQ_MASK 0x000001FFU
#define PDP_PLL_CLK0_FREQ_SHIFT 0
#define PDP_PLL_CLK0_FREQ_SIGNED 0
/*
Register PLL_PDP_CLK1TO5
*/
#define TCF_PLL_PLL_PDP_CLK1TO5 0x0020
#define PDP_PLL_CLK1TO5_PHS_MASK 0x3FF00000U
#define PDP_PLL_CLK1TO5_PHS_SHIFT 20
#define PDP_PLL_CLK1TO5_PHS_SIGNED 0
#define PDP_PLL_CLK1TO5_MS_MASK 0x000FFC00U
#define PDP_PLL_CLK1TO5_MS_SHIFT 10
#define PDP_PLL_CLK1TO5_MS_SIGNED 0
#define PDP_PLL_CLK1TO5_FREQ_MASK 0x000003FFU
#define PDP_PLL_CLK1TO5_FREQ_SHIFT 0
#define PDP_PLL_CLK1TO5_FREQ_SIGNED 0
/*
Register PLL_PDP_DRP_GO
*/
#define TCF_PLL_PLL_PDP_DRP_GO 0x0028
#define PLL_PDP_DRP_GO_MASK 0x00000001U
#define PLL_PDP_DRP_GO_SHIFT 0
#define PLL_PDP_DRP_GO_SIGNED 0
/*
Register PLL_PDP2_CLK0
*/
#define TCF_PLL_PLL_PDP2_CLK0 0x0030
#define PDP2_PLL_CLK0_PHS_MASK 0x00300000U
#define PDP2_PLL_CLK0_PHS_SHIFT 20
#define PDP2_PLL_CLK0_PHS_SIGNED 0
#define PDP2_PLL_CLK0_MS_MASK 0x00030000U
#define PDP2_PLL_CLK0_MS_SHIFT 16
#define PDP2_PLL_CLK0_MS_SIGNED 0
#define PDP2_PLL_CLK0_FREQ_MASK 0x000001FFU
#define PDP2_PLL_CLK0_FREQ_SHIFT 0
#define PDP2_PLL_CLK0_FREQ_SIGNED 0
/*
Register PLL_PDP2_CLK1TO5
*/
#define TCF_PLL_PLL_PDP2_CLK1TO5 0x0038
#define PDP2_PLL_CLK1TO5_PHS_MASK 0x3FF00000U
#define PDP2_PLL_CLK1TO5_PHS_SHIFT 20
#define PDP2_PLL_CLK1TO5_PHS_SIGNED 0
#define PDP2_PLL_CLK1TO5_MS_MASK 0x000FFC00U
#define PDP2_PLL_CLK1TO5_MS_SHIFT 10
#define PDP2_PLL_CLK1TO5_MS_SIGNED 0
#define PDP2_PLL_CLK1TO5_FREQ_MASK 0x000003FFU
#define PDP2_PLL_CLK1TO5_FREQ_SHIFT 0
#define PDP2_PLL_CLK1TO5_FREQ_SIGNED 0
/*
Register PLL_PDP2_DRP_GO
*/
#define TCF_PLL_PLL_PDP2_DRP_GO 0x0040
#define PLL_PDP2_DRP_GO_MASK 0x00000001U
#define PLL_PDP2_DRP_GO_SHIFT 0
#define PLL_PDP2_DRP_GO_SIGNED 0
/*
Register PLL_CORE_CLK0
*/
#define TCF_PLL_PLL_CORE_CLK0 0x0048
#define CORE_PLL_CLK0_PHS_MASK 0x00300000U
#define CORE_PLL_CLK0_PHS_SHIFT 20
#define CORE_PLL_CLK0_PHS_SIGNED 0
#define CORE_PLL_CLK0_MS_MASK 0x00030000U
#define CORE_PLL_CLK0_MS_SHIFT 16
#define CORE_PLL_CLK0_MS_SIGNED 0
#define CORE_PLL_CLK0_FREQ_MASK 0x000001FFU
#define CORE_PLL_CLK0_FREQ_SHIFT 0
#define CORE_PLL_CLK0_FREQ_SIGNED 0
/*
Register PLL_CORE_CLK1TO5
*/
#define TCF_PLL_PLL_CORE_CLK1TO5 0x0050
#define CORE_PLL_CLK1TO5_PHS_MASK 0x3FF00000U
#define CORE_PLL_CLK1TO5_PHS_SHIFT 20
#define CORE_PLL_CLK1TO5_PHS_SIGNED 0
#define CORE_PLL_CLK1TO5_MS_MASK 0x000FFC00U
#define CORE_PLL_CLK1TO5_MS_SHIFT 10
#define CORE_PLL_CLK1TO5_MS_SIGNED 0
#define CORE_PLL_CLK1TO5_FREQ_MASK 0x000003FFU
#define CORE_PLL_CLK1TO5_FREQ_SHIFT 0
#define CORE_PLL_CLK1TO5_FREQ_SIGNED 0
/*
Register PLL_CORE_DRP_GO
*/
#define TCF_PLL_PLL_CORE_DRP_GO 0x0058
#define PLL_CORE_DRP_GO_MASK 0x00000001U
#define PLL_CORE_DRP_GO_SHIFT 0
#define PLL_CORE_DRP_GO_SIGNED 0
/*
Register PLL_SYSIF_CLK0
*/
#define TCF_PLL_PLL_SYSIF_CLK0 0x0060
#define SYSIF_PLL_CLK0_PHS_MASK 0x00300000U
#define SYSIF_PLL_CLK0_PHS_SHIFT 20
#define SYSIF_PLL_CLK0_PHS_SIGNED 0
#define SYSIF_PLL_CLK0_MS_MASK 0x00030000U
#define SYSIF_PLL_CLK0_MS_SHIFT 16
#define SYSIF_PLL_CLK0_MS_SIGNED 0
#define SYSIF_PLL_CLK0_FREQ_MASK 0x000001FFU
#define SYSIF_PLL_CLK0_FREQ_SHIFT 0
#define SYSIF_PLL_CLK0_FREQ_SIGNED 0
/*
Register PLL_SYSIF_CLK1TO5
*/
#define TCF_PLL_PLL_SYSIF_CLK1TO5 0x0068
#define SYSIF_PLL_CLK1TO5_PHS_MASK 0x3FF00000U
#define SYSIF_PLL_CLK1TO5_PHS_SHIFT 20
#define SYSIF_PLL_CLK1TO5_PHS_SIGNED 0
#define SYSIF_PLL_CLK1TO5_MS_MASK 0x000FFC00U
#define SYSIF_PLL_CLK1TO5_MS_SHIFT 10
#define SYSIF_PLL_CLK1TO5_MS_SIGNED 0
#define SYSIF_PLL_CLK1TO5_FREQ_MASK 0x000003FFU
#define SYSIF_PLL_CLK1TO5_FREQ_SHIFT 0
#define SYSIF_PLL_CLK1TO5_FREQ_SIGNED 0
/*
Register PLL_SYS_DRP_GO
*/
#define TCF_PLL_PLL_SYS_DRP_GO 0x0070
#define PLL_SYS_DRP_GO_MASK 0x00000001U
#define PLL_SYS_DRP_GO_SHIFT 0
#define PLL_SYS_DRP_GO_SIGNED 0
/*
Register PLL_MEMIF_CLK0
*/
#define TCF_PLL_PLL_MEMIF_CLK0 0x0078
#define MEMIF_PLL_CLK0_PHS_MASK 0x00300000U
#define MEMIF_PLL_CLK0_PHS_SHIFT 20
#define MEMIF_PLL_CLK0_PHS_SIGNED 0
#define MEMIF_PLL_CLK0_MS_MASK 0x00030000U
#define MEMIF_PLL_CLK0_MS_SHIFT 16
#define MEMIF_PLL_CLK0_MS_SIGNED 0
#define MEMIF_PLL_CLK0_FREQ_MASK 0x000001FFU
#define MEMIF_PLL_CLK0_FREQ_SHIFT 0
#define MEMIF_PLL_CLK0_FREQ_SIGNED 0
/*
Register PLL_MEMIF_CLK1TO5
*/
#define TCF_PLL_PLL_MEMIF_CLK1TO5 0x0080
#define MEMIF_PLL_CLK1TO5_PHS_MASK 0x3FF00000U
#define MEMIF_PLL_CLK1TO5_PHS_SHIFT 20
#define MEMIF_PLL_CLK1TO5_PHS_SIGNED 0
#define MEMIF_PLL_CLK1TO5_MS_MASK 0x000FFC00U
#define MEMIF_PLL_CLK1TO5_MS_SHIFT 10
#define MEMIF_PLL_CLK1TO5_MS_SIGNED 0
#define MEMIF_PLL_CLK1TO5_FREQ_MASK 0x000003FFU
#define MEMIF_PLL_CLK1TO5_FREQ_SHIFT 0
#define MEMIF_PLL_CLK1TO5_FREQ_SIGNED 0
/*
Register PLL_MEM_DRP_GO
*/
#define TCF_PLL_PLL_MEM_DRP_GO 0x0088
#define PLL_MEM_DRP_GO_MASK 0x00000001U
#define PLL_MEM_DRP_GO_SHIFT 0
#define PLL_MEM_DRP_GO_SIGNED 0
/*
Register PLL_ALL_DRP_GO
*/
#define TCF_PLL_PLL_ALL_DRP_GO 0x0090
#define PLL_ALL_DRP_GO_MASK 0x00000001U
#define PLL_ALL_DRP_GO_SHIFT 0
#define PLL_ALL_DRP_GO_SIGNED 0
/*
Register PLL_DRP_STATUS
*/
#define TCF_PLL_PLL_DRP_STATUS 0x0098
#define PLL_LOCKS_MASK 0x00003F00U
#define PLL_LOCKS_SHIFT 8
#define PLL_LOCKS_SIGNED 0
#define PLL_DRP_GOOD_MASK 0x0000003FU
#define PLL_DRP_GOOD_SHIFT 0
#define PLL_DRP_GOOD_SIGNED 0
#endif /* !defined(_TCF_PLL_H_) */
/*****************************************************************************
End of file (tcf_pll.h)
*****************************************************************************/

559
drivers/staging/imgtec/apollo/tcf_rgbpdp_regs.h
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@ -1,559 +0,0 @@
/*************************************************************************/ /*!
@Title Test Chip Framework PDP register definitions
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Autogenerated C -- do not edit
Generated from: tcf_rgbpdp_regs.def
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#if !defined(_TCF_RGBPDP_REGS_H_)
#define _TCF_RGBPDP_REGS_H_
/*
Register PVR_TCF_RGBPDP_STR1SURF
*/
#define TCF_RGBPDP_PVR_TCF_RGBPDP_STR1SURF 0x0000
#define STR1HEIGHT_MASK 0x000007FFU
#define STR1HEIGHT_SHIFT 0
#define STR1HEIGHT_SIGNED 0
#define STR1WIDTH_MASK 0x003FF800U
#define STR1WIDTH_SHIFT 11
#define STR1WIDTH_SIGNED 0
#define STR1PIXFMT_MASK 0x0F000000U
#define STR1PIXFMT_SHIFT 24
#define STR1PIXFMT_SIGNED 0
/*
Register PVR_TCF_RGBPDP_STR1ADDRCTRL
*/
#define TCF_RGBPDP_PVR_TCF_RGBPDP_STR1ADDRCTRL 0x0004
#define STR1BASE_MASK 0x03FFFFFFU
#define STR1BASE_SHIFT 0
#define STR1BASE_SIGNED 0
#define STR1INTFIELD_MASK 0x40000000U
#define STR1INTFIELD_SHIFT 30
#define STR1INTFIELD_SIGNED 0
#define STR1STREN_MASK 0x80000000U
#define STR1STREN_SHIFT 31
#define STR1STREN_SIGNED 0
/*
Register PVR_PDP_STR1POSN
*/
#define TCF_RGBPDP_PVR_PDP_STR1POSN 0x0008
#define STR1STRIDE_MASK 0x000003FFU
#define STR1STRIDE_SHIFT 0
#define STR1STRIDE_SIGNED 0
/*
Register PVR_TCF_RGBPDP_MEMCTRL
*/
#define TCF_RGBPDP_PVR_TCF_RGBPDP_MEMCTRL 0x000C
#define MEMREFRESH_MASK 0xC0000000U
#define MEMREFRESH_SHIFT 30
#define MEMREFRESH_SIGNED 0
/*
Register PVR_TCF_RGBPDP_STRCTRL
*/
#define TCF_RGBPDP_PVR_TCF_RGBPDP_STRCTRL 0x0010
#define BURSTLEN_GFX_MASK 0x000000FFU
#define BURSTLEN_GFX_SHIFT 0
#define BURSTLEN_GFX_SIGNED 0
#define THRESHOLD_GFX_MASK 0x0000FF00U
#define THRESHOLD_GFX_SHIFT 8
#define THRESHOLD_GFX_SIGNED 0
/*
Register PVR_TCF_RGBPDP_SYNCCTRL
*/
#define TCF_RGBPDP_PVR_TCF_RGBPDP_SYNCCTRL 0x0014
#define HSDIS_MASK 0x00000001U
#define HSDIS_SHIFT 0
#define HSDIS_SIGNED 0
#define HSPOL_MASK 0x00000002U
#define HSPOL_SHIFT 1
#define HSPOL_SIGNED 0
#define VSDIS_MASK 0x00000004U
#define VSDIS_SHIFT 2
#define VSDIS_SIGNED 0
#define VSPOL_MASK 0x00000008U
#define VSPOL_SHIFT 3
#define VSPOL_SIGNED 0
#define BLNKDIS_MASK 0x00000010U
#define BLNKDIS_SHIFT 4
#define BLNKDIS_SIGNED 0
#define BLNKPOL_MASK 0x00000020U
#define BLNKPOL_SHIFT 5
#define BLNKPOL_SIGNED 0
#define HS_SLAVE_MASK 0x00000040U
#define HS_SLAVE_SHIFT 6
#define HS_SLAVE_SIGNED 0
#define VS_SLAVE_MASK 0x00000080U
#define VS_SLAVE_SHIFT 7
#define VS_SLAVE_SIGNED 0
#define INTERLACE_MASK 0x00000100U
#define INTERLACE_SHIFT 8
#define INTERLACE_SIGNED 0
#define FIELDPOL_MASK 0x00000200U
#define FIELDPOL_SHIFT 9
#define FIELDPOL_SIGNED 0
#define CLKPOL_MASK 0x00000800U
#define CLKPOL_SHIFT 11
#define CLKPOL_SIGNED 0
#define CSYNC_EN_MASK 0x00001000U
#define CSYNC_EN_SHIFT 12
#define CSYNC_EN_SIGNED 0
#define FIELD_EN_MASK 0x00002000U
#define FIELD_EN_SHIFT 13
#define FIELD_EN_SIGNED 0
#define UPDWAIT_MASK 0x000F0000U
#define UPDWAIT_SHIFT 16
#define UPDWAIT_SIGNED 0
#define UPDCTRL_MASK 0x01000000U
#define UPDCTRL_SHIFT 24
#define UPDCTRL_SIGNED 0
#define UPDINTCTRL_MASK 0x02000000U
#define UPDINTCTRL_SHIFT 25
#define UPDINTCTRL_SIGNED 0
#define UPDSYNCTRL_MASK 0x04000000U
#define UPDSYNCTRL_SHIFT 26
#define UPDSYNCTRL_SIGNED 0
#define POWERDN_MASK 0x10000000U
#define POWERDN_SHIFT 28
#define POWERDN_SIGNED 0
#define DISP_RST_MASK 0x20000000U
#define DISP_RST_SHIFT 29
#define DISP_RST_SIGNED 0
#define SYNCACTIVE_MASK 0x80000000U
#define SYNCACTIVE_SHIFT 31
#define SYNCACTIVE_SIGNED 0
/*
Register PVR_TCF_RGBPDP_BORDCOL
*/
#define TCF_RGBPDP_PVR_TCF_RGBPDP_BORDCOL 0x0018
#define BORDCOL_MASK 0x00FFFFFFU
#define BORDCOL_SHIFT 0
#define BORDCOL_SIGNED 0
/*
Register PVR_TCF_RGBPDP_UPDCTRL
*/
#define TCF_RGBPDP_PVR_TCF_RGBPDP_UPDCTRL 0x001C
#define UPDFIELD_MASK 0x00000001U
#define UPDFIELD_SHIFT 0
#define UPDFIELD_SIGNED 0
/*
Register PVR_TCF_RGBPDP_HSYNC1
*/
#define TCF_RGBPDP_PVR_TCF_RGBPDP_HSYNC1 0x0020
#define HT_MASK 0x00000FFFU
#define HT_SHIFT 0
#define HT_SIGNED 0
#define HBPS_MASK 0x0FFF0000U
#define HBPS_SHIFT 16
#define HBPS_SIGNED 0
/*
Register PVR_TCF_RGBPDP_HSYNC2
*/
#define TCF_RGBPDP_PVR_TCF_RGBPDP_HSYNC2 0x0024
#define HLBS_MASK 0x00000FFFU
#define HLBS_SHIFT 0
#define HLBS_SIGNED 0
#define HAS_MASK 0x0FFF0000U
#define HAS_SHIFT 16
#define HAS_SIGNED 0
/*
Register PVR_TCF_RGBPDP_HSYNC3
*/
#define TCF_RGBPDP_PVR_TCF_RGBPDP_HSYNC3 0x0028
#define HRBS_MASK 0x00000FFFU
#define HRBS_SHIFT 0
#define HRBS_SIGNED 0
#define HFPS_MASK 0x0FFF0000U
#define HFPS_SHIFT 16
#define HFPS_SIGNED 0
/*
Register PVR_TCF_RGBPDP_VSYNC1
*/
#define TCF_RGBPDP_PVR_TCF_RGBPDP_VSYNC1 0x002C
#define VT_MASK 0x00000FFFU
#define VT_SHIFT 0
#define VT_SIGNED 0
#define VBPS_MASK 0x0FFF0000U
#define VBPS_SHIFT 16
#define VBPS_SIGNED 0
/*
Register PVR_TCF_RGBPDP_VSYNC2
*/
#define TCF_RGBPDP_PVR_TCF_RGBPDP_VSYNC2 0x0030
#define VTBS_MASK 0x00000FFFU
#define VTBS_SHIFT 0
#define VTBS_SIGNED 0
#define VAS_MASK 0x0FFF0000U
#define VAS_SHIFT 16
#define VAS_SIGNED 0
/*
Register PVR_TCF_RGBPDP_VSYNC3
*/
#define TCF_RGBPDP_PVR_TCF_RGBPDP_VSYNC3 0x0034
#define VBBS_MASK 0x00000FFFU
#define VBBS_SHIFT 0
#define VBBS_SIGNED 0
#define VFPS_MASK 0x0FFF0000U
#define VFPS_SHIFT 16
#define VFPS_SIGNED 0
/*
Register PVR_TCF_RGBPDP_HDECTRL
*/
#define TCF_RGBPDP_PVR_TCF_RGBPDP_HDECTRL 0x0038
#define HDEF_MASK 0x00000FFFU
#define HDEF_SHIFT 0
#define HDEF_SIGNED 0
#define HDES_MASK 0x0FFF0000U
#define HDES_SHIFT 16
#define HDES_SIGNED 0
/*
Register PVR_TCF_RGBPDP_VDECTRL
*/
#define TCF_RGBPDP_PVR_TCF_RGBPDP_VDECTRL 0x003C
#define VDEF_MASK 0x00000FFFU
#define VDEF_SHIFT 0
#define VDEF_SIGNED 0
#define VDES_MASK 0x0FFF0000U
#define VDES_SHIFT 16
#define VDES_SIGNED 0
/*
Register PVR_TCF_RGBPDP_VEVENT
*/
#define TCF_RGBPDP_PVR_TCF_RGBPDP_VEVENT 0x0040
#define VFETCH_MASK 0x00000FFFU
#define VFETCH_SHIFT 0
#define VFETCH_SIGNED 0
#define VEVENT_MASK 0x0FFF0000U
#define VEVENT_SHIFT 16
#define VEVENT_SIGNED 0
/*
Register PVR_TCF_RGBPDP_OPMASK
*/
#define TCF_RGBPDP_PVR_TCF_RGBPDP_OPMASK 0x0044
#define MASKR_MASK 0x000000FFU
#define MASKR_SHIFT 0
#define MASKR_SIGNED 0
#define MASKG_MASK 0x0000FF00U
#define MASKG_SHIFT 8
#define MASKG_SIGNED 0
#define MASKB_MASK 0x00FF0000U
#define MASKB_SHIFT 16
#define MASKB_SIGNED 0
#define BLANKLEVEL_MASK 0x40000000U
#define BLANKLEVEL_SHIFT 30
#define BLANKLEVEL_SIGNED 0
#define MASKLEVEL_MASK 0x80000000U
#define MASKLEVEL_SHIFT 31
#define MASKLEVEL_SIGNED 0
/*
Register PVR_TCF_RGBPDP_INTSTAT
*/
#define TCF_RGBPDP_PVR_TCF_RGBPDP_INTSTAT 0x0048
#define INTS_HBLNK0_MASK 0x00000001U
#define INTS_HBLNK0_SHIFT 0
#define INTS_HBLNK0_SIGNED 0
#define INTS_HBLNK1_MASK 0x00000002U
#define INTS_HBLNK1_SHIFT 1
#define INTS_HBLNK1_SIGNED 0
#define INTS_VBLNK0_MASK 0x00000004U
#define INTS_VBLNK0_SHIFT 2
#define INTS_VBLNK0_SIGNED 0
#define INTS_VBLNK1_MASK 0x00000008U
#define INTS_VBLNK1_SHIFT 3
#define INTS_VBLNK1_SIGNED 0
#define INTS_STR1URUN_MASK 0x00000010U
#define INTS_STR1URUN_SHIFT 4
#define INTS_STR1URUN_SIGNED 0
#define INTS_STR1ORUN_MASK 0x00000020U
#define INTS_STR1ORUN_SHIFT 5
#define INTS_STR1ORUN_SIGNED 0
#define INTS_DISPURUN_MASK 0x00000040U
#define INTS_DISPURUN_SHIFT 6
#define INTS_DISPURUN_SIGNED 0
/*
Register PVR_TCF_RGBPDP_INTENAB
*/
#define TCF_RGBPDP_PVR_TCF_RGBPDP_INTENAB 0x004C
#define INTEN_HBLNK0_MASK 0x00000001U
#define INTEN_HBLNK0_SHIFT 0
#define INTEN_HBLNK0_SIGNED 0
#define INTEN_HBLNK1_MASK 0x00000002U
#define INTEN_HBLNK1_SHIFT 1
#define INTEN_HBLNK1_SIGNED 0
#define INTEN_VBLNK0_MASK 0x00000004U
#define INTEN_VBLNK0_SHIFT 2
#define INTEN_VBLNK0_SIGNED 0
#define INTEN_VBLNK1_MASK 0x00000008U
#define INTEN_VBLNK1_SHIFT 3
#define INTEN_VBLNK1_SIGNED 0
#define INTEN_STR1URUN_MASK 0x00000010U
#define INTEN_STR1URUN_SHIFT 4
#define INTEN_STR1URUN_SIGNED 0
#define INTEN_STR1ORUN_MASK 0x00000020U
#define INTEN_STR1ORUN_SHIFT 5
#define INTEN_STR1ORUN_SIGNED 0
#define INTEN_DISPURUN_MASK 0x00000040U
#define INTEN_DISPURUN_SHIFT 6
#define INTEN_DISPURUN_SIGNED 0
/*
Register PVR_TCF_RGBPDP_INTCLEAR
*/
#define TCF_RGBPDP_PVR_TCF_RGBPDP_INTCLEAR 0x0050
#define INTCLR_HBLNK0_MASK 0x00000001U
#define INTCLR_HBLNK0_SHIFT 0
#define INTCLR_HBLNK0_SIGNED 0
#define INTCLR_HBLNK1_MASK 0x00000002U
#define INTCLR_HBLNK1_SHIFT 1
#define INTCLR_HBLNK1_SIGNED 0
#define INTCLR_VBLNK0_MASK 0x00000004U
#define INTCLR_VBLNK0_SHIFT 2
#define INTCLR_VBLNK0_SIGNED 0
#define INTCLR_VBLNK1_MASK 0x00000008U
#define INTCLR_VBLNK1_SHIFT 3
#define INTCLR_VBLNK1_SIGNED 0
#define INTCLR_STR1URUN_MASK 0x00000010U
#define INTCLR_STR1URUN_SHIFT 4
#define INTCLR_STR1URUN_SIGNED 0
#define INTCLR_STR1ORUN_MASK 0x00000020U
#define INTCLR_STR1ORUN_SHIFT 5
#define INTCLR_STR1ORUN_SIGNED 0
#define INTCLR_DISPURUN_MASK 0x00000040U
#define INTCLR_DISPURUN_SHIFT 6
#define INTCLR_DISPURUN_SIGNED 0
/*
Register PVR_TCF_RGBPDP_INTCTRL
*/
#define TCF_RGBPDP_PVR_TCF_RGBPDP_INTCTRL 0x0054
#define HBLNK_LINENO_MASK 0x00000FFFU
#define HBLNK_LINENO_SHIFT 0
#define HBLNK_LINENO_SIGNED 0
#define HBLNK_LINE_MASK 0x00010000U
#define HBLNK_LINE_SHIFT 16
#define HBLNK_LINE_SIGNED 0
/*
Register PVR_TCF_RGBPDP_SIGNAT
*/
#define TCF_RGBPDP_PVR_TCF_RGBPDP_SIGNAT 0x0058
#define SIGNATURE_MASK 0xFFFFFFFFU
#define SIGNATURE_SHIFT 0
#define SIGNATURE_SIGNED 0
/*
Register PVR_TCF_RGBPDP_LINESTAT
*/
#define TCF_RGBPDP_PVR_TCF_RGBPDP_LINESTAT 0x005C
#define LINENO_MASK 0x00000FFFU
#define LINENO_SHIFT 0
#define LINENO_SIGNED 0
/*
Register PVR_TCF_RGBPDP_DBGCTRL
*/
#define TCF_RGBPDP_PVR_TCF_RGBPDP_DBGCTRL 0x0060
#define DBG_ENAB_MASK 0x00000001U
#define DBG_ENAB_SHIFT 0
#define DBG_ENAB_SIGNED 0
#define DBG_READ_MASK 0x00000002U
#define DBG_READ_SHIFT 1
#define DBG_READ_SIGNED 0
/*
Register PVR_TCF_RGBPDP_DBGDATA
*/
#define TCF_RGBPDP_PVR_TCF_RGBPDP_DBGDATA 0x0064
#define DBG_DATA_MASK 0x00FFFFFFU
#define DBG_DATA_SHIFT 0
#define DBG_DATA_SIGNED 0
/*
Register PVR_TCF_RGBPDP_DBGSIDE
*/
#define TCF_RGBPDP_PVR_TCF_RGBPDP_DBGSIDE 0x0068
#define DBG_SIDE_MASK 0x00000007U
#define DBG_SIDE_SHIFT 0
#define DBG_SIDE_SIGNED 0
#define DBG_VAL_MASK 0x00000008U
#define DBG_VAL_SHIFT 3
#define DBG_VAL_SIGNED 0
/*
Register PVR_TCF_RGBPDP_REGLD_STAT
*/
#define TCF_RGBPDP_PVR_TCF_RGBPDP_REGLD_STAT 0x0070
#define REGLD_ADDROUT_MASK 0x00FFFFFFU
#define REGLD_ADDROUT_SHIFT 0
#define REGLD_ADDROUT_SIGNED 0
#define REGLD_ADDREN_MASK 0x80000000U
#define REGLD_ADDREN_SHIFT 31
#define REGLD_ADDREN_SIGNED 0
/*
Register PVR_TCF_RGBPDP_REGLD_CTRL
*/
#define TCF_RGBPDP_PVR_TCF_RGBPDP_REGLD_CTRL 0x0074
#define REGLD_ADDRIN_MASK 0x00FFFFFFU
#define REGLD_ADDRIN_SHIFT 0
#define REGLD_ADDRIN_SIGNED 0
#define REGLD_VAL_MASK 0x01000000U
#define REGLD_VAL_SHIFT 24
#define REGLD_VAL_SIGNED 0
#define REGLD_ADDRLEN_MASK 0xFE000000U
#define REGLD_ADDRLEN_SHIFT 25
#define REGLD_ADDRLEN_SIGNED 0
/*
Register PVR_TCF_RGBPDP_CORE_ID
*/
#define TCF_RGBPDP_PVR_TCF_RGBPDP_CORE_ID 0x0078
#define CONFIG_ID_MASK 0x0000FFFFU
#define CONFIG_ID_SHIFT 0
#define CONFIG_ID_SIGNED 0
#define CORE_ID_MASK 0x00FF0000U
#define CORE_ID_SHIFT 16
#define CORE_ID_SIGNED 0
#define GROUP_ID_MASK 0xFF000000U
#define GROUP_ID_SHIFT 24
#define GROUP_ID_SIGNED 0
/*
Register PVR_TCF_RGBPDP_CORE_REV
*/
#define TCF_RGBPDP_PVR_TCF_RGBPDP_CORE_REV 0x007C
#define MAINT_REV_MASK 0x000000FFU
#define MAINT_REV_SHIFT 0
#define MAINT_REV_SIGNED 0
#define MINOR_REV_MASK 0x0000FF00U
#define MINOR_REV_SHIFT 8
#define MINOR_REV_SIGNED 0
#define MAJOR_REV_MASK 0x00FF0000U
#define MAJOR_REV_SHIFT 16
#define MAJOR_REV_SIGNED 0
#endif /* !defined(_TCF_RGBPDP_REGS_H_) */
/*****************************************************************************
End of file (tcf_rgbpdp_regs.h)
*****************************************************************************/

96
drivers/staging/imgtec/config_kernel.h
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@ -1,96 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
#define RGX_FW_HEAP_SHIFT 25
#define RGX_FW_FILENAME "rgx.fw.signed"
#define LINUX
#define PVR_BUILD_DIR "rk3368_android"
#define PVR_BUILD_TYPE "release"
#define PVRSRV_MODNAME "pvrsrvkm"
#define SUPPORT_RGX 1
#define DMABUF_IMPORT_PHYSHEAP_ID 0
#define RELEASE
#define RGX_BVNC_CORE_KM_HEADER "cores/rgxcore_km_5.9.1.46.h"
#define RGX_BNC_CONFIG_KM_HEADER "configs/rgxconfig_km_5.V.1.46.h"
#define SUPPORT_MULTIBVNC_RUNTIME_BVNC_ACQUISITION
#define SUPPORT_DBGDRV_EVENT_OBJECTS
#define PDUMP_STREAMBUF_MAX_SIZE_MB 10
#define PVRSRV_NEED_PVR_STACKTRACE
//#define SUPPORT_GPUTRACE_EVENTS
#define GPUVIRT_VALIDATION_NUM_OS 8
#define PVRSRV_GPUVIRT_NUM_OSID 2
#define SUPPORT_VDM_CONTEXT_STORE_BUFFER_AB
#define PVR_DVFS
#define SUPPORT_LINUX_X86_WRITECOMBINE
#define SUPPORT_LINUX_X86_PAT
#define PVR_LINUX_USING_WORKQUEUES
#define PVR_LINUX_MISR_USING_PRIVATE_WORKQUEUE
#define PVR_LINUX_TIMERS_USING_WORKQUEUES
#define PVR_LDM_PLATFORM_PRE_REGISTERED
#define PVR_LDM_DRIVER_REGISTRATION_NAME "pvrsrvkm"
#define PVRSRV_FULL_SYNC_TRACKING_HISTORY_LEN 256
#define SUPPORT_MMU_PENDING_FAULT_PROTECTION
#define PVR_DUMMY_PAGE_INIT_VALUE 0x00
#define PVRSRV_UNMAP_ON_SPARSE_CHANGE
#define SUPPORT_PERCONTEXT_FREELIST
#define HWR_DEFAULT_ENABLED
#define PVRSRV_APPHINT_HWRDEBUGDUMPLIMIT APPHNT_BLDVAR_DBGDUMPLIMIT
#define PVRSRV_APPHINT_ENABLETRUSTEDDEVICEACECONFIG IMG_FALSE
#define PVRSRV_APPHINT_HTBUFFERSIZE 0x1000
#define PVRSRV_APPHINT_GENERAL_NON4K_HEAP_PAGE_SIZE 0x4000
#define PVRSRV_APPHINT_ENABLESIGNATURECHECKS APPHNT_BLDVAR_ENABLESIGNATURECHECKS
#define PVRSRV_APPHINT_SIGNATURECHECKSBUFSIZE RGXFW_SIG_BUFFER_SIZE_MIN
#define PVRSRV_APPHINT_DISABLECLOCKGATING 0
#define PVRSRV_APPHINT_DISABLEDMOVERLAP 0
#define PVRSRV_APPHINT_ENABLECDMKILLINGRANDMODE 0
#define PVRSRV_APPHINT_ENABLEFWCONTEXTSWITCH RGXFWIF_INICFG_CTXSWITCH_DM_ALL
#define PVRSRV_APPHINT_ENABLERDPOWERISLAND RGX_RD_POWER_ISLAND_DEFAULT
#define PVRSRV_APPHINT_FIRMWAREPERF FW_PERF_CONF_NONE
#define PVRSRV_APPHINT_FWCONTEXTSWITCHPROFILE RGXFWIF_CTXSWITCH_PROFILE_MEDIUM_EN
#define PVRSRV_APPHINT_HWPERFDISABLECUSTOMCOUNTERFILTER 0
#define PVRSRV_APPHINT_HWPERFFWBUFSIZEINKB RGXFW_HWPERF_L1_SIZE_DEFAULT
#define PVRSRV_APPHINT_HWPERFHOSTBUFSIZEINKB HWPERF_HOST_TL_STREAM_SIZE_DEFAULT
#define PVRSRV_APPHINT_JONESDISABLEMASK 0
#define PVRSRV_APPHINT_NEWFILTERINGMODE 1
#define PVRSRV_APPHINT_TRUNCATEMODE 0
#define PVRSRV_APPHINT_USEMETAT1 RGX_META_T1_OFF
#define PVRSRV_APPHINT_RGXBVNC ""
#define PVRSRV_APPHINT_ENABLETRUSTEDDEVICEACECONFIG IMG_FALSE
#define PVRSRV_APPHINT_CLEANUPTHREADPRIORITY 0
#define PVRSRV_APPHINT_CLEANUPTHREADWEIGHT 0
#define PVRSRV_APPHINT_WATCHDOGTHREADPRIORITY 0
#define PVRSRV_APPHINT_WATCHDOGTHREADWEIGHT 0
#define PVRSRV_APPHINT_ASSERTONHWRTRIGGER IMG_FALSE
#define PVRSRV_APPHINT_ASSERTOUTOFMEMORY IMG_FALSE
#define PVRSRV_APPHINT_CHECKMLIST APPHNT_BLDVAR_DEBUG
#define PVRSRV_APPHINT_DISABLEFEDLOGGING IMG_FALSE
#define PVRSRV_APPHINT_ENABLEAPM RGX_ACTIVEPM_DEFAULT
#define PVRSRV_APPHINT_ENABLEHTBLOGGROUP 0
#define PVRSRV_APPHINT_ENABLELOGGROUP 0
#define PVRSRV_APPHINT_FIRMWARELOGTYPE 0
#define PVRSRV_APPHINT_HTBOPERATIONMODE HTB_OPMODE_DROPLATEST
#define PVRSRV_APPHINT_HWPERFFWFILTER 0
#define PVRSRV_APPHINT_HWPERFHOSTFILTER 0
#define PVRSRV_APPHINT_TIMECORRCLOCK 2
#define PVRSRV_APPHINT_ENABLEFWPOISONONFREE IMG_FALSE
#define PVRSRV_APPHINT_FWPOISONONFREEVALUE 0xBD
#define PVRSRV_APPHINT_ZEROFREELIST IMG_FALSE
#define PVRSRV_APPHINT_DUSTREQUESTINJECT IMG_FALSE
#define PVRSRV_APPHINT_DISABLEPDUMPPANIC IMG_FALSE
#define PVRSRV_ENABLE_PROCESS_STATS
#define PVRSRV_ENABLE_CCCB_UTILISATION_INFO 1 Calculate high watermarks of all the client CCBs and print a warning if the_ watermarks touched a certain threshold value (90% by default) of the cCCB allocation size._
#define PVRSRV_ENABLE_CCCB_UTILISATION_INFO_THRESHOLD 90
#define PVRSRV_ENABLE_MEMTRACK_STATS_FILE
#define PVR_LINUX_PHYSMEM_MAX_POOL_PAGES 10240
#define PVR_LINUX_PHYSMEM_MAX_EXCESS_POOL_PAGES 32768
#define PVR_DIRTY_BYTES_FLUSH_THRESHOLD 1048576
#define PVR_LINUX_HIGHORDER_ALLOCATION_THRESHOLD 256
#define PVR_LINUX_PHYSMEM_MAX_ALLOC_ORDER_NUM 2
#define PVR_LINUX_KMALLOC_ALLOCATION_THRESHOLD 16384
#define SUPPORT_KERNEL_SRVINIT
#define SUPPORT_NATIVE_FENCE_SYNC
#define PVR_DRM_NAME "pvr"
#define DEVICE_MEMSETCPY_ALIGN_IN_BYTES 16
#define ANDROID
#define SUPPORT_ION
#define PVR_ANDROID_ION_HEADER "../drivers/staging/android/ion/ion.h"
#define PVR_ANDROID_ION_USE_SG_LENGTH
#define PVR_ANDROID_SYNC_HEADER "../drivers/staging/android/sync.h"

173
drivers/staging/imgtec/debugfs_dma_buf.c
View File

@ -1,173 +0,0 @@
/* -*- mode: c; indent-tabs-mode: t; c-basic-offset: 8; tab-width: 8 -*- */
/* vi: set ts=8 sw=8 sts=8: */
/*************************************************************************/ /*!
@File debugfs_dma_buf.c
@Codingstyle LinuxKernel
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#include "debugfs_dma_buf.h"
#if defined(DEBUGFS_DMA_BUF) && defined(CONFIG_DEBUG_FS)
#include <linux/kernel.h>
#include <linux/debugfs.h>
#include "kernel_compatibility.h"
static struct dentry *g_debugfs_dentry;
static struct dma_buf *g_dma_buf;
static ssize_t read_file_dma_buf(struct file *file, char __user *user_buf,
size_t count, loff_t *ppos)
{
size_t istart = *ppos / PAGE_SIZE, iend, i = istart;
ssize_t wb = 0, res = 0;
struct dma_buf *dma_buf = g_dma_buf;
int err;
if (!dma_buf)
goto err_out;
/* Inc the ref count for the time we use it in this function. */
get_dma_buf(dma_buf);
/* End of buffer? */
if (*ppos >= dma_buf->size)
goto err_put;
/* Calculate the number of pages we need to process based on the
* remaining dma buffer size or the available um buffer size. */
iend = istart + min((size_t)(dma_buf->size - *ppos), count) / PAGE_SIZE;
res = dma_buf_begin_cpu_access(dma_buf, DMA_FROM_DEVICE);
if (res)
goto err_put;
/* dma_buf_kmap only allows mapping one page, so we have to loop until
* the um buffer is full. */
while (i < iend) {
loff_t dummy = 0; /* We ignore that */
void *map = dma_buf_kmap(dma_buf, i);
if (!map) {
res = -EFAULT;
goto err_access;
}
/* Read PAGE_SIZE or the remaining buffer size worth of
* data. Whichever is smaller. */
res = simple_read_from_buffer(&user_buf[wb], count - wb,
&dummy, map,
min((size_t)PAGE_SIZE,
(size_t)(dma_buf->size - *ppos)));
dma_buf_kunmap(dma_buf, i, map);
if (res < 0)
goto err_access;
wb += res;
*ppos += res;
++i;
}
res = wb;
err_access:
do {
err = dma_buf_end_cpu_access(dma_buf, DMA_FROM_DEVICE);
} while (err == -EAGAIN || err == -EINTR);
err_put:
dma_buf_put(dma_buf);
err_out:
return res;
}
static const struct file_operations fops_dma_buf = {
.open = simple_open,
.read = read_file_dma_buf,
.llseek = default_llseek,
};
int debugfs_dma_buf_init(const char *name)
{
int err = 0;
g_debugfs_dentry = debugfs_create_file(name, S_IRUSR, NULL,
NULL, &fops_dma_buf);
if (IS_ERR(g_debugfs_dentry)) {
err = PTR_ERR(g_debugfs_dentry);
g_debugfs_dentry = NULL;
goto err_out;
}
err_out:
return err;
}
void debugfs_dma_buf_deinit(void)
{
debugfs_remove(g_debugfs_dentry);
}
void debugfs_dma_buf_set(struct dma_buf *dma_buf)
{
struct dma_buf *old_dma_buf = g_dma_buf;
if (dma_buf)
get_dma_buf(dma_buf);
g_dma_buf = dma_buf;
if (old_dma_buf)
dma_buf_put(old_dma_buf);
}
#else /* defined(DEBUGFS_DMA_BUF) && defined(CONFIG_DEBUG_FS) */
int debugfs_dma_buf_init(const char *name)
{
return 0;
}
void debugfs_dma_buf_deinit(void)
{
}
void debugfs_dma_buf_set(struct dma_buf *dma_buf)
{
}
#endif /* defined(DEBUGFS_DMA_BUF) && defined(CONFIG_DEBUG_FS) */

61
drivers/staging/imgtec/debugfs_dma_buf.h
View File

@ -1,61 +0,0 @@
/* -*- mode: c; indent-tabs-mode: t; c-basic-offset: 8; tab-width: 8 -*- */
/* vi: set ts=8 sw=8 sts=8: */
/*************************************************************************/ /*!
@File debugfs_dma_buf.h
@Codingstyle LinuxKernel
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#ifndef _DEBUGFS_DMA_BUF_H
#define _DEBUGFS_DMA_BUF_H
/* This creates a debugfs file for reading out the current content of the dma
* buffer provided by the set function. Please note that you can get tearing in
* the final dumps if the content is quickly changing. */
/* Uncomment the following line to enable */
/*#define DEBUGFS_DMA_BUF 1*/
#include <linux/dma-buf.h>
int debugfs_dma_buf_init(const char *name);
void debugfs_dma_buf_deinit(void);
void debugfs_dma_buf_set(struct dma_buf *dma_buf);
#endif /* _DEBUGFS_DMA_BUF_H */

84
drivers/staging/imgtec/powervr/buffer_attribs.h
View File

@ -1,84 +0,0 @@
/*************************************************************************/ /*!
@File
@Title 3D types for use by IMG APIs
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@License MIT
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
THE SOFTWARE.
*/ /**************************************************************************/
#ifndef _POWERVR_BUFFER_ATTRIBS_H_
#define _POWERVR_BUFFER_ATTRIBS_H_
/**
* Memory layouts
* Defines how pixels are laid out within a surface.
*/
typedef enum
{
IMG_MEMLAYOUT_STRIDED, /**< Resource is strided, one row at a time */
IMG_MEMLAYOUT_TWIDDLED, /**< Resource is 2D twiddled, classic style */
IMG_MEMLAYOUT_3DTWIDDLED, /**< Resource is 3D twiddled, classic style */
IMG_MEMLAYOUT_TILED, /**< Resource is tiled, tiling config specified elsewhere. */
IMG_MEMLAYOUT_PAGETILED, /**< Resource is pagetiled */
} IMG_MEMLAYOUT;
/**
* Rotation types
*/
typedef enum
{
IMG_ROTATION_0DEG = 0,
IMG_ROTATION_90DEG = 1,
IMG_ROTATION_180DEG = 2,
IMG_ROTATION_270DEG = 3,
IMG_ROTATION_FLIP_Y = 4,
IMG_ROTATION_BAD = 255,
} IMG_ROTATION;
/**
* Alpha types.
*/
typedef enum
{
IMG_COLOURSPACE_FORMAT_UNKNOWN = 0x00000000, /**< Colourspace Format: Unknown */
IMG_COLOURSPACE_FORMAT_LINEAR = 0x00010000, /**< Colourspace Format: Linear */
IMG_COLOURSPACE_FORMAT_NONLINEAR = 0x00020000, /**< Colourspace Format: Non-Linear */
IMG_COLOURSPACE_FORMAT_MASK = 0x000F0000, /**< Colourspace Format Mask */
} IMG_COLOURSPACE_FORMAT;
/**
* Types of framebuffer compression
*/
typedef enum
{
IMG_FB_COMPRESSION_NONE,
IMG_FB_COMPRESSION_DIRECT_8x8,
IMG_FB_COMPRESSION_DIRECT_16x4,
IMG_FB_COMPRESSION_DIRECT_32x2,
IMG_FB_COMPRESSION_INDIRECT_8x8,
IMG_FB_COMPRESSION_INDIRECT_16x4,
IMG_FB_COMPRESSION_INDIRECT_4TILE_8x8,
IMG_FB_COMPRESSION_INDIRECT_4TILE_16x4
} IMG_FB_COMPRESSION;
#endif /* _POWERVR_BUFFER_ATTRIBS_H_ */

62
drivers/staging/imgtec/powervr/mem_types.h
View File

@ -1,62 +0,0 @@
/*************************************************************************/ /*!
@File
@Title Public types
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@License MIT
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
THE SOFTWARE.
*/ /**************************************************************************/
#ifndef _POWERVR_TYPES_H_
#define _POWERVR_TYPES_H_
#if defined (__cplusplus)
extern "C" {
#endif
#if defined(_MSC_VER)
#include "msvc_types.h"
#elif defined(LINUX) && defined(__KERNEL__)
#include <linux/types.h>
#else
#include <stdint.h>
#endif
typedef void *IMG_CPU_VIRTADDR;
/* device virtual address */
typedef struct _IMG_DEV_VIRTADDR
{
uint64_t uiAddr;
#define IMG_CAST_TO_DEVVADDR_UINT(var) (uint64_t)(var)
} IMG_DEV_VIRTADDR;
typedef uint64_t IMG_DEVMEM_SIZE_T;
typedef uint64_t IMG_DEVMEM_ALIGN_T;
typedef uint64_t IMG_DEVMEM_OFFSET_T;
typedef uint32_t IMG_DEVMEM_LOG2ALIGN_T;
#if defined (__cplusplus)
}
#endif
#endif

86
drivers/staging/imgtec/powervr/sync_external.h
View File

@ -1,86 +0,0 @@
/*************************************************************************/ /*!
@File
@Title Services external synchronisation interface header
@Description Defines synchronisation structures that are visible internally
and externally
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@License MIT
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
THE SOFTWARE.
*/ /**************************************************************************/
#ifndef _SYNC_EXTERNAL_
#define _SYNC_EXTERNAL_
#if defined (__cplusplus)
extern "C" {
#endif
#include <powervr/mem_types.h>
/*!
* Maximum byte length for a sync prim name
*/
#define SYNC_MAX_CLASS_NAME_LEN 32
/*!
* Number of sync primitives in operations
*/
#define PVRSRV_MAX_SYNC_PRIMS 32
typedef void* PVRSRV_CLIENT_SYNC_PRIM_HANDLE;
typedef void* SYNC_BRIDGE_HANDLE;
typedef struct SYNC_PRIM_CONTEXT *PSYNC_PRIM_CONTEXT;
typedef struct _SYNC_OP_COOKIE_ *PSYNC_OP_COOKIE;
/*!
* Client sync prim definition holding a CPU accessible address
*
* Structure: #PVRSRV_CLIENT_SYNC_PRIM
* Typedef: ::PVRSRV_CLIENT_SYNC_PRIM
*/
typedef struct PVRSRV_CLIENT_SYNC_PRIM
{
volatile uint32_t *pui32LinAddr; /*!< User pointer to the primitive */
} PVRSRV_CLIENT_SYNC_PRIM;
/*!
* Bundled information for a sync prim operation
*
* Structure: #PVRSRV_CLIENT_SYNC_PRIM_OP
* Typedef: ::PVRSRV_CLIENT_SYNC_PRIM_OP
*/
typedef struct PVRSRV_CLIENT_SYNC_PRIM_OP
{
#define PVRSRV_CLIENT_SYNC_PRIM_OP_CHECK (1 << 0)
#define PVRSRV_CLIENT_SYNC_PRIM_OP_UPDATE (1 << 1)
#define PVRSRV_CLIENT_SYNC_PRIM_OP_UNFENCED_UPDATE (PVRSRV_CLIENT_SYNC_PRIM_OP_UPDATE | (1<<2))
uint32_t ui32Flags; /*!< Operation flags: PVRSRV_CLIENT_SYNC_PRIM_OP_XXX */
PVRSRV_CLIENT_SYNC_PRIM *psSync; /*!< Pointer to the client sync primitive */
uint32_t ui32FenceValue; /*!< The Fence value (only used if PVRSRV_CLIENT_SYNC_PRIM_OP_CHECK is set) */
uint32_t ui32UpdateValue; /*!< The Update value (only used if PVRSRV_CLIENT_SYNC_PRIM_OP_UPDATE is set) */
} PVRSRV_CLIENT_SYNC_PRIM_OP;
#if defined (__cplusplus)
}
#endif
#endif /* _SYNC_EXTERNAL_ */

295
drivers/staging/imgtec/pvr_drm.c
View File

@ -1,295 +0,0 @@
/* -*- mode: c; indent-tabs-mode: t; c-basic-offset: 8; tab-width: 8 -*- */
/* vi: set ts=8 sw=8 sts=8: */
/*************************************************************************/ /*!
@File
@Title PowerVR DRM driver
@Codingstyle LinuxKernel
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#include <drm/drm.h>
#include <drm/drmP.h> /* include before drm_crtc.h for kernels older than 3.9 */
#include <drm/drm_crtc.h>
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/pm.h>
#include <linux/version.h>
#include "module_common.h"
#include "pvr_drm.h"
#include "pvr_drv.h"
#include "pvrversion.h"
#include "services_kernel_client.h"
#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 12, 0))
#define DRIVER_RENDER 0
#define DRM_RENDER_ALLOW 0
#endif
#define PVR_DRM_DRIVER_NAME PVR_DRM_NAME
#define PVR_DRM_DRIVER_DESC "Imagination Technologies PVR DRM"
#define PVR_DRM_DRIVER_DATE "20110701"
static int pvr_pm_suspend(struct device *dev)
{
struct drm_device *ddev = dev_get_drvdata(dev);
DRM_DEBUG_DRIVER("device %p\n", dev);
return PVRSRVCommonDeviceSuspend(ddev->dev_private);
}
static int pvr_pm_resume(struct device *dev)
{
struct drm_device *ddev = dev_get_drvdata(dev);
DRM_DEBUG_DRIVER("device %p\n", dev);
return PVRSRVCommonDeviceResume(ddev->dev_private);
}
const struct dev_pm_ops pvr_pm_ops = {
.suspend = pvr_pm_suspend,
.resume = pvr_pm_resume,
};
int pvr_drm_load(struct drm_device *ddev, unsigned long flags)
{
struct _PVRSRV_DEVICE_NODE_ *dev_node;
enum PVRSRV_ERROR srv_err;
int err;
DRM_DEBUG_DRIVER("device %p\n", ddev->dev);
/*
* The equivalent is done for PCI modesetting drivers by
* drm_get_pci_dev()
*/
#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 14, 0)
if (ddev->platformdev)
platform_set_drvdata(ddev->platformdev, ddev);
#else
dev_set_drvdata(ddev->dev, ddev);
#endif
srv_err = PVRSRVDeviceCreate(ddev->dev, &dev_node);
if (srv_err != PVRSRV_OK) {
DRM_ERROR("failed to create device node for device %p (%s)\n",
ddev->dev, PVRSRVGetErrorStringKM(srv_err));
if (srv_err == PVRSRV_ERROR_PROBE_DEFER)
err = -EPROBE_DEFER;
else
err = -ENODEV;
goto err_exit;
}
err = PVRSRVCommonDeviceInit(dev_node);
if (err) {
DRM_ERROR("device %p initialisation failed (err=%d)\n",
ddev->dev, err);
goto err_device_destroy;
}
drm_mode_config_init(ddev);
ddev->dev_private = dev_node;
return 0;
err_device_destroy:
PVRSRVDeviceDestroy(dev_node);
err_exit:
return err;
}
void pvr_drm_unload(struct drm_device *ddev)
{
DRM_DEBUG_DRIVER("device %p\n", ddev->dev);
PVRSRVCommonDeviceDeinit(ddev->dev_private);
PVRSRVDeviceDestroy(ddev->dev_private);
ddev->dev_private = NULL;
//return 0;
}
static int pvr_drm_open(struct drm_device *ddev, struct drm_file *dfile)
{
int err;
if (!try_module_get(THIS_MODULE)) {
DRM_ERROR("failed to get module reference\n");
return -ENOENT;
}
err = PVRSRVCommonDeviceOpen(ddev->dev_private, dfile);
if (err)
module_put(THIS_MODULE);
return err;
}
static void pvr_drm_release(struct drm_device *ddev, struct drm_file *dfile)
{
PVRSRVCommonDeviceRelease(ddev->dev_private, dfile);
module_put(THIS_MODULE);
}
/*
* The DRM global lock is taken for ioctls unless the DRM_UNLOCKED flag is set.
* If you revise one of the driver specific ioctls, or add a new one, that has
* DRM_UNLOCKED set then consider whether the gPVRSRVLock mutex needs to be
* taken.
*/
static struct drm_ioctl_desc pvr_drm_ioctls[] = {
DRM_IOCTL_DEF_DRV(PVR_SRVKM_CMD, PVRSRV_BridgeDispatchKM, DRM_RENDER_ALLOW | DRM_UNLOCKED),
#if defined(PDUMP)
DRM_IOCTL_DEF_DRV(PVR_DBGDRV_CMD, dbgdrv_ioctl, DRM_RENDER_ALLOW | DRM_AUTH | DRM_UNLOCKED),
#endif
};
#if defined(CONFIG_COMPAT)
#if defined(PDUMP)
static drm_ioctl_compat_t *pvr_drm_compat_ioctls[] = {
[DRM_PVR_DBGDRV_CMD] = dbgdrv_ioctl_compat,
};
#endif
static long pvr_compat_ioctl(struct file *file, unsigned int cmd,
unsigned long arg)
{
unsigned int nr = DRM_IOCTL_NR(cmd);
if (nr < DRM_COMMAND_BASE)
return drm_compat_ioctl(file, cmd, arg);
#if defined(PDUMP)
if (nr < DRM_COMMAND_BASE + ARRAY_SIZE(pvr_drm_compat_ioctls)) {
drm_ioctl_compat_t *pfnBridge;
pfnBridge = pvr_drm_compat_ioctls[nr - DRM_COMMAND_BASE];
if (pfnBridge)
return pfnBridge(file, cmd, arg);
}
#endif
return drm_ioctl(file, cmd, arg);
}
#endif /* defined(CONFIG_COMPAT) */
int g_gpu_performance = -1;
static ssize_t PVRSRV_Perf_Write(struct file *pfile, const char __user *ubuf,
size_t count, loff_t *ploff)
{
char kbuf[10];
long enable = -1;
if (count > sizeof(kbuf))
count = sizeof(kbuf);
if (copy_from_user(kbuf, ubuf, count)) {
DRM_ERROR("%s: copy_to_user failed!\n", __func__);
return -EFAULT;
}
kbuf[count - 1] = '\0';
if (kstrtol(kbuf, 10, &enable) != 0) {
DRM_ERROR("%s: kstrtol failed!\n", __func__);
return -EFAULT;
}
if (g_gpu_performance != enable)
g_gpu_performance = enable;
return count;
}
static const struct file_operations pvr_drm_fops = {
.owner = THIS_MODULE,
.open = drm_open,
.release = drm_release,
/*
* FIXME:
* Wrap this in a function that checks enough data has been
* supplied with the ioctl (e.g. _IOCDIR(nr) != _IOC_NONE &&
* _IOC_SIZE(nr) == size).
*/
.unlocked_ioctl = drm_ioctl,
#if defined(CONFIG_COMPAT)
.compat_ioctl = pvr_compat_ioctl,
#endif
.mmap = PVRSRV_MMap,
.poll = drm_poll,
.read = drm_read,
.write = PVRSRV_Perf_Write,
#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 12, 0))
.fasync = drm_fasync,
#endif
};
const struct drm_driver pvr_drm_generic_driver = {
.driver_features = DRIVER_MODESET | DRIVER_RENDER,
.dev_priv_size = 0,
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 10, 0))
.load = NULL,
.unload = NULL,
#else
.load = pvr_drm_load,
.unload = pvr_drm_unload,
#endif
.open = pvr_drm_open,
.postclose = pvr_drm_release,
.ioctls = pvr_drm_ioctls,
.num_ioctls = ARRAY_SIZE(pvr_drm_ioctls),
.fops = &pvr_drm_fops,
.name = PVR_DRM_DRIVER_NAME,
.desc = PVR_DRM_DRIVER_DESC,
.date = PVR_DRM_DRIVER_DATE,
.major = PVRVERSION_MAJ,
.minor = PVRVERSION_MIN,
.patchlevel = PVRVERSION_BUILD,
};

72
drivers/staging/imgtec/pvr_drv.h
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@ -1,72 +0,0 @@
/* -*- mode: c; indent-tabs-mode: t; c-basic-offset: 8; tab-width: 8 -*- */
/* vi: set ts=8 sw=8 sts=8: */
/*************************************************************************/ /*!
@File
@Title PowerVR DRM driver
@Codingstyle LinuxKernel
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#if !defined(__PVR_DRV_H__)
#define __PVR_DRV_H__
#include <drm/drmP.h>
#include <linux/pm.h>
struct file;
struct vm_area_struct;
extern const struct dev_pm_ops pvr_pm_ops;
extern const struct drm_driver pvr_drm_generic_driver;
int pvr_drm_load(struct drm_device *ddev, unsigned long flags);
void pvr_drm_unload(struct drm_device *ddev);
#if defined(PDUMP)
int dbgdrv_init(void);
void dbgdrv_cleanup(void);
int dbgdrv_ioctl(struct drm_device *dev, void *arg, struct drm_file *file);
int dbgdrv_ioctl_compat(struct file *file, unsigned int cmd, unsigned long arg);
#endif
int PVRSRV_BridgeDispatchKM(struct drm_device *dev, void *arg,
struct drm_file *file);
int PVRSRV_MMap(struct file *file, struct vm_area_struct *ps_vma);
#endif /* !defined(__PVR_DRV_H__) */

267
drivers/staging/imgtec/pvr_platform_drv.c
View File

@ -1,267 +0,0 @@
/* -*- mode: c; indent-tabs-mode: t; c-basic-offset: 8; tab-width: 8 -*- */
/* vi: set ts=8 sw=8 sts=8: */
/*************************************************************************/ /*!
@File
@Title PowerVR DRM platform driver
@Codingstyle LinuxKernel
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#include <drm/drmP.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/version.h>
#include "module_common.h"
#include "pvr_drv.h"
#include "pvrmodule.h"
#include "sysinfo.h"
#include "pvrversion.h" //add by zxl
#if defined(CONFIG_OF)
#include <linux/of.h>
#include <linux/of_device.h>
#endif
struct platform_device *gpsPVRLDMDev=NULL;
static struct drm_driver pvr_drm_platform_driver;
#if defined(MODULE) && !defined(PVR_LDM_PLATFORM_PRE_REGISTERED)
/*
* This is an arbitrary value. If it's changed then the 'num_devices' module
* parameter description should also be updated to match.
*/
#define MAX_DEVICES 16
static unsigned int pvr_num_devices = 1;
static struct platform_device **pvr_devices;
#if defined(NO_HARDWARE)
static int pvr_num_devices_set(const char *val,
const struct kernel_param *param)
{
int err;
err = param_set_uint(val, param);
if (err)
return err;
if (pvr_num_devices == 0 || pvr_num_devices > MAX_DEVICES)
return -EINVAL;
return 0;
}
static const struct kernel_param_ops pvr_num_devices_ops = {
.set = pvr_num_devices_set,
.get = param_get_uint,
};
module_param_cb(num_devices, &pvr_num_devices_ops, &pvr_num_devices,
S_IRUSR | S_IRGRP | S_IROTH);
MODULE_PARM_DESC(num_devices,
"Number of platform devices to register (default: 1 - max: 16)");
#endif /* defined(NO_HARDWARE) */
#endif /* defined(MODULE) && !defined(PVR_LDM_PLATFORM_PRE_REGISTERED) */
static int pvr_devices_register(void)
{
return 0;
}
static void pvr_devices_unregister(void)
{
}
static int pvr_probe(struct platform_device *pdev)
{
struct drm_device *ddev;
int ret;
DRM_DEBUG_DRIVER("device %p\n", &pdev->dev);
ddev = drm_dev_alloc(&pvr_drm_platform_driver, &pdev->dev);
if (IS_ERR(ddev))
return PTR_ERR(ddev);
//zxl:print gpu version on boot time
printk("PVR_K: sys.gpvr.version=%s\n", RKVERSION);
gpsPVRLDMDev = pdev;
/*
* The load callback, called from drm_dev_register, is deprecated,
* because of potential race conditions. Calling the function here,
* before calling drm_dev_register, avoids those potential races.
*/
BUG_ON(pvr_drm_platform_driver.load != NULL);
ret = pvr_drm_load(ddev, 0);
if (ret)
goto err_drm_dev_unref;
ret = drm_dev_register(ddev, 0);
if (ret)
goto err_drm_dev_unload;
return 0;
err_drm_dev_unload:
pvr_drm_unload(ddev);
err_drm_dev_unref:
drm_dev_unref(ddev);
return ret;
//gpsPVRLDMDev = pdev;
//return drm_platform_init(&pvr_drm_platform_driver, pdev);
}
static int pvr_remove(struct platform_device *pdev)
{
struct drm_device *ddev = platform_get_drvdata(pdev);
DRM_DEBUG_DRIVER("device %p\n", &pdev->dev);
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 18, 0))
drm_dev_unregister(ddev);
/* The unload callback, called from drm_dev_unregister, is
* deprecated. Call the unload function directly.
*/
BUG_ON(pvr_drm_platform_driver.unload != NULL);
pvr_drm_unload(ddev);
drm_dev_put(ddev);
#else
drm_put_dev(ddev);
#endif
return 0;
}
static void pvr_shutdown(struct platform_device *pdev)
{
struct drm_device *ddev = platform_get_drvdata(pdev);
DRM_DEBUG_DRIVER("device %p\n", &pdev->dev);
PVRSRVCommonDeviceShutdown(ddev->dev_private);
}
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0))
static const struct of_device_id pvr_of_ids[] = {
#if defined(SYS_RGX_OF_COMPATIBLE)
{ .compatible = SYS_RGX_OF_COMPATIBLE, },
#endif
{ .compatible = "arm,rogue-G6110", },
{ .compatible = "arm,rk3368-gpu", },
{},
};
MODULE_DEVICE_TABLE(of, pvr_of_ids);
#endif
static struct platform_device_id pvr_platform_ids[] = {
#if defined(SYS_RGX_DEV_NAME)
{ SYS_RGX_DEV_NAME, 0 },
#endif
{ }
};
MODULE_DEVICE_TABLE(platform, pvr_platform_ids);
static struct platform_driver pvr_platform_driver = {
.driver = {
.name = DRVNAME,
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0))
.of_match_table = of_match_ptr(pvr_of_ids),
#endif
.pm = &pvr_pm_ops,
},
.id_table = pvr_platform_ids,
.probe = pvr_probe,
.remove = pvr_remove,
.shutdown = pvr_shutdown,
};
static int __init pvr_init(void)
{
int err;
int i = 0;
struct device_node *np;
DRM_DEBUG_DRIVER("\n");
for_each_compatible_node(np, NULL, "arm,rogue-G6110") {
i++;
}
if (0 == i) {
printk("It doesn't contain Rogue gpu\n");
return -1;
}
pvr_drm_platform_driver = pvr_drm_generic_driver;
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 18, 0)) && \
(LINUX_VERSION_CODE < KERNEL_VERSION(4, 5, 0))
pvr_drm_platform_driver.set_busid = drm_platform_set_busid;
#endif
err = PVRSRVCommonDriverInit();
if (err)
return err;
err = platform_driver_register(&pvr_platform_driver);
if (err)
return err;
return pvr_devices_register();
}
static void __exit pvr_exit(void)
{
DRM_DEBUG_DRIVER("\n");
pvr_devices_unregister();
platform_driver_unregister(&pvr_platform_driver);
PVRSRVCommonDriverDeinit();
DRM_DEBUG_DRIVER("done\n");
}
late_initcall(pvr_init);
module_exit(pvr_exit);

2275
drivers/staging/imgtec/pvr_sync.c
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File diff suppressed because it is too large Load Diff

85
drivers/staging/imgtec/pvr_sync.h
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@ -1,85 +0,0 @@
/* -*- mode: c; indent-tabs-mode: t; c-basic-offset: 8; tab-width: 8 -*- */
/* vi: set ts=8 sw=8 sts=8: */
/*************************************************************************/ /*!
@File pvr_sync.h
@Title Kernel driver for Android's sync mechanism
@Codingstyle LinuxKernel
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#ifndef _PVR_SYNC_H
#define _PVR_SYNC_H
#include "pvr_fd_sync_kernel.h"
/* Services internal interface */
enum PVRSRV_ERROR pvr_sync_init(void *device_cookie);
void pvr_sync_deinit(void);
struct _RGXFWIF_DEV_VIRTADDR_;
struct pvr_sync_append_data;
enum PVRSRV_ERROR
pvr_sync_append_fences(
const char *name,
const s32 check_fence_fd,
const s32 update_timeline_fd,
const u32 nr_updates,
const struct _RGXFWIF_DEV_VIRTADDR_ *update_ufo_addresses,
const u32 *update_values,
const u32 nr_checks,
const struct _RGXFWIF_DEV_VIRTADDR_ *check_ufo_addresses,
const u32 *check_values,
struct pvr_sync_append_data **append_sync_data);
void pvr_sync_get_updates(const struct pvr_sync_append_data *sync_data,
u32 *nr_fences,
struct _RGXFWIF_DEV_VIRTADDR_ **ufo_addrs,
u32 **values);
void pvr_sync_get_checks(const struct pvr_sync_append_data *sync_data,
u32 *nr_fences,
struct _RGXFWIF_DEV_VIRTADDR_ **ufo_addrs,
u32 **values);
void pvr_sync_rollback_append_fences(struct pvr_sync_append_data *sync_data);
void pvr_sync_nohw_complete_fences(struct pvr_sync_append_data *sync_data);
void pvr_sync_free_append_fences_data(struct pvr_sync_append_data *sync_data);
int pvr_sync_get_update_fd(struct pvr_sync_append_data *sync_data);
#endif /* _PVR_SYNC_H */

2356
drivers/staging/imgtec/pvr_sync_file.c
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File diff suppressed because it is too large Load Diff

161
drivers/staging/imgtec/pvrversion.h
View File

@ -1,161 +0,0 @@
/*************************************************************************/ /*!
@File
@Title Version numbers and strings.
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Version numbers and strings for PVR Consumer services
components.
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#ifndef _PVRVERSION_H_
#define _PVRVERSION_H_
/*
* Rogue KM Version Note
*
* L 1.17:
* Support gpu disable dvfs case.
* Add rk_tf_check_version to compatible for rk3328.
* L 1.18:
* If fix freq,then don't force to drop freq to the lowest.
*
* M 1.21:
* Merge 1.5_RTM3604260 DDK code.
* M 1.24:
* Merge 1.5_ED3653583 DDK code.
* M 1.28:
* Merge 1.5_ED3776568 DDK code.
* M 1.29
* 1. Reopen bEnableRDPowIsland since it doesn't appear splash screen when click the drawerbutton.
* 2. Don't set PVR_ANDROID_HAS_SET_BUFFERS_DATASPACE by default.
* 3. Remove hGPUUtilLock to avoid dead lock.
* 4. Get raw ion_device by IonDevAcquire.
* M 1.31
* 1. Merge 1.5_ED3830101 DDK code.
* M 1.31+
* 1. Let Rogue M support kernel 4.4.
* 2. Close OPEN_GPU_PD temporarily.
* M 2.00
* Init 1.6_ED3859696 DDK code.
* M 2.01
* 1. Merge 1.6_ED3861161 DDK code
* 2. Add GPU dvfs support.
* 3. Adjust the code indentation.
* 4. Add GPU pd support.
* 5. Disable RD power island.
* M 3.00
* 1. Merge 1.7_ED3904583 DDK code.
* 2. Add support for kernel 3.10.
* 3. Fix some compile error on DDK 1.7.
* 4. Fix some running errors on DDK 1.7.
* M 3.01
* 1. Merge 1.7_ED3957769 DDK code.
* 2. Fix compile error.
* 3. Fix USE_CLANG bug in preconfig.mk of km module.
* 4. Fix bug of missing of brackets.
* 5. Adjust order to judge Rogue gpu.
* N 4.00
* 1. Merge 1.7_Beta_4200570 DDK code.
* 2. Support for android n.
* 3. Fix rk dvfs bug.
* 4. Adjust code style for rk init.
* N 4.01
* 1. Fix rk_init compile error.
* N 4.02
* 1. Merge 1.7_ED4215145 DDK code.
* 2. Merge 1.7_ED4239735 DDK code.
* 3. Merge 1.7_ED4276001 DDK code.
* N 5.00
* Merge 1.8_ED4302432 DDK code.
* N 5.01
* 1. Add RK33_DVFS_MODE support.
* 2. Spinlock should not use for rk33_dvfs_set_clock,
* since it will sleep if mutex cann't be got.
* N 5.02
* 1. Merge 1.8_Beta_4490825 DDK code.
* 2. Add new support for kernel 4.4.
* 3. Close RK_TF_VERSION.
* 4. Remove dependence of rockchip_ion_dev.
* 5. Fix show freq bug on kernel 4.4.
* 6. Fix gpu dvfs bug.
* N 5.03
* 1. Enable PVR_DVFS for devfreq framework.
* 2. Remove some unneed code for devfreq.
* N 5.04
* Merge 1.8_ED4610191 DDK code.
* N 5.05
* 1. If freq is equal,but voltage is changed,we also set the new voltage.
* 2. Only give a warnning when initialize simple power model failed.
* N 5.06
* Rebuild ko.
* N 5.11
* Even in suspend mode,we still set the gpu clk.
* N 5.12
* 1. Fix PVRSRVDevicePreClockSpeedChange failed.
* 2. Apply PP_fix_KM patch from IMG.
* N 5.13
* Add gpu performance interface for cts.
*/
#define PVR_STR(X) #X
#define PVR_STR2(X) PVR_STR(X)
#define PVRVERSION_MAJ 1
#define PVRVERSION_MIN 8
#define PVRVERSION_FAMILY "rogueddk"
#define PVRVERSION_BRANCHNAME "1.8.RTM"
#define PVRVERSION_BUILD 4610191
#define PVRVERSION_BSCONTROL "Rogue_DDK_Android"
#define PVRVERSION_STRING "Rogue_DDK_Android rogueddk 1.8.RTM@" PVR_STR2(PVRVERSION_BUILD)
#define PVRVERSION_STRING_SHORT "1.8@" PVR_STR2(PVRVERSION_BUILD) " (1.8.RTM)"
#define COPYRIGHT_TXT "Copyright (c) Imagination Technologies Ltd. All Rights Reserved."
#define PVRVERSION_BUILD_HI 461
#define PVRVERSION_BUILD_LO 191
#define PVRVERSION_STRING_NUMERIC PVR_STR2(PVRVERSION_MAJ) "." PVR_STR2(PVRVERSION_MIN) "." PVR_STR2(PVRVERSION_BUILD_HI) "." PVR_STR2(PVRVERSION_BUILD_LO)
#define PVRVERSION_PACK(MAJ,MIN) ((((MAJ)&0xFFFF) << 16) | (((MIN)&0xFFFF) << 0))
#define PVRVERSION_UNPACK_MAJ(VERSION) (((VERSION) >> 16) & 0xFFFF)
#define PVRVERSION_UNPACK_MIN(VERSION) (((VERSION) >> 0) & 0xFFFF)
//chenli:define rockchip version
#define RKVERSION "Rogue N 5.13"
#endif /* _PVRVERSION_H_ */

32
drivers/staging/imgtec/rogue/Kconfig
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@ -1,32 +0,0 @@
# SPDX-License-Identifier: GPL-2.0
config POWERVR_ROGUE_N
tristate "PowerVR Rogue"
default n
depends on DRM
help
Driver for PowerVR Rogue graphics hardware.
Say Y here if your SoC contains a PowerVR Rogue GPU. For more
information, see <http://www.imgtec.com/powervr/>.
config POWERVR_ROGUE_PDUMP
bool "Parameter dumping"
default n
depends on POWERVR_ROGUE_N
config POWERVR_ROGUE_RESOURCE_INFO
bool "Resource info"
default n
depends on POWERVR_ROGUE_N
help
Annotate device memory allocations with human-readable names.
Requires a compatible userspace driver.
config POWERVR_ROGUE_DEVICEMEM_HISTORY
bool "Device memory history"
default n
depends on POWERVR_ROGUE_N
help
Provides a debugfs file containing a list of recent memory
allocations for debugging purposes. Requires a compatible
userspace driver.

192
drivers/staging/imgtec/rogue/Makefile
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@ -1,192 +0,0 @@
# SPDX-License-Identifier: GPL-2.0
ccflags-y += -include $(srctree)/drivers/staging/imgtec/config_kernel.h \
-I$(srctree)/drivers/staging/imgtec \
-I$(srctree)/$(src) \
-I$(srctree)/$(src)/hwdefs \
-I$(srctree)/$(src)/hwdefs/km \
-I$(srctree)/drivers/dma-buf \
-I$(srctree)/$(src)/rk3368
ccflags-$(CONFIG_X86) += -mno-soft-float
ccflags-$(CONFIG_POWERVR_APOLLO:m=y) += -I$(srctree)/drivers/staging/imgtec/apollo
pvrsrvkm-$(CONFIG_POWERVR_APOLLO:m=y) += ../apollo/sysconfig.o
tmp := $(addprefix -I,$(wildcard $(srctree)/$(src)/generated/*))
ccflags-y += $(tmp)
obj-$(CONFIG_POWERVR_ROGUE_N) += pvrsrvkm.o
pvrsrvkm-y += rk3368/rk_init_v2.o
pvrsrvkm-y += rk3368/sysconfig.o
pvrsrvkm-y += interrupt_support.o
pvrsrvkm-y += pvr_dvfs_device.o
pvrsrvkm-y += allocmem.o
pvrsrvkm-y += cache_km.o
pvrsrvkm-y += connection_server.o
pvrsrvkm-y += debugmisc_server.o
pvrsrvkm-y += devicemem.o
pvrsrvkm-y += devicemem_heapcfg.o
pvrsrvkm-y += osmmap_stub.o
pvrsrvkm-y += devicemem_server.o
pvrsrvkm-y += devicemem_utils.o
pvrsrvkm-y += event.o
pvrsrvkm-y += handle.o
pvrsrvkm-y += handle_idr.o
pvrsrvkm-y += hash.o
pvrsrvkm-y += htbserver.o
pvrsrvkm-y += htbuffer.o
pvrsrvkm-y += km_apphint.o
pvrsrvkm-y += lists.o
pvrsrvkm-y += mem_utils.o
pvrsrvkm-y += mmu_common.o
pvrsrvkm-y += module_common.o
pvrsrvkm-y += osconnection_server.o
pvrsrvkm-y += osfunc.o
pvrsrvkm-y += physheap.o
pvrsrvkm-y += physmem.o
pvrsrvkm-y += physmem_lma.o
pvrsrvkm-y += physmem_osmem_linux.o
pvrsrvkm-y += physmem_tdsecbuf.o
pvrsrvkm-y += pmr.o
pvrsrvkm-y += pmr_os.o
pvrsrvkm-y += power.o
pvrsrvkm-y += process_stats.o
pvrsrvkm-y += pvr_bridge_k.o
pvrsrvkm-y += pvr_debug.o
pvrsrvkm-y += pvr_debugfs.o
pvrsrvkm-y += pvr_notifier.o
pvrsrvkm-y += pvrsrv.o
pvrsrvkm-y += ra.o
pvrsrvkm-y += rgx_compat_bvnc.o
pvrsrvkm-y += rgxbreakpoint.o
pvrsrvkm-y += rgxccb.o
pvrsrvkm-y += rgxcompute.o
pvrsrvkm-y += rgxdebug.o
pvrsrvkm-y += rgxfwutils.o
pvrsrvkm-y += rgxhwperf.o
pvrsrvkm-y += rgxinit.o
pvrsrvkm-y += rgxkicksync.o
pvrsrvkm-y += rgxlayer_km_impl.o
pvrsrvkm-y += rgxmem.o
pvrsrvkm-y += rgxmipsmmuinit.o
pvrsrvkm-y += rgxmmuinit.o
pvrsrvkm-y += rgxpower.o
pvrsrvkm-y += rgxray.o
pvrsrvkm-y += rgxregconfig.o
pvrsrvkm-y += rgxsignals.o
pvrsrvkm-y += rgxstartstop.o
pvrsrvkm-y += rgxta3d.o
pvrsrvkm-y += rgxtdmtransfer.o
pvrsrvkm-y += rgxtimecorr.o
pvrsrvkm-y += rgxtimerquery.o
pvrsrvkm-y += rgxtransfer.o
pvrsrvkm-y += rgxutils.o
pvrsrvkm-y += srvcore.o
pvrsrvkm-y += sync.o
pvrsrvkm-y += sync_checkpoint.o
pvrsrvkm-y += sync_server.o
pvrsrvkm-y += tlclient.o
pvrsrvkm-y += tlintern.o
pvrsrvkm-y += tlserver.o
pvrsrvkm-y += tlstream.o
pvrsrvkm-y += uniq_key_splay_tree.o
# Kernel srvinit
pvrsrvkm-y += rgx_compat_bvnc.o
pvrsrvkm-y += rgx_hwperf_table.o
pvrsrvkm-y += rgxfwimageutils.o
pvrsrvkm-y += rgxfwload.o
pvrsrvkm-y += rgxlayer_impl.o
pvrsrvkm-y += rgxsrvinit.o
pvrsrvkm-y += rgxsrvinit_script.o
pvrsrvkm-$(CONFIG_POWERVR_ROGUE_PDUMP) += generated/dpdump_bridge/client_pdump_bridge.o
pvrsrvkm-$(CONFIG_POWERVR_ROGUE_PDUMP) += generated/dpdumpctrl_bridge/client_pdumpctrl_bridge.o
pvrsrvkm-$(CONFIG_POWERVR_ROGUE_PDUMP) += generated/drgxpdump_bridge/client_rgxpdump_bridge.o
pvrsrvkm-y += generated/rgxinit_bridge/client_rgxinit_direct_bridge.o
pvrsrvkm-y += ../pvr_platform_drv.o
pvrsrvkm-$(CONFIG_DRM) += ../pvr_drm.o
pvrsrvkm-$(CONFIG_DMA_SHARED_BUFFER) += physmem_dmabuf.o
# RI strings
pvrsrvkm-$(CONFIG_POWERVR_ROGUE_RESOURCE_INFO) += ri_server.o
ccflags-$(CONFIG_POWERVR_ROGUE_RESOURCE_INFO) += -DPVR_RI_DEBUG=1
# Device memory history
pvrsrvkm-$(CONFIG_POWERVR_ROGUE_DEVICEMEM_HISTORY) += devicemem_history_server.o
ccflags-$(CONFIG_POWERVR_ROGUE_DEVICEMEM_HISTORY) += -DSUPPORT_PAGE_FAULT_DEBUG=1
# GPU tracing in systrace
#pvrsrvkm-$(CONFIG_FTRACE) += pvr_gputrace.o
# Event tracing
pvrsrvkm-$(CONFIG_EVENT_TRACING) += trace_events.o
# arch-specific wrapper functions
pvrsrvkm-$(CONFIG_X86) += osfunc_x86.o
pvrsrvkm-$(CONFIG_ARM) += osfunc_arm.o
pvrsrvkm-$(CONFIG_ARM64) += osfunc_arm64.o
pvrsrvkm-$(CONFIG_METAG) += osfunc_metag.o
pvrsrvkm-$(CONFIG_MIPS) += osfunc_mips.o
# PDump
pvrsrvkm-$(CONFIG_POWERVR_ROGUE_PDUMP) += dbgdriv.o
pvrsrvkm-$(CONFIG_POWERVR_ROGUE_PDUMP) += dbgdriv_handle.o
pvrsrvkm-$(CONFIG_POWERVR_ROGUE_PDUMP) += devicemem_pdump.o
pvrsrvkm-$(CONFIG_POWERVR_ROGUE_PDUMP) += devicememx_pdump.o
pvrsrvkm-$(CONFIG_POWERVR_ROGUE_PDUMP) += hostfunc.o
pvrsrvkm-$(CONFIG_POWERVR_ROGUE_PDUMP) += ioctl.o
pvrsrvkm-$(CONFIG_POWERVR_ROGUE_PDUMP) += main.o
pvrsrvkm-$(CONFIG_POWERVR_ROGUE_PDUMP) += pdump.o
pvrsrvkm-$(CONFIG_POWERVR_ROGUE_PDUMP) += pdump_common.o
pvrsrvkm-$(CONFIG_POWERVR_ROGUE_PDUMP) += pdump_mmu.o
pvrsrvkm-$(CONFIG_POWERVR_ROGUE_PDUMP) += pdump_physmem.o
pvrsrvkm-$(CONFIG_POWERVR_ROGUE_PDUMP) += rgxpdump.o
pvrsrvkm-$(CONFIG_POWERVR_ROGUE_PDUMP) += srvinit_pdump.o
ccflags-$(CONFIG_POWERVR_ROGUE_PDUMP) += -DPDUMP=1
# Android native synchronisation
pvrsrvkm-$(CONFIG_SYNC) += ../pvr_sync.o
pvrsrvkm-$(CONFIG_SYNC_FILE) += ../pvr_sync_file.o
# Generated bridge code
pvrsrvkm-y += generated/mm_bridge/server_mm_bridge.o
pvrsrvkm-y += generated/mm_bridge/client_mm_direct_bridge.o
pvrsrvkm-y += generated/cmm_bridge/server_cmm_bridge.o
pvrsrvkm-y += generated/rgxtq_bridge/server_rgxtq_bridge.o
pvrsrvkm-y += generated/rgxta3d_bridge/server_rgxta3d_bridge.o
pvrsrvkm-y += generated/rgxcmp_bridge/server_rgxcmp_bridge.o
pvrsrvkm-y += generated/rgxsignals_bridge/server_rgxsignals_bridge.o
pvrsrvkm-y += generated/srvcore_bridge/server_srvcore_bridge.o
pvrsrvkm-y += generated/sync_bridge/server_sync_bridge.o
pvrsrvkm-y += generated/sync_bridge/client_sync_direct_bridge.o
pvrsrvkm-y += generated/cache_bridge/client_cache_direct_bridge.o
pvrsrvkm-y += generated/cache_bridge/server_cache_bridge.o
pvrsrvkm-y += generated/breakpoint_bridge/server_breakpoint_bridge.o
pvrsrvkm-y += generated/debugmisc_bridge/server_debugmisc_bridge.o
pvrsrvkm-y += generated/pvrtl_bridge/server_pvrtl_bridge.o
pvrsrvkm-y += generated/pvrtl_bridge/client_pvrtl_direct_bridge.o
pvrsrvkm-y += generated/rgxhwperf_bridge/server_rgxhwperf_bridge.o
pvrsrvkm-y += generated/regconfig_bridge/server_regconfig_bridge.o
pvrsrvkm-y += generated/timerquery_bridge/server_timerquery_bridge.o
pvrsrvkm-y += generated/htbuffer_bridge/server_htbuffer_bridge.o
pvrsrvkm-y += generated/htbuffer_bridge/client_htbuffer_direct_bridge.o
pvrsrvkm-y += generated/rgxkicksync_bridge/server_rgxkicksync_bridge.o
pvrsrvkm-y += generated/rgxray_bridge/server_rgxray_bridge.o
pvrsrvkm-y += generated/rgxtq2_bridge/server_rgxtq2_bridge.o
pvrsrvkm-$(CONFIG_POWERVR_ROGUE_RESOURCE_INFO) += generated/ri_bridge/server_ri_bridge.o
pvrsrvkm-$(CONFIG_POWERVR_ROGUE_RESOURCE_INFO) += generated/ri_bridge/client_ri_direct_bridge.o
pvrsrvkm-$(CONFIG_POWERVR_ROGUE_DEVICEMEM_HISTORY) += generated/devicememhistory_bridge/server_devicememhistory_bridge.o
pvrsrvkm-$(CONFIG_POWERVR_ROGUE_DEVICEMEM_HISTORY) += generated/devicememhistory_bridge/client_devicememhistory_direct_bridge.o
pvrsrvkm-$(CONFIG_POWERVR_ROGUE_PDUMP) += generated/pdumpmm_bridge/server_pdumpmm_bridge.o
pvrsrvkm-$(CONFIG_POWERVR_ROGUE_PDUMP) += generated/pdumpmm_bridge/client_pdumpmm_direct_bridge.o
pvrsrvkm-$(CONFIG_POWERVR_ROGUE_PDUMP) += generated/pdump_bridge/server_pdump_bridge.o
pvrsrvkm-$(CONFIG_POWERVR_ROGUE_PDUMP) += generated/pdumpctrl_bridge/client_pdumpctrl_direct_bridge.o
pvrsrvkm-$(CONFIG_POWERVR_ROGUE_PDUMP) += generated/pdumpctrl_bridge/server_pdumpctrl_bridge.o
pvrsrvkm-$(CONFIG_POWERVR_ROGUE_PDUMP) += generated/rgxpdump_bridge/server_rgxpdump_bridge.o
pvrsrvkm-$(CONFIG_DMA_SHARED_BUFFER) += generated/dmabuf_bridge/server_dmabuf_bridge.o

443
drivers/staging/imgtec/rogue/allocmem.c
View File

@ -1,443 +0,0 @@
/*************************************************************************/ /*!
@File
@Title Host memory management implementation for Linux
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#include <linux/slab.h>
#include <linux/vmalloc.h>
#include <linux/mm.h>
#include <linux/string.h>
#include "img_defs.h"
#include "allocmem.h"
#include "pvr_debug.h"
#if defined(PVRSRV_ENABLE_PROCESS_STATS)
#include "process_stats.h"
#endif
#include "osfunc.h"
#if defined(PVR_DISABLE_KMALLOC_MEMSTATS)
#define ALLOCMEM_MEMSTATS_PADDING 0
#else
#define ALLOCMEM_MEMSTATS_PADDING sizeof(IMG_UINT32)
#endif
/* Ensure poison value is not divisible by 4.
* Used to poison memory to trip up use after free in kernel-side code
*/
#define OS_MEM_POISON_VALUE (0x6b)
static inline void _pvr_vfree(const void* pvAddr)
{
#if defined(DEBUG)
/* Size harder to come by for vmalloc and since vmalloc allocates
* a whole number of pages, poison the minimum size known to have
* been allocated.
*/
OSCachedMemSet((void*)pvAddr, OS_MEM_POISON_VALUE, PVR_LINUX_KMALLOC_ALLOCATION_THRESHOLD);
#endif
vfree(pvAddr);
}
static inline void _pvr_kfree(const void* pvAddr)
{
#if defined(DEBUG)
/* Poison whole memory block */
OSCachedMemSet((void*)pvAddr, OS_MEM_POISON_VALUE, ksize(pvAddr));
#endif
kfree(pvAddr);
}
#if !defined(PVRSRV_ENABLE_PROCESS_STATS)
IMG_INTERNAL void *OSAllocMem(IMG_UINT32 ui32Size)
{
void *pvRet = NULL;
if (ui32Size > PVR_LINUX_KMALLOC_ALLOCATION_THRESHOLD)
{
pvRet = vmalloc(ui32Size);
}
if (pvRet == NULL)
{
pvRet = kmalloc(ui32Size, GFP_KERNEL);
}
return pvRet;
}
IMG_INTERNAL void *OSAllocZMem(IMG_UINT32 ui32Size)
{
void *pvRet = NULL;
if (ui32Size > PVR_LINUX_KMALLOC_ALLOCATION_THRESHOLD)
{
pvRet = vzalloc(ui32Size);
}
if (pvRet == NULL)
{
pvRet = kzalloc(ui32Size, GFP_KERNEL);
}
return pvRet;
}
/*
* The parentheses around OSFreeMem prevent the macro in allocmem.h from
* applying, as it would break the function's definition.
*/
IMG_INTERNAL void (OSFreeMem)(void *pvMem)
{
if (pvMem != NULL)
{
if (!is_vmalloc_addr(pvMem))
{
_pvr_kfree(pvMem);
}
else
{
_pvr_vfree(pvMem);
}
}
}
#else
#if defined(PVRSRV_DEBUG_LINUX_MEMORY_STATS) && defined(DEBUG) && defined(PVRSRV_ENABLE_MEMORY_STATS)
IMG_INTERNAL void *_OSAllocMem(IMG_UINT32 ui32Size, void *pvAllocFromFile, IMG_UINT32 ui32AllocFromLine)
{
void *pvRet = NULL;
if (ui32Size > PVR_LINUX_KMALLOC_ALLOCATION_THRESHOLD)
{
pvRet = vmalloc(ui32Size);
}
if (pvRet == NULL)
{
pvRet = kmalloc(ui32Size, GFP_KERNEL);
}
if (pvRet != NULL)
{
if (!is_vmalloc_addr(pvRet))
{
IMG_CPU_PHYADDR sCpuPAddr;
sCpuPAddr.uiAddr = 0;
_PVRSRVStatsAddMemAllocRecord(PVRSRV_MEM_ALLOC_TYPE_KMALLOC,
pvRet,
sCpuPAddr,
ksize(pvRet),
NULL,
pvAllocFromFile,
ui32AllocFromLine);
}
else
{
IMG_CPU_PHYADDR sCpuPAddr;
sCpuPAddr.uiAddr = 0;
_PVRSRVStatsAddMemAllocRecord(PVRSRV_MEM_ALLOC_TYPE_VMALLOC,
pvRet,
sCpuPAddr,
((ui32Size + PAGE_SIZE -1) & ~(PAGE_SIZE-1)),
NULL,
pvAllocFromFile,
ui32AllocFromLine);
}
}
return pvRet;
}
IMG_INTERNAL void *_OSAllocZMem(IMG_UINT32 ui32Size, void *pvAllocFromFile, IMG_UINT32 ui32AllocFromLine)
{
void *pvRet = NULL;
if (ui32Size > PVR_LINUX_KMALLOC_ALLOCATION_THRESHOLD)
{
pvRet = vzalloc(ui32Size);
}
if (pvRet == NULL)
{
pvRet = kzalloc(ui32Size, GFP_KERNEL);
}
if (pvRet != NULL)
{
if (!is_vmalloc_addr(pvRet))
{
IMG_CPU_PHYADDR sCpuPAddr;
sCpuPAddr.uiAddr = 0;
_PVRSRVStatsAddMemAllocRecord(PVRSRV_MEM_ALLOC_TYPE_KMALLOC,
pvRet,
sCpuPAddr,
ksize(pvRet),
NULL,
pvAllocFromFile,
ui32AllocFromLine);
}
else
{
IMG_CPU_PHYADDR sCpuPAddr;
sCpuPAddr.uiAddr = 0;
_PVRSRVStatsAddMemAllocRecord(PVRSRV_MEM_ALLOC_TYPE_VMALLOC,
pvRet,
sCpuPAddr,
((ui32Size + PAGE_SIZE -1) & ~(PAGE_SIZE-1)),
NULL,
pvAllocFromFile,
ui32AllocFromLine);
}
}
return pvRet;
}
#else
IMG_INTERNAL void *OSAllocMem(IMG_UINT32 ui32Size)
{
void *pvRet = NULL;
if ((ui32Size + ALLOCMEM_MEMSTATS_PADDING) > PVR_LINUX_KMALLOC_ALLOCATION_THRESHOLD)
{
pvRet = vmalloc(ui32Size);
}
if (pvRet == NULL)
{
/* Allocate an additional 4 bytes to store the PID of the allocating process */
pvRet = kmalloc(ui32Size + ALLOCMEM_MEMSTATS_PADDING, GFP_KERNEL);
}
if (pvRet != NULL)
{
if (!is_vmalloc_addr(pvRet))
{
#if !defined(PVR_DISABLE_KMALLOC_MEMSTATS)
#if !defined(PVRSRV_ENABLE_MEMORY_STATS)
{
/* Store the PID in the final additional 4 bytes allocated */
IMG_UINT32 *puiTemp = (IMG_UINT32*) (((IMG_BYTE*)pvRet) + (ksize(pvRet) - ALLOCMEM_MEMSTATS_PADDING));
*puiTemp = OSGetCurrentProcessID();
}
PVRSRVStatsIncrMemAllocStat(PVRSRV_MEM_ALLOC_TYPE_KMALLOC, ksize(pvRet));
#else
IMG_CPU_PHYADDR sCpuPAddr;
sCpuPAddr.uiAddr = 0;
PVRSRVStatsAddMemAllocRecord(PVRSRV_MEM_ALLOC_TYPE_KMALLOC,
pvRet,
sCpuPAddr,
ksize(pvRet),
NULL);
#endif
#endif
}
else
{
#if !defined(PVR_DISABLE_KMALLOC_MEMSTATS)
#if !defined(PVRSRV_ENABLE_MEMORY_STATS)
PVRSRVStatsIncrMemAllocStatAndTrack(PVRSRV_MEM_ALLOC_TYPE_VMALLOC,
((ui32Size + PAGE_SIZE -1) & ~(PAGE_SIZE-1)),
(IMG_UINT64)(uintptr_t) pvRet);
#else
IMG_CPU_PHYADDR sCpuPAddr;
sCpuPAddr.uiAddr = 0;
PVRSRVStatsAddMemAllocRecord(PVRSRV_MEM_ALLOC_TYPE_VMALLOC,
pvRet,
sCpuPAddr,
((ui32Size + PAGE_SIZE -1) & ~(PAGE_SIZE-1)),
NULL);
#endif
#endif
}
}
return pvRet;
}
IMG_INTERNAL void *OSAllocZMem(IMG_UINT32 ui32Size)
{
void *pvRet = NULL;
if ((ui32Size + ALLOCMEM_MEMSTATS_PADDING) > PVR_LINUX_KMALLOC_ALLOCATION_THRESHOLD)
{
pvRet = vzalloc(ui32Size);
}
if (pvRet == NULL)
{
/* Allocate an additional 4 bytes to store the PID of the allocating process */
pvRet = kzalloc(ui32Size + ALLOCMEM_MEMSTATS_PADDING, GFP_KERNEL);
}
if (pvRet != NULL)
{
if (!is_vmalloc_addr(pvRet))
{
#if !defined(PVR_DISABLE_KMALLOC_MEMSTATS)
#if !defined(PVRSRV_ENABLE_MEMORY_STATS)
{
/* Store the PID in the final additional 4 bytes allocated */
IMG_UINT32 *puiTemp = (IMG_UINT32*) (((IMG_BYTE*)pvRet) + (ksize(pvRet) - ALLOCMEM_MEMSTATS_PADDING));
*puiTemp = OSGetCurrentProcessID();
}
PVRSRVStatsIncrMemAllocStat(PVRSRV_MEM_ALLOC_TYPE_KMALLOC, ksize(pvRet));
#else
IMG_CPU_PHYADDR sCpuPAddr;
sCpuPAddr.uiAddr = 0;
PVRSRVStatsAddMemAllocRecord(PVRSRV_MEM_ALLOC_TYPE_KMALLOC,
pvRet,
sCpuPAddr,
ksize(pvRet),
NULL);
#endif
#endif
}
else
{
#if !defined(PVR_DISABLE_KMALLOC_MEMSTATS)
#if !defined(PVRSRV_ENABLE_MEMORY_STATS)
PVRSRVStatsIncrMemAllocStatAndTrack(PVRSRV_MEM_ALLOC_TYPE_VMALLOC,
((ui32Size + PAGE_SIZE -1) & ~(PAGE_SIZE-1)),
(IMG_UINT64)(uintptr_t) pvRet);
#else
IMG_CPU_PHYADDR sCpuPAddr;
sCpuPAddr.uiAddr = 0;
PVRSRVStatsAddMemAllocRecord(PVRSRV_MEM_ALLOC_TYPE_VMALLOC,
pvRet,
sCpuPAddr,
((ui32Size + PAGE_SIZE -1) & ~(PAGE_SIZE-1)),
NULL);
#endif
#endif
}
}
return pvRet;
}
#endif
/*
* The parentheses around OSFreeMem prevent the macro in allocmem.h from
* applying, as it would break the function's definition.
*/
IMG_INTERNAL void (OSFreeMem)(void *pvMem)
{
if (pvMem != NULL)
{
if (!is_vmalloc_addr(pvMem))
{
#if !defined(PVR_DISABLE_KMALLOC_MEMSTATS)
#if !defined(PVRSRV_ENABLE_MEMORY_STATS)
PVRSRVStatsDecrMemAllocStat(PVRSRV_MEM_ALLOC_TYPE_KMALLOC, ksize(pvMem));
#else
PVRSRVStatsRemoveMemAllocRecord(PVRSRV_MEM_ALLOC_TYPE_KMALLOC,
(IMG_UINT64)(uintptr_t) pvMem);
#endif
#endif
_pvr_kfree(pvMem);
}
else
{
#if !defined(PVR_DISABLE_KMALLOC_MEMSTATS)
#if !defined(PVRSRV_ENABLE_MEMORY_STATS)
PVRSRVStatsDecrMemAllocStatAndUntrack(PVRSRV_MEM_ALLOC_TYPE_VMALLOC,
(IMG_UINT64)(uintptr_t) pvMem);
#else
PVRSRVStatsRemoveMemAllocRecord(PVRSRV_MEM_ALLOC_TYPE_VMALLOC,
(IMG_UINT64)(uintptr_t) pvMem);
#endif
#endif
_pvr_vfree(pvMem);
}
}
}
#endif
IMG_INTERNAL void *OSAllocMemNoStats(IMG_UINT32 ui32Size)
{
void *pvRet = NULL;
if (ui32Size > PVR_LINUX_KMALLOC_ALLOCATION_THRESHOLD)
{
pvRet = vmalloc(ui32Size);
}
if (pvRet == NULL)
{
pvRet = kmalloc(ui32Size, GFP_KERNEL);
}
return pvRet;
}
IMG_INTERNAL void *OSAllocZMemNoStats(IMG_UINT32 ui32Size)
{
void *pvRet = NULL;
if (ui32Size > PVR_LINUX_KMALLOC_ALLOCATION_THRESHOLD)
{
pvRet = vzalloc(ui32Size);
}
if (pvRet == NULL)
{
pvRet = kzalloc(ui32Size, GFP_KERNEL);
}
return pvRet;
}
/*
* The parentheses around OSFreeMemNoStats prevent the macro in allocmem.h from
* applying, as it would break the function's definition.
*/
IMG_INTERNAL void (OSFreeMemNoStats)(void *pvMem)
{
if (pvMem != NULL)
{
if ( !is_vmalloc_addr(pvMem) )
{
_pvr_kfree(pvMem);
}
else
{
_pvr_vfree(pvMem);
}
}
}

176
drivers/staging/imgtec/rogue/allocmem.h
View File

@ -1,176 +0,0 @@
/*************************************************************************/ /*!
@File allocmem.h
@Title memory allocation header
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Memory-Allocation API definitions
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#ifndef __ALLOCMEM_H__
#define __ALLOCMEM_H__
#include "img_types.h"
#include "pvr_debug.h"
#if defined (__cplusplus)
extern "C" {
#endif
#if !defined(PVRSRV_DEBUG_LINUX_MEMORY_STATS) || !defined(DEBUG) || !defined(PVRSRV_ENABLE_PROCESS_STATS) || !defined(PVRSRV_ENABLE_MEMORY_STATS)
/**************************************************************************/ /*!
@Function OSAllocMem
@Description Allocates CPU memory. Contents are uninitialized.
If passed a size of zero, function should not assert,
but just return a NULL pointer.
@Input ui32Size Size of required allocation (in bytes)
@Return Pointer to allocated memory on success.
Otherwise NULL.
*/ /**************************************************************************/
void *OSAllocMem(IMG_UINT32 ui32Size);
/**************************************************************************/ /*!
@Function OSAllocZMem
@Description Allocates CPU memory and initializes the contents to zero.
If passed a size of zero, function should not assert,
but just return a NULL pointer.
@Input ui32Size Size of required allocation (in bytes)
@Return Pointer to allocated memory on success.
Otherwise NULL.
*/ /**************************************************************************/
void *OSAllocZMem(IMG_UINT32 ui32Size);
#else
void *_OSAllocMem(IMG_UINT32 ui32Size, void *pvAllocFromFile, IMG_UINT32 ui32AllocFromLine);
void *_OSAllocZMem(IMG_UINT32 ui32Size, void *pvAllocFromFile, IMG_UINT32 ui32AllocFromLine);
#define OSAllocMem(_size) \
_OSAllocMem ((_size), (__FILE__), (__LINE__));
#define OSAllocZMem(_size) \
_OSAllocZMem ((_size), (__FILE__), (__LINE__));
#endif
/**************************************************************************/ /*!
@Function OSAllocMemNoStats
@Description Allocates CPU memory. Contents are uninitialized.
If passed a size of zero, function should not assert,
but just return a NULL pointer.
The allocated memory is not accounted for by process stats.
Process stats are an optional feature (enabled only when
PVRSRV_ENABLE_PROCESS_STATS is defined) which track the amount
of memory allocated to help in debugging. Where this is not
required, OSAllocMem() and OSAllocMemNoStats() equate to
the same operation.
@Input ui32Size Size of required allocation (in bytes)
@Return Pointer to allocated memory on success.
Otherwise NULL.
*/ /**************************************************************************/
void *OSAllocMemNoStats(IMG_UINT32 ui32Size);
/**************************************************************************/ /*!
@Function OSAllocZMemNoStats
@Description Allocates CPU memory and initializes the contents to zero.
If passed a size of zero, function should not assert,
but just return a NULL pointer.
The allocated memory is not accounted for by process stats.
Process stats are an optional feature (enabled only when
PVRSRV_ENABLE_PROCESS_STATS is defined) which track the amount
of memory allocated to help in debugging. Where this is not
required, OSAllocZMem() and OSAllocZMemNoStats() equate to
the same operation.
@Input ui32Size Size of required allocation (in bytes)
@Return Pointer to allocated memory on success.
Otherwise NULL.
*/ /**************************************************************************/
void *OSAllocZMemNoStats(IMG_UINT32 ui32Size);
/**************************************************************************/ /*!
@Function OSFreeMem
@Description Frees previously allocated CPU memory.
@Input pvCpuVAddr Pointer to the memory to be freed.
@Return None.
*/ /**************************************************************************/
void OSFreeMem(void *pvCpuVAddr);
/**************************************************************************/ /*!
@Function OSFreeMemNoStats
@Description Frees previously allocated CPU memory.
The freed memory does not update the figures in process stats.
Process stats are an optional feature (enabled only when
PVRSRV_ENABLE_PROCESS_STATS is defined) which track the amount
of memory allocated to help in debugging. Where this is not
required, OSFreeMem() and OSFreeMemNoStats() equate to the
same operation.
@Input pvCpuVAddr Pointer to the memory to be freed.
@Return None.
*/ /**************************************************************************/
void OSFreeMemNoStats(void *pvCpuVAddr);
/*
* These macros allow us to catch double-free bugs on DEBUG builds and
* prevent crashes on RELEASE builds.
*/
#if defined(DEBUG)
#define double_free_sentinel (void*) &OSFreeMem
#define ALLOCMEM_ASSERT(exp) PVR_ASSERT(exp)
#else
#define double_free_sentinel NULL
#define ALLOCMEM_ASSERT(exp) do {} while(0)
#endif
#define OSFreeMem(_ptr) do { \
ALLOCMEM_ASSERT((_ptr) != double_free_sentinel); \
(OSFreeMem)(_ptr); \
(_ptr) = double_free_sentinel; \
MSC_SUPPRESS_4127 \
} while (0)
#define OSFreeMemNoStats(_ptr) do { \
ALLOCMEM_ASSERT((_ptr) != double_free_sentinel); \
(OSFreeMemNoStats)(_ptr); \
(_ptr) = double_free_sentinel; \
MSC_SUPPRESS_4127 \
} while (0)
#if defined (__cplusplus)
}
#endif
#endif /* __ALLOCMEM_H__ */
/******************************************************************************
End of file (allocmem.h)
******************************************************************************/

2235
drivers/staging/imgtec/rogue/cache_km.c
View File

File diff suppressed because it is too large Load Diff

146
drivers/staging/imgtec/rogue/cache_km.h
View File

@ -1,146 +0,0 @@
/*************************************************************************/ /*!
@File cache.h
@Title CPU cache management header
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#ifndef _CACHE_KM_H_
#define _CACHE_KM_H_
#if defined(LINUX)
#include <linux/version.h>
#endif
#include "pvrsrv_error.h"
#include "img_types.h"
#include "cache_ops.h"
#include "device.h"
#include "pmr.h"
typedef IMG_UINT32 PVRSRV_CACHE_OP_ADDR_TYPE; /*!< Type represents address required for cache op. */
#define PVRSRV_CACHE_OP_ADDR_TYPE_VIRTUAL 0x1 /*!< Operation requires virtual address only */
#define PVRSRV_CACHE_OP_ADDR_TYPE_PHYSICAL 0x2 /*!< Operation requires physical address only */
#define PVRSRV_CACHE_OP_ADDR_TYPE_BOTH 0x3 /*!< Operation requires both virtual & physical addresses */
#define CACHEFLUSH_KM_RANGEBASED_DEFERRED 0x1 /*!< Services KM using deferred (i.e asynchronous) range-based flush */
#define CACHEFLUSH_KM_RANGEBASED 0x2 /*!< Services KM using immediate (i.e synchronous) range-based flush */
#define CACHEFLUSH_KM_GLOBAL 0x3 /*!< Services KM using global flush */
#ifndef CACHEFLUSH_KM_TYPE /*!< Type represents cache maintenance operation method */
#if defined(__x86__)
/* Default for x86/x86_64 is global */
#define CACHEFLUSH_KM_TYPE CACHEFLUSH_KM_GLOBAL
#elif defined(__aarch64__)
#if defined(LINUX) && (LINUX_VERSION_CODE >= KERNEL_VERSION(4,2,0))
/* Default here is range-based (i.e. no linux global flush) */
#define CACHEFLUSH_KM_TYPE CACHEFLUSH_KM_RANGEBASED
#else
/* Default here is global (i.e. OS supports global flush) */
#define CACHEFLUSH_KM_TYPE CACHEFLUSH_KM_GLOBAL
#endif
#else
/* Default for other architecture is range-based */
#define CACHEFLUSH_KM_TYPE CACHEFLUSH_KM_RANGEBASED
#endif
#else
#if (CACHEFLUSH_KM_TYPE == CACHEFLUSH_KM_GLOBAL)
#if defined(__mips__)
/* Architecture does not support global cache maintenance */
#error "CACHEFLUSH_KM_GLOBAL is not supported on architecture"
#elif defined(__aarch64__)
#if defined(LINUX) && (LINUX_VERSION_CODE >= KERNEL_VERSION(4,2,0))
/* Linux revisions does not support global cache maintenance */
#error "CACHEFLUSH_KM_GLOBAL is not supported on Linux v4.2 onwards"
#endif
#endif
#endif
#endif
/*
If we get multiple cache operations before the operation which will
trigger the operation to happen then we need to make sure we do
the right thing. Used for global cache maintenance
*/
#ifdef INLINE_IS_PRAGMA
#pragma inline(SetCacheOp)
#endif
static INLINE PVRSRV_CACHE_OP SetCacheOp(PVRSRV_CACHE_OP uiCurrent, PVRSRV_CACHE_OP uiNew)
{
PVRSRV_CACHE_OP uiRet;
uiRet = uiCurrent | uiNew;
return uiRet;
}
/*
Cache maintenance framework API
*/
PVRSRV_ERROR CacheOpInit(void);
PVRSRV_ERROR CacheOpDeInit(void);
/* This interface is always guaranteed to be synchronous */
PVRSRV_ERROR CacheOpExec (PMR *psPMR,
IMG_DEVMEM_OFFSET_T uiOffset,
IMG_DEVMEM_SIZE_T uiSize,
PVRSRV_CACHE_OP uiCacheOp);
/* This interface _may_ defer cache-ops (i.e. asynchronous) */
PVRSRV_ERROR CacheOpQueue (IMG_UINT32 ui32OpCount,
PMR **ppsPMR,
IMG_DEVMEM_OFFSET_T *puiOffset,
IMG_DEVMEM_SIZE_T *puiSize,
PVRSRV_CACHE_OP *puiCacheOp,
IMG_UINT32 *pui32OpSeqNum);
/* This interface is used to log user-mode cache-ops */
PVRSRV_ERROR CacheOpLog (PMR *psPMR,
IMG_DEVMEM_OFFSET_T uiOffset,
IMG_DEVMEM_SIZE_T uiSize,
IMG_UINT64 ui64QueuedTimeMs,
IMG_UINT64 ui64ExecuteTimeMs,
PVRSRV_CACHE_OP uiCacheOp);
/* This interface must be used to fence for pending cache-ops before kicks */
PVRSRV_ERROR CacheOpFence (RGXFWIF_DM eOpType, IMG_UINT32 ui32OpSeqNum);
/* This interface is used for notification of completed cache-ops */
PVRSRV_ERROR CacheOpSetTimeline (IMG_INT32 i32OpTimeline);
/* This interface is used for retrieving the processor d-cache line size */
PVRSRV_ERROR CacheOpGetLineSize (IMG_UINT32 *pui32L1DataCacheLineSize);
#endif /* _CACHE_KM_H_ */

70
drivers/staging/imgtec/rogue/cache_ops.h
View File

@ -1,70 +0,0 @@
/*************************************************************************/ /*!
@File
@Title Services cache management header
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Defines for cache management which are visible internally
and externally
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#ifndef _CACHE_OPS_H_
#define _CACHE_OPS_H_
#include "img_types.h"
typedef IMG_UINT32 PVRSRV_CACHE_OP; /*!< Type represents cache maintenance operation */
#define PVRSRV_CACHE_OP_NONE 0x0 /*!< No operation */
#define PVRSRV_CACHE_OP_CLEAN 0x1 /*!< Flush w/o invalidate */
#define PVRSRV_CACHE_OP_INVALIDATE 0x2 /*!< Invalidate w/o flush */
#define PVRSRV_CACHE_OP_FLUSH 0x3 /*!< Flush w/ invalidate */
#define CACHEFLUSH_UM_X86 0x1 /*!< Intel x86/x64 specific UM range-based cache flush */
#define CACHEFLUSH_UM_ARM64 0x2 /*!< ARM Aarch64 specific UM range-based cache flush */
#define CACHEFLUSH_UM_GENERIC 0x3 /*!< Generic UM/KM cache flush (i.e. CACHEFLUSH_KM_TYPE) */
#define CACHEFLUSH_UM_X86_ONLY 0x4 /*!< Force x86/x64 UM flush exclusively */
#define CACHEFLUSH_UM_ARM64_ONLY 0x5 /*!< Force ARM Aarch64 UM flush exclusively */
#ifndef CACHEFLUSH_UM_TYPE
#if defined(__i386__) || defined(__x86_64__)
#define CACHEFLUSH_UM_TYPE CACHEFLUSH_UM_X86
#elif defined(__aarch64__)
#define CACHEFLUSH_UM_TYPE CACHEFLUSH_UM_ARM64
#else
#define CACHEFLUSH_UM_TYPE CACHEFLUSH_UM_GENERIC
#endif
#endif
#endif /* _CACHE_OPS_H_ */

84
drivers/staging/imgtec/rogue/connection_data.h
View File

@ -1,84 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 */
/* --------------------------------------------------------------------------------------------------------
* File: connection_data.h
* --------------------------------------------------------------------------------------------------------
*/
#ifndef __CONNECTION_DATA_H__
#define __CONNECTION_DATA_H__
#ifdef __cplusplus
extern "C" {
#endif
/* ---------------------------------------------------------------------------------------------------------
* Include Files
* ---------------------------------------------------------------------------------------------------------
*/
// #include <linux/kernel.h>
#include "handle.h"
#include "img_types.h"
#include "pvrsrv_cleanup.h"
/* ---------------------------------------------------------------------------------------------------------
* Macros Definition
* ---------------------------------------------------------------------------------------------------------
*/
/* ---------------------------------------------------------------------------------------------------------
* Types and Structures Definition
* ---------------------------------------------------------------------------------------------------------
*/
typedef struct _CONNECTION_DATA_ {
PVRSRV_HANDLE_BASE *psHandleBase;
PROCESS_HANDLE_BASE *psProcessHandleBase;
struct _SYNC_CONNECTION_DATA_ *psSyncConnectionData;
struct _PDUMP_CONNECTION_DATA_ *psPDumpConnectionData;
/* Holds the client flags supplied at connection time */
IMG_UINT32 ui32ClientFlags;
/*
* OS specific data can be stored via this handle.
* See osconnection_server.h for a generic mechanism
* for initialising this field.
*/
IMG_HANDLE hOsPrivateData;
IMG_PID pid;
void *hSecureData;
IMG_HANDLE hProcessStats;
IMG_HANDLE hClientTLStream;
/* Structure which is hooked into the cleanup thread work list */
PVRSRV_CLEANUP_THREAD_WORK sCleanupThreadFn;
/* List navigation for deferred freeing of connection data */
struct _CONNECTION_DATA_ **ppsThis;
struct _CONNECTION_DATA_ *psNext;
} CONNECTION_DATA;
/* ---------------------------------------------------------------------------------------------------------
* Global Functions' Prototype
* ---------------------------------------------------------------------------------------------------------
*/
/* ---------------------------------------------------------------------------------------------------------
* Inline Functions Implementation
* ---------------------------------------------------------------------------------------------------------
*/
#ifdef __cplusplus
}
#endif
#endif /* __CONNECTION_DATA_H__ */

400
drivers/staging/imgtec/rogue/connection_server.c
View File

@ -1,400 +0,0 @@
/*************************************************************************/ /*!
@File
@Title Server side connection management
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Handles connections coming from the client and the management
connection based information
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#include "handle.h"
#include "pvrsrv.h"
#include "connection_server.h"
#include "osconnection_server.h"
#include "allocmem.h"
#include "pvr_debug.h"
#include "sync_server.h"
#include "process_stats.h"
#include "pdump_km.h"
#include "lists.h"
#include "osfunc.h"
#include "tlstream.h"
/* PID associated with Connection currently being purged by Cleanup thread */
static IMG_PID gCurrentPurgeConnectionPid = 0;
static PVRSRV_ERROR ConnectionDataDestroy(CONNECTION_DATA *psConnection)
{
PVRSRV_ERROR eError;
PROCESS_HANDLE_BASE *psProcessHandleBase;
IMG_UINT64 ui64MaxBridgeTime;
PVRSRV_DATA *psPVRSRVData = PVRSRVGetPVRSRVData();
if(psPVRSRVData->bUnload)
{
/* driver is unloading so do not allow the bridge lock to be released */
ui64MaxBridgeTime = 0;
}
else
{
ui64MaxBridgeTime = CONNECTION_DEFERRED_CLEANUP_TIMESLICE_NS;
}
if (psConnection == NULL)
{
PVR_DPF((PVR_DBG_ERROR, "ConnectionDestroy: Missing connection!"));
PVR_ASSERT(0);
return PVRSRV_ERROR_INVALID_PARAMS;
}
/* Close the process statistics */
#if defined(PVRSRV_ENABLE_PROCESS_STATS) && !defined(PVRSRV_DEBUG_LINUX_MEMORY_STATS)
if (psConnection->hProcessStats != NULL)
{
PVRSRVStatsDeregisterProcess(psConnection->hProcessStats);
psConnection->hProcessStats = NULL;
}
#endif
/* Close HWPerfClient stream here even though we created it in
* PVRSRVConnectKM(). */
if (psConnection->hClientTLStream)
{
TLStreamClose(psConnection->hClientTLStream);
psConnection->hClientTLStream = NULL;
PVR_DPF((PVR_DBG_MESSAGE, "Destroyed private stream."));
}
/* Get process handle base to decrement the refcount */
psProcessHandleBase = psConnection->psProcessHandleBase;
if (psProcessHandleBase != NULL)
{
/* In case the refcount becomes 0 we can remove the process handle base */
if (OSAtomicDecrement(&psProcessHandleBase->iRefCount) == 0)
{
uintptr_t uiHashValue;
OSLockAcquire(psPVRSRVData->hProcessHandleBase_Lock);
uiHashValue = HASH_Remove(psPVRSRVData->psProcessHandleBase_Table, psConnection->pid);
OSLockRelease(psPVRSRVData->hProcessHandleBase_Lock);
if (!uiHashValue)
{
PVR_DPF((PVR_DBG_ERROR,
"%s: Failed to remove handle base from hash table.",
__func__));
return PVRSRV_ERROR_UNABLE_TO_REMOVE_HASH_VALUE;
}
eError = PVRSRVFreeHandleBase(psProcessHandleBase->psHandleBase, ui64MaxBridgeTime);
if (eError != PVRSRV_OK)
{
if (eError != PVRSRV_ERROR_RETRY)
{
PVR_DPF((PVR_DBG_ERROR,
"ConnectionDataDestroy: Couldn't free handle base for process (%d)",
eError));
}
return eError;
}
OSFreeMem(psProcessHandleBase);
}
psConnection->psProcessHandleBase = NULL;
}
/* Free handle base for this connection */
if (psConnection->psHandleBase != NULL)
{
eError = PVRSRVFreeHandleBase(psConnection->psHandleBase, ui64MaxBridgeTime);
if (eError != PVRSRV_OK)
{
if (eError != PVRSRV_ERROR_RETRY)
{
PVR_DPF((PVR_DBG_ERROR,
"ConnectionDataDestroy: Couldn't free handle base for connection (%d)",
eError));
}
return eError;
}
psConnection->psHandleBase = NULL;
}
if (psConnection->psSyncConnectionData != NULL)
{
SyncUnregisterConnection(psConnection->psSyncConnectionData);
psConnection->psSyncConnectionData = NULL;
}
if (psConnection->psPDumpConnectionData != NULL)
{
PDumpUnregisterConnection(psConnection->psPDumpConnectionData);
psConnection->psPDumpConnectionData = NULL;
}
/* Call environment specific connection data deinit function */
if (psConnection->hOsPrivateData != NULL)
{
eError = OSConnectionPrivateDataDeInit(psConnection->hOsPrivateData);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,
"PVRSRVConnectionDataDestroy: OSConnectionPrivateDataDeInit failed (%d)",
eError));
return eError;
}
psConnection->hOsPrivateData = NULL;
}
OSFreeMem(psConnection);
return PVRSRV_OK;
}
PVRSRV_ERROR PVRSRVConnectionConnect(void **ppvPrivData, void *pvOSData)
{
CONNECTION_DATA *psConnection;
PVRSRV_ERROR eError;
PROCESS_HANDLE_BASE *psProcessHandleBase;
PVRSRV_DATA *psPVRSRVData = PVRSRVGetPVRSRVData();
/* Allocate connection data area */
psConnection = OSAllocZMem(sizeof(*psConnection));
if (psConnection == NULL)
{
PVR_DPF((PVR_DBG_ERROR,
"PVRSRVConnectionConnect: Couldn't allocate connection data"));
return PVRSRV_ERROR_OUT_OF_MEMORY;
}
/* Call environment specific connection data init function */
eError = OSConnectionPrivateDataInit(&psConnection->hOsPrivateData, pvOSData);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,
"PVRSRVConnectionConnect: OSConnectionPrivateDataInit failed (%d)",
eError));
goto failure;
}
psConnection->pid = OSGetCurrentClientProcessIDKM();
/* Register this connection with the sync core */
eError = SyncRegisterConnection(&psConnection->psSyncConnectionData);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,
"PVRSRVConnectionConnect: Couldn't register the sync data"));
goto failure;
}
/*
* Register this connection with the pdump core. Pass in the sync connection data
* as it will be needed later when we only get passed in the PDump connection data.
*/
eError = PDumpRegisterConnection(psConnection->psSyncConnectionData,
&psConnection->psPDumpConnectionData);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,
"PVRSRVConnectionConnect: Couldn't register the PDump data"));
goto failure;
}
/* Allocate handle base for this connection */
eError = PVRSRVAllocHandleBase(&psConnection->psHandleBase,
PVRSRV_HANDLE_BASE_TYPE_CONNECTION);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,
"PVRSRVConnectionConnect: Couldn't allocate handle base for connection (%d)",
eError));
goto failure;
}
/* Try to get process handle base if it already exists */
OSLockAcquire(psPVRSRVData->hProcessHandleBase_Lock);
psProcessHandleBase = (PROCESS_HANDLE_BASE*) HASH_Retrieve(PVRSRVGetPVRSRVData()->psProcessHandleBase_Table,
psConnection->pid);
/* In case there is none we are going to allocate one */
if (psProcessHandleBase == NULL)
{
psProcessHandleBase = OSAllocZMem(sizeof(PROCESS_HANDLE_BASE));
if (psProcessHandleBase == NULL)
{
PVR_DPF((PVR_DBG_ERROR,
"%s: Failed to allocate handle base, oom.",
__func__));
eError = PVRSRV_ERROR_OUT_OF_MEMORY;
goto failureLock;
}
/* Allocate handle base for this process */
eError = PVRSRVAllocHandleBase(&psProcessHandleBase->psHandleBase,
PVRSRV_HANDLE_BASE_TYPE_PROCESS);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,
"%s: Couldn't allocate handle base for process (%d)",
__func__,
eError));
OSFreeMem(psProcessHandleBase);
goto failureLock;
}
/* Insert the handle base into the global hash table */
if (!HASH_Insert(PVRSRVGetPVRSRVData()->psProcessHandleBase_Table,
psConnection->pid,
(uintptr_t) psProcessHandleBase))
{
eError = PVRSRV_ERROR_UNABLE_TO_INSERT_HASH_VALUE;
PVRSRVFreeHandleBase(psProcessHandleBase->psHandleBase, 0);
OSFreeMem(psProcessHandleBase);
goto failureLock;
}
}
OSLockRelease(psPVRSRVData->hProcessHandleBase_Lock);
psConnection->psProcessHandleBase = psProcessHandleBase;
OSAtomicIncrement(&psProcessHandleBase->iRefCount);
/* Allocate process statistics */
#if defined(PVRSRV_ENABLE_PROCESS_STATS) && !defined(PVRSRV_DEBUG_LINUX_MEMORY_STATS)
eError = PVRSRVStatsRegisterProcess(&psConnection->hProcessStats);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,
"PVRSRVConnectionConnect: Couldn't register process statistics (%d)",
eError));
goto failure;
}
#endif
*ppvPrivData = psConnection;
return eError;
failureLock:
OSLockRelease(psPVRSRVData->hProcessHandleBase_Lock);
failure:
ConnectionDataDestroy(psConnection);
return eError;
}
static PVRSRV_ERROR _CleanupThreadPurgeConnectionData(void *pvConnectionData)
{
PVRSRV_ERROR eErrorConnection, eErrorKernel;
CONNECTION_DATA *psConnectionData = pvConnectionData;
OSAcquireBridgeLock();
gCurrentPurgeConnectionPid = psConnectionData->pid;
eErrorConnection = ConnectionDataDestroy(psConnectionData);
if (eErrorConnection != PVRSRV_OK)
{
if (eErrorConnection == PVRSRV_ERROR_RETRY)
{
PVR_DPF((PVR_DBG_MESSAGE,
"_CleanupThreadPurgeConnectionData: Failed to purge connection data %p "
"(deferring destruction)",
psConnectionData));
}
}
else
{
PVR_DPF((PVR_DBG_MESSAGE,
"_CleanupThreadPurgeConnectionData: Connection data %p deferred destruction finished",
psConnectionData));
}
/* Check if possible resize the global handle base */
eErrorKernel = PVRSRVPurgeHandles(KERNEL_HANDLE_BASE);
if (eErrorKernel != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,
"_CleanupThreadPurgeConnectionData: Purge of global handle pool failed (%d)",
eErrorKernel));
}
gCurrentPurgeConnectionPid = 0;
OSReleaseBridgeLock();
return eErrorConnection;
}
void PVRSRVConnectionDisconnect(void *pvDataPtr)
{
CONNECTION_DATA *psConnectionData = pvDataPtr;
/* Notify the PDump core if the pdump control client is disconnecting */
if (psConnectionData->ui32ClientFlags & SRV_FLAGS_PDUMPCTRL)
{
PDumpDisconnectionNotify();
}
#if defined(PVRSRV_FORCE_UNLOAD_IF_BAD_STATE)
if (PVRSRVGetPVRSRVData()->eServicesState == PVRSRV_SERVICES_STATE_OK)
#endif
{
/* Defer the release of the connection data */
psConnectionData->sCleanupThreadFn.pfnFree = _CleanupThreadPurgeConnectionData;
psConnectionData->sCleanupThreadFn.pvData = psConnectionData;
psConnectionData->sCleanupThreadFn.ui32RetryCount = CLEANUP_THREAD_RETRY_COUNT_DEFAULT;
psConnectionData->sCleanupThreadFn.bDependsOnHW = IMG_FALSE;
PVRSRVCleanupThreadAddWork(&psConnectionData->sCleanupThreadFn);
}
}
IMG_PID PVRSRVGetPurgeConnectionPid(void)
{
return gCurrentPurgeConnectionPid;
}

86
drivers/staging/imgtec/rogue/connection_server.h
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@ -1,86 +0,0 @@
/**************************************************************************/ /*!
@File
@Title Server side connection management
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description API for server side connection management
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /***************************************************************************/
#if !defined(_CONNECTION_SERVER_H_)
#define _CONNECTION_SERVER_H_
#include "img_types.h"
#include "handle.h"
#include "pvrsrv_cleanup.h"
#include "connection_data.h"
/* Variable used to hold in memory the timeout for the current time slice*/
extern IMG_UINT64 gui64TimesliceLimit;
/* Counter number of handle data freed during the current time slice */
extern IMG_UINT32 gui32HandleDataFreeCounter;
/* Set the maximum time the freeing of the resources can keep the lock */
#define CONNECTION_DEFERRED_CLEANUP_TIMESLICE_NS 3000 * 1000 /* 3ms */
#include "osconnection_server.h"
PVRSRV_ERROR PVRSRVConnectionConnect(void **ppvPrivData, void *pvOSData);
void PVRSRVConnectionDisconnect(void *pvPrivData);
IMG_PID PVRSRVGetPurgeConnectionPid(void);
#ifdef INLINE_IS_PRAGMA
#pragma inline(PVRSRVConnectionPrivateData)
#endif
static INLINE
IMG_HANDLE PVRSRVConnectionPrivateData(CONNECTION_DATA *psConnection)
{
return (psConnection != NULL) ? psConnection->hOsPrivateData : NULL;
}
#ifdef INLINE_IS_PRAGMA
#pragma inline(PVRSRVGetDevData)
#endif
static INLINE
PVRSRV_DEVICE_NODE * PVRSRVGetDevData(CONNECTION_DATA *psConnection)
{
return OSGetDevData(psConnection);
}
#endif /* !defined(_CONNECTION_SERVER_H_) */

1562
drivers/staging/imgtec/rogue/dbgdriv.c
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120
drivers/staging/imgtec/rogue/dbgdriv.h
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@ -1,120 +0,0 @@
/*************************************************************************/ /*!
@File
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#ifndef _DBGDRIV_
#define _DBGDRIV_
/*****************************************************************************
The odd constant or two
*****************************************************************************/
#define DBGDRIV_VERSION 0x100
#define MAX_PROCESSES 2
#define BLOCK_USED 0x01
#define BLOCK_LOCKED 0x02
#define DBGDRIV_MONOBASE 0x000B0000
/*****************************************************************************
* OS-specific declarations and init/cleanup functions
*****************************************************************************/
extern void * g_pvAPIMutex;
extern IMG_INT dbgdrv_init(void);
extern void dbgdrv_cleanup(void);
/*****************************************************************************
Internal debug driver core functions
*****************************************************************************/
/* Called by WDDM debug driver win7/hostfunc.c */
IMG_BOOL IMG_CALLCONV DBGDrivCreateStream(IMG_CHAR *pszName, IMG_UINT32 ui32Flags, IMG_UINT32 ui32Pages,
IMG_HANDLE* phInit, IMG_HANDLE* phMain, IMG_HANDLE* phDeinit);
/* Called by Linux debug driver main.c to allow the API mutex lock to be used
* to protect the common IOCTL read buffer while avoiding deadlock in the Ext
* layer
*/
IMG_UINT32 IMG_CALLCONV DBGDrivRead(PDBG_STREAM psStream, IMG_UINT32 ui32BufID,
IMG_UINT32 ui32OutBufferSize,IMG_UINT8 *pui8OutBuf);
IMG_UINT32 IMG_CALLCONV DBGDrivGetMarker(PDBG_STREAM psStream);
/* Used in ioctl.c in DBGDIOCDrivGetServiceTable() which is called in WDDM PDump files */
void * IMG_CALLCONV DBGDrivGetServiceTable(void);
/* Used in WDDM version of debug driver win7/main.c */
void DestroyAllStreams(void);
/*****************************************************************************
Function prototypes
*****************************************************************************/
IMG_UINT32 AtoI(IMG_CHAR *szIn);
void HostMemSet(void *pvDest,IMG_UINT8 ui8Value,IMG_UINT32 ui32Size);
void HostMemCopy(void *pvDest,void *pvSrc,IMG_UINT32 ui32Size);
/*****************************************************************************
Secure handle Function prototypes
*****************************************************************************/
IMG_SID PStream2SID(PDBG_STREAM psStream);
PDBG_STREAM SID2PStream(IMG_SID hStream);
IMG_BOOL AddSIDEntry(PDBG_STREAM psStream);
IMG_BOOL RemoveSIDEntry(PDBG_STREAM psStream);
/*****************************************************************************
Declarations for IOCTL Service table and KM table entry points
*****************************************************************************/
IMG_BOOL IMG_CALLCONV ExtDBGDrivCreateStream(IMG_CHAR *pszName, IMG_UINT32 ui32Flags, IMG_UINT32 ui32Size, IMG_HANDLE* phInit, IMG_HANDLE* phMain, IMG_HANDLE* phDeinit);
void IMG_CALLCONV ExtDBGDrivDestroyStream(IMG_HANDLE hInit, IMG_HANDLE hMain, IMG_HANDLE hDeinit);
void * IMG_CALLCONV ExtDBGDrivFindStream(IMG_CHAR * pszName, IMG_BOOL bResetStream);
IMG_UINT32 IMG_CALLCONV ExtDBGDrivRead(PDBG_STREAM psStream, IMG_UINT32 ui32BufID, IMG_UINT32 ui32OutBuffSize,IMG_UINT8 *pui8OutBuf);
IMG_UINT32 IMG_CALLCONV ExtDBGDrivWrite2(PDBG_STREAM psStream,IMG_UINT8 *pui8InBuf,IMG_UINT32 ui32InBuffSize);
void IMG_CALLCONV ExtDBGDrivSetMarker(PDBG_STREAM psStream, IMG_UINT32 ui32Marker);
IMG_UINT32 IMG_CALLCONV ExtDBGDrivGetMarker(PDBG_STREAM psStream);
void IMG_CALLCONV ExtDBGDrivWaitForEvent(DBG_EVENT eEvent);
IMG_UINT32 IMG_CALLCONV ExtDBGDrivGetCtrlState(PDBG_STREAM psStream, IMG_UINT32 ui32StateID);
IMG_UINT32 IMG_CALLCONV ExtDBGDrivGetFrame(void);
void IMG_CALLCONV ExtDBGDrivSetFrame(IMG_UINT32 ui32Frame);
#endif
/*****************************************************************************
End of file (DBGDRIV.H)
*****************************************************************************/

141
drivers/staging/imgtec/rogue/dbgdriv_handle.c
View File

@ -1,141 +0,0 @@
/*************************************************************************/ /*!
@File
@Title Resource Handle Manager
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Provide resource handle management
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#include "img_defs.h"
#include "dbgdrvif_srv5.h"
#include "dbgdriv.h"
/* max number of streams held in SID info table */
#define MAX_SID_ENTRIES 8
typedef struct _SID_INFO
{
PDBG_STREAM psStream;
} SID_INFO, *PSID_INFO;
static SID_INFO gaSID_Xlat_Table[MAX_SID_ENTRIES];
IMG_SID PStream2SID(PDBG_STREAM psStream)
{
if (psStream != (PDBG_STREAM)NULL)
{
IMG_INT32 iIdx;
for (iIdx = 0; iIdx < MAX_SID_ENTRIES; iIdx++)
{
if (psStream == gaSID_Xlat_Table[iIdx].psStream)
{
/* idx is one based */
return (IMG_SID)iIdx+1;
}
}
}
return (IMG_SID)0;
}
PDBG_STREAM SID2PStream(IMG_SID hStream)
{
/* changed to zero based */
IMG_INT32 iIdx = (IMG_INT32)hStream-1;
if (iIdx >= 0 && iIdx < MAX_SID_ENTRIES)
{
return gaSID_Xlat_Table[iIdx].psStream;
}
else
{
return (PDBG_STREAM)NULL;
}
}
IMG_BOOL AddSIDEntry(PDBG_STREAM psStream)
{
if (psStream != (PDBG_STREAM)NULL)
{
IMG_INT32 iIdx;
for (iIdx = 0; iIdx < MAX_SID_ENTRIES; iIdx++)
{
if (psStream == gaSID_Xlat_Table[iIdx].psStream)
{
/* already created */
return IMG_TRUE;
}
if (gaSID_Xlat_Table[iIdx].psStream == (PDBG_STREAM)NULL)
{
/* free entry */
gaSID_Xlat_Table[iIdx].psStream = psStream;
return IMG_TRUE;
}
}
}
return IMG_FALSE;
}
IMG_BOOL RemoveSIDEntry(PDBG_STREAM psStream)
{
if (psStream != (PDBG_STREAM)NULL)
{
IMG_INT32 iIdx;
for (iIdx = 0; iIdx < MAX_SID_ENTRIES; iIdx++)
{
if (psStream == gaSID_Xlat_Table[iIdx].psStream)
{
gaSID_Xlat_Table[iIdx].psStream = (PDBG_STREAM)NULL;
return IMG_TRUE;
}
}
}
return IMG_FALSE;
}
/******************************************************************************
End of file (handle.c)
******************************************************************************/

58
drivers/staging/imgtec/rogue/dbgdriv_ioctl.h
View File

@ -1,58 +0,0 @@
/*************************************************************************/ /*!
@File
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#ifndef _DBGDRIV_IOCTL_H_
#define _DBGDRIV_IOCTL_H_
#include "dbgdrvif_srv5.h"
/* Share this debug driver global with the OS layer so that IOCTL calls
* coming from the OS enter the common table of entry points.
*/
extern IMG_UINT32 (*g_DBGDrivProc[DEBUG_SERVICE_MAX_API])(void *, void *, IMG_BOOL);
#endif /* _DBGDRIV_IOCTL_H_ */
/*****************************************************************************
End of file
*****************************************************************************/

263
drivers/staging/imgtec/rogue/dbgdrvif_srv5.h
View File

@ -1,263 +0,0 @@
/*************************************************************************/ /*!
@File
@Title Debug driver for Services 5
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Debug Driver Interface
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#ifndef _DBGDRVIF_SRV5_
#define _DBGDRVIF_SRV5_
#if defined(_MSC_VER)
#pragma warning(disable:4200)
#endif
#if defined(__linux__)
#define FILE_DEVICE_UNKNOWN 0
#define METHOD_BUFFERED 0
#define FILE_ANY_ACCESS 0
#define CTL_CODE( DeviceType, Function, Method, Access ) (Function)
#define MAKEIOCTLINDEX(i) ((i) & 0xFFF)
#else
#include "ioctldef.h"
#endif
#include "img_defs.h"
/*****************************************************************************
Stream mode stuff.
*****************************************************************************/
#define DEBUG_CAPMODE_FRAMED 0x00000001UL /* Default capture mode, set when streams created */
#define DEBUG_CAPMODE_CONTINUOUS 0x00000002UL /* Only set in WDDM, streams created with it set to this mode */
#define DEBUG_FLAGS_USE_NONPAGED_MEM 0x00000001UL /* Only set in WDDM */
#define DEBUG_FLAGS_NO_BUF_EXPANDSION 0x00000002UL
#define DEBUG_FLAGS_READONLY 0x00000008UL
#define DEBUG_FLAGS_WRITEONLY 0x00000010UL
#define DEBUG_FLAGS_CIRCULAR 0x00000020UL
/* Stream name maximum length */
#define DEBUG_STREAM_NAME_MAX 32
/*****************************************************************************
IOCTL values.
*****************************************************************************/
/* IOCTL values defined here so that the windows based OS layer of PDump
in the server can access the GetServiceTable method.
*/
#define DEBUG_SERVICE_IOCTL_BASE 0x800UL
#define DEBUG_SERVICE_GETSERVICETABLE CTL_CODE(FILE_DEVICE_UNKNOWN, DEBUG_SERVICE_IOCTL_BASE + 0x01, METHOD_BUFFERED, FILE_ANY_ACCESS)
#define DEBUG_SERVICE_GETSTREAM CTL_CODE(FILE_DEVICE_UNKNOWN, DEBUG_SERVICE_IOCTL_BASE + 0x02, METHOD_BUFFERED, FILE_ANY_ACCESS)
#define DEBUG_SERVICE_READ CTL_CODE(FILE_DEVICE_UNKNOWN, DEBUG_SERVICE_IOCTL_BASE + 0x03, METHOD_BUFFERED, FILE_ANY_ACCESS)
#define DEBUG_SERVICE_SETMARKER CTL_CODE(FILE_DEVICE_UNKNOWN, DEBUG_SERVICE_IOCTL_BASE + 0x04, METHOD_BUFFERED, FILE_ANY_ACCESS)
#define DEBUG_SERVICE_GETMARKER CTL_CODE(FILE_DEVICE_UNKNOWN, DEBUG_SERVICE_IOCTL_BASE + 0x05, METHOD_BUFFERED, FILE_ANY_ACCESS)
#define DEBUG_SERVICE_WAITFOREVENT CTL_CODE(FILE_DEVICE_UNKNOWN, DEBUG_SERVICE_IOCTL_BASE + 0x06, METHOD_BUFFERED, FILE_ANY_ACCESS)
#define DEBUG_SERVICE_GETFRAME CTL_CODE(FILE_DEVICE_UNKNOWN, DEBUG_SERVICE_IOCTL_BASE + 0x07, METHOD_BUFFERED, FILE_ANY_ACCESS)
#if defined(__QNXNTO__)
#define DEBUG_SERVICE_CREATESTREAM CTL_CODE(FILE_DEVICE_UNKNOWN, DEBUG_SERVICE_IOCTL_BASE + 0x08, METHOD_BUFFERED, FILE_ANY_ACCESS)
#define DEBUG_SERVICE_MAX_API 8
#else
#define DEBUG_SERVICE_MAX_API 9
#endif
#if defined(_WIN32)
/*****************************************************************************
Debug driver device name
*****************************************************************************/
#if defined (DBGDRV_MODULE_NAME)
#define REGISTRY_PATH_TO_DEBUG_DRIVER \
L"\\Registry\\Machine\\System\\CurrentControlSet\\Services\\" DBGDRV_MODULE_NAME
#define DBGDRV_NT_DEVICE_NAME L"\\Device\\" DBGDRV_MODULE_NAME
#define DBGDRV_NT_SYMLINK L"\\DosDevices\\" DBGDRV_MODULE_NAME
#else
#error Debug driver name must be specified
/*
#define DBGDRV_NT_DEVICE_NAME L"\\Device\\VLDbgDrv"
#define DBGDRV_NT_SYMLINK L"\\DosDevices\\VLDBGDRV"
*/
#endif
/* symbolic link name */
#define DBGDRV_WIN32_DEVICE_NAME "\\\\.\\VLDBGDRV"
#define DBGDRV_WINCE_DEVICE_NAME L"DBD1:"
#endif
/* A pointer type which is at least 64 bits wide. The fixed width ensures
* consistency in structures between 32 and 64-bit code.
* The UM code (be it 32 or 64 bit) can simply write to the native pointer type (pvPtr).
* 64-bit KM code must read ui32Ptr if in the case of a 32-bit client, otherwise it can
* just read pvPtr if the client is also 64-bit
*
* ui64Ptr ensures the union is 64-bits wide in a 32-bit client.
*
* The union is explicitly 64-bit aligned as it was found gcc on x32 only
* aligns it to 32-bit, as the ABI permits aligning 64-bit types to a 32-bit
* boundary.
*/
typedef union
{
/* native pointer type for UM to write to */
void *pvPtr;
/* the pointer written by a 32-bit client */
IMG_UINT32 ui32Ptr;
/* force the union width */
IMG_UINT64 ui64Ptr;
} DBG_WIDEPTR __aligned(8);
/* Helper macro for dbgdriv (KM) to get the pointer value from the WIDEPTR type,
* depending on whether the client is 32 or 64-bit.
*
* note: double cast is required to avoid
* 'cast to pointer from integer of different size' warning.
* this is solved by first casting to an integer type.
*/
#if defined(CONFIG_COMPAT)
#define WIDEPTR_GET_PTR(p, bCompat) (bCompat ? \
(void *) (uintptr_t) (p).ui32Ptr : \
(p).pvPtr)
#else
#define WIDEPTR_GET_PTR(p, bCompat) (p).pvPtr
#endif
typedef enum _DBG_EVENT_
{
DBG_EVENT_STREAM_DATA = 1
} DBG_EVENT;
/*****************************************************************************
In/Out Structures
*****************************************************************************/
#if defined(__QNXNTO__)
typedef struct _DBG_IN_CREATESTREAM_
{
union
{
IMG_CHAR *pszName;
IMG_UINT64 ui64Name;
} u;
IMG_UINT32 ui32Pages;
IMG_UINT32 ui32CapMode;
IMG_UINT32 ui32OutMode;
}DBG_IN_CREATESTREAM, *PDBG_IN_CREATESTREAM;
typedef struct _DBG_OUT_CREATESTREAM_
{
IMG_HANDLE phInit;
IMG_HANDLE phMain;
IMG_HANDLE phDeinit;
} DBG_OUT_CREATESTREAM, *PDBG_OUT_CREATESTREAM;
#endif
typedef struct _DBG_IN_FINDSTREAM_
{
IMG_CHAR pszName[DEBUG_STREAM_NAME_MAX];
IMG_BOOL bResetStream;
}DBG_IN_FINDSTREAM, *PDBG_IN_FINDSTREAM;
#define DEBUG_READ_BUFID_MAIN 0
#define DEBUG_READ_BUFID_INIT 1
#define DEBUG_READ_BUFID_DEINIT 2
typedef struct _DBG_IN_READ_
{
DBG_WIDEPTR pui8OutBuffer;
IMG_SID hStream;
IMG_UINT32 ui32BufID;
IMG_UINT32 ui32OutBufferSize;
} DBG_IN_READ, *PDBG_IN_READ;
typedef struct _DBG_OUT_READ_
{
IMG_UINT32 ui32DataRead;
IMG_UINT32 ui32SplitMarker;
} DBG_OUT_READ, *PDBG_OUT_READ;
typedef struct _DBG_IN_SETMARKER_
{
IMG_SID hStream;
IMG_UINT32 ui32Marker;
} DBG_IN_SETMARKER, *PDBG_IN_SETMARKER;
/*
DBG STREAM abstract types
*/
typedef struct _DBG_STREAM_CONTROL_* PDBG_STREAM_CONTROL;
typedef struct _DBG_STREAM_* PDBG_STREAM;
/*
Lookup identifiers for the GetState method in the KM service table.
*/
#define DBG_GET_STATE_FLAG_IS_READONLY 0x03
/*****************************************************************************
Kernel mode service table
*****************************************************************************/
typedef struct _DBGKM_SERVICE_TABLE_
{
IMG_UINT32 ui32Size;
IMG_BOOL (IMG_CALLCONV *pfnCreateStream) (IMG_CHAR * pszName,IMG_UINT32 ui32Flags,IMG_UINT32 ui32Pages, IMG_HANDLE* phInit, IMG_HANDLE* phMain, IMG_HANDLE* phDeinit);
void (IMG_CALLCONV *pfnDestroyStream) (IMG_HANDLE hInit, IMG_HANDLE hMain, IMG_HANDLE hDeinit);
IMG_UINT32 (IMG_CALLCONV *pfnDBGDrivWrite2) (PDBG_STREAM psStream, IMG_UINT8 *pui8InBuf,IMG_UINT32 ui32InBuffSize);
void (IMG_CALLCONV *pfnSetMarker) (PDBG_STREAM psStream, IMG_UINT32 ui32Marker);
void (IMG_CALLCONV *pfnWaitForEvent) (DBG_EVENT eEvent);
IMG_UINT32 (IMG_CALLCONV *pfnGetCtrlState) (PDBG_STREAM psStream, IMG_UINT32 ui32StateID);
void (IMG_CALLCONV *pfnSetFrame) (IMG_UINT32 ui32Frame);
} DBGKM_SERVICE_TABLE, *PDBGKM_SERVICE_TABLE;
#if defined(_MSC_VER)
#pragma warning(default:4200)
#endif
#endif
/*****************************************************************************
End of file
*****************************************************************************/

259
drivers/staging/imgtec/rogue/debugmisc_server.c
View File

@ -1,259 +0,0 @@
/*************************************************************************/ /*!
@File
@Title Debugging and miscellaneous functions server implementation
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Kernel services functions for debugging and other
miscellaneous functionality.
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#include "pvrsrv.h"
#include "pvr_debug.h"
#include "debugmisc_server.h"
#include "rgxfwutils.h"
#include "rgxta3d.h"
#include "pdump_km.h"
#include "mmu_common.h"
#include "devicemem_server.h"
#include "osfunc.h"
IMG_EXPORT PVRSRV_ERROR
PVRSRVDebugMiscSLCSetBypassStateKM(
CONNECTION_DATA * psConnection,
PVRSRV_DEVICE_NODE *psDeviceNode,
IMG_UINT32 uiFlags,
IMG_BOOL bSetBypassed)
{
RGXFWIF_KCCB_CMD sSLCBPCtlCmd;
PVRSRV_ERROR eError = PVRSRV_OK;
PVR_UNREFERENCED_PARAMETER(psConnection);
sSLCBPCtlCmd.eCmdType = RGXFWIF_KCCB_CMD_SLCBPCTL;
sSLCBPCtlCmd.uCmdData.sSLCBPCtlData.bSetBypassed = bSetBypassed;
sSLCBPCtlCmd.uCmdData.sSLCBPCtlData.uiFlags = uiFlags;
eError = RGXScheduleCommand(psDeviceNode->pvDevice,
RGXFWIF_DM_GP,
&sSLCBPCtlCmd,
sizeof(sSLCBPCtlCmd),
0,
PDUMP_FLAGS_CONTINUOUS);
if(eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR, "PVRSRVDebugMiscSLCSetEnableStateKM: RGXScheduleCommandfailed. Error:%u", eError));
}
else
{
/* Wait for the SLC flush to complete */
eError = RGXWaitForFWOp(psDeviceNode->pvDevice, RGXFWIF_DM_GP, psDeviceNode->psSyncPrim, PDUMP_FLAGS_CONTINUOUS);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"PVRSRVDebugMiscSLCSetEnableStateKM: Waiting for value aborted with error (%u)", eError));
}
}
return PVRSRV_OK;
}
IMG_EXPORT PVRSRV_ERROR
PVRSRVRGXDebugMiscQueryFWLogKM(
const CONNECTION_DATA *psConnection,
const PVRSRV_DEVICE_NODE *psDeviceNode,
IMG_UINT32 *pui32RGXFWLogType)
{
PVRSRV_RGXDEV_INFO *psDevInfo;
PVR_UNREFERENCED_PARAMETER(psConnection);
#if defined(PVRSRV_GPUVIRT_GUESTDRV)
/* Guest drivers do not support tracebuf */
PVR_UNREFERENCED_PARAMETER(psDevInfo);
PVR_UNREFERENCED_PARAMETER(pui32RGXFWLogType);
return PVRSRV_ERROR_NOT_IMPLEMENTED;
#else
if (!psDeviceNode || !pui32RGXFWLogType)
{
return PVRSRV_ERROR_INVALID_PARAMS;
}
psDevInfo = psDeviceNode->pvDevice;
if (!psDevInfo || !psDevInfo->psRGXFWIfTraceBuf)
{
return PVRSRV_ERROR_INVALID_PARAMS;
}
*pui32RGXFWLogType = psDevInfo->psRGXFWIfTraceBuf->ui32LogType;
return PVRSRV_OK;
#endif
}
IMG_EXPORT PVRSRV_ERROR
PVRSRVRGXDebugMiscSetFWLogKM(
const CONNECTION_DATA * psConnection,
const PVRSRV_DEVICE_NODE *psDeviceNode,
IMG_UINT32 ui32RGXFWLogType)
{
RGXFWIF_KCCB_CMD sLogTypeUpdateCmd;
PVRSRV_ERROR eError = PVRSRV_OK;
PVRSRV_RGXDEV_INFO* psDevInfo = psDeviceNode->pvDevice;
PVR_UNREFERENCED_PARAMETER(psConnection);
/* check log type is valid */
if (ui32RGXFWLogType & ~RGXFWIF_LOG_TYPE_MASK)
{
return PVRSRV_ERROR_INVALID_PARAMS;
}
#if defined(PVRSRV_GPUVIRT_GUESTDRV)
/* Guest drivers do not support tracebuf */
PVR_UNREFERENCED_PARAMETER(psDevInfo);
PVR_UNREFERENCED_PARAMETER(sLogTypeUpdateCmd);
eError = PVRSRV_ERROR_NOT_IMPLEMENTED;
#else
/* set the new log type */
psDevInfo->psRGXFWIfTraceBuf->ui32LogType = ui32RGXFWLogType;
/* Allocate firmware trace buffer resource(s) if not already done */
if (RGXTraceBufferIsInitRequired(psDevInfo))
{
RGXTraceBufferInitOnDemandResources(psDevInfo);
}
/* Ask the FW to update its cached version of logType value */
sLogTypeUpdateCmd.eCmdType = RGXFWIF_KCCB_CMD_LOGTYPE_UPDATE;
eError = RGXScheduleCommand(psDevInfo,
RGXFWIF_DM_GP,
&sLogTypeUpdateCmd,
sizeof(sLogTypeUpdateCmd),
0,
PDUMP_FLAGS_CONTINUOUS);
if(eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR, "%s: RGXScheduleCommandfailed. Error:%u", __FUNCTION__, eError));
}
else
{
/* Wait for the LogType value to be updated */
eError = RGXWaitForFWOp(psDevInfo, RGXFWIF_DM_GP, psDeviceNode->psSyncPrim, PDUMP_FLAGS_CONTINUOUS);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"%s: Waiting for value aborted with error (%u)", __FUNCTION__, eError));
}
}
#endif
return eError;
}
IMG_EXPORT PVRSRV_ERROR
PVRSRVRGXDebugMiscSetHCSDeadlineKM(
CONNECTION_DATA *psConnection,
PVRSRV_DEVICE_NODE *psDeviceNode,
IMG_UINT32 ui32HCSDeadlineMS)
{
PVRSRV_RGXDEV_INFO* psDevInfo = psDeviceNode->pvDevice;
PVR_UNREFERENCED_PARAMETER(psConnection);
return RGXFWSetHCSDeadline(psDevInfo, ui32HCSDeadlineMS);
}
IMG_EXPORT PVRSRV_ERROR
PVRSRVRGXDebugMiscSetOSidPriorityKM(
CONNECTION_DATA *psConnection,
PVRSRV_DEVICE_NODE *psDeviceNode,
IMG_UINT32 ui32OSid,
IMG_UINT32 ui32OSidPriority)
{
PVRSRV_RGXDEV_INFO* psDevInfo = psDeviceNode->pvDevice;
PVR_UNREFERENCED_PARAMETER(psConnection);
return RGXFWChangeOSidPriority(psDevInfo, ui32OSid, ui32OSidPriority);
}
IMG_EXPORT PVRSRV_ERROR
PVRSRVRGXDebugMiscSetOSNewOnlineStateKM(
CONNECTION_DATA *psConnection,
PVRSRV_DEVICE_NODE *psDeviceNode,
IMG_UINT32 ui32OSid,
IMG_UINT32 ui32OSNewState)
{
PVRSRV_RGXDEV_INFO* psDevInfo = psDeviceNode->pvDevice;
PVR_UNREFERENCED_PARAMETER(psConnection);
if (ui32OSNewState)
{
return RGXFWSetVMOnlineState(psDevInfo, ui32OSid, RGXFWIF_OS_ONLINE);
}
return RGXFWSetVMOnlineState(psDevInfo, ui32OSid, RGXFWIF_OS_OFFLINE);
}
IMG_EXPORT PVRSRV_ERROR
PVRSRVRGXDebugMiscDumpFreelistPageListKM(
CONNECTION_DATA * psConnection,
PVRSRV_DEVICE_NODE *psDeviceNode)
{
PVRSRV_RGXDEV_INFO* psDevInfo = psDeviceNode->pvDevice;
DLLIST_NODE *psNode, *psNext;
PVR_UNREFERENCED_PARAMETER(psConnection);
if (dllist_is_empty(&psDevInfo->sFreeListHead))
{
return PVRSRV_OK;
}
PVR_LOG(("---------------[ Begin Freelist Page List Dump ]------------------"));
OSLockAcquire(psDevInfo->hLockFreeList);
dllist_foreach_node(&psDevInfo->sFreeListHead, psNode, psNext)
{
RGX_FREELIST *psFreeList = IMG_CONTAINER_OF(psNode, RGX_FREELIST, sNode);
RGXDumpFreeListPageList(psFreeList);
}
OSLockRelease(psDevInfo->hLockFreeList);
PVR_LOG(("----------------[ End Freelist Page List Dump ]-------------------"));
return PVRSRV_OK;
}

108
drivers/staging/imgtec/rogue/debugmisc_server.h
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@ -1,108 +0,0 @@
/*************************************************************************/ /*!
@File
@Title Debugging and miscellaneous functions server interface
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Kernel services functions for debugging and other
miscellaneous functionality.
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#if ! defined(DEBUGMISC_SERVER_H)
#define DEBUGMISC_SERVER_H
#include <img_defs.h>
#include <pvrsrv_error.h>
#include <device.h>
#include <pmr.h>
#include "connection_server.h"
IMG_EXPORT PVRSRV_ERROR
PVRSRVDebugMiscSLCSetBypassStateKM(
CONNECTION_DATA *psConnection,
PVRSRV_DEVICE_NODE *psDeviceNode,
IMG_UINT32 uiFlags,
IMG_BOOL bSetBypassed);
IMG_EXPORT PVRSRV_ERROR
PVRSRVDebugMiscInitFWImageKM(
PMR *psFWImgDestPMR,
PMR *psFWImgSrcPMR,
IMG_UINT64 ui64FWImgLen,
PMR *psFWImgSigPMR,
IMG_UINT64 ui64FWSigLen);
IMG_EXPORT PVRSRV_ERROR
PVRSRVRGXDebugMiscQueryFWLogKM(
const CONNECTION_DATA *psConnection,
const PVRSRV_DEVICE_NODE *psDeviceNode,
IMG_UINT32 *pui32RGXFWLogType);
IMG_EXPORT PVRSRV_ERROR
PVRSRVRGXDebugMiscSetFWLogKM(
const CONNECTION_DATA *psConnection,
const PVRSRV_DEVICE_NODE *psDeviceNode,
IMG_UINT32 ui32RGXFWLogType);
IMG_EXPORT PVRSRV_ERROR
PVRSRVRGXDebugMiscSetHCSDeadlineKM(
CONNECTION_DATA *psConnection,
PVRSRV_DEVICE_NODE *psDeviceNode,
IMG_UINT32 ui32HCSDeadlineMS);
IMG_EXPORT PVRSRV_ERROR
PVRSRVRGXDebugMiscSetOSidPriorityKM(
CONNECTION_DATA *psConnection,
PVRSRV_DEVICE_NODE *psDeviceNode,
IMG_UINT32 ui32OSid,
IMG_UINT32 ui32OSidPriority);
IMG_EXPORT PVRSRV_ERROR
PVRSRVRGXDebugMiscSetOSNewOnlineStateKM(
CONNECTION_DATA *psConnection,
PVRSRV_DEVICE_NODE *psDeviceNode,
IMG_UINT32 ui32OSid,
IMG_UINT32 ui32OSNewState);
IMG_EXPORT PVRSRV_ERROR
PVRSRVRGXDebugMiscDumpFreelistPageListKM(
CONNECTION_DATA * psConnection,
PVRSRV_DEVICE_NODE *psDeviceNode);
#endif

107
drivers/staging/imgtec/rogue/device.h
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@ -1,107 +0,0 @@
/**************************************************************************/ /*!
@File
@Title Common Device header
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Device related function templates and defines
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /***************************************************************************/
#ifndef __DEVICE_H__
#define __DEVICE_H__
#include "pvrsrv_device_node.h"
#include "lock_types.h"
#include "devicemem_heapcfg.h"
#include "mmu_common.h"
#include "ra.h" /* RA_ARENA */
#include "pvrsrv_device.h"
#include "srvkm.h"
#include "physheap.h"
#include <powervr/sync_external.h>
#include "sysinfo.h"
#include "dllist.h"
#include "cache_km.h"
#include "lock.h"
#if defined(SUPPORT_GPUVIRT_VALIDATION)
#include "virt_validation_defs.h"
#endif
#if defined(SUPPORT_BUFFER_SYNC)
struct pvr_buffer_sync_context;
#endif
#if defined(PVRSRV_ENABLE_FULL_SYNC_TRACKING)
struct SYNC_RECORD;
#endif
#define MMU_BAD_PHYS_ADDR (0xbadbad00badULL)
typedef enum _PVRSRV_DEVICE_HEALTH_STATUS_
{
PVRSRV_DEVICE_HEALTH_STATUS_OK = 0,
PVRSRV_DEVICE_HEALTH_STATUS_NOT_RESPONDING,
PVRSRV_DEVICE_HEALTH_STATUS_DEAD
} PVRSRV_DEVICE_HEALTH_STATUS;
typedef enum _PVRSRV_DEVICE_HEALTH_REASON_
{
PVRSRV_DEVICE_HEALTH_REASON_NONE = 0,
PVRSRV_DEVICE_HEALTH_REASON_ASSERTED,
PVRSRV_DEVICE_HEALTH_REASON_POLL_FAILING,
PVRSRV_DEVICE_HEALTH_REASON_TIMEOUTS,
PVRSRV_DEVICE_HEALTH_REASON_QUEUE_CORRUPT,
PVRSRV_DEVICE_HEALTH_REASON_QUEUE_STALLED
} PVRSRV_DEVICE_HEALTH_REASON;
PVRSRV_ERROR IMG_CALLCONV PVRSRVDeviceFinalise(PVRSRV_DEVICE_NODE *psDeviceNode,
IMG_BOOL bInitSuccessful);
PVRSRV_ERROR IMG_CALLCONV PVRSRVDevInitCompatCheck(PVRSRV_DEVICE_NODE *psDeviceNode);
PVRSRV_ERROR IMG_CALLCONV RGXClientConnectCompatCheck_ClientAgainstFW(PVRSRV_DEVICE_NODE * psDeviceNode, IMG_UINT32 ui32ClientBuildOptions);
#endif /* __DEVICE_H__ */
/******************************************************************************
End of file (device.h)
******************************************************************************/

75
drivers/staging/imgtec/rogue/device_connection.h
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@ -1,75 +0,0 @@
/*************************************************************************/ /*!
@File device_connection.h
@Title
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#if !defined(__DEVICE_CONNECTION_H__)
#define __DEVICE_CONNECTION_H__
#include "img_types.h"
#if defined(__KERNEL__)
typedef struct _PVRSRV_DEVICE_NODE_ *SHARED_DEV_CONNECTION;
#else
typedef IMG_HANDLE SHARED_DEV_CONNECTION;
#endif
/******************************************************************************
* Device capability flags and masks
*****************************************************************************/
/* Flag to be passed over the bridge during connection stating whether CPU cache coherent is available*/
#define PVRSRV_CACHE_COHERENT_SHIFT (0)
#define PVRSRV_CACHE_COHERENT_DEVICE_FLAG (1U << PVRSRV_CACHE_COHERENT_SHIFT)
#define PVRSRV_CACHE_COHERENT_CPU_FLAG (2U << PVRSRV_CACHE_COHERENT_SHIFT)
#define PVRSRV_CACHE_COHERENT_MASK (3U << PVRSRV_CACHE_COHERENT_SHIFT)
/* Flag to be passed over the bridge during connection stating whether CPU non-mappable memory is present */
#define PVRSRV_NONMAPPABLE_MEMORY_PRESENT_SHIFT (3)
#define PVRSRV_NONMAPPABLE_MEMORY_PRESENT_FLAG (1U << PVRSRV_NONMAPPABLE_MEMORY_PRESENT_SHIFT)
/* Flag to be passed over the bridge during connection stating SVM allocation availability */
#define PVRSRV_DEVMEM_SVM_ALLOC_SHIFT (4)
#define PVRSRV_DEVMEM_SVM_ALLOC_UNSUPPORTED (1U << PVRSRV_DEVMEM_SVM_ALLOC_SHIFT)
#define PVRSRV_DEVMEM_SVM_ALLOC_SUPPORTED (2U << PVRSRV_DEVMEM_SVM_ALLOC_SHIFT)
#define PVRSRV_DEVMEM_SVM_ALLOC_CANFAIL (4U << PVRSRV_DEVMEM_SVM_ALLOC_SHIFT)
#endif /* !defined(__DEVICE_CONNECTION_H__) */

2904
drivers/staging/imgtec/rogue/devicemem.c
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651
drivers/staging/imgtec/rogue/devicemem.h
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@ -1,651 +0,0 @@
/*************************************************************************/ /*!
@File
@Title Device Memory Management core internal
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Services internal interface to core device memory management
functions that are shared between client and server code.
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#ifndef SRVCLIENT_DEVICEMEM_H
#define SRVCLIENT_DEVICEMEM_H
/********************************************************************************
* *
* +------------+ +------------+ +--------------+ +--------------+ *
* | a sub- | | a sub- | | an | | allocation | *
* | allocation | | allocation | | allocation | | also mapped | *
* | | | | | in proc 1 | | into proc 2 | *
* +------------+ +------------+ +--------------+ +--------------+ *
* | | | | *
* +--------------+ +--------------+ +--------------+ *
* | page gran- | | page gran- | | page gran- | *
* | ular mapping | | ular mapping | | ular mapping | *
* +--------------+ +--------------+ +--------------+ *
* | | | *
* | | | *
* | | | *
* +--------------+ +--------------+ *
* | | | | *
* | A "P.M.R." | | A "P.M.R." | *
* | | | | *
* +--------------+ +--------------+ *
* *
********************************************************************************/
/*
All device memory allocations are ultimately a view upon (not
necessarily the whole of) a "PMR".
A PMR is a "Physical Memory Resource", which may be a
"pre-faulted" lump of physical memory, or it may be a
representation of some physical memory that will be instantiated
at some future time.
PMRs always represent multiple of some power-of-2 "contiguity"
promised by the PMR, which will allow them to be mapped in whole
pages into the device MMU. As memory allocations may be smaller
than a page, these mappings may be suballocated and thus shared
between multiple allocations in one process. A PMR may also be
mapped simultaneously into multiple device memory contexts
(cross-process scenario), however, for security reasons, it is not
legal to share a PMR "both ways" at once, that is, mapped into
multiple processes and divided up amongst several suballocations.
This PMR terminology is introduced here for background
information, but is generally of little concern to the caller of
this API. This API handles suballocations and mappings, and the
caller thus deals primarily with MEMORY DESCRIPTORS representing
an allocation or suballocation, HEAPS representing ranges of
virtual addresses in a CONTEXT.
*/
/*
|<---------------------------context------------------------------>|
|<-------heap------->| |<-------heap------->|<-------heap------->|
|<-alloc->| | |<-alloc->|<-alloc->|| |<-alloc->| |
*/
#include "img_types.h"
#include "devicemem_typedefs.h"
#include "pdumpdefs.h"
#include "pvrsrv_error.h"
#include "pvrsrv_memallocflags.h"
#include "pdump.h"
#include "device_connection.h"
typedef IMG_UINT32 DEVMEM_HEAPCFGID;
#define DEVMEM_HEAPCFG_FORCLIENTS 0
#define DEVMEM_HEAPCFG_META 1
/*
In order to call the server side functions, we need a bridge handle.
We abstract that here, as we may wish to change its form.
*/
typedef IMG_HANDLE DEVMEM_BRIDGE_HANDLE;
/**************************************************************************/ /*!
@Function DevmemUnpin
@Description This is the counterpart to DevmemPin(). It is meant to be
called before repinning an allocation.
For a detailed description see client API documentation.
@Input phMemDesc The MemDesc that is going to be unpinned.
@Return PVRSRV_ERROR: PVRSRV_OK on success and the memory is
registered to be reclaimed. Error otherwise.
*/ /***************************************************************************/
IMG_INTERNAL PVRSRV_ERROR
DevmemUnpin(DEVMEM_MEMDESC *psMemDesc);
/**************************************************************************/ /*!
@Function DevmemPin
@Description This is the counterpart to DevmemUnpin(). It is meant to be
called after unpinning an allocation.
For a detailed description see client API documentation.
@Input phMemDesc The MemDesc that is going to be pinned.
@Return PVRSRV_ERROR: PVRSRV_OK on success and the allocation content
was successfully restored.
PVRSRV_ERROR_PMR_NEW_MEMORY when the content
could not be restored and new physical memory
was allocated.
A different error otherwise.
*/ /***************************************************************************/
IMG_INTERNAL PVRSRV_ERROR
DevmemPin(DEVMEM_MEMDESC *psMemDesc);
IMG_INTERNAL PVRSRV_ERROR
DevmemGetHeapInt(DEVMEM_HEAP *psHeap,
IMG_HANDLE *phDevmemHeap);
IMG_INTERNAL PVRSRV_ERROR
DevmemGetSize(DEVMEM_MEMDESC *psMemDesc,
IMG_DEVMEM_SIZE_T* puiSize);
/*
* DevmemCreateContext()
*
* Create a device memory context
*
* This must be called before any heap is created in this context
*
* Caller to provide bridge handle which will be squirreled away
* internally and used for all future operations on items from this
* memory context. Caller also to provide devicenode handle, as this
* is used for MMU configuration and also to determine the heap
* configuration for the auto-instantiated heaps.
*
* Note that when compiled in services/server, the hBridge is not used
* and is thrown away by the "fake" direct bridge. (This may change.
* It is recommended that NULL be passed for the handle for now)
*
* hDeviceNode and uiHeapBlueprintID shall together dictate which
* heap-config to use.
*
* This will cause the server side counterpart to be created also.
*
* If you call DevmemCreateContext() (and the call succeeds) you
* are promising that you will later call Devmem_ContextDestroy(),
* except for abnormal process termination in which case it is
* expected it will be destroyed as part of handle clean up.
*
* Caller to provide storage for the pointer to the NEWDEVMEM_CONTEXT
* object thusly created.
*/
extern PVRSRV_ERROR
DevmemCreateContext(SHARED_DEV_CONNECTION hDevConnection,
DEVMEM_HEAPCFGID uiHeapBlueprintID,
DEVMEM_CONTEXT **ppsCtxPtr);
/*
* DevmemAcquireDevPrivData()
*
* Acquire the device private data for this memory context
*/
PVRSRV_ERROR
DevmemAcquireDevPrivData(DEVMEM_CONTEXT *psCtx,
IMG_HANDLE *hPrivData);
/*
* DevmemReleaseDevPrivData()
*
* Release the device private data for this memory context
*/
PVRSRV_ERROR
DevmemReleaseDevPrivData(DEVMEM_CONTEXT *psCtx);
/*
* DevmemDestroyContext()
*
* Undoes that done by DevmemCreateContext()
*/
extern PVRSRV_ERROR
DevmemDestroyContext(DEVMEM_CONTEXT *psCtx);
/*
* DevmemCreateHeap()
*
* Create a heap in the given context.
*
* N.B. Not intended to be called directly, though it can be.
* Normally, heaps are instantiated at context creation time according
* to the specified blueprint. See DevmemCreateContext() for details.
*
* This will cause MMU code to set up data structures for the heap,
* but may not cause page tables to be modified until allocations are
* made from the heap.
*
* The "Quantum" is both the device MMU page size to be configured for
* this heap, and the unit multiples of which "quantized" allocations
* are made (allocations smaller than this, known as "suballocations"
* will be made from a "sub alloc RA" and will "import" chunks
* according to this quantum)
*
* Where imported PMRs (or, for example, PMRs created by device class
* buffers) are mapped into this heap, it is important that the
* physical contiguity guarantee offered by the PMR is greater than or
* equal to the quantum size specified here, otherwise the attempt to
* map it will fail. "Normal" allocations via Devmem_Allocate
* shall automatically meet this requirement, as each "import" will
* trigger the creation of a PMR with the desired contiguity. The
* supported quantum sizes in that case shall be dictated by the OS
* specific implementation of PhysmemNewOSRamBackedPMR() (see)
*/
extern PVRSRV_ERROR
DevmemCreateHeap(DEVMEM_CONTEXT *psCtxPtr,
/* base and length of heap */
IMG_DEV_VIRTADDR sBaseAddress,
IMG_DEVMEM_SIZE_T uiLength,
/* log2 of allocation quantum, i.e. "page" size.
All allocations (that go to server side) are
multiples of this. We use a client-side RA to
make sub-allocations from this */
IMG_UINT32 ui32Log2Quantum,
/* The minimum import alignment for this heap */
IMG_UINT32 ui32Log2ImportAlignment,
/* (For tiling heaps) the factor to use to convert
alignment to optimum buffer stride */
IMG_UINT32 ui32Log2TilingStrideFactor,
/* Name of heap for debug */
/* N.B. Okay to exist on caller's stack - this
func takes a copy if it needs it. */
const IMG_CHAR *pszName,
DEVMEM_HEAPCFGID uiHeapBlueprintID,
DEVMEM_HEAP **ppsHeapPtr);
/*
* DevmemDestroyHeap()
*
* Reverses DevmemCreateHeap()
*
* N.B. All allocations must have been freed and all mappings must
* have been unmapped before invoking this call
*/
extern PVRSRV_ERROR
DevmemDestroyHeap(DEVMEM_HEAP *psHeap);
/*
* DevmemExportalignAdjustSizeAndAlign()
* Compute the Size and Align passed to avoid suballocations (used when allocation with PVRSRV_MEMALLOCFLAG_EXPORTALIGN)
*/
IMG_INTERNAL void
DevmemExportalignAdjustSizeAndAlign(IMG_UINT32 uiLog2Quantum,
IMG_DEVMEM_SIZE_T *puiSize,
IMG_DEVMEM_ALIGN_T *puiAlign);
/*
* DevmemSubAllocate()
*
* Makes an allocation (possibly a "suballocation", as described
* below) of device virtual memory from this heap.
*
* The size and alignment of the allocation will be honoured by the RA
* that allocates the "suballocation". The resulting allocation will
* be mapped into GPU virtual memory and the physical memory to back
* it will exist, by the time this call successfully completes.
*
* The size must be a positive integer multiple of the alignment.
* (i.e. the aligment specifies the alignment of both the start and
* the end of the resulting allocation.)
*
* Allocations made via this API are routed though a "suballocation
* RA" which is responsible for ensuring that small allocations can be
* made without wasting physical memory in the server. Furthermore,
* such suballocations can be made entirely client side without
* needing to go to the server unless the allocation spills into a new
* page.
*
* Such suballocations cause many allocations to share the same "PMR".
* This happens only when the flags match exactly.
*
*/
PVRSRV_ERROR
DevmemSubAllocate(IMG_UINT8 uiPreAllocMultiplier,
DEVMEM_HEAP *psHeap,
IMG_DEVMEM_SIZE_T uiSize,
IMG_DEVMEM_ALIGN_T uiAlign,
DEVMEM_FLAGS_T uiFlags,
const IMG_CHAR *pszText,
DEVMEM_MEMDESC **ppsMemDescPtr);
#define DevmemAllocate(...) \
DevmemSubAllocate(DEVMEM_NO_PRE_ALLOCATE_MULTIPLIER, __VA_ARGS__)
PVRSRV_ERROR
DevmemAllocateExportable(SHARED_DEV_CONNECTION hDevConnection,
IMG_DEVMEM_SIZE_T uiSize,
IMG_DEVMEM_ALIGN_T uiAlign,
IMG_UINT32 uiLog2HeapPageSize,
DEVMEM_FLAGS_T uiFlags,
const IMG_CHAR *pszText,
DEVMEM_MEMDESC **ppsMemDescPtr);
PVRSRV_ERROR
DeviceMemChangeSparse(DEVMEM_MEMDESC *psMemDesc,
IMG_UINT32 ui32AllocPageCount,
IMG_UINT32 *paui32AllocPageIndices,
IMG_UINT32 ui32FreePageCount,
IMG_UINT32 *pauiFreePageIndices,
SPARSE_MEM_RESIZE_FLAGS uiFlags);
PVRSRV_ERROR
DevmemAllocateSparse(SHARED_DEV_CONNECTION hDevConnection,
IMG_DEVMEM_SIZE_T uiSize,
IMG_DEVMEM_SIZE_T uiChunkSize,
IMG_UINT32 ui32NumPhysChunks,
IMG_UINT32 ui32NumVirtChunks,
IMG_UINT32 *pui32MappingTable,
IMG_DEVMEM_ALIGN_T uiAlign,
IMG_UINT32 uiLog2HeapPageSize,
DEVMEM_FLAGS_T uiFlags,
const IMG_CHAR *pszText,
DEVMEM_MEMDESC **ppsMemDescPtr);
/*
* DevmemFree()
*
* Reverses that done by DevmemSubAllocate() N.B. The underlying
* mapping and server side allocation _may_ not be torn down, for
* example, if the allocation has been exported, or if multiple
* allocations were suballocated from the same mapping, but this is
* properly refcounted, so the caller does not have to care.
*/
extern void
DevmemFree(DEVMEM_MEMDESC *psMemDesc);
/*
DevmemMapToDevice:
Map an allocation to the device it was allocated from.
This function _must_ be called before any call to
DevmemAcquireDevVirtAddr is made as it binds the allocation
to the heap.
DevmemReleaseDevVirtAddr is used to release the reference
to the device mapping this function created, but it doesn't
mean that the memory will actually be unmapped from the
device as other references to the mapping obtained via
DevmemAcquireDevVirtAddr could still be active.
*/
PVRSRV_ERROR DevmemMapToDevice(DEVMEM_MEMDESC *psMemDesc,
DEVMEM_HEAP *psHeap,
IMG_DEV_VIRTADDR *psDevVirtAddr);
/*
DevmemMapToDeviceAddress:
Same as DevmemMapToDevice but the caller chooses the address
to map to.
*/
IMG_INTERNAL PVRSRV_ERROR
DevmemMapToDeviceAddress(DEVMEM_MEMDESC *psMemDesc,
DEVMEM_HEAP *psHeap,
IMG_DEV_VIRTADDR sDevVirtAddr);
/*
DevmemAcquireDevVirtAddr
Acquire the MemDesc's device virtual address.
This function _must_ be called after DevmemMapToDevice
and is expected to be used be functions which didn't allocate
the MemDesc but need to know it's address
*/
PVRSRV_ERROR DevmemAcquireDevVirtAddr(DEVMEM_MEMDESC *psMemDesc,
IMG_DEV_VIRTADDR *psDevVirtAddrRet);
/*
* DevmemReleaseDevVirtAddr()
*
* give up the licence to use the device virtual address that was
* acquired by "Acquire" or "MapToDevice"
*/
extern void
DevmemReleaseDevVirtAddr(DEVMEM_MEMDESC *psMemDesc);
/*
* DevmemAcquireCpuVirtAddr()
*
* Acquires a license to use the cpu virtual address of this mapping.
* Note that the memory may not have been mapped into cpu virtual
* memory prior to this call. On first "acquire" the memory will be
* mapped in (if it wasn't statically mapped in) and on last put it
* _may_ become unmapped. Later calling "Acquire" again, _may_ cause
* the memory to be mapped at a different address.
*/
PVRSRV_ERROR DevmemAcquireCpuVirtAddr(DEVMEM_MEMDESC *psMemDesc,
void **ppvCpuVirtAddr);
/*
* DevmemReleaseDevVirtAddr()
*
* give up the licence to use the cpu virtual address that was granted
* with the "Get" call.
*/
extern void
DevmemReleaseCpuVirtAddr(DEVMEM_MEMDESC *psMemDesc);
#if defined(SUPPORT_INSECURE_EXPORT)
/*
* DevmemExport()
*
* Given a memory allocation allocated with DevmemAllocateExportable()
* create a "cookie" that can be passed intact by the caller's own choice
* of secure IPC to another process and used as the argument to "map"
* to map this memory into a heap in the target processes. N.B. This can
* also be used to map into multiple heaps in one process, though that's not
* the intention.
*
* Note, the caller must later call Unexport before freeing the
* memory.
*/
PVRSRV_ERROR DevmemExport(DEVMEM_MEMDESC *psMemDesc,
DEVMEM_EXPORTCOOKIE *psExportCookie);
void DevmemUnexport(DEVMEM_MEMDESC *psMemDesc,
DEVMEM_EXPORTCOOKIE *psExportCookie);
PVRSRV_ERROR
DevmemImport(SHARED_DEV_CONNECTION hDevConnection,
DEVMEM_EXPORTCOOKIE *psCookie,
DEVMEM_FLAGS_T uiFlags,
DEVMEM_MEMDESC **ppsMemDescPtr);
#endif /* SUPPORT_INSECURE_EXPORT */
/*
* DevmemMakeLocalImportHandle()
*
* This is a "special case" function for making a server export cookie
* which went through the direct bridge into an export cookie that can
* be passed through the client bridge.
*/
PVRSRV_ERROR
DevmemMakeLocalImportHandle(SHARED_DEV_CONNECTION hDevConnection,
IMG_HANDLE hServerExport,
IMG_HANDLE *hClientExport);
/*
* DevmemUnmakeLocalImportHandle()
*
* Free any resource associated with the Make operation
*/
PVRSRV_ERROR
DevmemUnmakeLocalImportHandle(SHARED_DEV_CONNECTION hDevConnection,
IMG_HANDLE hClientExport);
/*
*
* The following set of functions is specific to the heap "blueprint"
* stuff, for automatic creation of heaps when a context is created
*
*/
/* Devmem_HeapConfigCount: returns the number of heap configs that
this device has. Note that there is no acquire/release semantics
required, as this data is guaranteed to be constant for the
lifetime of the device node */
extern PVRSRV_ERROR
DevmemHeapConfigCount(SHARED_DEV_CONNECTION hDevConnection,
IMG_UINT32 *puiNumHeapConfigsOut);
/* Devmem_HeapCount: returns the number of heaps that a given heap
config on this device has. Note that there is no acquire/release
semantics required, as this data is guaranteed to be constant for
the lifetime of the device node */
extern PVRSRV_ERROR
DevmemHeapCount(SHARED_DEV_CONNECTION hDevConnection,
IMG_UINT32 uiHeapConfigIndex,
IMG_UINT32 *puiNumHeapsOut);
/* Devmem_HeapConfigName: return the name of the given heap config.
The caller is to provide the storage for the returned string and
indicate the number of bytes (including null terminator) for such
string in the BufSz arg. Note that there is no acquire/release
semantics required, as this data is guaranteed to be constant for
the lifetime of the device node.
*/
extern PVRSRV_ERROR
DevmemHeapConfigName(SHARED_DEV_CONNECTION hsDevConnection,
IMG_UINT32 uiHeapConfigIndex,
IMG_CHAR *pszConfigNameOut,
IMG_UINT32 uiConfigNameBufSz);
/* Devmem_HeapDetails: fetches all the metadata that is recorded in
this heap "blueprint". Namely: heap name (caller to provide
storage, and indicate buffer size (including null terminator) in
BufSz arg), device virtual address and length, log2 of data page
size (will be one of 12, 14, 16, 18, 20, 21, at time of writing).
Note that there is no acquire/release semantics required, as this
data is guaranteed to be constant for the lifetime of the device
node. */
extern PVRSRV_ERROR
DevmemHeapDetails(SHARED_DEV_CONNECTION hDevConnection,
IMG_UINT32 uiHeapConfigIndex,
IMG_UINT32 uiHeapIndex,
IMG_CHAR *pszHeapNameOut,
IMG_UINT32 uiHeapNameBufSz,
IMG_DEV_VIRTADDR *psDevVAddrBaseOut,
IMG_DEVMEM_SIZE_T *puiHeapLengthOut,
IMG_UINT32 *puiLog2DataPageSize,
IMG_UINT32 *puiLog2ImportAlignmentOut,
IMG_UINT32 *puiLog2TilingStrideFactor);
/*
* Devmem_FindHeapByName()
*
* returns the heap handle for the named _automagic_ heap in this
* context. "automagic" heaps are those that are born with the
* context from a blueprint
*/
extern PVRSRV_ERROR
DevmemFindHeapByName(const DEVMEM_CONTEXT *psCtx,
const IMG_CHAR *pszHeapName,
DEVMEM_HEAP **ppsHeapRet);
/*
* DevmemGetHeapBaseDevVAddr()
*
* returns the device virtual address of the base of the heap.
*/
PVRSRV_ERROR
DevmemGetHeapBaseDevVAddr(DEVMEM_HEAP *psHeap,
IMG_DEV_VIRTADDR *pDevVAddr);
extern PVRSRV_ERROR
DevmemLocalGetImportHandle(DEVMEM_MEMDESC *psMemDesc,
IMG_HANDLE *phImport);
extern PVRSRV_ERROR
DevmemGetImportUID(DEVMEM_MEMDESC *psMemDesc,
IMG_UINT64 *pui64UID);
PVRSRV_ERROR
DevmemGetReservation(DEVMEM_MEMDESC *psMemDesc,
IMG_HANDLE *hReservation);
IMG_INTERNAL PVRSRV_ERROR
DevmemGetPMRData(DEVMEM_MEMDESC *psMemDesc,
IMG_HANDLE *hPMR,
IMG_DEVMEM_OFFSET_T *puiPMROffset);
IMG_INTERNAL PVRSRV_ERROR
DevmemGetFlags(DEVMEM_MEMDESC *psMemDesc,
DEVMEM_FLAGS_T *puiFlags);
IMG_INTERNAL IMG_HANDLE
DevmemGetConnection(DEVMEM_MEMDESC *psMemDesc);
PVRSRV_ERROR
DevmemLocalImport(IMG_HANDLE hBridge,
IMG_HANDLE hExtHandle,
DEVMEM_FLAGS_T uiFlags,
DEVMEM_MEMDESC **ppsMemDescPtr,
IMG_DEVMEM_SIZE_T *puiSizePtr,
const IMG_CHAR *pszAnnotation);
IMG_INTERNAL PVRSRV_ERROR
DevmemIsDevVirtAddrValid(DEVMEM_CONTEXT *psContext,
IMG_DEV_VIRTADDR sDevVAddr);
/* DevmemGetHeapLog2PageSize()
*
* Get the page size used for a certain heap.
*/
IMG_UINT32
DevmemGetHeapLog2PageSize(DEVMEM_HEAP *psHeap);
/* DevmemGetHeapTilingProperties()
*
* Get the import alignment and tiling stride factor used for a certain heap.
*/
IMG_UINT32
DevmemGetHeapTilingProperties(DEVMEM_HEAP *psHeap,
IMG_UINT32 *puiLog2ImportAlignment,
IMG_UINT32 *puiLog2TilingStrideFactor);
/**************************************************************************/ /*!
@Function RegisterDevMemPFNotify
@Description Registers that the application wants to be signaled when a page
fault occurs.
@Input psContext Memory context the process that would like to
be notified about.
@Input ui32PID The PID of the calling process.
@Input bRegister If true, register. If false, de-register.
@Return PVRSRV_ERROR: PVRSRV_OK on success. Otherwise, a PVRSRV_
error code
*/ /***************************************************************************/
IMG_INTERNAL PVRSRV_ERROR
RegisterDevmemPFNotify(DEVMEM_CONTEXT *psContext,
IMG_UINT32 ui32PID,
IMG_BOOL bRegister);
#endif /* #ifndef SRVCLIENT_DEVICEMEM_CLIENT_H */

144
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@ -1,144 +0,0 @@
/*************************************************************************/ /*!
@File devicemem_heapcfg.c
@Title Temporary Device Memory 2 stuff
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Device memory management
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /***************************************************************************/
/* our exported API */
#include "devicemem_heapcfg.h"
#include "device.h"
#include "img_types.h"
#include "pvr_debug.h"
#include "pvrsrv_error.h"
#include "osfunc.h"
#include "connection_server.h"
PVRSRV_ERROR
HeapCfgHeapConfigCount(CONNECTION_DATA * psConnection,
const PVRSRV_DEVICE_NODE *psDeviceNode,
IMG_UINT32 *puiNumHeapConfigsOut
)
{
PVR_UNREFERENCED_PARAMETER(psConnection);
*puiNumHeapConfigsOut = psDeviceNode->sDevMemoryInfo.uiNumHeapConfigs;
return PVRSRV_OK;
}
PVRSRV_ERROR
HeapCfgHeapCount(CONNECTION_DATA * psConnection,
const PVRSRV_DEVICE_NODE *psDeviceNode,
IMG_UINT32 uiHeapConfigIndex,
IMG_UINT32 *puiNumHeapsOut
)
{
if (uiHeapConfigIndex >= psDeviceNode->sDevMemoryInfo.uiNumHeapConfigs)
{
return PVRSRV_ERROR_DEVICEMEM_INVALID_HEAP_CONFIG_INDEX;
}
*puiNumHeapsOut = psDeviceNode->sDevMemoryInfo.psDeviceMemoryHeapConfigArray[uiHeapConfigIndex].uiNumHeaps;
return PVRSRV_OK;
}
PVRSRV_ERROR
HeapCfgHeapConfigName(CONNECTION_DATA * psConnection,
const PVRSRV_DEVICE_NODE *psDeviceNode,
IMG_UINT32 uiHeapConfigIndex,
IMG_UINT32 uiHeapConfigNameBufSz,
IMG_CHAR *pszHeapConfigNameOut
)
{
if (uiHeapConfigIndex >= psDeviceNode->sDevMemoryInfo.uiNumHeapConfigs)
{
return PVRSRV_ERROR_DEVICEMEM_INVALID_HEAP_CONFIG_INDEX;
}
OSSNPrintf(pszHeapConfigNameOut, uiHeapConfigNameBufSz, "%s", psDeviceNode->sDevMemoryInfo.psDeviceMemoryHeapConfigArray[uiHeapConfigIndex].pszName);
return PVRSRV_OK;
}
PVRSRV_ERROR
HeapCfgHeapDetails(CONNECTION_DATA * psConnection,
const PVRSRV_DEVICE_NODE *psDeviceNode,
IMG_UINT32 uiHeapConfigIndex,
IMG_UINT32 uiHeapIndex,
IMG_UINT32 uiHeapNameBufSz,
IMG_CHAR *pszHeapNameOut,
IMG_DEV_VIRTADDR *psDevVAddrBaseOut,
IMG_DEVMEM_SIZE_T *puiHeapLengthOut,
IMG_UINT32 *puiLog2DataPageSizeOut,
IMG_UINT32 *puiLog2ImportAlignmentOut
)
{
DEVMEM_HEAP_BLUEPRINT *psHeapBlueprint;
if (uiHeapConfigIndex >= psDeviceNode->sDevMemoryInfo.uiNumHeapConfigs)
{
return PVRSRV_ERROR_DEVICEMEM_INVALID_HEAP_CONFIG_INDEX;
}
if (uiHeapIndex >= psDeviceNode->sDevMemoryInfo.psDeviceMemoryHeapConfigArray[uiHeapConfigIndex].uiNumHeaps)
{
return PVRSRV_ERROR_DEVICEMEM_INVALID_HEAP_INDEX;
}
psHeapBlueprint = &psDeviceNode->sDevMemoryInfo.psDeviceMemoryHeapConfigArray[uiHeapConfigIndex].psHeapBlueprintArray[uiHeapIndex];
OSSNPrintf(pszHeapNameOut, uiHeapNameBufSz, "%s", psHeapBlueprint->pszName);
*psDevVAddrBaseOut = psHeapBlueprint->sHeapBaseAddr;
*puiHeapLengthOut = psHeapBlueprint->uiHeapLength;
*puiLog2DataPageSizeOut = psHeapBlueprint->uiLog2DataPageSize;
*puiLog2ImportAlignmentOut = psHeapBlueprint->uiLog2ImportAlignment;
/* REL/1.8 maintain bridge compatibility
* 4:0 - uiLog2ImportAlignment (13--20)
* 18:16 - uiLog2TilingStrideFactor (3--4)
*/
*puiLog2ImportAlignmentOut |= (psHeapBlueprint->uiLog2TilingStrideFactor << 16);
return PVRSRV_OK;
}

161
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@ -1,161 +0,0 @@
/**************************************************************************/ /*!
@File
@Title Temporary Device Memory 2 stuff
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Device memory management
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /***************************************************************************/
#ifndef __DEVICEMEMHEAPCFG_H__
#define __DEVICEMEMHEAPCFG_H__
#include <powervr/mem_types.h>
#include "img_types.h"
#include "pvrsrv_error.h"
#include "connection_data.h"
/* FIXME: Find a better way of defining _PVRSRV_DEVICE_NODE_ */
struct _PVRSRV_DEVICE_NODE_;
/*
A "heap config" is a blueprint to be used for initial setting up of
heaps when a device memory context is created.
We define a data structure to define this, but it's really down to
the caller to populate it. This is all expected to be in-kernel.
We provide an API that client code can use to enquire about the
blueprint, such that it may do the heap setup during the context
creation call on behalf of the user */
/* blueprint for a single heap */
typedef struct _DEVMEM_HEAP_BLUEPRINT_
{
/* Name of this heap - for debug purposes, and perhaps for lookup
by name? */
const IMG_CHAR *pszName;
/* Virtual address of the beginning of the heap. This _must_ be a
multiple of the data page size for the heap. It is
_recommended_ that it be coarser than that - especially, it
should begin on a boundary appropriate to the MMU for the
device. For Rogue, this is a Page Directory boundary, or 1GB
(virtual address a multiple of 0x0040000000). */
IMG_DEV_VIRTADDR sHeapBaseAddr;
/* Length of the heap. Given that the END address of the heap has
a similar restriction to that of the _beginning_ of the heap.
That is the heap length _must_ be a whole number of data pages.
Again, the recommendation is that it ends on a 1GB boundary.
Again, this is not essential, but we do know that (at the time
of writing) the current implementation of mmu_common.c is such
that no two heaps may share a page directory, thus the
remaining virtual space would be wasted if the length were not
a multiple of 1GB */
IMG_DEVMEM_SIZE_T uiHeapLength;
/* Data page size. This is the page size that is going to get
programmed into the MMU, so it needs to be a valid one for the
device. Importantly, the start address and length _must_ be
multiples of this page size. Note that the page size is
specified as the log 2 relative to 1 byte (e.g. 12 indicates
4kB) */
IMG_UINT32 uiLog2DataPageSize;
/* Import alignment. Force imports to this heap to be
aligned to at least this value */
IMG_UINT32 uiLog2ImportAlignment;
/* Tiled heaps have an optimum byte-stride, this can be derived from
the heap alignment and tiling mode. This is abstracted here such that
Log2ByteStride = Log2Alignment - Log2TilingStrideFactor */
IMG_UINT32 uiLog2TilingStrideFactor;
} DEVMEM_HEAP_BLUEPRINT;
/* entire named heap config */
typedef struct _DEVMEM_HEAP_CONFIG_
{
/* Name of this heap config - for debug and maybe lookup */
const IMG_CHAR *pszName;
/* Number of heaps in this config */
IMG_UINT32 uiNumHeaps;
/* Array of individual heap blueprints as defined above */
DEVMEM_HEAP_BLUEPRINT *psHeapBlueprintArray;
} DEVMEM_HEAP_CONFIG;
extern PVRSRV_ERROR
HeapCfgHeapConfigCount(struct _CONNECTION_DATA_ * psConnection,
const struct _PVRSRV_DEVICE_NODE_ *psDeviceNode,
IMG_UINT32 *puiNumHeapConfigsOut
);
extern PVRSRV_ERROR
HeapCfgHeapCount(struct _CONNECTION_DATA_ * psConnection,
const struct _PVRSRV_DEVICE_NODE_ *psDeviceNode,
IMG_UINT32 uiHeapConfigIndex,
IMG_UINT32 *puiNumHeapsOut
);
extern PVRSRV_ERROR
HeapCfgHeapConfigName(struct _CONNECTION_DATA_ * psConnection,
const struct _PVRSRV_DEVICE_NODE_ *psDeviceNode,
IMG_UINT32 uiHeapConfigIndex,
IMG_UINT32 uiHeapConfigNameBufSz,
IMG_CHAR *pszHeapConfigNameOut
);
extern PVRSRV_ERROR
HeapCfgHeapDetails(struct _CONNECTION_DATA_ * psConnection,
const struct _PVRSRV_DEVICE_NODE_ *psDeviceNode,
IMG_UINT32 uiHeapConfigIndex,
IMG_UINT32 uiHeapIndex,
IMG_UINT32 uiHeapNameBufSz,
IMG_CHAR *pszHeapNameOut,
IMG_DEV_VIRTADDR *psDevVAddrBaseOut,
IMG_DEVMEM_SIZE_T *puiHeapLengthOut,
IMG_UINT32 *puiLog2DataPageSizeOut,
IMG_UINT32 *puiLog2ImportAlignmentOut
);
#endif

2024
drivers/staging/imgtec/rogue/devicemem_history_server.c
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161
drivers/staging/imgtec/rogue/devicemem_history_server.h
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@ -1,161 +0,0 @@
/*************************************************************************/ /*!
@File devicemem_history_server.h
@Title Resource Information abstraction
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Devicemem History functions
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#ifndef _DEVICEMEM_HISTORY_SERVER_H_
#define _DEVICEMEM_HISTORY_SERVER_H_
#include "img_defs.h"
#include "mm_common.h"
#include "pvrsrv_error.h"
#include "rgxmem.h"
extern PVRSRV_ERROR
DevicememHistoryInitKM(void);
extern void
DevicememHistoryDeInitKM(void);
extern PVRSRV_ERROR
DevicememHistoryMapKM(IMG_DEV_VIRTADDR sDevVAddr, size_t uiSize, const char szText[DEVICEMEM_HISTORY_TEXT_BUFSZ]);
extern PVRSRV_ERROR
DevicememHistoryUnmapKM(IMG_DEV_VIRTADDR sDevVAddr, size_t uiSize, const char szText[DEVICEMEM_HISTORY_TEXT_BUFSZ]);
PVRSRV_ERROR DevicememHistoryMapNewKM(PMR *psPMR,
IMG_UINT32 ui32Offset,
IMG_DEV_VIRTADDR sDevVAddr,
IMG_DEVMEM_SIZE_T uiSize,
const char szName[DEVICEMEM_HISTORY_TEXT_BUFSZ],
IMG_UINT32 ui32PageSize,
IMG_UINT32 ui32AllocationIndex,
IMG_UINT32 *pui32AllocationIndexOut);
PVRSRV_ERROR DevicememHistoryUnmapNewKM(PMR *psPMR,
IMG_UINT32 ui32Offset,
IMG_DEV_VIRTADDR sDevVAddr,
IMG_DEVMEM_SIZE_T uiSize,
const char szName[DEVICEMEM_HISTORY_TEXT_BUFSZ],
IMG_UINT32 ui32PageSize,
IMG_UINT32 ui32AllocationIndex,
IMG_UINT32 *pui32AllocationIndexOut);
PVRSRV_ERROR DevicememHistoryMapVRangeKM(IMG_DEV_VIRTADDR sBaseDevVAddr,
IMG_UINT32 ui32StartPage,
IMG_UINT32 ui32NumPages,
IMG_DEVMEM_SIZE_T uiAllocSize,
const IMG_CHAR szName[DEVICEMEM_HISTORY_TEXT_BUFSZ],
IMG_UINT32 ui32Log2PageSize,
IMG_UINT32 ui32AllocationIndex,
IMG_UINT32 *ui32AllocationIndexOut);
PVRSRV_ERROR DevicememHistoryUnmapVRangeKM(IMG_DEV_VIRTADDR sBaseDevVAddr,
IMG_UINT32 ui32StartPage,
IMG_UINT32 ui32NumPages,
IMG_DEVMEM_SIZE_T uiAllocSize,
const IMG_CHAR szName[DEVICEMEM_HISTORY_TEXT_BUFSZ],
IMG_UINT32 ui32Log2PageSize,
IMG_UINT32 ui32AllocationIndex,
IMG_UINT32 *ui32AllocationIndexOut);
PVRSRV_ERROR DevicememHistorySparseChangeKM(PMR *psPMR,
IMG_UINT32 ui32Offset,
IMG_DEV_VIRTADDR sDevVAddr,
IMG_DEVMEM_SIZE_T uiSize,
const char szName[DEVICEMEM_HISTORY_TEXT_BUFSZ],
IMG_UINT32 ui32PageSize,
IMG_UINT32 ui32AllocPageCount,
IMG_UINT32 *paui32AllocPageIndices,
IMG_UINT32 ui32FreePageCount,
IMG_UINT32 *pauiFreePageIndices,
IMG_UINT32 AllocationIndex,
IMG_UINT32 *pui32AllocationIndexOut);
/* used when the PID does not matter */
#define DEVICEMEM_HISTORY_PID_ANY 0xFFFFFFFE
typedef struct _DEVICEMEM_HISTORY_QUERY_IN_
{
IMG_PID uiPID;
IMG_DEV_VIRTADDR sDevVAddr;
} DEVICEMEM_HISTORY_QUERY_IN;
/* Store up to 4 results for a lookup. In the case of the faulting page being
* re-mapped between the page fault occurring on HW and the page fault analysis
* being done, the second result entry will show the allocation being unmapped.
* A further 2 entries are added to cater for multiple buffers in the same page.
*/
#define DEVICEMEM_HISTORY_QUERY_OUT_MAX_RESULTS 4
typedef struct _DEVICEMEM_HISTORY_QUERY_OUT_RESULT_
{
IMG_CHAR szString[DEVICEMEM_HISTORY_TEXT_BUFSZ];
IMG_DEV_VIRTADDR sBaseDevVAddr;
size_t uiSize;
IMG_BOOL bMap;
IMG_BOOL bRange;
IMG_BOOL bAll;
IMG_UINT64 ui64When;
IMG_UINT64 ui64Age;
/* info for sparse map/unmap operations (i.e. bRange=IMG_TRUE) */
IMG_UINT32 ui32StartPage;
IMG_UINT32 ui32PageCount;
IMG_DEV_VIRTADDR sMapStartAddr;
IMG_DEV_VIRTADDR sMapEndAddr;
RGXMEM_PROCESS_INFO sProcessInfo;
} DEVICEMEM_HISTORY_QUERY_OUT_RESULT;
typedef struct _DEVICEMEM_HISTORY_QUERY_OUT_
{
IMG_UINT32 ui32NumResults;
/* result 0 is the newest */
DEVICEMEM_HISTORY_QUERY_OUT_RESULT sResults[DEVICEMEM_HISTORY_QUERY_OUT_MAX_RESULTS];
} DEVICEMEM_HISTORY_QUERY_OUT;
extern IMG_BOOL
DevicememHistoryQuery(DEVICEMEM_HISTORY_QUERY_IN *psQueryIn,
DEVICEMEM_HISTORY_QUERY_OUT *psQueryOut,
IMG_UINT32 ui32PageSizeBytes,
IMG_BOOL bMatchAnyAllocInPage);
#endif

57
drivers/staging/imgtec/rogue/devicemem_history_shared.h
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@ -1,57 +0,0 @@
/*************************************************************************/ /*!
@File
@Title Device Memory History shared definitions
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Shared (client/server) definitions related to the Devicemem History
functionality.
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#ifndef DEVICEMEM_HISTORY_SHARED_H
#define DEVICEMEM_HISTORY_SHARED_H
/* structure used inside MEMDESC to hold the allocation name until
* the allocation is unmapped
*/
typedef struct _DEVICEMEM_HISTORY_MEMDESC_DATA_
{
IMG_CHAR szText[DEVICEMEM_HISTORY_TEXT_BUFSZ];
IMG_UINT32 ui32AllocationIndex;
} DEVICEMEM_HISTORY_MEMDESC_DATA;
#endif

334
drivers/staging/imgtec/rogue/devicemem_pdump.c
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@ -1,334 +0,0 @@
/*************************************************************************/ /*!
@File
@Title Shared device memory management PDump functions
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Implements common (client & server) PDump functions for the
memory management code
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#if defined PDUMP
#include "allocmem.h"
#include "img_types.h"
#include "pvrsrv_error.h"
#include "pdump.h"
#include "devicemem.h"
#include "devicemem_utils.h"
#include "devicemem_pdump.h"
#include "client_pdumpmm_bridge.h"
#if defined(LINUX) && !defined(__KERNEL__)
#include <stdio.h>
#if defined(SUPPORT_ANDROID_PLATFORM)
#include "android_utils.h"
#endif
#endif
IMG_INTERNAL void
DevmemPDumpLoadMem(DEVMEM_MEMDESC *psMemDesc,
IMG_DEVMEM_OFFSET_T uiOffset,
IMG_DEVMEM_SIZE_T uiSize,
PDUMP_FLAGS_T uiPDumpFlags)
{
PVRSRV_ERROR eError;
PVR_ASSERT(uiOffset + uiSize <= psMemDesc->psImport->uiSize);
eError = BridgePMRPDumpLoadMem(psMemDesc->psImport->hDevConnection,
psMemDesc->psImport->hPMR,
psMemDesc->uiOffset + uiOffset,
uiSize,
uiPDumpFlags,
IMG_FALSE);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,
"%s: failed with error %d",
__FUNCTION__, eError));
}
PVR_ASSERT(eError == PVRSRV_OK);
}
IMG_INTERNAL void
DevmemPDumpLoadZeroMem(DEVMEM_MEMDESC *psMemDesc,
IMG_DEVMEM_OFFSET_T uiOffset,
IMG_DEVMEM_SIZE_T uiSize,
PDUMP_FLAGS_T uiPDumpFlags)
{
PVRSRV_ERROR eError;
PVR_ASSERT(uiOffset + uiSize <= psMemDesc->psImport->uiSize);
eError = BridgePMRPDumpLoadMem(psMemDesc->psImport->hDevConnection,
psMemDesc->psImport->hPMR,
psMemDesc->uiOffset + uiOffset,
uiSize,
uiPDumpFlags,
IMG_TRUE);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,
"%s: failed with error %d",
__FUNCTION__, eError));
}
PVR_ASSERT(eError == PVRSRV_OK);
}
IMG_INTERNAL void
DevmemPDumpLoadMemValue32(DEVMEM_MEMDESC *psMemDesc,
IMG_DEVMEM_OFFSET_T uiOffset,
IMG_UINT32 ui32Value,
PDUMP_FLAGS_T uiPDumpFlags)
{
PVRSRV_ERROR eError;
eError = BridgePMRPDumpLoadMemValue32(psMemDesc->psImport->hDevConnection,
psMemDesc->psImport->hPMR,
psMemDesc->uiOffset + uiOffset,
ui32Value,
uiPDumpFlags);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,
"%s: failed with error %d",
__FUNCTION__, eError));
}
PVR_ASSERT(eError == PVRSRV_OK);
}
IMG_INTERNAL void
DevmemPDumpLoadMemValue64(DEVMEM_MEMDESC *psMemDesc,
IMG_DEVMEM_OFFSET_T uiOffset,
IMG_UINT64 ui64Value,
PDUMP_FLAGS_T uiPDumpFlags)
{
PVRSRV_ERROR eError;
eError = BridgePMRPDumpLoadMemValue64(psMemDesc->psImport->hDevConnection,
psMemDesc->psImport->hPMR,
psMemDesc->uiOffset + uiOffset,
ui64Value,
uiPDumpFlags);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,
"%s: failed with error %d",
__FUNCTION__, eError));
}
PVR_ASSERT(eError == PVRSRV_OK);
}
/* FIXME: This should be server side only */
IMG_INTERNAL PVRSRV_ERROR
DevmemPDumpPageCatBaseToSAddr(DEVMEM_MEMDESC *psMemDesc,
IMG_DEVMEM_OFFSET_T *puiMemOffset,
IMG_CHAR *pszName,
IMG_UINT32 ui32Size)
{
PVRSRV_ERROR eError;
IMG_CHAR aszMemspaceName[100];
IMG_CHAR aszSymbolicName[100];
IMG_DEVMEM_OFFSET_T uiNextSymName;
*puiMemOffset += psMemDesc->uiOffset;
eError = BridgePMRPDumpSymbolicAddr(psMemDesc->psImport->hDevConnection,
psMemDesc->psImport->hPMR,
*puiMemOffset,
sizeof(aszMemspaceName),
&aszMemspaceName[0],
sizeof(aszSymbolicName),
&aszSymbolicName[0],
puiMemOffset,
&uiNextSymName);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,
"%s: failed with error %d",
__FUNCTION__, eError));
}
PVR_ASSERT(eError == PVRSRV_OK);
OSSNPrintf(pszName, ui32Size, "%s:%s", &aszMemspaceName[0], &aszSymbolicName[0]);
return eError;
}
IMG_INTERNAL void
DevmemPDumpSaveToFile(DEVMEM_MEMDESC *psMemDesc,
IMG_DEVMEM_OFFSET_T uiOffset,
IMG_DEVMEM_SIZE_T uiSize,
const IMG_CHAR *pszFilename,
IMG_UINT32 uiFileOffset)
{
PVRSRV_ERROR eError;
eError = BridgePMRPDumpSaveToFile(psMemDesc->psImport->hDevConnection,
psMemDesc->psImport->hPMR,
psMemDesc->uiOffset + uiOffset,
uiSize,
OSStringLength(pszFilename) + 1,
pszFilename,
uiFileOffset);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,
"%s: failed with error %d",
__FUNCTION__, eError));
}
PVR_ASSERT(eError == PVRSRV_OK);
}
/* FIXME: Remove? */
IMG_INTERNAL void
DevmemPDumpSaveToFileVirtual(DEVMEM_MEMDESC *psMemDesc,
IMG_DEVMEM_OFFSET_T uiOffset,
IMG_DEVMEM_SIZE_T uiSize,
const IMG_CHAR *pszFilename,
IMG_UINT32 ui32FileOffset,
IMG_UINT32 ui32PdumpFlags)
{
PVRSRV_ERROR eError;
IMG_DEV_VIRTADDR sDevAddrStart;
sDevAddrStart = psMemDesc->psImport->sDeviceImport.sDevVAddr;
sDevAddrStart.uiAddr += psMemDesc->uiOffset;
sDevAddrStart.uiAddr += uiOffset;
eError = BridgeDevmemIntPDumpSaveToFileVirtual(psMemDesc->psImport->hDevConnection,
psMemDesc->psImport->sDeviceImport.psHeap->psCtx->hDevMemServerContext,
sDevAddrStart,
uiSize,
OSStringLength(pszFilename) + 1,
pszFilename,
ui32FileOffset,
ui32PdumpFlags);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,
"%s: failed with error %d",
__FUNCTION__, eError));
}
PVR_ASSERT(eError == PVRSRV_OK);
}
IMG_INTERNAL PVRSRV_ERROR
DevmemPDumpDevmemPol32(const DEVMEM_MEMDESC *psMemDesc,
IMG_DEVMEM_OFFSET_T uiOffset,
IMG_UINT32 ui32Value,
IMG_UINT32 ui32Mask,
PDUMP_POLL_OPERATOR eOperator,
PDUMP_FLAGS_T ui32PDumpFlags)
{
PVRSRV_ERROR eError;
IMG_DEVMEM_SIZE_T uiNumBytes;
uiNumBytes = 4;
if (psMemDesc->uiOffset + uiOffset + uiNumBytes >= psMemDesc->psImport->uiSize)
{
eError = PVRSRV_ERROR_DEVICEMEM_OUT_OF_RANGE;
goto e0;
}
eError = BridgePMRPDumpPol32(psMemDesc->psImport->hDevConnection,
psMemDesc->psImport->hPMR,
psMemDesc->uiOffset + uiOffset,
ui32Value,
ui32Mask,
eOperator,
ui32PDumpFlags);
if (eError != PVRSRV_OK)
{
goto e0;
}
return PVRSRV_OK;
/*
error exit paths follow
*/
e0:
PVR_ASSERT(eError != PVRSRV_OK);
return eError;
}
IMG_INTERNAL PVRSRV_ERROR
DevmemPDumpCBP(const DEVMEM_MEMDESC *psMemDesc,
IMG_DEVMEM_OFFSET_T uiReadOffset,
IMG_DEVMEM_OFFSET_T uiWriteOffset,
IMG_DEVMEM_SIZE_T uiPacketSize,
IMG_DEVMEM_SIZE_T uiBufferSize)
{
PVRSRV_ERROR eError;
if ((psMemDesc->uiOffset + uiReadOffset) > psMemDesc->psImport->uiSize)
{
eError = PVRSRV_ERROR_DEVICEMEM_OUT_OF_RANGE;
goto e0;
}
eError = BridgePMRPDumpCBP(psMemDesc->psImport->hDevConnection,
psMemDesc->psImport->hPMR,
psMemDesc->uiOffset + uiReadOffset,
uiWriteOffset,
uiPacketSize,
uiBufferSize);
if (eError != PVRSRV_OK)
{
goto e0;
}
return PVRSRV_OK;
e0:
PVR_ASSERT(eError != PVRSRV_OK);
return eError;
}
#endif /* PDUMP */

346
drivers/staging/imgtec/rogue/devicemem_pdump.h
View File

@ -1,346 +0,0 @@
/*************************************************************************/ /*!
@File
@Title Device Memory Management PDump internal
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Services internal interface to PDump device memory management
functions that are shared between client and server code.
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#ifndef _DEVICEMEM_PDUMP_H_
#define _DEVICEMEM_PDUMP_H_
#include "devicemem.h"
#include "pdumpdefs.h"
#include "pdump.h"
#if defined(PDUMP)
/*
* DevmemPDumpMem()
*
* takes a memory descriptor, offset, and size, and takes the current
* contents of the memory at that location and writes it to the prm
* pdump file, and emits a pdump LDB to load the data from that file.
* The intention here is that the contents of the simulated buffer
* upon pdump playback will be made to be the same as they are when
* this command is run, enabling pdump of cases where the memory has
* been modified externally, i.e. by the host cpu or by a third
* party.
*/
extern void
DevmemPDumpLoadMem(DEVMEM_MEMDESC *psMemDesc,
IMG_DEVMEM_OFFSET_T uiOffset,
IMG_DEVMEM_SIZE_T uiSize,
PDUMP_FLAGS_T uiPDumpFlags);
/*
* DevmemPDumpZeroMem()
*
* as DevmemPDumpMem() but the PDump allocation will be populated with zeros from
* the zero page in the parameter stream
*/
extern void
DevmemPDumpLoadZeroMem(DEVMEM_MEMDESC *psMemDesc,
IMG_DEVMEM_OFFSET_T uiOffset,
IMG_DEVMEM_SIZE_T uiSize,
PDUMP_FLAGS_T uiPDumpFlags);
/*
* DevmemPDumpMemValue()
*
* As above but dumps the value at a dword-aligned address in plain
* text to the pdump script2 file. Useful for patching a buffer at
* pdump playback by simply editing the script output file.
*
* (The same functionality can be achieved by the above function but
* the binary PARAM file must be patched in that case.)
*/
IMG_INTERNAL void
DevmemPDumpLoadMemValue32(DEVMEM_MEMDESC *psMemDesc,
IMG_DEVMEM_OFFSET_T uiOffset,
IMG_UINT32 ui32Value,
PDUMP_FLAGS_T uiPDumpFlags);
/*
* DevmemPDumpMemValue64()
*
* As above but dumps the 64bit-value at a dword-aligned address in plain
* text to the pdump script2 file. Useful for patching a buffer at
* pdump playback by simply editing the script output file.
*
* (The same functionality can be achieved by the above function but
* the binary PARAM file must be patched in that case.)
*/
IMG_INTERNAL void
DevmemPDumpLoadMemValue64(DEVMEM_MEMDESC *psMemDesc,
IMG_DEVMEM_OFFSET_T uiOffset,
IMG_UINT64 ui64Value,
PDUMP_FLAGS_T uiPDumpFlags);
/*
* DevmemPDumpPageCatBaseToSAddr()
*
* Returns the symbolic address of a piece of memory represented
* by an offset into the mem descriptor.
*/
extern PVRSRV_ERROR
DevmemPDumpPageCatBaseToSAddr(DEVMEM_MEMDESC *psMemDesc,
IMG_DEVMEM_OFFSET_T *puiMemOffset,
IMG_CHAR *pszName,
IMG_UINT32 ui32Size);
/*
* DevmemPDumpSaveToFile()
*
* emits a pdump SAB to cause the current contents of the memory to be
* written to the given file during playback
*/
extern void
DevmemPDumpSaveToFile(DEVMEM_MEMDESC *psMemDesc,
IMG_DEVMEM_OFFSET_T uiOffset,
IMG_DEVMEM_SIZE_T uiSize,
const IMG_CHAR *pszFilename,
IMG_UINT32 uiFileOffset);
/*
* DevmemPDumpSaveToFileVirtual()
*
* emits a pdump SAB, just like DevmemPDumpSaveToFile(), but uses the
* virtual address and device MMU context to cause the pdump player to
* traverse the MMU page tables itself.
*/
extern void
DevmemPDumpSaveToFileVirtual(DEVMEM_MEMDESC *psMemDesc,
IMG_DEVMEM_OFFSET_T uiOffset,
IMG_DEVMEM_SIZE_T uiSize,
const IMG_CHAR *pszFilename,
IMG_UINT32 ui32FileOffset,
IMG_UINT32 ui32PdumpFlags);
/*
*
* Devmem_PDumpDevmemPol32()
*
* writes a PDump 'POL' command to wait for a masked 32-bit memory
* location to become the specified value
*/
extern PVRSRV_ERROR
DevmemPDumpDevmemPol32(const DEVMEM_MEMDESC *psMemDesc,
IMG_DEVMEM_OFFSET_T uiOffset,
IMG_UINT32 ui32Value,
IMG_UINT32 ui32Mask,
PDUMP_POLL_OPERATOR eOperator,
PDUMP_FLAGS_T ui32PDumpFlags);
/*
* DevmemPDumpCBP()
*
* Polls for space in circular buffer. Reads the read offset
* from memory and waits until there is enough space to write
* the packet.
*
* hMemDesc - MemDesc which contains the read offset
* uiReadOffset - Offset into MemDesc to the read offset
* uiWriteOffset - Current write offset
* uiPacketSize - Size of packet to write
* uiBufferSize - Size of circular buffer
*/
extern PVRSRV_ERROR
DevmemPDumpCBP(const DEVMEM_MEMDESC *psMemDesc,
IMG_DEVMEM_OFFSET_T uiReadOffset,
IMG_DEVMEM_OFFSET_T uiWriteOffset,
IMG_DEVMEM_SIZE_T uiPacketSize,
IMG_DEVMEM_SIZE_T uiBufferSize);
#else /* PDUMP */
#ifdef INLINE_IS_PRAGMA
#pragma inline(DevmemPDumpLoadMem)
#endif
static INLINE void
DevmemPDumpLoadMem(DEVMEM_MEMDESC *psMemDesc,
IMG_DEVMEM_OFFSET_T uiOffset,
IMG_DEVMEM_SIZE_T uiSize,
PDUMP_FLAGS_T uiPDumpFlags)
{
PVR_UNREFERENCED_PARAMETER(psMemDesc);
PVR_UNREFERENCED_PARAMETER(uiOffset);
PVR_UNREFERENCED_PARAMETER(uiSize);
PVR_UNREFERENCED_PARAMETER(uiPDumpFlags);
}
#ifdef INLINE_IS_PRAGMA
#pragma inline(DevmemPDumpLoadMemValue32)
#endif
static INLINE void
DevmemPDumpLoadMemValue32(DEVMEM_MEMDESC *psMemDesc,
IMG_DEVMEM_OFFSET_T uiOffset,
IMG_UINT32 ui32Value,
PDUMP_FLAGS_T uiPDumpFlags)
{
PVR_UNREFERENCED_PARAMETER(psMemDesc);
PVR_UNREFERENCED_PARAMETER(uiOffset);
PVR_UNREFERENCED_PARAMETER(ui32Value);
PVR_UNREFERENCED_PARAMETER(uiPDumpFlags);
}
#ifdef INLINE_IS_PRAGMA
#pragma inline(DevmemPDumpLoadMemValue64)
#endif
static INLINE void
DevmemPDumpLoadMemValue64(DEVMEM_MEMDESC *psMemDesc,
IMG_DEVMEM_OFFSET_T uiOffset,
IMG_UINT64 ui64Value,
PDUMP_FLAGS_T uiPDumpFlags)
{
PVR_UNREFERENCED_PARAMETER(psMemDesc);
PVR_UNREFERENCED_PARAMETER(uiOffset);
PVR_UNREFERENCED_PARAMETER(ui64Value);
PVR_UNREFERENCED_PARAMETER(uiPDumpFlags);
}
#ifdef INLINE_IS_PRAGMA
#pragma inline(DevmemPDumpLoadMemValue)
#endif
static INLINE void
DevmemPDumpLoadMemValue(DEVMEM_MEMDESC *psMemDesc,
IMG_DEVMEM_OFFSET_T uiOffset,
IMG_UINT32 ui32Value,
PDUMP_FLAGS_T uiPDumpFlags)
{
PVR_UNREFERENCED_PARAMETER(psMemDesc);
PVR_UNREFERENCED_PARAMETER(uiOffset);
PVR_UNREFERENCED_PARAMETER(ui32Value);
PVR_UNREFERENCED_PARAMETER(uiPDumpFlags);
}
#ifdef INLINE_IS_PRAGMA
#pragma inline(DevmemPDumpPageCatBaseToSAddr)
#endif
static INLINE PVRSRV_ERROR
DevmemPDumpPageCatBaseToSAddr(DEVMEM_MEMDESC *psMemDesc,
IMG_DEVMEM_OFFSET_T *puiMemOffset,
IMG_CHAR *pszName,
IMG_UINT32 ui32Size)
{
PVR_UNREFERENCED_PARAMETER(psMemDesc);
PVR_UNREFERENCED_PARAMETER(puiMemOffset);
PVR_UNREFERENCED_PARAMETER(pszName);
PVR_UNREFERENCED_PARAMETER(ui32Size);
return PVRSRV_OK;
}
#ifdef INLINE_IS_PRAGMA
#pragma inline(DevmemPDumpSaveToFile)
#endif
static INLINE void
DevmemPDumpSaveToFile(DEVMEM_MEMDESC *psMemDesc,
IMG_DEVMEM_OFFSET_T uiOffset,
IMG_DEVMEM_SIZE_T uiSize,
const IMG_CHAR *pszFilename,
IMG_UINT32 uiFileOffset)
{
PVR_UNREFERENCED_PARAMETER(psMemDesc);
PVR_UNREFERENCED_PARAMETER(uiOffset);
PVR_UNREFERENCED_PARAMETER(uiSize);
PVR_UNREFERENCED_PARAMETER(pszFilename);
PVR_UNREFERENCED_PARAMETER(uiFileOffset);
}
#ifdef INLINE_IS_PRAGMA
#pragma inline(DevmemPDumpSaveToFileVirtual)
#endif
static INLINE void
DevmemPDumpSaveToFileVirtual(DEVMEM_MEMDESC *psMemDesc,
IMG_DEVMEM_OFFSET_T uiOffset,
IMG_DEVMEM_SIZE_T uiSize,
const IMG_CHAR *pszFilename,
IMG_UINT32 ui32FileOffset,
IMG_UINT32 ui32PdumpFlags)
{
PVR_UNREFERENCED_PARAMETER(psMemDesc);
PVR_UNREFERENCED_PARAMETER(uiOffset);
PVR_UNREFERENCED_PARAMETER(uiSize);
PVR_UNREFERENCED_PARAMETER(pszFilename);
PVR_UNREFERENCED_PARAMETER(ui32FileOffset);
PVR_UNREFERENCED_PARAMETER(ui32PdumpFlags);
}
#ifdef INLINE_IS_PRAGMA
#pragma inline(DevmemPDumpDevmemPol32)
#endif
static INLINE PVRSRV_ERROR
DevmemPDumpDevmemPol32(const DEVMEM_MEMDESC *psMemDesc,
IMG_DEVMEM_OFFSET_T uiOffset,
IMG_UINT32 ui32Value,
IMG_UINT32 ui32Mask,
PDUMP_POLL_OPERATOR eOperator,
PDUMP_FLAGS_T ui32PDumpFlags)
{
PVR_UNREFERENCED_PARAMETER(psMemDesc);
PVR_UNREFERENCED_PARAMETER(uiOffset);
PVR_UNREFERENCED_PARAMETER(ui32Value);
PVR_UNREFERENCED_PARAMETER(ui32Mask);
PVR_UNREFERENCED_PARAMETER(eOperator);
PVR_UNREFERENCED_PARAMETER(ui32PDumpFlags);
return PVRSRV_OK;
}
#ifdef INLINE_IS_PRAGMA
#pragma inline(DevmemPDumpCBP)
#endif
static INLINE PVRSRV_ERROR
DevmemPDumpCBP(const DEVMEM_MEMDESC *psMemDesc,
IMG_DEVMEM_OFFSET_T uiReadOffset,
IMG_DEVMEM_OFFSET_T uiWriteOffset,
IMG_DEVMEM_SIZE_T uiPacketSize,
IMG_DEVMEM_SIZE_T uiBufferSize)
{
PVR_UNREFERENCED_PARAMETER(psMemDesc);
PVR_UNREFERENCED_PARAMETER(uiReadOffset);
PVR_UNREFERENCED_PARAMETER(uiWriteOffset);
PVR_UNREFERENCED_PARAMETER(uiPacketSize);
PVR_UNREFERENCED_PARAMETER(uiBufferSize);
return PVRSRV_OK;
}
#endif /* PDUMP */
#endif /* _DEVICEMEM_PDUMP_H_ */

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/**************************************************************************/ /*!
@File
@Title Device Memory Management
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Header file for server side component of device memory management
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /***************************************************************************/
#ifndef __DEVICEMEM_SERVER_H__
#define __DEVICEMEM_SERVER_H__
#include "device.h" /* For device node */
#include "img_types.h"
#include "pvr_debug.h"
#include "pvrsrv_error.h"
#include "connection_server.h"
#include "pmr.h"
typedef struct _DEVMEMINT_CTX_ DEVMEMINT_CTX;
typedef struct _DEVMEMINT_CTX_EXPORT_ DEVMEMINT_CTX_EXPORT;
typedef struct _DEVMEMINT_HEAP_ DEVMEMINT_HEAP;
typedef struct _DEVMEMINT_RESERVATION_ DEVMEMINT_RESERVATION;
typedef struct _DEVMEMINT_MAPPING_ DEVMEMINT_MAPPING;
typedef struct _DEVMEMINT_PF_NOTIFY_ DEVMEMINT_PF_NOTIFY;
/**************************************************************************/ /*!
@Function DevmemIntUnpin
@Description This is the counterpart to DevmemPin(). It is meant to be
called when the allocation is NOT mapped in the device virtual
space.
@Input psPMR The physical memory to unpin.
@Return PVRSRV_ERROR: PVRSRV_OK on success and the memory is
registered to be reclaimed. Error otherwise.
*/ /***************************************************************************/
PVRSRV_ERROR DevmemIntUnpin(PMR *psPMR);
/**************************************************************************/ /*!
@Function DevmemIntUnpinInvalidate
@Description This is the counterpart to DevmemIntPinValidate(). It is meant to be
called for allocations that ARE mapped in the device virtual space
and we have to invalidate the mapping.
@Input psPMR The physical memory to unpin.
@Return PVRSRV_ERROR: PVRSRV_OK on success and the memory is
registered to be reclaimed. Error otherwise.
*/ /***************************************************************************/
PVRSRV_ERROR DevmemIntUnpinInvalidate(DEVMEMINT_MAPPING *psDevmemMapping, PMR *psPMR);
/**************************************************************************/ /*!
@Function DevmemIntPin
@Description This is the counterpart to DevmemIntUnpin().
Is meant to be called if there is NO device mapping present.
@Input psPMR The physical memory to pin.
@Return PVRSRV_ERROR: PVRSRV_OK on success and the allocation content
was successfully restored.
PVRSRV_ERROR_PMR_NEW_MEMORY when the content
could not be restored and new physical memory
was allocated.
A different error otherwise.
*/ /***************************************************************************/
PVRSRV_ERROR DevmemIntPin(PMR *psPMR);
/**************************************************************************/ /*!
@Function DevmemIntPinValidate
@Description This is the counterpart to DevmemIntUnpinInvalidate().
Is meant to be called if there is IS a device mapping present
that needs to be taken care of.
@Input psDevmemMapping The mapping structure used for the passed PMR.
@Input psPMR The physical memory to pin.
@Return PVRSRV_ERROR: PVRSRV_OK on success and the allocation content
was successfully restored.
PVRSRV_ERROR_PMR_NEW_MEMORY when the content
could not be restored and new physical memory
was allocated.
A different error otherwise.
*/ /***************************************************************************/
PVRSRV_ERROR DevmemIntPinValidate(DEVMEMINT_MAPPING *psDevmemMapping, PMR *psPMR);
/*
* DevmemServerGetImportHandle()
*
* For given exportable memory descriptor returns PMR handle
*
*/
PVRSRV_ERROR
DevmemServerGetImportHandle(DEVMEM_MEMDESC *psMemDesc,
IMG_HANDLE *phImport);
/*
* DevmemServerGetHeapHandle()
*
* For given reservation returns the Heap handle
*
*/
PVRSRV_ERROR
DevmemServerGetHeapHandle(DEVMEMINT_RESERVATION *psReservation,
IMG_HANDLE *phHeap);
/*
* DevmemIntCtxCreate()
*
* Create a Server-side Device Memory Context. This is usually the
* counterpart of the client side memory context, and indeed is
* usually created at the same time.
*
* You must have one of these before creating any heaps.
*
* All heaps must have been destroyed before calling
* DevmemIntCtxDestroy()
*
* If you call DevmemIntCtxCreate() (and it succeeds) you are promising
* to later call DevmemIntCtxDestroy()
*
* Note that this call will cause the device MMU code to do some work
* for creating the device memory context, but it does not guarantee
* that a page catalogue will have been created, as this may be
* deferred until first allocation.
*
* Caller to provide storage for a pointer to the DEVMEM_CTX object
* that will be created by this call.
*/
extern PVRSRV_ERROR
DevmemIntCtxCreate(CONNECTION_DATA *psConnection,
PVRSRV_DEVICE_NODE *psDeviceNode,
/* devnode / perproc etc */
IMG_BOOL bKernelMemoryCtx,
DEVMEMINT_CTX **ppsDevmemCtxPtr,
IMG_HANDLE *hPrivData,
IMG_UINT32 *pui32CPUCacheLineSize);
/*
* DevmemIntCtxDestroy()
*
* Undoes a prior DevmemIntCtxCreate or DevmemIntCtxImport.
*/
extern PVRSRV_ERROR
DevmemIntCtxDestroy(
DEVMEMINT_CTX *psDevmemCtx
);
/*
* DevmemIntHeapCreate()
*
* Creates a new heap in this device memory context. This will cause
* a call into the MMU code to allocate various data structures for
* managing this heap. It will not necessarily cause any page tables
* to be set up, as this can be deferred until first allocation.
* (i.e. we shouldn't care - it's up to the MMU code)
*
* Note that the data page size must be specified (as log 2). The
* data page size as specified here will be communicated to the mmu
* module, and thus may determine the page size configured in page
* directory entries for subsequent allocations from this heap. It is
* essential that the page size here is less than or equal to the
* "minimum contiguity guarantee" of any PMR that you subsequently
* attempt to map to this heap.
*
* If you call DevmemIntHeapCreate() (and the call succeeds) you are
* promising that you shall subsequently call DevmemIntHeapDestroy()
*
* Caller to provide storage for a pointer to the DEVMEM_HEAP object
* that will be created by this call.
*/
extern PVRSRV_ERROR
DevmemIntHeapCreate(
DEVMEMINT_CTX *psDevmemCtx,
IMG_DEV_VIRTADDR sHeapBaseAddr,
IMG_DEVMEM_SIZE_T uiHeapLength,
IMG_UINT32 uiLog2DataPageSize,
DEVMEMINT_HEAP **ppsDevmemHeapPtr
);
/*
* DevmemIntHeapDestroy()
*
* Destroys a heap previously created with DevmemIntHeapCreate()
*
* All allocations from his heap must have been freed before this
* call.
*/
extern PVRSRV_ERROR
DevmemIntHeapDestroy(
DEVMEMINT_HEAP *psDevmemHeap
);
/*
* DevmemIntMapPMR()
*
* Maps the given PMR to the virtual range previously allocated with
* DevmemIntReserveRange()
*
* If appropriate, the PMR must have had its physical backing
* committed, as this call will call into the MMU code to set up the
* page tables for this allocation, which shall in turn request the
* physical addresses from the PMR. Alternatively, the PMR
* implementation can choose to do so off the back of the "lock"
* callback, which it will receive as a result (indirectly) of this
* call.
*
* This function makes no promise w.r.t. the circumstances that it can
* be called, and these would be "inherited" from the implementation
* of the PMR. For example if the PMR "lock" callback causes pages to
* be pinned at that time (which may cause scheduling or disk I/O
* etc.) then it would not be legal to "Map" the PMR in a context
* where scheduling events are disallowed.
*
* If you call DevmemIntMapPMR() (and the call succeeds) then you are
* promising that you shall later call DevmemIntUnmapPMR()
*/
extern PVRSRV_ERROR
DevmemIntMapPMR(DEVMEMINT_HEAP *psDevmemHeap,
DEVMEMINT_RESERVATION *psReservation,
PMR *psPMR,
PVRSRV_MEMALLOCFLAGS_T uiMapFlags,
DEVMEMINT_MAPPING **ppsMappingPtr);
/*
* DevmemIntUnmapPMR()
*
* Reverses the mapping caused by DevmemIntMapPMR()
*/
extern PVRSRV_ERROR
DevmemIntUnmapPMR(DEVMEMINT_MAPPING *psMapping);
/* DevmemIntMapPages()
*
* Maps an arbitrary amount of pages from a PMR to a reserved range
*
* @input psReservation Reservation handle for the range
* @input psPMR PMR that is mapped
* @input ui32PageCount Number of consecutive pages that are mapped
* @input uiPhysicalOffset Logical offset in the PMR
* @input uiFlags Mapping flags
* @input sDevVAddrBase Virtual address base to start the mapping from
*/
extern PVRSRV_ERROR
DevmemIntMapPages(DEVMEMINT_RESERVATION *psReservation,
PMR *psPMR,
IMG_UINT32 ui32PageCount,
IMG_UINT32 ui32PhysicalPgOffset,
PVRSRV_MEMALLOCFLAGS_T uiFlags,
IMG_DEV_VIRTADDR sDevVAddrBase);
/* DevmemIntUnmapPages()
*
* Unmaps an arbitrary amount of pages from a reserved range
*
* @input psReservation Reservation handle for the range
* @input sDevVAddrBase Virtual address base to start from
* @input ui32PageCount Number of consecutive pages that are unmapped
*/
extern PVRSRV_ERROR
DevmemIntUnmapPages(DEVMEMINT_RESERVATION *psReservation,
IMG_DEV_VIRTADDR sDevVAddrBase,
IMG_UINT32 ui32PageCount);
/*
* DevmemIntReserveRange()
*
* Indicates that the specified range should be reserved from the
* given heap.
*
* In turn causes the page tables to be allocated to cover the
* specified range.
*
* If you call DevmemIntReserveRange() (and the call succeeds) then you
* are promising that you shall later call DevmemIntUnreserveRange()
*/
extern PVRSRV_ERROR
DevmemIntReserveRange(DEVMEMINT_HEAP *psDevmemHeap,
IMG_DEV_VIRTADDR sAllocationDevVAddr,
IMG_DEVMEM_SIZE_T uiAllocationSize,
DEVMEMINT_RESERVATION **ppsReservationPtr);
/*
* DevmemIntUnreserveRange()
*
* Undoes the state change caused by DevmemIntReserveRage()
*/
extern PVRSRV_ERROR
DevmemIntUnreserveRange(DEVMEMINT_RESERVATION *psDevmemReservation);
/*************************************************************************/ /*!
@Function DevmemIntChangeSparse
@Description Changes the sparse allocations of a PMR by allocating and freeing
pages and changing their corresponding CPU and GPU mappings.
@input psDevmemHeap Pointer to the heap we map on
@input psPMR The PMR we want to map
@input ui32AllocPageCount Number of pages to allocate
@input pai32AllocIndices The logical PMR indices where pages will
be allocated. May be NULL.
@input ui32FreePageCount Number of pages to free
@input pai32FreeIndices The logical PMR indices where pages will
be freed. May be NULL.
@input uiSparseFlags Flags passed in to determine which kind
of sparse change the user wanted.
See devicemem_typedefs.h for details.
@input uiFlags The memalloc flags for this virtual range.
@input sDevVAddrBase The base address of the virtual range of
this sparse allocation.
@input sCpuVAddrBase The CPU base address of this allocation.
May be 0 if not existing.
@Return PVRSRV_ERROR failure code
*/ /**************************************************************************/
extern PVRSRV_ERROR
DevmemIntChangeSparse(DEVMEMINT_HEAP *psDevmemHeap,
PMR *psPMR,
IMG_UINT32 ui32AllocPageCount,
IMG_UINT32 *pai32AllocIndices,
IMG_UINT32 ui32FreePageCount,
IMG_UINT32 *pai32FreeIndices,
SPARSE_MEM_RESIZE_FLAGS uiSparseFlags,
PVRSRV_MEMALLOCFLAGS_T uiFlags,
IMG_DEV_VIRTADDR sDevVAddrBase,
IMG_UINT64 sCpuVAddrBase);
extern PVRSRV_ERROR
DevmemIntIsVDevAddrValid(CONNECTION_DATA * psConnection,
PVRSRV_DEVICE_NODE *psDevNode,
DEVMEMINT_CTX *psDevMemContext,
IMG_DEV_VIRTADDR sDevAddr);
/*************************************************************************/ /*!
@Function DevmemIntRegisterPFNotify
@Description Registers a PID to be notified when a page fault occurs on a
specific device memory context.
@Input psDevmemCtx The context to be notified about.
@Input ui32PID The PID of the process that would like to be
notified.
@Input bRegister If true, register. If false, de-register.
@Return PVRSRV_ERROR.
*/ /**************************************************************************/
IMG_EXPORT PVRSRV_ERROR
DevmemIntRegisterPFNotifyKM(DEVMEMINT_CTX *psDevmemCtx,
IMG_INT32 ui32PID,
IMG_BOOL bRegister);
/*************************************************************************/ /*!
@Function DevmemIntPFNotify
@Description Notifies any processes that have registered themselves to be
notified when a page fault happens on a specific device memory
context.
@Input *psDevNode The device node.
@Input ui64FaultedPCAddress The page catalogue address that faulted.
@Return PVRSRV_ERROR
*/ /**************************************************************************/
PVRSRV_ERROR DevmemIntPFNotify(PVRSRV_DEVICE_NODE *psDevNode,
IMG_UINT64 ui64FaultedPCAddress);
#if defined(PDUMP)
/*
* DevmemIntPDumpSaveToFileVirtual()
*
* Writes out PDump "SAB" commands with the data found in memory at
* the given virtual address.
*/
/* FIXME: uiArraySize shouldn't be here, and is an
artefact of the bridging */
extern PVRSRV_ERROR
DevmemIntPDumpSaveToFileVirtual(DEVMEMINT_CTX *psDevmemCtx,
IMG_DEV_VIRTADDR sDevAddrStart,
IMG_DEVMEM_SIZE_T uiSize,
IMG_UINT32 uiArraySize,
const IMG_CHAR *pszFilename,
IMG_UINT32 ui32FileOffset,
IMG_UINT32 ui32PDumpFlags);
extern IMG_UINT32
DevmemIntMMUContextID(DEVMEMINT_CTX *psDevMemContext);
extern PVRSRV_ERROR
DevmemIntPDumpBitmap(CONNECTION_DATA * psConnection,
PVRSRV_DEVICE_NODE *psDeviceNode,
IMG_CHAR *pszFileName,
IMG_UINT32 ui32FileOffset,
IMG_UINT32 ui32Width,
IMG_UINT32 ui32Height,
IMG_UINT32 ui32StrideInBytes,
IMG_DEV_VIRTADDR sDevBaseAddr,
DEVMEMINT_CTX *psDevMemContext,
IMG_UINT32 ui32Size,
PDUMP_PIXEL_FORMAT ePixelFormat,
IMG_UINT32 ui32AddrMode,
IMG_UINT32 ui32PDumpFlags);
#else /* PDUMP */
#ifdef INLINE_IS_PRAGMA
#pragma inline(PVRSRVSyncPrimPDumpPolKM)
#endif
static INLINE PVRSRV_ERROR
DevmemIntPDumpSaveToFileVirtual(DEVMEMINT_CTX *psDevmemCtx,
IMG_DEV_VIRTADDR sDevAddrStart,
IMG_DEVMEM_SIZE_T uiSize,
IMG_UINT32 uiArraySize,
const IMG_CHAR *pszFilename,
IMG_UINT32 ui32FileOffset,
IMG_UINT32 ui32PDumpFlags)
{
PVR_UNREFERENCED_PARAMETER(psDevmemCtx);
PVR_UNREFERENCED_PARAMETER(sDevAddrStart);
PVR_UNREFERENCED_PARAMETER(uiSize);
PVR_UNREFERENCED_PARAMETER(uiArraySize);
PVR_UNREFERENCED_PARAMETER(pszFilename);
PVR_UNREFERENCED_PARAMETER(ui32FileOffset);
PVR_UNREFERENCED_PARAMETER(ui32PDumpFlags);
return PVRSRV_OK;
}
#ifdef INLINE_IS_PRAGMA
#pragma inline(PVRSRVSyncPrimPDumpPolKM)
#endif
static INLINE PVRSRV_ERROR
DevmemIntPDumpBitmap(CONNECTION_DATA * psConnection,
PVRSRV_DEVICE_NODE *psDeviceNode,
IMG_CHAR *pszFileName,
IMG_UINT32 ui32FileOffset,
IMG_UINT32 ui32Width,
IMG_UINT32 ui32Height,
IMG_UINT32 ui32StrideInBytes,
IMG_DEV_VIRTADDR sDevBaseAddr,
DEVMEMINT_CTX *psDevMemContext,
IMG_UINT32 ui32Size,
PDUMP_PIXEL_FORMAT ePixelFormat,
IMG_UINT32 ui32AddrMode,
IMG_UINT32 ui32PDumpFlags)
{
PVR_UNREFERENCED_PARAMETER(psConnection);
PVR_UNREFERENCED_PARAMETER(psDeviceNode);
PVR_UNREFERENCED_PARAMETER(pszFileName);
PVR_UNREFERENCED_PARAMETER(ui32FileOffset);
PVR_UNREFERENCED_PARAMETER(ui32Width);
PVR_UNREFERENCED_PARAMETER(ui32Height);
PVR_UNREFERENCED_PARAMETER(ui32StrideInBytes);
PVR_UNREFERENCED_PARAMETER(sDevBaseAddr);
PVR_UNREFERENCED_PARAMETER(psDevMemContext);
PVR_UNREFERENCED_PARAMETER(ui32Size);
PVR_UNREFERENCED_PARAMETER(ePixelFormat);
PVR_UNREFERENCED_PARAMETER(ui32AddrMode);
PVR_UNREFERENCED_PARAMETER(ui32PDumpFlags);
return PVRSRV_OK;
}
#endif /* PDUMP */
PVRSRV_ERROR
DevmemIntExportCtx(DEVMEMINT_CTX *psContext,
PMR *psPMR,
DEVMEMINT_CTX_EXPORT **ppsContextExport);
PVRSRV_ERROR
DevmemIntUnexportCtx(DEVMEMINT_CTX_EXPORT *psContextExport);
PVRSRV_ERROR
DevmemIntAcquireRemoteCtx(PMR *psPMR,
DEVMEMINT_CTX **ppsContext,
IMG_HANDLE *phPrivData);
#endif /* ifndef __DEVICEMEM_SERVER_H__ */

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@ -1,195 +0,0 @@
/**************************************************************************/ /*!
@File
@Title Device Memory Management
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Header file utilities that are specific to device memory functions
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /***************************************************************************/
#include "img_defs.h"
#include "img_types.h"
#include "device.h"
#include "pvrsrv_memallocflags.h"
#include "pvrsrv.h"
static INLINE IMG_UINT32 DevmemCPUCacheMode(PVRSRV_DEVICE_NODE *psDeviceNode,
PVRSRV_MEMALLOCFLAGS_T ulFlags)
{
IMG_UINT32 ui32CPUCacheMode = PVRSRV_CPU_CACHE_MODE(ulFlags);
IMG_UINT32 ui32Ret;
PVR_ASSERT(ui32CPUCacheMode == PVRSRV_CPU_CACHE_MODE(ulFlags));
switch (ui32CPUCacheMode)
{
case PVRSRV_MEMALLOCFLAG_CPU_UNCACHED:
ui32Ret = PVRSRV_MEMALLOCFLAG_CPU_UNCACHED;
break;
case PVRSRV_MEMALLOCFLAG_CPU_WRITE_COMBINE:
ui32Ret = PVRSRV_MEMALLOCFLAG_CPU_WRITE_COMBINE;
break;
case PVRSRV_MEMALLOCFLAG_CPU_CACHE_INCOHERENT:
ui32Ret = PVRSRV_MEMALLOCFLAG_CPU_CACHED;
break;
case PVRSRV_MEMALLOCFLAG_CPU_CACHE_COHERENT:
/*
* If system has no coherency but coherency has been requested for CPU
* and GPU we currently have to fall back to uncached.
*
* Usually the first case here should return an error but as long as a lot
* of services allocations using both CPU/GPU coherency flags and rely on
* the UNCACHED fallback we have to leave it here.
*/
if ( (PVRSRV_GPU_CACHE_MODE(ulFlags) == PVRSRV_MEMALLOCFLAG_GPU_CACHE_COHERENT) &&
!(PVRSRVSystemSnoopingOfCPUCache(psDeviceNode->psDevConfig) && PVRSRVSystemSnoopingOfDeviceCache(psDeviceNode->psDevConfig)) )
{
ui32Ret = PVRSRV_MEMALLOCFLAG_CPU_UNCACHED;
}
else
{
ui32Ret = PVRSRV_MEMALLOCFLAG_CPU_CACHED;
}
break;
break;
default:
PVR_LOG(("DevmemCPUCacheMode: Unknown CPU cache mode 0x%08x", ui32CPUCacheMode));
PVR_ASSERT(0);
/*
We should never get here, but if we do then setting the mode
to uncached is the safest thing to do.
*/
ui32Ret = PVRSRV_MEMALLOCFLAG_CPU_UNCACHED;
break;
}
return ui32Ret;
}
static INLINE IMG_UINT32 DevmemDeviceCacheMode(PVRSRV_DEVICE_NODE *psDeviceNode,
PVRSRV_MEMALLOCFLAGS_T ulFlags)
{
IMG_UINT32 ui32DeviceCacheMode = PVRSRV_GPU_CACHE_MODE(ulFlags);
IMG_UINT32 ui32Ret;
PVR_ASSERT(ui32DeviceCacheMode == PVRSRV_GPU_CACHE_MODE(ulFlags));
switch (ui32DeviceCacheMode)
{
case PVRSRV_MEMALLOCFLAG_GPU_UNCACHED:
ui32Ret = PVRSRV_MEMALLOCFLAG_GPU_UNCACHED;
break;
case PVRSRV_MEMALLOCFLAG_GPU_WRITE_COMBINE:
ui32Ret = PVRSRV_MEMALLOCFLAG_GPU_WRITE_COMBINE;
break;
case PVRSRV_MEMALLOCFLAG_GPU_CACHE_INCOHERENT:
ui32Ret = PVRSRV_MEMALLOCFLAG_GPU_CACHED;
break;
case PVRSRV_MEMALLOCFLAG_GPU_CACHE_COHERENT:
/*
* If system has no coherency but coherency has been requested for CPU
* and GPU we currently have to fall back to uncached.
*
* Usually the first case here should return an error but as long as a lot
* of services allocations using both CPU/GPU coherency flags and rely on
* the UNCACHED fallback we have to leave it here.
*/
if ( (PVRSRV_CPU_CACHE_MODE(ulFlags) == PVRSRV_MEMALLOCFLAG_CPU_CACHE_COHERENT) &&
!(PVRSRVSystemSnoopingOfCPUCache(psDeviceNode->psDevConfig) && PVRSRVSystemSnoopingOfDeviceCache(psDeviceNode->psDevConfig)) )
{
ui32Ret = PVRSRV_MEMALLOCFLAG_GPU_UNCACHED;
}
else
{
ui32Ret = PVRSRV_MEMALLOCFLAG_GPU_CACHED;
}
break;
default:
PVR_LOG(("DevmemDeviceCacheMode: Unknown device cache mode 0x%08x", ui32DeviceCacheMode));
PVR_ASSERT(0);
/*
We should never get here, but if we do then setting the mode
to uncached is the safest thing to do.
*/
ui32Ret = PVRSRV_MEMALLOCFLAG_GPU_UNCACHED;
break;
}
return ui32Ret;
}
static INLINE IMG_BOOL DevmemCPUCacheCoherency(PVRSRV_DEVICE_NODE *psDeviceNode,
PVRSRV_MEMALLOCFLAGS_T ulFlags)
{
IMG_UINT32 ui32CPUCacheMode = PVRSRV_CPU_CACHE_MODE(ulFlags);
IMG_BOOL bRet = IMG_FALSE;
PVR_ASSERT(ui32CPUCacheMode == PVRSRV_CPU_CACHE_MODE(ulFlags));
if (ui32CPUCacheMode == PVRSRV_MEMALLOCFLAG_CPU_CACHE_COHERENT)
{
bRet = PVRSRVSystemSnoopingOfDeviceCache(psDeviceNode->psDevConfig);
}
return bRet;
}
static INLINE IMG_BOOL DevmemDeviceCacheCoherency(PVRSRV_DEVICE_NODE *psDeviceNode,
PVRSRV_MEMALLOCFLAGS_T ulFlags)
{
IMG_UINT32 ui32DeviceCacheMode = PVRSRV_GPU_CACHE_MODE(ulFlags);
IMG_BOOL bRet = IMG_FALSE;
PVR_ASSERT(ui32DeviceCacheMode == PVRSRV_GPU_CACHE_MODE(ulFlags));
if (ui32DeviceCacheMode == PVRSRV_MEMALLOCFLAG_GPU_CACHE_COHERENT)
{
bRet = PVRSRVSystemSnoopingOfCPUCache(psDeviceNode->psDevConfig);
}
return bRet;
}

133
drivers/staging/imgtec/rogue/devicemem_typedefs.h
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@ -1,133 +0,0 @@
/*************************************************************************/ /*!
@File
@Title Device Memory Management
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Client side part of device memory management -- this file
is forked from new_devmem_allocation.h as this one has to
reside in the top level include so that client code is able
to make use of the typedefs.
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#ifndef DEVICEMEM_TYPEDEFS_H
#define DEVICEMEM_TYPEDEFS_H
#include <powervr/mem_types.h>
#include "img_types.h"
#include "pvrsrv_memallocflags.h"
typedef struct _DEVMEM_CONTEXT_ DEVMEM_CONTEXT; /*!< Convenience typedef for struct _DEVMEM_CONTEXT_ */
typedef struct _DEVMEM_HEAP_ DEVMEM_HEAP; /*!< Convenience typedef for struct _DEVMEM_HEAP_ */
typedef struct _DEVMEM_MEMDESC_ DEVMEM_MEMDESC; /*!< Convenience typedef for struct _DEVMEM_MEMDESC_ */
typedef struct _DEVMEM_PAGELIST_ DEVMEM_PAGELIST; /*!< Convenience typedef for struct _DEVMEM_PAGELIST_ */
typedef PVRSRV_MEMALLOCFLAGS_T DEVMEM_FLAGS_T; /*!< Conveneince typedef for PVRSRV_MEMALLOCFLAGS_T */
typedef IMG_HANDLE /* FIXME: should be a SID */ DEVMEM_EXPORTHANDLE; /*!< Typedef for DeviceMem Export Handle */
typedef IMG_UINT64 DEVMEM_EXPORTKEY; /*!< Typedef for DeviceMem Export Key */
typedef IMG_DEVMEM_SIZE_T DEVMEM_SIZE_T; /*!< Typedef for DeviceMem SIZE_T */
typedef IMG_DEVMEM_LOG2ALIGN_T DEVMEM_LOG2ALIGN_T; /*!< Typedef for DeviceMem LOG2 Alignment */
typedef struct _DEVMEMX_PHYS_MEMDESC_ DEVMEMX_PHYSDESC; /*!< Convenience typedef for DevmemX physical */
typedef struct _DEVMEMX_VIRT_MEMDESC_ DEVMEMX_VIRTDESC; /*!< Convenience typedef for DevmemX virtual */
/*! calling code needs all the info in this struct, to be able to pass it around */
typedef struct
{
/*! A handle to the PMR. Should be a SID. FIXME: decide whether
this is right... as the PMR would have to be a cross-process
handle */
IMG_HANDLE hPMRExportHandle;
/*! The "key" to prove we have authorization to use this PMR */
IMG_UINT64 uiPMRExportPassword;
/*! Size and alignment properties for this PMR. Note, these
numbers are not trusted in kernel, but we need to cache them
client-side in order to allocate from the VM arena. The kernel
will know the actual alignment and size of the PMR and thus
would prevent client code from breaching security here. Ditto
for physmem granularity (aka page size) if this is different
from alignment */
IMG_DEVMEM_SIZE_T uiSize;
/*! We call this "contiguity guarantee" to be more precise than
calling it "alignment" or "page size", terms which may seem
similar but have different emphasis. The number reported here
is the minimum contiguity guarantee from the creator of the
PMR. Now, there is no requirement to allocate that coarsely
from the RA. The alignment given to the RA simply needs to be
at least as coarse as the device page size for the heap we
ultimately intend to map into. What is important is that the
device MMU data page size is not greater than the minimum
contiguity guarantee from the PMR. This value is reported to
the client in order that it can choose to make early checks and
perhaps decide which heap (in a variable page size scenario) it
would be safe to map this PMR into. For convenience, the
client may choose to use this argument as the alignment of the
virtual range he chooses to allocate, but this is _not_
necessary and in many cases would be able to get away with a
finer alignment, should the heap into which this PMR will be
mapped support it. */
IMG_DEVMEM_LOG2ALIGN_T uiLog2ContiguityGuarantee;
} DEVMEM_EXPORTCOOKIE;
/* Enum that describes the operation associated with changing sparse memory*/
typedef enum Resize {
SPARSE_RESIZE_NONE = 0,
/* This should be set to indicate the change needs allocation */
SPARSE_RESIZE_ALLOC = 1,
/* This should be set to indicate the change needs free */
SPARSE_RESIZE_FREE = 2,
SPARSE_RESIZE_BOTH = (SPARSE_RESIZE_ALLOC | SPARSE_RESIZE_FREE),
/* This should be set to silently swap underlying physical memory
* without disturbing its device or cpu virtual maps
* This flag is not supported in the case of PDUMP and could lead to
* PDUMP panic when used */
SPARSE_REMAP_MEM = 4,
/* Should be set to get the sparse changes appear in cpu virtual map */
SPARSE_MAP_CPU_ADDR = 8
}SPARSE_MEM_RESIZE_FLAGS;
/* To use with DevmemSubAllocate() as the default factor if no
* over-allocation is desired. */
#define DEVMEM_NO_PRE_ALLOCATE_MULTIPLIER 1
#endif /* #ifndef DEVICEMEM_TYPEDEFS_H */

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drivers/staging/imgtec/rogue/devicemem_utils.c
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453
drivers/staging/imgtec/rogue/devicemem_utils.h
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@ -1,453 +0,0 @@
/*************************************************************************/ /*!
@File
@Title Device Memory Management internal utility functions
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Utility functions used internally by device memory management
code.
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#ifndef _DEVICEMEM_UTILS_H_
#define _DEVICEMEM_UTILS_H_
#include "devicemem.h"
#include "img_types.h"
#include "pvrsrv_error.h"
#include "pvr_debug.h"
#include "allocmem.h"
#include "ra.h"
#include "osfunc.h"
#include "lock.h"
#include "osmmap.h"
#include "devicemem_utils.h"
#if defined(SUPPORT_PAGE_FAULT_DEBUG)
#include "mm_common.h"
#include "devicemem_history_shared.h"
#endif
#define DEVMEM_HEAPNAME_MAXLENGTH 160
#if defined(DEVMEM_DEBUG) && defined(REFCOUNT_DEBUG)
#define DEVMEM_REFCOUNT_PRINT(fmt, ...) PVRSRVDebugPrintf(PVR_DBG_ERROR, __FILE__, __LINE__, fmt, __VA_ARGS__)
#else
#define DEVMEM_REFCOUNT_PRINT(fmt, ...)
#endif
/* If we need a "hMapping" but we don't have a server-side mapping, we
poison the entry with this value so that it's easily recognised in
the debugger. Note that this is potentially a valid handle, but
then so is NULL, which is no better, indeed worse, as it's not
obvious in the debugger. The value doesn't matter. We _never_ use
it (and because it's valid, we never assert it isn't this) but it's
nice to have a value in the source code that we can grep for when
things go wrong. */
#define LACK_OF_MAPPING_POISON ((IMG_HANDLE)0x6116dead)
#define LACK_OF_RESERVATION_POISON ((IMG_HANDLE)0x7117dead)
struct _DEVMEM_CONTEXT_ {
SHARED_DEV_CONNECTION hDevConnection;
/* Number of heaps that have been created in this context
(regardless of whether they have allocations) */
IMG_UINT32 uiNumHeaps;
/*
Each "DEVMEM_CONTEXT" has a counterpart in the server,
which is responsible for handling the mapping into device MMU.
We have a handle to that here.
*/
IMG_HANDLE hDevMemServerContext;
/* Number of automagically created heaps in this context,
i.e. those that are born at context creation time from the
chosen "heap config" or "blueprint" */
IMG_UINT32 uiAutoHeapCount;
/* pointer to array of such heaps */
struct _DEVMEM_HEAP_ **ppsAutoHeapArray;
/* The cache line size for use when allocating memory, as it is not queryable on the client side */
IMG_UINT32 ui32CPUCacheLineSize;
/* Private data handle for device specific data */
IMG_HANDLE hPrivData;
};
typedef enum
{
DEVMEM_HEAP_TYPE_UNKNOWN = 0,
DEVMEM_HEAP_TYPE_USER_MANAGED,
DEVMEM_HEAP_TYPE_KERNEL_MANAGED,
DEVMEM_HEAP_TYPE_RA_MANAGED,
}DEVMEM_HEAP_TYPE;
struct _DEVMEM_HEAP_ {
/* Name of heap - for debug and lookup purposes. */
IMG_CHAR *pszName;
/* Number of live imports in the heap */
ATOMIC_T hImportCount;
/*
* Base address and size of heap, required by clients due to some requesters
* not being full range
*/
IMG_DEV_VIRTADDR sBaseAddress;
DEVMEM_SIZE_T uiSize;
/* The heap type, describing if the space is managed by the user or an RA*/
DEVMEM_HEAP_TYPE eHeapType;
/* This RA is for managing sub-allocations in virtual space. Two
more RA's will be used under the Hood for managing the coarser
allocation of virtual space from the heap, and also for
managing the physical backing storage. */
RA_ARENA *psSubAllocRA;
IMG_CHAR *pszSubAllocRAName;
/*
This RA is for the coarse allocation of virtual space from the heap
*/
RA_ARENA *psQuantizedVMRA;
IMG_CHAR *pszQuantizedVMRAName;
/* We also need to store a copy of the quantum size in order to
feed this down to the server */
IMG_UINT32 uiLog2Quantum;
/* Store a copy of the minimum import alignment */
IMG_UINT32 uiLog2ImportAlignment;
/* The relationship between tiled heap alignment and heap byte-stride
* (dependent on tiling mode, abstracted here) */
IMG_UINT32 uiLog2TilingStrideFactor;
/* The parent memory context for this heap */
struct _DEVMEM_CONTEXT_ *psCtx;
/* Lock to protect this structure */
POS_LOCK hLock;
/*
Each "DEVMEM_HEAP" has a counterpart in the server,
which is responsible for handling the mapping into device MMU.
We have a handle to that here.
*/
IMG_HANDLE hDevMemServerHeap;
};
typedef IMG_UINT32 DEVMEM_PROPERTIES_T; /*!< Typedef for Devicemem properties */
#define DEVMEM_PROPERTIES_EXPORTABLE (1UL<<0) /*!< Is it exportable? */
#define DEVMEM_PROPERTIES_IMPORTED (1UL<<1) /*!< Is it imported from another process? */
#define DEVMEM_PROPERTIES_SUBALLOCATABLE (1UL<<2) /*!< Is it suballocatable? */
#define DEVMEM_PROPERTIES_UNPINNED (1UL<<3) /*!< Is it currently pinned? */
#define DEVMEM_PROPERTIES_IMPORT_IS_ZEROED (1UL<<4) /*!< Is the memory fully zeroed? */
#define DEVMEM_PROPERTIES_IMPORT_IS_CLEAN (1UL<<5) /*!< Is the memory clean, i.e. not been used before? */
#define DEVMEM_PROPERTIES_SECURE (1UL<<6) /*!< Is it a special secure buffer? No CPU maps allowed! */
typedef struct _DEVMEM_DEVICE_IMPORT_ {
DEVMEM_HEAP *psHeap; /*!< Heap this import is bound to */
IMG_DEV_VIRTADDR sDevVAddr; /*!< Device virtual address of the import */
IMG_UINT32 ui32RefCount; /*!< Refcount of the device virtual address */
IMG_HANDLE hReservation; /*!< Device memory reservation handle */
IMG_HANDLE hMapping; /*!< Device mapping handle */
IMG_BOOL bMapped; /*!< This is import mapped? */
POS_LOCK hLock; /*!< Lock to protect the device import */
} DEVMEM_DEVICE_IMPORT;
typedef struct _DEVMEM_CPU_IMPORT_ {
void *pvCPUVAddr; /*!< CPU virtual address of the import */
IMG_UINT32 ui32RefCount; /*!< Refcount of the CPU virtual address */
IMG_HANDLE hOSMMapData; /*!< CPU mapping handle */
POS_LOCK hLock; /*!< Lock to protect the CPU import */
} DEVMEM_CPU_IMPORT;
typedef struct _DEVMEM_IMPORT_ {
SHARED_DEV_CONNECTION hDevConnection;
IMG_DEVMEM_ALIGN_T uiAlign; /*!< Alignment of the PMR */
DEVMEM_SIZE_T uiSize; /*!< Size of import */
ATOMIC_T hRefCount; /*!< Refcount for this import */
DEVMEM_PROPERTIES_T uiProperties; /*!< Stores properties of an import like if
it is exportable, pinned or suballocatable */
IMG_HANDLE hPMR; /*!< Handle to the PMR */
DEVMEM_FLAGS_T uiFlags; /*!< Flags for this import */
POS_LOCK hLock; /*!< Lock to protect the import */
DEVMEM_DEVICE_IMPORT sDeviceImport; /*!< Device specifics of the import */
DEVMEM_CPU_IMPORT sCPUImport; /*!< CPU specifics of the import */
#if defined(PDUMP)
IMG_CHAR *pszAnnotation;
#endif
} DEVMEM_IMPORT;
typedef struct _DEVMEM_DEVICE_MEMDESC_ {
IMG_DEV_VIRTADDR sDevVAddr; /*!< Device virtual address of the allocation */
IMG_UINT32 ui32RefCount; /*!< Refcount of the device virtual address */
POS_LOCK hLock; /*!< Lock to protect device memdesc */
} DEVMEM_DEVICE_MEMDESC;
typedef struct _DEVMEM_CPU_MEMDESC_ {
void *pvCPUVAddr; /*!< CPU virtual address of the import */
IMG_UINT32 ui32RefCount; /*!< Refcount of the device CPU address */
POS_LOCK hLock; /*!< Lock to protect CPU memdesc */
} DEVMEM_CPU_MEMDESC;
struct _DEVMEM_MEMDESC_ {
DEVMEM_IMPORT *psImport; /*!< Import this memdesc is on */
IMG_DEVMEM_OFFSET_T uiOffset; /*!< Offset into import where our allocation starts */
IMG_DEVMEM_SIZE_T uiAllocSize; /*!< Size of the allocation */
ATOMIC_T hRefCount; /*!< Refcount of the memdesc */
POS_LOCK hLock; /*!< Lock to protect memdesc */
IMG_HANDLE hPrivData;
DEVMEM_DEVICE_MEMDESC sDeviceMemDesc; /*!< Device specifics of the memdesc */
DEVMEM_CPU_MEMDESC sCPUMemDesc; /*!< CPU specifics of the memdesc */
#if defined(SUPPORT_PAGE_FAULT_DEBUG)
DEVICEMEM_HISTORY_MEMDESC_DATA sTraceData;
#endif
#if defined(PVR_RI_DEBUG)
IMG_HANDLE hRIHandle; /*!< Handle to RI information */
#endif
};
/* The physical descriptor used to store handles and information of
* device physical allocations. */
struct _DEVMEMX_PHYS_MEMDESC_ {
IMG_UINT32 uiNumPages; /*!< Number of pages that the import has*/
IMG_UINT32 uiLog2PageSize; /*!< Page size */
ATOMIC_T hRefCount; /*!< Refcount of the memdesc */
DEVMEM_FLAGS_T uiFlags; /*!< Flags for this import */
IMG_HANDLE hPMR; /*!< Handle to the PMR */
DEVMEM_CPU_IMPORT sCPUImport; /*!< CPU specifics of the memdesc */
DEVMEM_BRIDGE_HANDLE hBridge; /*!< Bridge connection for the server */
};
/* The virtual descriptor used to store handles and information of a
* device virtual range and the mappings to it. */
struct _DEVMEMX_VIRT_MEMDESC_ {
IMG_UINT32 uiNumPages; /*!< Number of pages that the import has*/
DEVMEM_FLAGS_T uiFlags; /*!< Flags for this import */
DEVMEMX_PHYSDESC **apsPhysDescTable; /*!< Table to store links to physical descs */
DEVMEM_DEVICE_IMPORT sDeviceImport; /*!< Device specifics of the memdesc */
#if defined(SUPPORT_PAGE_FAULT_DEBUG)
DEVICEMEM_HISTORY_MEMDESC_DATA sTraceData; /*!< To track mappings in this range */
#endif
#if defined(PVR_RI_DEBUG)
IMG_HANDLE hRIHandle; /*!< Handle to RI information */
#endif
};
#define DEVICEMEM_UTILS_NO_ADDRESS 0
/******************************************************************************
@Function _DevmemValidateParams
@Description Check if flags are conflicting and if align is a size multiple.
@Input uiSize Size of the import.
@Input uiAlign Alignment of the import.
@Input puiFlags Pointer to the flags for the import.
@return PVRSRV_ERROR
******************************************************************************/
PVRSRV_ERROR _DevmemValidateParams(IMG_DEVMEM_SIZE_T uiSize,
IMG_DEVMEM_ALIGN_T uiAlign,
DEVMEM_FLAGS_T *puiFlags);
/******************************************************************************
@Function _DevmemImportStructAlloc
@Description Allocates memory for an import struct. Does not allocate a PMR!
Create locks for CPU and Devmem mappings.
@Input hBridge Bridge to use for calls from the import.
@Input ppsImport The import to allocate.
@return PVRSRV_ERROR
******************************************************************************/
PVRSRV_ERROR _DevmemImportStructAlloc(SHARED_DEV_CONNECTION hDevConnection,
DEVMEM_IMPORT **ppsImport);
/******************************************************************************
@Function _DevmemImportStructInit
@Description Initialises the import struct with the given parameters.
Set it's refcount to 1!
@Input psImport The import to initialise.
@Input uiSize Size of the import.
@Input uiAlign Alignment of allocations in the import.
@Input uiMapFlags
@Input hPMR Reference to the PMR of this import struct.
@Input uiProperties Properties of the import. Is it exportable,
imported, suballocatable, unpinned?
******************************************************************************/
void _DevmemImportStructInit(DEVMEM_IMPORT *psImport,
IMG_DEVMEM_SIZE_T uiSize,
IMG_DEVMEM_ALIGN_T uiAlign,
PVRSRV_MEMALLOCFLAGS_T uiMapFlags,
IMG_HANDLE hPMR,
DEVMEM_PROPERTIES_T uiProperties);
/******************************************************************************
@Function _DevmemImportStructDevMap
@Description NEVER call after the last _DevmemMemDescRelease()
Maps the PMR referenced by the import struct to the device's
virtual address space.
Does nothing but increase the cpu mapping refcount if the
import struct was already mapped.
@Input psHeap The heap to map to.
@Input bMap Caller can choose if the import should be really
mapped in the page tables or if just a virtual range
should be reserved and the refcounts increased.
@Input psImport The import we want to map.
@Input uiOptionalMapAddress An optional address to map to.
Pass DEVICEMEM_UTILS_NOADDRESS if not used.
@return PVRSRV_ERROR
******************************************************************************/
PVRSRV_ERROR _DevmemImportStructDevMap(DEVMEM_HEAP *psHeap,
IMG_BOOL bMap,
DEVMEM_IMPORT *psImport,
IMG_UINT64 uiOptionalMapAddress);
/******************************************************************************
@Function _DevmemImportStructDevUnmap
@Description Unmaps the PMR referenced by the import struct from the
device's virtual address space.
If this was not the last remaining CPU mapping on the import
struct only the cpu mapping refcount is decreased.
******************************************************************************/
void _DevmemImportStructDevUnmap(DEVMEM_IMPORT *psImport);
/******************************************************************************
@Function _DevmemImportStructCPUMap
@Description NEVER call after the last _DevmemMemDescRelease()
Maps the PMR referenced by the import struct to the CPU's
virtual address space.
Does nothing but increase the cpu mapping refcount if the
import struct was already mapped.
@return PVRSRV_ERROR
******************************************************************************/
PVRSRV_ERROR _DevmemImportStructCPUMap(DEVMEM_IMPORT *psImport);
/******************************************************************************
@Function _DevmemImportStructCPUUnmap
@Description Unmaps the PMR referenced by the import struct from the CPU's
virtual address space.
If this was not the last remaining CPU mapping on the import
struct only the cpu mapping refcount is decreased.
******************************************************************************/
void _DevmemImportStructCPUUnmap(DEVMEM_IMPORT *psImport);
/******************************************************************************
@Function _DevmemImportStructAcquire
@Description Acquire an import struct by increasing it's refcount.
******************************************************************************/
void _DevmemImportStructAcquire(DEVMEM_IMPORT *psImport);
/******************************************************************************
@Function _DevmemImportStructRelease
@Description Reduces the refcount of the import struct.
Destroys the import in the case it was the last reference.
Destroys underlying PMR if this import was the last reference
to it.
@return A boolean to signal if the import was destroyed. True = yes.
******************************************************************************/
void _DevmemImportStructRelease(DEVMEM_IMPORT *psImport);
/******************************************************************************
@Function _DevmemImportDiscard
@Description Discard a created, but unitilised import structure.
This must only be called before _DevmemImportStructInit
after which _DevmemImportStructRelease must be used to
"free" the import structure.
******************************************************************************/
void _DevmemImportDiscard(DEVMEM_IMPORT *psImport);
/******************************************************************************
@Function _DevmemMemDescAlloc
@Description Allocates a MemDesc and create it's various locks.
Zero the allocated memory.
@return PVRSRV_ERROR
******************************************************************************/
PVRSRV_ERROR _DevmemMemDescAlloc(DEVMEM_MEMDESC **ppsMemDesc);
/******************************************************************************
@Function _DevmemMemDescInit
@Description Sets the given offset and import struct fields in the MemDesc.
Initialises refcount to 1 and other values to 0.
@Input psMemDesc MemDesc to initialise.
@Input uiOffset Offset in the import structure.
@Input psImport Import the MemDesc is on.
@Input uiAllocSize Size of the allocation
******************************************************************************/
void _DevmemMemDescInit(DEVMEM_MEMDESC *psMemDesc,
IMG_DEVMEM_OFFSET_T uiOffset,
DEVMEM_IMPORT *psImport,
IMG_DEVMEM_SIZE_T uiAllocSize);
/******************************************************************************
@Function _DevmemMemDescAcquire
@Description Acquires the MemDesc by increasing it's refcount.
******************************************************************************/
void _DevmemMemDescAcquire(DEVMEM_MEMDESC *psMemDesc);
/******************************************************************************
@Function _DevmemMemDescRelease
@Description Releases the MemDesc by reducing it's refcount.
Destroy the MemDesc if it's recount is 0.
Destroy the import struct the MemDesc is on if that was the
last MemDesc on the import, probably following the destruction
of the underlying PMR.
******************************************************************************/
void _DevmemMemDescRelease(DEVMEM_MEMDESC *psMemDesc);
/******************************************************************************
@Function _DevmemMemDescDiscard
@Description Discard a created, but unitilised MemDesc structure.
This must only be called before _DevmemMemDescInit
after which _DevmemMemDescRelease must be used to
"free" the MemDesc structure.
******************************************************************************/
void _DevmemMemDescDiscard(DEVMEM_MEMDESC *psMemDesc);
#endif /* _DEVICEMEM_UTILS_H_ */

176
drivers/staging/imgtec/rogue/devicememx.h
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@ -1,176 +0,0 @@
/*************************************************************************/ /*!
@File
@Title X Device Memory Management core internal
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Services internal interface for extended device memory management.
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#ifndef DEVICEMEMX_H
#define DEVICEMEMX_H
#include "img_types.h"
#include "devicemem_typedefs.h"
#include "devicemem_utils.h"
#include "pdumpdefs.h"
#include "pvrsrv_error.h"
#include "pvrsrv_memallocflags.h"
#include "osfunc.h"
/* DevmemXAllocPhysical()
*
* Allocate physical device memory and return a physical
* descriptor for it.
*/
PVRSRV_ERROR
DevmemXAllocPhysical(DEVMEM_CONTEXT *psCtx,
IMG_UINT32 uiNumPages,
IMG_UINT32 uiLog2PageSize,
DEVMEM_FLAGS_T uiFlags,
const IMG_CHAR *pszText,
DEVMEMX_PHYSDESC **ppsPhysDesc);
/* DevmemXReleasePhysical()
*
* Removes a physical device allocation if all references
* to it are dropped, otherwise just decreases the refcount.
*/
void
DevmemXReleasePhysical(DEVMEMX_PHYSDESC *psPhysDesc);
/* DevmemAllocVirtual()
*
* Allocate and reserve a device virtual range and return
* a virtual descriptor for it.
*/
PVRSRV_ERROR
DevmemXAllocVirtual(DEVMEM_HEAP* hHeap,
IMG_UINT32 uiNumPages,
DEVMEM_FLAGS_T uiFlags,
const IMG_CHAR *pszText,
DEVMEMX_VIRTDESC **ppsVirtDesc,
IMG_DEV_VIRTADDR *psVirtAddr);
/* DevmemXFreeVirtual()
*
* Removes a device virtual range if all mappings on it
* have been removed.
*/
PVRSRV_ERROR
DevmemXFreeVirtual(DEVMEMX_VIRTDESC *psVirtDesc);
/* DevmemXMapVirtualRange()
*
* Map memory from a physical descriptor into a
* virtual range.
*/
PVRSRV_ERROR
DevmemXMapVirtualRange(IMG_UINT32 ui32PageCount,
DEVMEMX_PHYSDESC *psPhysDesc,
IMG_UINT32 ui32PhysOffset,
DEVMEMX_VIRTDESC *psVirtDesc,
IMG_UINT32 ui32VirtOffset);
/* DevmemXUnmapVirtualRange()
*
* Unmap pages from a device virtual range.
*/
PVRSRV_ERROR
DevmemXUnmapVirtualRange(IMG_UINT32 ui32PageCount,
DEVMEMX_VIRTDESC *psVirtDesc,
IMG_UINT32 ui32VirtPgOffset);
/* DevmemXMapPhysicalToCPU()
*
* Map a full physical descriptor to CPU space.
*/
PVRSRV_ERROR
DevmemXMapPhysicalToCPU(DEVMEMX_PHYSDESC *psMemAllocPhys,
IMG_CPU_VIRTADDR *psVirtAddr);
/* DevmemXUnmapPhysicalToCPU()
*
* Remove the CPU mapping from the descriptor.
*/
PVRSRV_ERROR
DevmemXUnmapPhysicalToCPU(DEVMEMX_PHYSDESC *psMemAllocPhys);
/* DevmemXCreateDevmemMemDesc()
*
* DEPRICATED!
* DO NOT USE IN PRODUCTION DRIVER!
*
* Create a devmem memdesc from a physical and
* virtual descriptor.
* Always destroy with DevmemFreePhysVirtMemDesc().
*/
PVRSRV_ERROR
DevmemXCreateDevmemMemDesc(DEVMEMX_VIRTDESC *psVirtDesc,
DEVMEM_MEMDESC **ppsMemDesc);
/* DevmemXFreeDevmemMemDesc()
*
* DEPRICATED!
* DO NOT USE IN PRODUCTION DRIVER!
*
* Free the memdesc again. Has no impact on the underlying
* physical and virtual descriptors.
*/
PVRSRV_ERROR
DevmemXFreeDevmemMemDesc(DEVMEM_MEMDESC *psMemDesc);
PVRSRV_ERROR
_DevmemXFlagCompatibilityCheck(IMG_UINT32 uiPhysFlags,
IMG_UINT32 uiVirtFlags);
PVRSRV_ERROR
_DevmemXPhysDescAlloc(DEVMEMX_PHYSDESC **ppsPhysDesc);
void
_DevmemXPhysDescInit(DEVMEMX_PHYSDESC *psPhysDesc,
IMG_HANDLE hPMR,
IMG_UINT32 uiNumPages,
IMG_UINT32 uiLog2PageSize,
PVRSRV_MEMALLOCFLAGS_T uiFlags,
IMG_HANDLE hBridge);
void
_DevmemXPhysDescFree(DEVMEMX_PHYSDESC *psPhysDesc);
#endif /* DEVICEMEMX_H */

79
drivers/staging/imgtec/rogue/devicememx_pdump.c
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@ -1,79 +0,0 @@
/*************************************************************************/ /*!
@File
@Title Shared X device memory management PDump functions
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Implements common (client & server) PDump functions for the
memory management code
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#if defined(PDUMP)
#include "devicememx_pdump.h"
#include "pdump.h"
#include "client_pdumpmm_bridge.h"
#include "devicemem_utils.h"
IMG_INTERNAL void
DevmemXPDumpLoadMem(DEVMEMX_PHYSDESC *psMemDescPhys,
IMG_DEVMEM_OFFSET_T uiOffset,
IMG_DEVMEM_SIZE_T uiSize,
PDUMP_FLAGS_T uiPDumpFlags)
{
PVRSRV_ERROR eError;
PVR_ASSERT(uiSize != 0);
PVR_ASSERT(uiOffset + uiSize <= (psMemDescPhys->uiNumPages << psMemDescPhys->uiLog2PageSize));
eError = BridgePMRPDumpLoadMem(psMemDescPhys->hBridge,
psMemDescPhys->hPMR,
uiOffset,
uiSize,
uiPDumpFlags,
IMG_FALSE);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,
"%s: failed with error %d",
__FUNCTION__, eError));
}
}
#endif

81
drivers/staging/imgtec/rogue/devicememx_pdump.h
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@ -1,81 +0,0 @@
/*************************************************************************/ /*!
@File
@Title X Device Memory Management PDump internal
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Services internal interface to PDump device memory management
functions that are shared between client and server code.
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#ifndef _DEVICEMEMX_PDUMP_H_
#define _DEVICEMEMX_PDUMP_H_
#include "devicememx.h"
#include "pdumpdefs.h"
#include "pdump.h"
#if defined(PDUMP)
/*
* PVRSRVDevMemXPDumpLoadMem()
*
* Same as DevmemPDumpLoadMem().
*/
extern void
DevmemXPDumpLoadMem(DEVMEMX_PHYSDESC *psMemDescPhys,
IMG_DEVMEM_OFFSET_T uiOffset,
IMG_DEVMEM_SIZE_T uiSize,
PDUMP_FLAGS_T uiPDumpFlags);
#else
#ifdef INLINE_IS_PRAGMA
#pragma inline(PVRSRVDevMemXPDumpLoadMem)
#endif
static INLINE void
DevmemXPDumpLoadMem(DEVMEMX_PHYSDESC *psMemDescPhys,
IMG_DEVMEM_OFFSET_T uiOffset,
IMG_DEVMEM_SIZE_T uiSize,
PDUMP_FLAGS_T uiPDumpFlags)
{
PVR_UNREFERENCED_PARAMETER(psMemDescPhys);
PVR_UNREFERENCED_PARAMETER(uiOffset);
PVR_UNREFERENCED_PARAMETER(uiSize);
PVR_UNREFERENCED_PARAMETER(uiPDumpFlags);
}
#endif /* PDUMP */
#endif /* _DEVICEMEMX_PDUMP_H_ */

272
drivers/staging/imgtec/rogue/dllist.h
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@ -1,272 +0,0 @@
/*************************************************************************/ /*!
@File
@Title Double linked list header
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Double linked list interface
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#ifndef _DLLIST_
#define _DLLIST_
#include "img_types.h"
/*!
Pointer to a linked list node
*/
typedef struct _DLLIST_NODE_ *PDLLIST_NODE;
/*!
Node in a linked list
*/
/*
* Note: the following structure's size is architecture-dependent and
* clients may need to create a mirror the structure definition if it needs
* to be used in a structure shared between host and device. Consider such
* clients if any changes are made to this structure.
*/
typedef struct _DLLIST_NODE_
{
struct _DLLIST_NODE_ *psPrevNode;
struct _DLLIST_NODE_ *psNextNode;
} DLLIST_NODE;
/*!
Static initialiser
*/
#define DECLARE_DLLIST(n) \
DLLIST_NODE n = {&n, &n}
/*************************************************************************/ /*!
@Function dllist_init
@Description Initialize a new double linked list
@Input psListHead List head Node
*/
/*****************************************************************************/
static INLINE
void dllist_init(PDLLIST_NODE psListHead)
{
psListHead->psPrevNode = psListHead;
psListHead->psNextNode = psListHead;
}
/*************************************************************************/ /*!
@Function dllist_is_empty
@Description Returns whether the list is empty
@Input psListHead List head Node
*/
/*****************************************************************************/
static INLINE
IMG_BOOL dllist_is_empty(PDLLIST_NODE psListHead)
{
return (IMG_BOOL) ((psListHead->psPrevNode == psListHead)
&& (psListHead->psNextNode == psListHead));
}
/*************************************************************************/ /*!
@Function dllist_add_to_head
@Description Add psNewNode to head of list psListHead
@Input psListHead Head Node
@Input psNewNode New Node
*/
/*****************************************************************************/
static INLINE
void dllist_add_to_head(PDLLIST_NODE psListHead, PDLLIST_NODE psNewNode)
{
PDLLIST_NODE psTmp;
psTmp = psListHead->psNextNode;
psListHead->psNextNode = psNewNode;
psNewNode->psNextNode = psTmp;
psTmp->psPrevNode = psNewNode;
psNewNode->psPrevNode = psListHead;
}
/*************************************************************************/ /*!
@Function dllist_add_to_tail
@Description Add psNewNode to tail of list psListHead
@Input psListHead Head Node
@Input psNewNode New Node
*/
/*****************************************************************************/
static INLINE
void dllist_add_to_tail(PDLLIST_NODE psListHead, PDLLIST_NODE psNewNode)
{
PDLLIST_NODE psTmp;
psTmp = psListHead->psPrevNode;
psListHead->psPrevNode = psNewNode;
psNewNode->psPrevNode = psTmp;
psTmp->psNextNode = psNewNode;
psNewNode->psNextNode = psListHead;
}
/*************************************************************************/ /*!
@Function dllist_node_is_in_list
@Description Returns IMG_TRUE if psNode is in a list
@Input psNode List node
*/
/*****************************************************************************/
static INLINE
IMG_BOOL dllist_node_is_in_list(PDLLIST_NODE psNode)
{
return (IMG_BOOL) (psNode->psNextNode != 0);
}
/*************************************************************************/ /*!
@Function dllist_get_next_node
@Description Returns the list node after psListHead or NULL psListHead
is the only element in the list.
@Input psListHead List node to start the operation
*/
/*****************************************************************************/
static INLINE
PDLLIST_NODE dllist_get_next_node(PDLLIST_NODE psListHead)
{
if (psListHead->psNextNode == psListHead)
{
return NULL;
}
else
{
return psListHead->psNextNode;
}
}
/*************************************************************************/ /*!
@Function dllist_remove_node
@Description Removes psListNode from the list where it currently belongs
@Input psListNode List node to be removed
*/
/*****************************************************************************/
static INLINE
void dllist_remove_node(PDLLIST_NODE psListNode)
{
psListNode->psNextNode->psPrevNode = psListNode->psPrevNode;
psListNode->psPrevNode->psNextNode = psListNode->psNextNode;
/* Clear the node to show it's not on a list */
psListNode->psPrevNode = 0;
psListNode->psNextNode = 0;
}
/*************************************************************************/ /*!
@Function dllist_replace_head
@Description Moves the list from psOldHead to psNewHead
@Input psOldHead List node to be replaced. Will become a head
node of an empty list.
@Input psNewHead List node to be inserted. Must be an empty list
head.
*/
/*****************************************************************************/
static INLINE
void dllist_replace_head(PDLLIST_NODE psOldHead, PDLLIST_NODE psNewHead)
{
if (dllist_is_empty(psOldHead))
{
psNewHead->psNextNode = psNewHead;
psNewHead->psPrevNode = psNewHead;
}
else
{
/* Change the neighbouring nodes */
psOldHead->psNextNode->psPrevNode = psNewHead;
psOldHead->psPrevNode->psNextNode = psNewHead;
/* Copy the old data to the new node */
psNewHead->psNextNode = psOldHead->psNextNode;
psNewHead->psPrevNode = psOldHead->psPrevNode;
/* Remove links to the previous list */
psOldHead->psNextNode = psOldHead;
psOldHead->psPrevNode = psOldHead;
}
}
/*************************************************************************/ /*!
@Function dllist_foreach_node
@Description Walk through all the nodes on the list
@Input list_head List node to start the operation
@Input node Current list node
@Input next Node after the current one
*/
/*****************************************************************************/
#define dllist_foreach_node(list_head, node, next) \
for (node = (list_head)->psNextNode, next = (node)->psNextNode; \
node != (list_head); \
node = next, next = (node)->psNextNode)
#endif /* _DLLIST_ */

107
drivers/staging/imgtec/rogue/env_connection.h
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@ -1,107 +0,0 @@
/*************************************************************************/ /*!
@File
@Title Server side connection management
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Linux specific server side connection management
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#if !defined(_ENV_CONNECTION_H_)
#define _ENV_CONNECTION_H_
#include <linux/list.h>
#include <linux/types.h>
#include "handle.h"
#include "pvr_debug.h"
#include "device.h"
#if defined(SUPPORT_ION)
#include PVR_ANDROID_ION_HEADER
#include "ion_sys.h"
#include "allocmem.h"
#endif
typedef struct _ENV_CONNECTION_PRIVATE_DATA_
{
struct file *psFile;
PVRSRV_DEVICE_NODE *psDevNode;
} ENV_CONNECTION_PRIVATE_DATA;
#if defined(SUPPORT_ION)
#define ION_CLIENT_NAME_SIZE 50
typedef struct _ENV_ION_CONNECTION_DATA_
{
IMG_CHAR azIonClientName[ION_CLIENT_NAME_SIZE];
struct ion_device *psIonDev;
IMG_UINT32 ui32IonClientRefCount;
} ENV_ION_CONNECTION_DATA;
#endif
typedef struct _ENV_CONNECTION_DATA_
{
pid_t owner;
struct file *psFile;
PVRSRV_DEVICE_NODE *psDevNode;
#if defined(SUPPORT_ION)
ENV_ION_CONNECTION_DATA *psIonData;
#endif
#if defined(SUPPORT_DRM_EXT)
void *pPriv;
#endif
} ENV_CONNECTION_DATA;
#if defined(SUPPORT_ION)
static inline void EnvDataIonClientRelease(ENV_ION_CONNECTION_DATA *psIonData)
{
PVR_ASSERT(psIonData != NULL);
PVR_ASSERT(psIonData->ui32IonClientRefCount > 0);
if (--psIonData->ui32IonClientRefCount == 0)
{
IonDevRelease(psIonData->psIonDev);
OSFreeMem(psIonData);
psIonData = NULL;
}
}
#endif /* defined(SUPPORT_ION) */
#endif /* !defined(_ENV_CONNECTION_H_) */

363
drivers/staging/imgtec/rogue/event.c
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@ -1,363 +0,0 @@
/*************************************************************************/ /*!
@File
@Title Event Object
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#include <asm/io.h>
#include <asm/page.h>
#include <linux/mm.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/pci.h>
#include <linux/string.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
#include <asm/hardirq.h>
#include <linux/timer.h>
#include <linux/capability.h>
#include <linux/uaccess.h>
#include "img_types.h"
#include "pvrsrv_error.h"
#include "allocmem.h"
#include "event.h"
#include "pvr_debug.h"
#include "pvrsrv.h"
#include "osfunc.h"
/* Returns pointer to task_struct that belongs to thread which acquired
* bridge lock. */
extern struct task_struct *BridgeLockGetOwner(void);
extern IMG_BOOL BridgeLockIsLocked(void);
typedef struct PVRSRV_LINUX_EVENT_OBJECT_LIST_TAG
{
rwlock_t sLock;
struct list_head sList;
} PVRSRV_LINUX_EVENT_OBJECT_LIST;
typedef struct PVRSRV_LINUX_EVENT_OBJECT_TAG
{
atomic_t sTimeStamp;
IMG_UINT32 ui32TimeStampPrevious;
#if defined(DEBUG)
IMG_UINT ui32Stats;
#endif
wait_queue_head_t sWait;
struct list_head sList;
PVRSRV_LINUX_EVENT_OBJECT_LIST *psLinuxEventObjectList;
} PVRSRV_LINUX_EVENT_OBJECT;
/*!
******************************************************************************
@Function LinuxEventObjectListCreate
@Description
Linux wait object list creation
@Output hOSEventKM : Pointer to the event object list handle
@Return PVRSRV_ERROR : Error code
******************************************************************************/
PVRSRV_ERROR LinuxEventObjectListCreate(IMG_HANDLE *phEventObjectList)
{
PVRSRV_LINUX_EVENT_OBJECT_LIST *psEvenObjectList;
psEvenObjectList = OSAllocMem(sizeof(*psEvenObjectList));
if (psEvenObjectList == NULL)
{
PVR_DPF((PVR_DBG_ERROR, "LinuxEventObjectCreate: failed to allocate memory for event list"));
return PVRSRV_ERROR_OUT_OF_MEMORY;
}
INIT_LIST_HEAD(&psEvenObjectList->sList);
rwlock_init(&psEvenObjectList->sLock);
*phEventObjectList = (IMG_HANDLE *) psEvenObjectList;
return PVRSRV_OK;
}
/*!
******************************************************************************
@Function LinuxEventObjectListDestroy
@Description
Linux wait object list destruction
@Input hOSEventKM : Event object list handle
@Return PVRSRV_ERROR : Error code
******************************************************************************/
PVRSRV_ERROR LinuxEventObjectListDestroy(IMG_HANDLE hEventObjectList)
{
PVRSRV_LINUX_EVENT_OBJECT_LIST *psEvenObjectList = (PVRSRV_LINUX_EVENT_OBJECT_LIST *) hEventObjectList ;
if(psEvenObjectList)
{
if (!list_empty(&psEvenObjectList->sList))
{
PVR_DPF((PVR_DBG_ERROR, "LinuxEventObjectListDestroy: Event List is not empty"));
return PVRSRV_ERROR_UNABLE_TO_DESTROY_EVENT;
}
OSFreeMem(psEvenObjectList);
/*not nulling pointer, copy on stack*/
}
return PVRSRV_OK;
}
/*!
******************************************************************************
@Function LinuxEventObjectDelete
@Description
Linux wait object removal
@Input hOSEventObject : Event object handle
@Return PVRSRV_ERROR : Error code
******************************************************************************/
PVRSRV_ERROR LinuxEventObjectDelete(IMG_HANDLE hOSEventObject)
{
if(hOSEventObject)
{
PVRSRV_LINUX_EVENT_OBJECT *psLinuxEventObject = (PVRSRV_LINUX_EVENT_OBJECT *)hOSEventObject;
PVRSRV_LINUX_EVENT_OBJECT_LIST *psLinuxEventObjectList = psLinuxEventObject->psLinuxEventObjectList;
write_lock_bh(&psLinuxEventObjectList->sLock);
list_del(&psLinuxEventObject->sList);
write_unlock_bh(&psLinuxEventObjectList->sLock);
#if defined(DEBUG)
// PVR_DPF((PVR_DBG_MESSAGE, "LinuxEventObjectDelete: Event object waits: %u", psLinuxEventObject->ui32Stats));
#endif
OSFreeMem(psLinuxEventObject);
/*not nulling pointer, copy on stack*/
return PVRSRV_OK;
}
return PVRSRV_ERROR_UNABLE_TO_DESTROY_EVENT;
}
/*!
******************************************************************************
@Function LinuxEventObjectAdd
@Description
Linux wait object addition
@Input hOSEventObjectList : Event object list handle
@Output phOSEventObject : Pointer to the event object handle
@Return PVRSRV_ERROR : Error code
******************************************************************************/
PVRSRV_ERROR LinuxEventObjectAdd(IMG_HANDLE hOSEventObjectList, IMG_HANDLE *phOSEventObject)
{
PVRSRV_LINUX_EVENT_OBJECT *psLinuxEventObject;
PVRSRV_LINUX_EVENT_OBJECT_LIST *psLinuxEventObjectList = (PVRSRV_LINUX_EVENT_OBJECT_LIST*)hOSEventObjectList;
/* allocate completion variable */
psLinuxEventObject = OSAllocMem(sizeof(*psLinuxEventObject));
if (psLinuxEventObject == NULL)
{
PVR_DPF((PVR_DBG_ERROR, "LinuxEventObjectAdd: failed to allocate memory "));
return PVRSRV_ERROR_OUT_OF_MEMORY;
}
INIT_LIST_HEAD(&psLinuxEventObject->sList);
atomic_set(&psLinuxEventObject->sTimeStamp, 0);
psLinuxEventObject->ui32TimeStampPrevious = 0;
#if defined(DEBUG)
psLinuxEventObject->ui32Stats = 0;
#endif
init_waitqueue_head(&psLinuxEventObject->sWait);
psLinuxEventObject->psLinuxEventObjectList = psLinuxEventObjectList;
write_lock_bh(&psLinuxEventObjectList->sLock);
list_add(&psLinuxEventObject->sList, &psLinuxEventObjectList->sList);
write_unlock_bh(&psLinuxEventObjectList->sLock);
*phOSEventObject = psLinuxEventObject;
return PVRSRV_OK;
}
/*!
******************************************************************************
@Function LinuxEventObjectSignal
@Description
Linux wait object signaling function
@Input hOSEventObjectList : Event object list handle
@Return PVRSRV_ERROR : Error code
******************************************************************************/
PVRSRV_ERROR LinuxEventObjectSignal(IMG_HANDLE hOSEventObjectList)
{
PVRSRV_LINUX_EVENT_OBJECT *psLinuxEventObject;
PVRSRV_LINUX_EVENT_OBJECT_LIST *psLinuxEventObjectList = (PVRSRV_LINUX_EVENT_OBJECT_LIST*)hOSEventObjectList;
struct list_head *psListEntry, *psListEntryTemp, *psList;
psList = &psLinuxEventObjectList->sList;
read_lock_bh(&psLinuxEventObjectList->sLock);
list_for_each_safe(psListEntry, psListEntryTemp, psList)
{
psLinuxEventObject = (PVRSRV_LINUX_EVENT_OBJECT *)list_entry(psListEntry, PVRSRV_LINUX_EVENT_OBJECT, sList);
atomic_inc(&psLinuxEventObject->sTimeStamp);
wake_up_interruptible(&psLinuxEventObject->sWait);
}
read_unlock_bh(&psLinuxEventObjectList->sLock);
return PVRSRV_OK;
}
/*!
******************************************************************************
@Function LinuxEventObjectWait
@Description
Linux wait object routine
@Input hOSEventObject : Event object handle
@Input ui64Timeoutus : Time out value in usec
@Return PVRSRV_ERROR : Error code
******************************************************************************/
PVRSRV_ERROR LinuxEventObjectWait(IMG_HANDLE hOSEventObject, IMG_UINT64 ui64Timeoutus, IMG_BOOL bHoldBridgeLock)
{
IMG_UINT32 ui32TimeStamp;
IMG_BOOL bReleasePVRLock;
PVRSRV_DATA *psPVRSRVData = PVRSRVGetPVRSRVData();
IMG_UINT32 ui32Remainder;
long timeOutJiffies;
DEFINE_WAIT(sWait);
PVRSRV_LINUX_EVENT_OBJECT *psLinuxEventObject = (PVRSRV_LINUX_EVENT_OBJECT *) hOSEventObject;
/* Check if the driver is good shape */
if (psPVRSRVData->eServicesState != PVRSRV_SERVICES_STATE_OK)
{
return PVRSRV_ERROR_TIMEOUT;
}
/* usecs_to_jiffies only takes an uint. So if our timeout is bigger than an
* uint use the msec version. With such a long timeout we really don't need
* the high resolution of usecs. */
if (ui64Timeoutus > 0xffffffffULL)
timeOutJiffies = msecs_to_jiffies(OSDivide64(ui64Timeoutus, 1000, &ui32Remainder));
else
timeOutJiffies = usecs_to_jiffies(ui64Timeoutus);
do
{
prepare_to_wait(&psLinuxEventObject->sWait, &sWait, TASK_INTERRUPTIBLE);
ui32TimeStamp = (IMG_UINT32)atomic_read(&psLinuxEventObject->sTimeStamp);
if(psLinuxEventObject->ui32TimeStampPrevious != ui32TimeStamp)
{
break;
}
/* Check thread holds the current PVR/bridge lock before obeying the
* 'release before deschedule' behaviour. Some threads choose not to
* hold the bridge lock in their implementation.
*/
bReleasePVRLock = (!bHoldBridgeLock && BridgeLockIsLocked() && current == BridgeLockGetOwner());
if (bReleasePVRLock == IMG_TRUE)
{
OSReleaseBridgeLock();
}
timeOutJiffies = schedule_timeout(timeOutJiffies);
if (bReleasePVRLock == IMG_TRUE)
{
OSAcquireBridgeLock();
}
#if defined(DEBUG)
psLinuxEventObject->ui32Stats++;
#endif
} while (timeOutJiffies);
finish_wait(&psLinuxEventObject->sWait, &sWait);
psLinuxEventObject->ui32TimeStampPrevious = ui32TimeStamp;
return timeOutJiffies ? PVRSRV_OK : PVRSRV_ERROR_TIMEOUT;
}

48
drivers/staging/imgtec/rogue/event.h
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@ -1,48 +0,0 @@
/*************************************************************************/ /*!
@File
@Title Event Object
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
PVRSRV_ERROR LinuxEventObjectListCreate(IMG_HANDLE *phEventObjectList);
PVRSRV_ERROR LinuxEventObjectListDestroy(IMG_HANDLE hEventObjectList);
PVRSRV_ERROR LinuxEventObjectAdd(IMG_HANDLE hOSEventObjectList, IMG_HANDLE *phOSEventObject);
PVRSRV_ERROR LinuxEventObjectDelete(IMG_HANDLE hOSEventObject);
PVRSRV_ERROR LinuxEventObjectSignal(IMG_HANDLE hOSEventObjectList);
PVRSRV_ERROR LinuxEventObjectWait(IMG_HANDLE hOSEventObject, IMG_UINT64 ui64Timeoutus, IMG_BOOL bHoldBridgeLock);

155
drivers/staging/imgtec/rogue/generated/breakpoint_bridge/common_breakpoint_bridge.h
View File

@ -1,155 +0,0 @@
/*************************************************************************/ /*!
@File
@Title Common bridge header for breakpoint
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Declares common defines and structures used by both the client
and server side of the bridge for breakpoint
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#ifndef COMMON_BREAKPOINT_BRIDGE_H
#define COMMON_BREAKPOINT_BRIDGE_H
#include <powervr/mem_types.h>
#include "img_types.h"
#include "pvrsrv_error.h"
#include "rgx_bridge.h"
#define PVRSRV_BRIDGE_BREAKPOINT_CMD_FIRST 0
#define PVRSRV_BRIDGE_BREAKPOINT_RGXSETBREAKPOINT PVRSRV_BRIDGE_BREAKPOINT_CMD_FIRST+0
#define PVRSRV_BRIDGE_BREAKPOINT_RGXCLEARBREAKPOINT PVRSRV_BRIDGE_BREAKPOINT_CMD_FIRST+1
#define PVRSRV_BRIDGE_BREAKPOINT_RGXENABLEBREAKPOINT PVRSRV_BRIDGE_BREAKPOINT_CMD_FIRST+2
#define PVRSRV_BRIDGE_BREAKPOINT_RGXDISABLEBREAKPOINT PVRSRV_BRIDGE_BREAKPOINT_CMD_FIRST+3
#define PVRSRV_BRIDGE_BREAKPOINT_RGXOVERALLOCATEBPREGISTERS PVRSRV_BRIDGE_BREAKPOINT_CMD_FIRST+4
#define PVRSRV_BRIDGE_BREAKPOINT_CMD_LAST (PVRSRV_BRIDGE_BREAKPOINT_CMD_FIRST+4)
/*******************************************
RGXSetBreakpoint
*******************************************/
/* Bridge in structure for RGXSetBreakpoint */
typedef struct PVRSRV_BRIDGE_IN_RGXSETBREAKPOINT_TAG
{
IMG_HANDLE hPrivData;
IMG_UINT32 eFWDataMaster;
IMG_UINT32 ui32BreakpointAddr;
IMG_UINT32 ui32HandlerAddr;
IMG_UINT32 ui32DM;
} __attribute__((packed)) PVRSRV_BRIDGE_IN_RGXSETBREAKPOINT;
/* Bridge out structure for RGXSetBreakpoint */
typedef struct PVRSRV_BRIDGE_OUT_RGXSETBREAKPOINT_TAG
{
PVRSRV_ERROR eError;
} __attribute__((packed)) PVRSRV_BRIDGE_OUT_RGXSETBREAKPOINT;
/*******************************************
RGXClearBreakpoint
*******************************************/
/* Bridge in structure for RGXClearBreakpoint */
typedef struct PVRSRV_BRIDGE_IN_RGXCLEARBREAKPOINT_TAG
{
IMG_HANDLE hPrivData;
} __attribute__((packed)) PVRSRV_BRIDGE_IN_RGXCLEARBREAKPOINT;
/* Bridge out structure for RGXClearBreakpoint */
typedef struct PVRSRV_BRIDGE_OUT_RGXCLEARBREAKPOINT_TAG
{
PVRSRV_ERROR eError;
} __attribute__((packed)) PVRSRV_BRIDGE_OUT_RGXCLEARBREAKPOINT;
/*******************************************
RGXEnableBreakpoint
*******************************************/
/* Bridge in structure for RGXEnableBreakpoint */
typedef struct PVRSRV_BRIDGE_IN_RGXENABLEBREAKPOINT_TAG
{
IMG_HANDLE hPrivData;
} __attribute__((packed)) PVRSRV_BRIDGE_IN_RGXENABLEBREAKPOINT;
/* Bridge out structure for RGXEnableBreakpoint */
typedef struct PVRSRV_BRIDGE_OUT_RGXENABLEBREAKPOINT_TAG
{
PVRSRV_ERROR eError;
} __attribute__((packed)) PVRSRV_BRIDGE_OUT_RGXENABLEBREAKPOINT;
/*******************************************
RGXDisableBreakpoint
*******************************************/
/* Bridge in structure for RGXDisableBreakpoint */
typedef struct PVRSRV_BRIDGE_IN_RGXDISABLEBREAKPOINT_TAG
{
IMG_HANDLE hPrivData;
} __attribute__((packed)) PVRSRV_BRIDGE_IN_RGXDISABLEBREAKPOINT;
/* Bridge out structure for RGXDisableBreakpoint */
typedef struct PVRSRV_BRIDGE_OUT_RGXDISABLEBREAKPOINT_TAG
{
PVRSRV_ERROR eError;
} __attribute__((packed)) PVRSRV_BRIDGE_OUT_RGXDISABLEBREAKPOINT;
/*******************************************
RGXOverallocateBPRegisters
*******************************************/
/* Bridge in structure for RGXOverallocateBPRegisters */
typedef struct PVRSRV_BRIDGE_IN_RGXOVERALLOCATEBPREGISTERS_TAG
{
IMG_UINT32 ui32TempRegs;
IMG_UINT32 ui32SharedRegs;
} __attribute__((packed)) PVRSRV_BRIDGE_IN_RGXOVERALLOCATEBPREGISTERS;
/* Bridge out structure for RGXOverallocateBPRegisters */
typedef struct PVRSRV_BRIDGE_OUT_RGXOVERALLOCATEBPREGISTERS_TAG
{
PVRSRV_ERROR eError;
} __attribute__((packed)) PVRSRV_BRIDGE_OUT_RGXOVERALLOCATEBPREGISTERS;
#endif /* COMMON_BREAKPOINT_BRIDGE_H */

455
drivers/staging/imgtec/rogue/generated/breakpoint_bridge/server_breakpoint_bridge.c
View File

@ -1,455 +0,0 @@
/*************************************************************************/ /*!
@File
@Title Server bridge for breakpoint
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Implements the server side of the bridge for breakpoint
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#include <stddef.h>
#include <linux/uaccess.h>
#include "img_defs.h"
#include "rgxbreakpoint.h"
#include "common_breakpoint_bridge.h"
#include "allocmem.h"
#include "pvr_debug.h"
#include "connection_server.h"
#include "pvr_bridge.h"
#include "rgx_bridge.h"
#include "srvcore.h"
#include "handle.h"
#include <linux/slab.h>
#if !defined(EXCLUDE_BREAKPOINT_BRIDGE)
/* ***************************************************************************
* Server-side bridge entry points
*/
static IMG_INT
PVRSRVBridgeRGXSetBreakpoint(IMG_UINT32 ui32DispatchTableEntry,
PVRSRV_BRIDGE_IN_RGXSETBREAKPOINT *psRGXSetBreakpointIN,
PVRSRV_BRIDGE_OUT_RGXSETBREAKPOINT *psRGXSetBreakpointOUT,
CONNECTION_DATA *psConnection)
{
IMG_HANDLE hPrivData = psRGXSetBreakpointIN->hPrivData;
IMG_HANDLE hPrivDataInt = NULL;
/* Lock over handle lookup. */
LockHandle();
{
/* Look up the address from the handle */
psRGXSetBreakpointOUT->eError =
PVRSRVLookupHandleUnlocked(psConnection->psHandleBase,
(void **) &hPrivDataInt,
hPrivData,
PVRSRV_HANDLE_TYPE_DEV_PRIV_DATA,
IMG_TRUE);
if(psRGXSetBreakpointOUT->eError != PVRSRV_OK)
{
UnlockHandle();
goto RGXSetBreakpoint_exit;
}
}
/* Release now we have looked up handles. */
UnlockHandle();
psRGXSetBreakpointOUT->eError =
PVRSRVRGXSetBreakpointKM(psConnection, OSGetDevData(psConnection),
hPrivDataInt,
psRGXSetBreakpointIN->eFWDataMaster,
psRGXSetBreakpointIN->ui32BreakpointAddr,
psRGXSetBreakpointIN->ui32HandlerAddr,
psRGXSetBreakpointIN->ui32DM);
RGXSetBreakpoint_exit:
/* Lock over handle lookup cleanup. */
LockHandle();
{
/* Unreference the previously looked up handle */
if(hPrivDataInt)
{
PVRSRVReleaseHandleUnlocked(psConnection->psHandleBase,
hPrivData,
PVRSRV_HANDLE_TYPE_DEV_PRIV_DATA);
}
}
/* Release now we have cleaned up look up handles. */
UnlockHandle();
return 0;
}
static IMG_INT
PVRSRVBridgeRGXClearBreakpoint(IMG_UINT32 ui32DispatchTableEntry,
PVRSRV_BRIDGE_IN_RGXCLEARBREAKPOINT *psRGXClearBreakpointIN,
PVRSRV_BRIDGE_OUT_RGXCLEARBREAKPOINT *psRGXClearBreakpointOUT,
CONNECTION_DATA *psConnection)
{
IMG_HANDLE hPrivData = psRGXClearBreakpointIN->hPrivData;
IMG_HANDLE hPrivDataInt = NULL;
/* Lock over handle lookup. */
LockHandle();
{
/* Look up the address from the handle */
psRGXClearBreakpointOUT->eError =
PVRSRVLookupHandleUnlocked(psConnection->psHandleBase,
(void **) &hPrivDataInt,
hPrivData,
PVRSRV_HANDLE_TYPE_DEV_PRIV_DATA,
IMG_TRUE);
if(psRGXClearBreakpointOUT->eError != PVRSRV_OK)
{
UnlockHandle();
goto RGXClearBreakpoint_exit;
}
}
/* Release now we have looked up handles. */
UnlockHandle();
psRGXClearBreakpointOUT->eError =
PVRSRVRGXClearBreakpointKM(psConnection, OSGetDevData(psConnection),
hPrivDataInt);
RGXClearBreakpoint_exit:
/* Lock over handle lookup cleanup. */
LockHandle();
{
/* Unreference the previously looked up handle */
if(hPrivDataInt)
{
PVRSRVReleaseHandleUnlocked(psConnection->psHandleBase,
hPrivData,
PVRSRV_HANDLE_TYPE_DEV_PRIV_DATA);
}
}
/* Release now we have cleaned up look up handles. */
UnlockHandle();
return 0;
}
static IMG_INT
PVRSRVBridgeRGXEnableBreakpoint(IMG_UINT32 ui32DispatchTableEntry,
PVRSRV_BRIDGE_IN_RGXENABLEBREAKPOINT *psRGXEnableBreakpointIN,
PVRSRV_BRIDGE_OUT_RGXENABLEBREAKPOINT *psRGXEnableBreakpointOUT,
CONNECTION_DATA *psConnection)
{
IMG_HANDLE hPrivData = psRGXEnableBreakpointIN->hPrivData;
IMG_HANDLE hPrivDataInt = NULL;
/* Lock over handle lookup. */
LockHandle();
{
/* Look up the address from the handle */
psRGXEnableBreakpointOUT->eError =
PVRSRVLookupHandleUnlocked(psConnection->psHandleBase,
(void **) &hPrivDataInt,
hPrivData,
PVRSRV_HANDLE_TYPE_DEV_PRIV_DATA,
IMG_TRUE);
if(psRGXEnableBreakpointOUT->eError != PVRSRV_OK)
{
UnlockHandle();
goto RGXEnableBreakpoint_exit;
}
}
/* Release now we have looked up handles. */
UnlockHandle();
psRGXEnableBreakpointOUT->eError =
PVRSRVRGXEnableBreakpointKM(psConnection, OSGetDevData(psConnection),
hPrivDataInt);
RGXEnableBreakpoint_exit:
/* Lock over handle lookup cleanup. */
LockHandle();
{
/* Unreference the previously looked up handle */
if(hPrivDataInt)
{
PVRSRVReleaseHandleUnlocked(psConnection->psHandleBase,
hPrivData,
PVRSRV_HANDLE_TYPE_DEV_PRIV_DATA);
}
}
/* Release now we have cleaned up look up handles. */
UnlockHandle();
return 0;
}
static IMG_INT
PVRSRVBridgeRGXDisableBreakpoint(IMG_UINT32 ui32DispatchTableEntry,
PVRSRV_BRIDGE_IN_RGXDISABLEBREAKPOINT *psRGXDisableBreakpointIN,
PVRSRV_BRIDGE_OUT_RGXDISABLEBREAKPOINT *psRGXDisableBreakpointOUT,
CONNECTION_DATA *psConnection)
{
IMG_HANDLE hPrivData = psRGXDisableBreakpointIN->hPrivData;
IMG_HANDLE hPrivDataInt = NULL;
/* Lock over handle lookup. */
LockHandle();
{
/* Look up the address from the handle */
psRGXDisableBreakpointOUT->eError =
PVRSRVLookupHandleUnlocked(psConnection->psHandleBase,
(void **) &hPrivDataInt,
hPrivData,
PVRSRV_HANDLE_TYPE_DEV_PRIV_DATA,
IMG_TRUE);
if(psRGXDisableBreakpointOUT->eError != PVRSRV_OK)
{
UnlockHandle();
goto RGXDisableBreakpoint_exit;
}
}
/* Release now we have looked up handles. */
UnlockHandle();
psRGXDisableBreakpointOUT->eError =
PVRSRVRGXDisableBreakpointKM(psConnection, OSGetDevData(psConnection),
hPrivDataInt);
RGXDisableBreakpoint_exit:
/* Lock over handle lookup cleanup. */
LockHandle();
{
/* Unreference the previously looked up handle */
if(hPrivDataInt)
{
PVRSRVReleaseHandleUnlocked(psConnection->psHandleBase,
hPrivData,
PVRSRV_HANDLE_TYPE_DEV_PRIV_DATA);
}
}
/* Release now we have cleaned up look up handles. */
UnlockHandle();
return 0;
}
static IMG_INT
PVRSRVBridgeRGXOverallocateBPRegisters(IMG_UINT32 ui32DispatchTableEntry,
PVRSRV_BRIDGE_IN_RGXOVERALLOCATEBPREGISTERS *psRGXOverallocateBPRegistersIN,
PVRSRV_BRIDGE_OUT_RGXOVERALLOCATEBPREGISTERS *psRGXOverallocateBPRegistersOUT,
CONNECTION_DATA *psConnection)
{
psRGXOverallocateBPRegistersOUT->eError =
PVRSRVRGXOverallocateBPRegistersKM(psConnection, OSGetDevData(psConnection),
psRGXOverallocateBPRegistersIN->ui32TempRegs,
psRGXOverallocateBPRegistersIN->ui32SharedRegs);
return 0;
}
/* ***************************************************************************
* Server bridge dispatch related glue
*/
static IMG_BOOL bUseLock = IMG_TRUE;
#endif /* EXCLUDE_BREAKPOINT_BRIDGE */
#if !defined(EXCLUDE_BREAKPOINT_BRIDGE)
PVRSRV_ERROR InitBREAKPOINTBridge(void);
PVRSRV_ERROR DeinitBREAKPOINTBridge(void);
/*
* Register all BREAKPOINT functions with services
*/
PVRSRV_ERROR InitBREAKPOINTBridge(void)
{
SetDispatchTableEntry(PVRSRV_BRIDGE_BREAKPOINT, PVRSRV_BRIDGE_BREAKPOINT_RGXSETBREAKPOINT, PVRSRVBridgeRGXSetBreakpoint,
NULL, bUseLock);
SetDispatchTableEntry(PVRSRV_BRIDGE_BREAKPOINT, PVRSRV_BRIDGE_BREAKPOINT_RGXCLEARBREAKPOINT, PVRSRVBridgeRGXClearBreakpoint,
NULL, bUseLock);
SetDispatchTableEntry(PVRSRV_BRIDGE_BREAKPOINT, PVRSRV_BRIDGE_BREAKPOINT_RGXENABLEBREAKPOINT, PVRSRVBridgeRGXEnableBreakpoint,
NULL, bUseLock);
SetDispatchTableEntry(PVRSRV_BRIDGE_BREAKPOINT, PVRSRV_BRIDGE_BREAKPOINT_RGXDISABLEBREAKPOINT, PVRSRVBridgeRGXDisableBreakpoint,
NULL, bUseLock);
SetDispatchTableEntry(PVRSRV_BRIDGE_BREAKPOINT, PVRSRV_BRIDGE_BREAKPOINT_RGXOVERALLOCATEBPREGISTERS, PVRSRVBridgeRGXOverallocateBPRegisters,
NULL, bUseLock);
return PVRSRV_OK;
}
/*
* Unregister all breakpoint functions with services
*/
PVRSRV_ERROR DeinitBREAKPOINTBridge(void)
{
return PVRSRV_OK;
}
#else /* EXCLUDE_BREAKPOINT_BRIDGE */
/* This bridge is conditional on EXCLUDE_BREAKPOINT_BRIDGE - when defined,
* do not populate the dispatch table with its functions
*/
#define InitBREAKPOINTBridge() \
PVRSRV_OK
#define DeinitBREAKPOINTBridge() \
PVRSRV_OK
#endif /* EXCLUDE_BREAKPOINT_BRIDGE */

86
drivers/staging/imgtec/rogue/generated/cache_bridge/client_cache_bridge.h
View File

@ -1,86 +0,0 @@
/*************************************************************************/ /*!
@File
@Title Client bridge header for cache
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Exports the client bridge functions for cache
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#ifndef CLIENT_CACHE_BRIDGE_H
#define CLIENT_CACHE_BRIDGE_H
#include "img_defs.h"
#include "pvrsrv_error.h"
#if defined(PVR_INDIRECT_BRIDGE_CLIENTS)
#include "pvr_bridge_client.h"
#include "pvr_bridge.h"
#endif
#include "common_cache_bridge.h"
IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgeCacheOpQueue(IMG_HANDLE hBridge,
IMG_UINT32 ui32NumCacheOps,
IMG_HANDLE *phPMR,
IMG_DEVMEM_OFFSET_T *puiOffset,
IMG_DEVMEM_SIZE_T *puiSize,
PVRSRV_CACHE_OP *piuCacheOp,
IMG_UINT32 *pui32CacheOpSeqNum);
IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgeCacheOpExec(IMG_HANDLE hBridge,
IMG_HANDLE hPMR,
IMG_DEVMEM_OFFSET_T uiOffset,
IMG_DEVMEM_SIZE_T uiSize,
PVRSRV_CACHE_OP iuCacheOp);
IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgeCacheOpSetTimeline(IMG_HANDLE hBridge,
IMG_INT32 i32OpTimeline);
IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgeCacheOpLog(IMG_HANDLE hBridge,
IMG_HANDLE hPMR,
IMG_DEVMEM_OFFSET_T uiOffset,
IMG_DEVMEM_SIZE_T uiSize,
IMG_INT64 i64QueuedTimeUs,
IMG_INT64 i64ExecuteTimeUs,
PVRSRV_CACHE_OP iuCacheOp);
IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgeCacheOpGetLineSize(IMG_HANDLE hBridge,
IMG_UINT32 *pui32L1DataCacheLineSize);
#endif /* CLIENT_CACHE_BRIDGE_H */

153
drivers/staging/imgtec/rogue/generated/cache_bridge/client_cache_direct_bridge.c
View File

@ -1,153 +0,0 @@
/*************************************************************************/ /*!
@Title Direct client bridge for cache
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#include "client_cache_bridge.h"
#include "img_defs.h"
#include "pvr_debug.h"
/* Module specific includes */
#include "cache_ops.h"
#include "cache_km.h"
IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgeCacheOpQueue(IMG_HANDLE hBridge,
IMG_UINT32 ui32NumCacheOps,
IMG_HANDLE *phPMR,
IMG_DEVMEM_OFFSET_T *puiOffset,
IMG_DEVMEM_SIZE_T *puiSize,
PVRSRV_CACHE_OP *piuCacheOp,
IMG_UINT32 *pui32CacheOpSeqNum)
{
PVRSRV_ERROR eError;
PMR * *psPMRInt;
PVR_UNREFERENCED_PARAMETER(hBridge);
psPMRInt = (PMR **) phPMR;
eError =
CacheOpQueue(
ui32NumCacheOps,
psPMRInt,
puiOffset,
puiSize,
piuCacheOp,
pui32CacheOpSeqNum);
return eError;
}
IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgeCacheOpExec(IMG_HANDLE hBridge,
IMG_HANDLE hPMR,
IMG_DEVMEM_OFFSET_T uiOffset,
IMG_DEVMEM_SIZE_T uiSize,
PVRSRV_CACHE_OP iuCacheOp)
{
PVRSRV_ERROR eError;
PMR * psPMRInt;
PVR_UNREFERENCED_PARAMETER(hBridge);
psPMRInt = (PMR *) hPMR;
eError =
CacheOpExec(
psPMRInt,
uiOffset,
uiSize,
iuCacheOp);
return eError;
}
IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgeCacheOpSetTimeline(IMG_HANDLE hBridge,
IMG_INT32 i32OpTimeline)
{
PVRSRV_ERROR eError;
PVR_UNREFERENCED_PARAMETER(hBridge);
eError =
CacheOpSetTimeline(
i32OpTimeline);
return eError;
}
IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgeCacheOpLog(IMG_HANDLE hBridge,
IMG_HANDLE hPMR,
IMG_DEVMEM_OFFSET_T uiOffset,
IMG_DEVMEM_SIZE_T uiSize,
IMG_INT64 i64QueuedTimeUs,
IMG_INT64 i64ExecuteTimeUs,
PVRSRV_CACHE_OP iuCacheOp)
{
PVRSRV_ERROR eError;
PMR * psPMRInt;
PVR_UNREFERENCED_PARAMETER(hBridge);
psPMRInt = (PMR *) hPMR;
eError =
CacheOpLog(
psPMRInt,
uiOffset,
uiSize,
i64QueuedTimeUs,
i64ExecuteTimeUs,
iuCacheOp);
return eError;
}
IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgeCacheOpGetLineSize(IMG_HANDLE hBridge,
IMG_UINT32 *pui32L1DataCacheLineSize)
{
PVRSRV_ERROR eError;
PVR_UNREFERENCED_PARAMETER(hBridge);
eError =
CacheOpGetLineSize(
pui32L1DataCacheLineSize);
return eError;
}

164
drivers/staging/imgtec/rogue/generated/cache_bridge/common_cache_bridge.h
View File

@ -1,164 +0,0 @@
/*************************************************************************/ /*!
@File
@Title Common bridge header for cache
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Declares common defines and structures used by both the client
and server side of the bridge for cache
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#ifndef COMMON_CACHE_BRIDGE_H
#define COMMON_CACHE_BRIDGE_H
#include <powervr/mem_types.h>
#include "img_types.h"
#include "pvrsrv_error.h"
#include "cache_ops.h"
#define PVRSRV_BRIDGE_CACHE_CMD_FIRST 0
#define PVRSRV_BRIDGE_CACHE_CACHEOPQUEUE PVRSRV_BRIDGE_CACHE_CMD_FIRST+0
#define PVRSRV_BRIDGE_CACHE_CACHEOPEXEC PVRSRV_BRIDGE_CACHE_CMD_FIRST+1
#define PVRSRV_BRIDGE_CACHE_CACHEOPSETTIMELINE PVRSRV_BRIDGE_CACHE_CMD_FIRST+2
#define PVRSRV_BRIDGE_CACHE_CACHEOPLOG PVRSRV_BRIDGE_CACHE_CMD_FIRST+3
#define PVRSRV_BRIDGE_CACHE_CACHEOPGETLINESIZE PVRSRV_BRIDGE_CACHE_CMD_FIRST+4
#define PVRSRV_BRIDGE_CACHE_CMD_LAST (PVRSRV_BRIDGE_CACHE_CMD_FIRST+4)
/*******************************************
CacheOpQueue
*******************************************/
/* Bridge in structure for CacheOpQueue */
typedef struct PVRSRV_BRIDGE_IN_CACHEOPQUEUE_TAG
{
IMG_UINT32 ui32NumCacheOps;
IMG_HANDLE * phPMR;
IMG_DEVMEM_OFFSET_T * puiOffset;
IMG_DEVMEM_SIZE_T * puiSize;
PVRSRV_CACHE_OP * piuCacheOp;
} __attribute__((packed)) PVRSRV_BRIDGE_IN_CACHEOPQUEUE;
/* Bridge out structure for CacheOpQueue */
typedef struct PVRSRV_BRIDGE_OUT_CACHEOPQUEUE_TAG
{
IMG_UINT32 ui32CacheOpSeqNum;
PVRSRV_ERROR eError;
} __attribute__((packed)) PVRSRV_BRIDGE_OUT_CACHEOPQUEUE;
/*******************************************
CacheOpExec
*******************************************/
/* Bridge in structure for CacheOpExec */
typedef struct PVRSRV_BRIDGE_IN_CACHEOPEXEC_TAG
{
IMG_HANDLE hPMR;
IMG_DEVMEM_OFFSET_T uiOffset;
IMG_DEVMEM_SIZE_T uiSize;
PVRSRV_CACHE_OP iuCacheOp;
} __attribute__((packed)) PVRSRV_BRIDGE_IN_CACHEOPEXEC;
/* Bridge out structure for CacheOpExec */
typedef struct PVRSRV_BRIDGE_OUT_CACHEOPEXEC_TAG
{
PVRSRV_ERROR eError;
} __attribute__((packed)) PVRSRV_BRIDGE_OUT_CACHEOPEXEC;
/*******************************************
CacheOpSetTimeline
*******************************************/
/* Bridge in structure for CacheOpSetTimeline */
typedef struct PVRSRV_BRIDGE_IN_CACHEOPSETTIMELINE_TAG
{
IMG_INT32 i32OpTimeline;
} __attribute__((packed)) PVRSRV_BRIDGE_IN_CACHEOPSETTIMELINE;
/* Bridge out structure for CacheOpSetTimeline */
typedef struct PVRSRV_BRIDGE_OUT_CACHEOPSETTIMELINE_TAG
{
PVRSRV_ERROR eError;
} __attribute__((packed)) PVRSRV_BRIDGE_OUT_CACHEOPSETTIMELINE;
/*******************************************
CacheOpLog
*******************************************/
/* Bridge in structure for CacheOpLog */
typedef struct PVRSRV_BRIDGE_IN_CACHEOPLOG_TAG
{
IMG_HANDLE hPMR;
IMG_DEVMEM_OFFSET_T uiOffset;
IMG_DEVMEM_SIZE_T uiSize;
IMG_INT64 i64QueuedTimeUs;
IMG_INT64 i64ExecuteTimeUs;
PVRSRV_CACHE_OP iuCacheOp;
} __attribute__((packed)) PVRSRV_BRIDGE_IN_CACHEOPLOG;
/* Bridge out structure for CacheOpLog */
typedef struct PVRSRV_BRIDGE_OUT_CACHEOPLOG_TAG
{
PVRSRV_ERROR eError;
} __attribute__((packed)) PVRSRV_BRIDGE_OUT_CACHEOPLOG;
/*******************************************
CacheOpGetLineSize
*******************************************/
/* Bridge in structure for CacheOpGetLineSize */
typedef struct PVRSRV_BRIDGE_IN_CACHEOPGETLINESIZE_TAG
{
IMG_UINT32 ui32EmptyStructPlaceholder;
} __attribute__((packed)) PVRSRV_BRIDGE_IN_CACHEOPGETLINESIZE;
/* Bridge out structure for CacheOpGetLineSize */
typedef struct PVRSRV_BRIDGE_OUT_CACHEOPGETLINESIZE_TAG
{
IMG_UINT32 ui32L1DataCacheLineSize;
PVRSRV_ERROR eError;
} __attribute__((packed)) PVRSRV_BRIDGE_OUT_CACHEOPGETLINESIZE;
#endif /* COMMON_CACHE_BRIDGE_H */

542
drivers/staging/imgtec/rogue/generated/cache_bridge/server_cache_bridge.c
View File

@ -1,542 +0,0 @@
/*************************************************************************/ /*!
@File
@Title Server bridge for cache
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Implements the server side of the bridge for cache
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#include <stddef.h>
#include <linux/uaccess.h>
#include "osfunc.h"
#include "img_defs.h"
#include "cache_km.h"
#include "common_cache_bridge.h"
#include "allocmem.h"
#include "pvr_debug.h"
#include "connection_server.h"
#include "pvr_bridge.h"
#include "rgx_bridge.h"
#include "srvcore.h"
#include "handle.h"
#include <linux/slab.h>
/* ***************************************************************************
* Server-side bridge entry points
*/
static IMG_INT
PVRSRVBridgeCacheOpQueue(IMG_UINT32 ui32DispatchTableEntry,
PVRSRV_BRIDGE_IN_CACHEOPQUEUE *psCacheOpQueueIN,
PVRSRV_BRIDGE_OUT_CACHEOPQUEUE *psCacheOpQueueOUT,
CONNECTION_DATA *psConnection)
{
PMR * *psPMRInt = NULL;
IMG_HANDLE *hPMRInt2 = NULL;
IMG_DEVMEM_OFFSET_T *uiOffsetInt = NULL;
IMG_DEVMEM_SIZE_T *uiSizeInt = NULL;
PVRSRV_CACHE_OP *iuCacheOpInt = NULL;
IMG_UINT32 ui32NextOffset = 0;
IMG_BYTE *pArrayArgsBuffer = NULL;
#if !defined(INTEGRITY_OS)
IMG_BOOL bHaveEnoughSpace = IMG_FALSE;
#endif
IMG_UINT32 ui32BufferSize =
(psCacheOpQueueIN->ui32NumCacheOps * sizeof(PMR *)) +
(psCacheOpQueueIN->ui32NumCacheOps * sizeof(IMG_HANDLE)) +
(psCacheOpQueueIN->ui32NumCacheOps * sizeof(IMG_DEVMEM_OFFSET_T)) +
(psCacheOpQueueIN->ui32NumCacheOps * sizeof(IMG_DEVMEM_SIZE_T)) +
(psCacheOpQueueIN->ui32NumCacheOps * sizeof(PVRSRV_CACHE_OP)) +
0;
if (ui32BufferSize != 0)
{
#if !defined(INTEGRITY_OS)
/* Try to use remainder of input buffer for copies if possible, word-aligned for safety. */
IMG_UINT32 ui32InBufferOffset = PVR_ALIGN(sizeof(*psCacheOpQueueIN), sizeof(unsigned long));
IMG_UINT32 ui32InBufferExcessSize = ui32InBufferOffset >= PVRSRV_MAX_BRIDGE_IN_SIZE ? 0 :
PVRSRV_MAX_BRIDGE_IN_SIZE - ui32InBufferOffset;
bHaveEnoughSpace = ui32BufferSize <= ui32InBufferExcessSize;
if (bHaveEnoughSpace)
{
IMG_BYTE *pInputBuffer = (IMG_BYTE *)psCacheOpQueueIN;
pArrayArgsBuffer = &pInputBuffer[ui32InBufferOffset]; }
else
#endif
{
pArrayArgsBuffer = OSAllocMemNoStats(ui32BufferSize);
if(!pArrayArgsBuffer)
{
psCacheOpQueueOUT->eError = PVRSRV_ERROR_OUT_OF_MEMORY;
goto CacheOpQueue_exit;
}
}
}
if (psCacheOpQueueIN->ui32NumCacheOps != 0)
{
psPMRInt = (PMR **)(((IMG_UINT8 *)pArrayArgsBuffer) + ui32NextOffset);
ui32NextOffset += psCacheOpQueueIN->ui32NumCacheOps * sizeof(PMR *);
hPMRInt2 = (IMG_HANDLE *)(((IMG_UINT8 *)pArrayArgsBuffer) + ui32NextOffset);
ui32NextOffset += psCacheOpQueueIN->ui32NumCacheOps * sizeof(IMG_HANDLE);
}
/* Copy the data over */
if (psCacheOpQueueIN->ui32NumCacheOps * sizeof(IMG_HANDLE) > 0)
{
if ( OSCopyFromUser(NULL, hPMRInt2, psCacheOpQueueIN->phPMR, psCacheOpQueueIN->ui32NumCacheOps * sizeof(IMG_HANDLE)) != PVRSRV_OK )
{
psCacheOpQueueOUT->eError = PVRSRV_ERROR_INVALID_PARAMS;
goto CacheOpQueue_exit;
}
}
if (psCacheOpQueueIN->ui32NumCacheOps != 0)
{
uiOffsetInt = (IMG_DEVMEM_OFFSET_T*)(((IMG_UINT8 *)pArrayArgsBuffer) + ui32NextOffset);
ui32NextOffset += psCacheOpQueueIN->ui32NumCacheOps * sizeof(IMG_DEVMEM_OFFSET_T);
}
/* Copy the data over */
if (psCacheOpQueueIN->ui32NumCacheOps * sizeof(IMG_DEVMEM_OFFSET_T) > 0)
{
if ( OSCopyFromUser(NULL, uiOffsetInt, psCacheOpQueueIN->puiOffset, psCacheOpQueueIN->ui32NumCacheOps * sizeof(IMG_DEVMEM_OFFSET_T)) != PVRSRV_OK )
{
psCacheOpQueueOUT->eError = PVRSRV_ERROR_INVALID_PARAMS;
goto CacheOpQueue_exit;
}
}
if (psCacheOpQueueIN->ui32NumCacheOps != 0)
{
uiSizeInt = (IMG_DEVMEM_SIZE_T*)(((IMG_UINT8 *)pArrayArgsBuffer) + ui32NextOffset);
ui32NextOffset += psCacheOpQueueIN->ui32NumCacheOps * sizeof(IMG_DEVMEM_SIZE_T);
}
/* Copy the data over */
if (psCacheOpQueueIN->ui32NumCacheOps * sizeof(IMG_DEVMEM_SIZE_T) > 0)
{
if ( OSCopyFromUser(NULL, uiSizeInt, psCacheOpQueueIN->puiSize, psCacheOpQueueIN->ui32NumCacheOps * sizeof(IMG_DEVMEM_SIZE_T)) != PVRSRV_OK )
{
psCacheOpQueueOUT->eError = PVRSRV_ERROR_INVALID_PARAMS;
goto CacheOpQueue_exit;
}
}
if (psCacheOpQueueIN->ui32NumCacheOps != 0)
{
iuCacheOpInt = (PVRSRV_CACHE_OP*)(((IMG_UINT8 *)pArrayArgsBuffer) + ui32NextOffset);
ui32NextOffset += psCacheOpQueueIN->ui32NumCacheOps * sizeof(PVRSRV_CACHE_OP);
}
/* Copy the data over */
if (psCacheOpQueueIN->ui32NumCacheOps * sizeof(PVRSRV_CACHE_OP) > 0)
{
if ( OSCopyFromUser(NULL, iuCacheOpInt, psCacheOpQueueIN->piuCacheOp, psCacheOpQueueIN->ui32NumCacheOps * sizeof(PVRSRV_CACHE_OP)) != PVRSRV_OK )
{
psCacheOpQueueOUT->eError = PVRSRV_ERROR_INVALID_PARAMS;
goto CacheOpQueue_exit;
}
}
/* Lock over handle lookup. */
LockHandle();
{
IMG_UINT32 i;
for (i=0;i<psCacheOpQueueIN->ui32NumCacheOps;i++)
{
{
/* Look up the address from the handle */
psCacheOpQueueOUT->eError =
PVRSRVLookupHandleUnlocked(psConnection->psHandleBase,
(void **) &psPMRInt[i],
hPMRInt2[i],
PVRSRV_HANDLE_TYPE_PHYSMEM_PMR,
IMG_TRUE);
if(psCacheOpQueueOUT->eError != PVRSRV_OK)
{
UnlockHandle();
goto CacheOpQueue_exit;
}
}
}
}
/* Release now we have looked up handles. */
UnlockHandle();
psCacheOpQueueOUT->eError =
CacheOpQueue(
psCacheOpQueueIN->ui32NumCacheOps,
psPMRInt,
uiOffsetInt,
uiSizeInt,
iuCacheOpInt,
&psCacheOpQueueOUT->ui32CacheOpSeqNum);
CacheOpQueue_exit:
/* Lock over handle lookup cleanup. */
LockHandle();
{
IMG_UINT32 i;
for (i=0;i<psCacheOpQueueIN->ui32NumCacheOps;i++)
{
{
/* Unreference the previously looked up handle */
if(psPMRInt[i])
{
PVRSRVReleaseHandleUnlocked(psConnection->psHandleBase,
hPMRInt2[i],
PVRSRV_HANDLE_TYPE_PHYSMEM_PMR);
}
}
}
}
/* Release now we have cleaned up look up handles. */
UnlockHandle();
/* Allocated space should be equal to the last updated offset */
PVR_ASSERT(ui32BufferSize == ui32NextOffset);
#if defined(INTEGRITY_OS)
if(pArrayArgsBuffer)
#else
if(!bHaveEnoughSpace && pArrayArgsBuffer)
#endif
OSFreeMemNoStats(pArrayArgsBuffer);
return 0;
}
static IMG_INT
PVRSRVBridgeCacheOpExec(IMG_UINT32 ui32DispatchTableEntry,
PVRSRV_BRIDGE_IN_CACHEOPEXEC *psCacheOpExecIN,
PVRSRV_BRIDGE_OUT_CACHEOPEXEC *psCacheOpExecOUT,
CONNECTION_DATA *psConnection)
{
IMG_HANDLE hPMR = psCacheOpExecIN->hPMR;
PMR * psPMRInt = NULL;
/* Lock over handle lookup. */
LockHandle();
{
/* Look up the address from the handle */
psCacheOpExecOUT->eError =
PVRSRVLookupHandleUnlocked(psConnection->psHandleBase,
(void **) &psPMRInt,
hPMR,
PVRSRV_HANDLE_TYPE_PHYSMEM_PMR,
IMG_TRUE);
if(psCacheOpExecOUT->eError != PVRSRV_OK)
{
UnlockHandle();
goto CacheOpExec_exit;
}
}
/* Release now we have looked up handles. */
UnlockHandle();
psCacheOpExecOUT->eError =
CacheOpExec(
psPMRInt,
psCacheOpExecIN->uiOffset,
psCacheOpExecIN->uiSize,
psCacheOpExecIN->iuCacheOp);
CacheOpExec_exit:
/* Lock over handle lookup cleanup. */
LockHandle();
{
/* Unreference the previously looked up handle */
if(psPMRInt)
{
PVRSRVReleaseHandleUnlocked(psConnection->psHandleBase,
hPMR,
PVRSRV_HANDLE_TYPE_PHYSMEM_PMR);
}
}
/* Release now we have cleaned up look up handles. */
UnlockHandle();
return 0;
}
static IMG_INT
PVRSRVBridgeCacheOpSetTimeline(IMG_UINT32 ui32DispatchTableEntry,
PVRSRV_BRIDGE_IN_CACHEOPSETTIMELINE *psCacheOpSetTimelineIN,
PVRSRV_BRIDGE_OUT_CACHEOPSETTIMELINE *psCacheOpSetTimelineOUT,
CONNECTION_DATA *psConnection)
{
PVR_UNREFERENCED_PARAMETER(psConnection);
psCacheOpSetTimelineOUT->eError =
CacheOpSetTimeline(
psCacheOpSetTimelineIN->i32OpTimeline);
return 0;
}
static IMG_INT
PVRSRVBridgeCacheOpLog(IMG_UINT32 ui32DispatchTableEntry,
PVRSRV_BRIDGE_IN_CACHEOPLOG *psCacheOpLogIN,
PVRSRV_BRIDGE_OUT_CACHEOPLOG *psCacheOpLogOUT,
CONNECTION_DATA *psConnection)
{
IMG_HANDLE hPMR = psCacheOpLogIN->hPMR;
PMR * psPMRInt = NULL;
/* Lock over handle lookup. */
LockHandle();
{
/* Look up the address from the handle */
psCacheOpLogOUT->eError =
PVRSRVLookupHandleUnlocked(psConnection->psHandleBase,
(void **) &psPMRInt,
hPMR,
PVRSRV_HANDLE_TYPE_PHYSMEM_PMR,
IMG_TRUE);
if(psCacheOpLogOUT->eError != PVRSRV_OK)
{
UnlockHandle();
goto CacheOpLog_exit;
}
}
/* Release now we have looked up handles. */
UnlockHandle();
psCacheOpLogOUT->eError =
CacheOpLog(
psPMRInt,
psCacheOpLogIN->uiOffset,
psCacheOpLogIN->uiSize,
psCacheOpLogIN->i64QueuedTimeUs,
psCacheOpLogIN->i64ExecuteTimeUs,
psCacheOpLogIN->iuCacheOp);
CacheOpLog_exit:
/* Lock over handle lookup cleanup. */
LockHandle();
{
/* Unreference the previously looked up handle */
if(psPMRInt)
{
PVRSRVReleaseHandleUnlocked(psConnection->psHandleBase,
hPMR,
PVRSRV_HANDLE_TYPE_PHYSMEM_PMR);
}
}
/* Release now we have cleaned up look up handles. */
UnlockHandle();
return 0;
}
static IMG_INT
PVRSRVBridgeCacheOpGetLineSize(IMG_UINT32 ui32DispatchTableEntry,
PVRSRV_BRIDGE_IN_CACHEOPGETLINESIZE *psCacheOpGetLineSizeIN,
PVRSRV_BRIDGE_OUT_CACHEOPGETLINESIZE *psCacheOpGetLineSizeOUT,
CONNECTION_DATA *psConnection)
{
PVR_UNREFERENCED_PARAMETER(psConnection);
PVR_UNREFERENCED_PARAMETER(psCacheOpGetLineSizeIN);
psCacheOpGetLineSizeOUT->eError =
CacheOpGetLineSize(
&psCacheOpGetLineSizeOUT->ui32L1DataCacheLineSize);
return 0;
}
/* ***************************************************************************
* Server bridge dispatch related glue
*/
static IMG_BOOL bUseLock = IMG_TRUE;
PVRSRV_ERROR InitCACHEBridge(void);
PVRSRV_ERROR DeinitCACHEBridge(void);
/*
* Register all CACHE functions with services
*/
PVRSRV_ERROR InitCACHEBridge(void)
{
SetDispatchTableEntry(PVRSRV_BRIDGE_CACHE, PVRSRV_BRIDGE_CACHE_CACHEOPQUEUE, PVRSRVBridgeCacheOpQueue,
NULL, bUseLock);
SetDispatchTableEntry(PVRSRV_BRIDGE_CACHE, PVRSRV_BRIDGE_CACHE_CACHEOPEXEC, PVRSRVBridgeCacheOpExec,
NULL, bUseLock);
SetDispatchTableEntry(PVRSRV_BRIDGE_CACHE, PVRSRV_BRIDGE_CACHE_CACHEOPSETTIMELINE, PVRSRVBridgeCacheOpSetTimeline,
NULL, bUseLock);
SetDispatchTableEntry(PVRSRV_BRIDGE_CACHE, PVRSRV_BRIDGE_CACHE_CACHEOPLOG, PVRSRVBridgeCacheOpLog,
NULL, bUseLock);
SetDispatchTableEntry(PVRSRV_BRIDGE_CACHE, PVRSRV_BRIDGE_CACHE_CACHEOPGETLINESIZE, PVRSRVBridgeCacheOpGetLineSize,
NULL, bUseLock);
return PVRSRV_OK;
}
/*
* Unregister all cache functions with services
*/
PVRSRV_ERROR DeinitCACHEBridge(void)
{
return PVRSRV_OK;
}

118
drivers/staging/imgtec/rogue/generated/cmm_bridge/common_cmm_bridge.h
View File

@ -1,118 +0,0 @@
/*************************************************************************/ /*!
@File
@Title Common bridge header for cmm
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Declares common defines and structures used by both the client
and server side of the bridge for cmm
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#ifndef COMMON_CMM_BRIDGE_H
#define COMMON_CMM_BRIDGE_H
#include <powervr/mem_types.h>
#include "img_types.h"
#include "pvrsrv_error.h"
#include "devicemem_typedefs.h"
#define PVRSRV_BRIDGE_CMM_CMD_FIRST 0
#define PVRSRV_BRIDGE_CMM_DEVMEMINTEXPORTCTX PVRSRV_BRIDGE_CMM_CMD_FIRST+0
#define PVRSRV_BRIDGE_CMM_DEVMEMINTUNEXPORTCTX PVRSRV_BRIDGE_CMM_CMD_FIRST+1
#define PVRSRV_BRIDGE_CMM_DEVMEMINTACQUIREREMOTECTX PVRSRV_BRIDGE_CMM_CMD_FIRST+2
#define PVRSRV_BRIDGE_CMM_CMD_LAST (PVRSRV_BRIDGE_CMM_CMD_FIRST+2)
/*******************************************
DevmemIntExportCtx
*******************************************/
/* Bridge in structure for DevmemIntExportCtx */
typedef struct PVRSRV_BRIDGE_IN_DEVMEMINTEXPORTCTX_TAG
{
IMG_HANDLE hContext;
IMG_HANDLE hPMR;
} __attribute__((packed)) PVRSRV_BRIDGE_IN_DEVMEMINTEXPORTCTX;
/* Bridge out structure for DevmemIntExportCtx */
typedef struct PVRSRV_BRIDGE_OUT_DEVMEMINTEXPORTCTX_TAG
{
IMG_HANDLE hContextExport;
PVRSRV_ERROR eError;
} __attribute__((packed)) PVRSRV_BRIDGE_OUT_DEVMEMINTEXPORTCTX;
/*******************************************
DevmemIntUnexportCtx
*******************************************/
/* Bridge in structure for DevmemIntUnexportCtx */
typedef struct PVRSRV_BRIDGE_IN_DEVMEMINTUNEXPORTCTX_TAG
{
IMG_HANDLE hContextExport;
} __attribute__((packed)) PVRSRV_BRIDGE_IN_DEVMEMINTUNEXPORTCTX;
/* Bridge out structure for DevmemIntUnexportCtx */
typedef struct PVRSRV_BRIDGE_OUT_DEVMEMINTUNEXPORTCTX_TAG
{
PVRSRV_ERROR eError;
} __attribute__((packed)) PVRSRV_BRIDGE_OUT_DEVMEMINTUNEXPORTCTX;
/*******************************************
DevmemIntAcquireRemoteCtx
*******************************************/
/* Bridge in structure for DevmemIntAcquireRemoteCtx */
typedef struct PVRSRV_BRIDGE_IN_DEVMEMINTACQUIREREMOTECTX_TAG
{
IMG_HANDLE hPMR;
} __attribute__((packed)) PVRSRV_BRIDGE_IN_DEVMEMINTACQUIREREMOTECTX;
/* Bridge out structure for DevmemIntAcquireRemoteCtx */
typedef struct PVRSRV_BRIDGE_OUT_DEVMEMINTACQUIREREMOTECTX_TAG
{
IMG_HANDLE hContext;
IMG_HANDLE hPrivData;
PVRSRV_ERROR eError;
} __attribute__((packed)) PVRSRV_BRIDGE_OUT_DEVMEMINTACQUIREREMOTECTX;
#endif /* COMMON_CMM_BRIDGE_H */

478
drivers/staging/imgtec/rogue/generated/cmm_bridge/server_cmm_bridge.c
View File

@ -1,478 +0,0 @@
/*************************************************************************/ /*!
@File
@Title Server bridge for cmm
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Implements the server side of the bridge for cmm
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#include <stddef.h>
#include <linux/uaccess.h>
#include "img_defs.h"
#include "pmr.h"
#include "devicemem_server.h"
#include "common_cmm_bridge.h"
#include "allocmem.h"
#include "pvr_debug.h"
#include "connection_server.h"
#include "pvr_bridge.h"
#include "rgx_bridge.h"
#include "srvcore.h"
#include "handle.h"
#include <linux/slab.h>
#if !defined(EXCLUDE_CMM_BRIDGE)
/* ***************************************************************************
* Server-side bridge entry points
*/
static IMG_INT
PVRSRVBridgeDevmemIntExportCtx(IMG_UINT32 ui32DispatchTableEntry,
PVRSRV_BRIDGE_IN_DEVMEMINTEXPORTCTX *psDevmemIntExportCtxIN,
PVRSRV_BRIDGE_OUT_DEVMEMINTEXPORTCTX *psDevmemIntExportCtxOUT,
CONNECTION_DATA *psConnection)
{
IMG_HANDLE hContext = psDevmemIntExportCtxIN->hContext;
DEVMEMINT_CTX * psContextInt = NULL;
IMG_HANDLE hPMR = psDevmemIntExportCtxIN->hPMR;
PMR * psPMRInt = NULL;
DEVMEMINT_CTX_EXPORT * psContextExportInt = NULL;
/* Lock over handle lookup. */
LockHandle();
{
/* Look up the address from the handle */
psDevmemIntExportCtxOUT->eError =
PVRSRVLookupHandleUnlocked(psConnection->psHandleBase,
(void **) &psContextInt,
hContext,
PVRSRV_HANDLE_TYPE_DEVMEMINT_CTX,
IMG_TRUE);
if(psDevmemIntExportCtxOUT->eError != PVRSRV_OK)
{
UnlockHandle();
goto DevmemIntExportCtx_exit;
}
}
{
/* Look up the address from the handle */
psDevmemIntExportCtxOUT->eError =
PVRSRVLookupHandleUnlocked(psConnection->psHandleBase,
(void **) &psPMRInt,
hPMR,
PVRSRV_HANDLE_TYPE_PHYSMEM_PMR,
IMG_TRUE);
if(psDevmemIntExportCtxOUT->eError != PVRSRV_OK)
{
UnlockHandle();
goto DevmemIntExportCtx_exit;
}
}
/* Release now we have looked up handles. */
UnlockHandle();
psDevmemIntExportCtxOUT->eError =
DevmemIntExportCtx(
psContextInt,
psPMRInt,
&psContextExportInt);
/* Exit early if bridged call fails */
if(psDevmemIntExportCtxOUT->eError != PVRSRV_OK)
{
goto DevmemIntExportCtx_exit;
}
/* Lock over handle creation. */
LockHandle();
psDevmemIntExportCtxOUT->eError = PVRSRVAllocHandleUnlocked(psConnection->psHandleBase,
&psDevmemIntExportCtxOUT->hContextExport,
(void *) psContextExportInt,
PVRSRV_HANDLE_TYPE_DEVMEMINT_CTX_EXPORT,
PVRSRV_HANDLE_ALLOC_FLAG_NONE
,(PFN_HANDLE_RELEASE)&DevmemIntUnexportCtx);
if (psDevmemIntExportCtxOUT->eError != PVRSRV_OK)
{
UnlockHandle();
goto DevmemIntExportCtx_exit;
}
/* Release now we have created handles. */
UnlockHandle();
DevmemIntExportCtx_exit:
/* Lock over handle lookup cleanup. */
LockHandle();
{
/* Unreference the previously looked up handle */
if(psContextInt)
{
PVRSRVReleaseHandleUnlocked(psConnection->psHandleBase,
hContext,
PVRSRV_HANDLE_TYPE_DEVMEMINT_CTX);
}
}
{
/* Unreference the previously looked up handle */
if(psPMRInt)
{
PVRSRVReleaseHandleUnlocked(psConnection->psHandleBase,
hPMR,
PVRSRV_HANDLE_TYPE_PHYSMEM_PMR);
}
}
/* Release now we have cleaned up look up handles. */
UnlockHandle();
if (psDevmemIntExportCtxOUT->eError != PVRSRV_OK)
{
if (psContextExportInt)
{
DevmemIntUnexportCtx(psContextExportInt);
}
}
return 0;
}
static IMG_INT
PVRSRVBridgeDevmemIntUnexportCtx(IMG_UINT32 ui32DispatchTableEntry,
PVRSRV_BRIDGE_IN_DEVMEMINTUNEXPORTCTX *psDevmemIntUnexportCtxIN,
PVRSRV_BRIDGE_OUT_DEVMEMINTUNEXPORTCTX *psDevmemIntUnexportCtxOUT,
CONNECTION_DATA *psConnection)
{
/* Lock over handle destruction. */
LockHandle();
psDevmemIntUnexportCtxOUT->eError =
PVRSRVReleaseHandleUnlocked(psConnection->psHandleBase,
(IMG_HANDLE) psDevmemIntUnexportCtxIN->hContextExport,
PVRSRV_HANDLE_TYPE_DEVMEMINT_CTX_EXPORT);
if ((psDevmemIntUnexportCtxOUT->eError != PVRSRV_OK) &&
(psDevmemIntUnexportCtxOUT->eError != PVRSRV_ERROR_RETRY))
{
PVR_DPF((PVR_DBG_ERROR,
"PVRSRVBridgeDevmemIntUnexportCtx: %s",
PVRSRVGetErrorStringKM(psDevmemIntUnexportCtxOUT->eError)));
PVR_ASSERT(0);
UnlockHandle();
goto DevmemIntUnexportCtx_exit;
}
/* Release now we have destroyed handles. */
UnlockHandle();
DevmemIntUnexportCtx_exit:
return 0;
}
static IMG_INT
PVRSRVBridgeDevmemIntAcquireRemoteCtx(IMG_UINT32 ui32DispatchTableEntry,
PVRSRV_BRIDGE_IN_DEVMEMINTACQUIREREMOTECTX *psDevmemIntAcquireRemoteCtxIN,
PVRSRV_BRIDGE_OUT_DEVMEMINTACQUIREREMOTECTX *psDevmemIntAcquireRemoteCtxOUT,
CONNECTION_DATA *psConnection)
{
IMG_HANDLE hPMR = psDevmemIntAcquireRemoteCtxIN->hPMR;
PMR * psPMRInt = NULL;
DEVMEMINT_CTX * psContextInt = NULL;
IMG_HANDLE hPrivDataInt = NULL;
psDevmemIntAcquireRemoteCtxOUT->hContext = NULL;
/* Lock over handle lookup. */
LockHandle();
{
/* Look up the address from the handle */
psDevmemIntAcquireRemoteCtxOUT->eError =
PVRSRVLookupHandleUnlocked(psConnection->psHandleBase,
(void **) &psPMRInt,
hPMR,
PVRSRV_HANDLE_TYPE_PHYSMEM_PMR,
IMG_TRUE);
if(psDevmemIntAcquireRemoteCtxOUT->eError != PVRSRV_OK)
{
UnlockHandle();
goto DevmemIntAcquireRemoteCtx_exit;
}
}
/* Release now we have looked up handles. */
UnlockHandle();
psDevmemIntAcquireRemoteCtxOUT->eError =
DevmemIntAcquireRemoteCtx(
psPMRInt,
&psContextInt,
&hPrivDataInt);
/* Exit early if bridged call fails */
if(psDevmemIntAcquireRemoteCtxOUT->eError != PVRSRV_OK)
{
goto DevmemIntAcquireRemoteCtx_exit;
}
/* Lock over handle creation. */
LockHandle();
psDevmemIntAcquireRemoteCtxOUT->eError = PVRSRVAllocHandleUnlocked(psConnection->psHandleBase,
&psDevmemIntAcquireRemoteCtxOUT->hContext,
(void *) psContextInt,
PVRSRV_HANDLE_TYPE_DEVMEMINT_CTX,
PVRSRV_HANDLE_ALLOC_FLAG_NONE
,(PFN_HANDLE_RELEASE)&DevmemIntCtxDestroy);
if (psDevmemIntAcquireRemoteCtxOUT->eError != PVRSRV_OK)
{
UnlockHandle();
goto DevmemIntAcquireRemoteCtx_exit;
}
psDevmemIntAcquireRemoteCtxOUT->eError = PVRSRVAllocSubHandleUnlocked(psConnection->psHandleBase,
&psDevmemIntAcquireRemoteCtxOUT->hPrivData,
(void *) hPrivDataInt,
PVRSRV_HANDLE_TYPE_DEV_PRIV_DATA,
PVRSRV_HANDLE_ALLOC_FLAG_NONE
,psDevmemIntAcquireRemoteCtxOUT->hContext);
if (psDevmemIntAcquireRemoteCtxOUT->eError != PVRSRV_OK)
{
UnlockHandle();
goto DevmemIntAcquireRemoteCtx_exit;
}
/* Release now we have created handles. */
UnlockHandle();
DevmemIntAcquireRemoteCtx_exit:
/* Lock over handle lookup cleanup. */
LockHandle();
{
/* Unreference the previously looked up handle */
if(psPMRInt)
{
PVRSRVReleaseHandleUnlocked(psConnection->psHandleBase,
hPMR,
PVRSRV_HANDLE_TYPE_PHYSMEM_PMR);
}
}
/* Release now we have cleaned up look up handles. */
UnlockHandle();
if (psDevmemIntAcquireRemoteCtxOUT->eError != PVRSRV_OK)
{
/* Lock over handle creation cleanup. */
LockHandle();
if (psDevmemIntAcquireRemoteCtxOUT->hContext)
{
PVRSRV_ERROR eError = PVRSRVReleaseHandleUnlocked(psConnection->psHandleBase,
(IMG_HANDLE) psDevmemIntAcquireRemoteCtxOUT->hContext,
PVRSRV_HANDLE_TYPE_DEVMEMINT_CTX);
if ((eError != PVRSRV_OK) && (eError != PVRSRV_ERROR_RETRY))
{
PVR_DPF((PVR_DBG_ERROR,
"PVRSRVBridgeDevmemIntAcquireRemoteCtx: %s",
PVRSRVGetErrorStringKM(eError)));
}
/* Releasing the handle should free/destroy/release the resource.
* This should never fail... */
PVR_ASSERT((eError == PVRSRV_OK) || (eError == PVRSRV_ERROR_RETRY));
/* Avoid freeing/destroying/releasing the resource a second time below */
psContextInt = NULL;
}
/* Release now we have cleaned up creation handles. */
UnlockHandle();
if (psContextInt)
{
DevmemIntCtxDestroy(psContextInt);
}
}
return 0;
}
/* ***************************************************************************
* Server bridge dispatch related glue
*/
static IMG_BOOL bUseLock = IMG_TRUE;
#endif /* EXCLUDE_CMM_BRIDGE */
#if !defined(EXCLUDE_CMM_BRIDGE)
PVRSRV_ERROR InitCMMBridge(void);
PVRSRV_ERROR DeinitCMMBridge(void);
/*
* Register all CMM functions with services
*/
PVRSRV_ERROR InitCMMBridge(void)
{
SetDispatchTableEntry(PVRSRV_BRIDGE_CMM, PVRSRV_BRIDGE_CMM_DEVMEMINTEXPORTCTX, PVRSRVBridgeDevmemIntExportCtx,
NULL, bUseLock);
SetDispatchTableEntry(PVRSRV_BRIDGE_CMM, PVRSRV_BRIDGE_CMM_DEVMEMINTUNEXPORTCTX, PVRSRVBridgeDevmemIntUnexportCtx,
NULL, bUseLock);
SetDispatchTableEntry(PVRSRV_BRIDGE_CMM, PVRSRV_BRIDGE_CMM_DEVMEMINTACQUIREREMOTECTX, PVRSRVBridgeDevmemIntAcquireRemoteCtx,
NULL, bUseLock);
return PVRSRV_OK;
}
/*
* Unregister all cmm functions with services
*/
PVRSRV_ERROR DeinitCMMBridge(void)
{
return PVRSRV_OK;
}
#else /* EXCLUDE_CMM_BRIDGE */
/* This bridge is conditional on EXCLUDE_CMM_BRIDGE - when defined,
* do not populate the dispatch table with its functions
*/
#define InitCMMBridge() \
PVRSRV_OK
#define DeinitCMMBridge() \
PVRSRV_OK
#endif /* EXCLUDE_CMM_BRIDGE */

195
drivers/staging/imgtec/rogue/generated/debugmisc_bridge/common_debugmisc_bridge.h
View File

@ -1,195 +0,0 @@
/*************************************************************************/ /*!
@File
@Title Common bridge header for debugmisc
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Declares common defines and structures used by both the client
and server side of the bridge for debugmisc
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#ifndef COMMON_DEBUGMISC_BRIDGE_H
#define COMMON_DEBUGMISC_BRIDGE_H
#include <powervr/mem_types.h>
#include "img_types.h"
#include "pvrsrv_error.h"
#include "devicemem_typedefs.h"
#include "rgx_bridge.h"
#include "pvrsrv_memallocflags.h"
#define PVRSRV_BRIDGE_DEBUGMISC_CMD_FIRST 0
#define PVRSRV_BRIDGE_DEBUGMISC_DEBUGMISCSLCSETBYPASSSTATE PVRSRV_BRIDGE_DEBUGMISC_CMD_FIRST+0
#define PVRSRV_BRIDGE_DEBUGMISC_RGXDEBUGMISCSETFWLOG PVRSRV_BRIDGE_DEBUGMISC_CMD_FIRST+1
#define PVRSRV_BRIDGE_DEBUGMISC_RGXDEBUGMISCDUMPFREELISTPAGELIST PVRSRV_BRIDGE_DEBUGMISC_CMD_FIRST+2
#define PVRSRV_BRIDGE_DEBUGMISC_PHYSMEMIMPORTSECBUF PVRSRV_BRIDGE_DEBUGMISC_CMD_FIRST+3
#define PVRSRV_BRIDGE_DEBUGMISC_RGXDEBUGMISCSETHCSDEADLINE PVRSRV_BRIDGE_DEBUGMISC_CMD_FIRST+4
#define PVRSRV_BRIDGE_DEBUGMISC_RGXDEBUGMISCSETOSIDPRIORITY PVRSRV_BRIDGE_DEBUGMISC_CMD_FIRST+5
#define PVRSRV_BRIDGE_DEBUGMISC_RGXDEBUGMISCSETOSNEWONLINESTATE PVRSRV_BRIDGE_DEBUGMISC_CMD_FIRST+6
#define PVRSRV_BRIDGE_DEBUGMISC_CMD_LAST (PVRSRV_BRIDGE_DEBUGMISC_CMD_FIRST+6)
/*******************************************
DebugMiscSLCSetBypassState
*******************************************/
/* Bridge in structure for DebugMiscSLCSetBypassState */
typedef struct PVRSRV_BRIDGE_IN_DEBUGMISCSLCSETBYPASSSTATE_TAG
{
IMG_UINT32 ui32Flags;
IMG_BOOL bIsBypassed;
} __attribute__((packed)) PVRSRV_BRIDGE_IN_DEBUGMISCSLCSETBYPASSSTATE;
/* Bridge out structure for DebugMiscSLCSetBypassState */
typedef struct PVRSRV_BRIDGE_OUT_DEBUGMISCSLCSETBYPASSSTATE_TAG
{
PVRSRV_ERROR eError;
} __attribute__((packed)) PVRSRV_BRIDGE_OUT_DEBUGMISCSLCSETBYPASSSTATE;
/*******************************************
RGXDebugMiscSetFWLog
*******************************************/
/* Bridge in structure for RGXDebugMiscSetFWLog */
typedef struct PVRSRV_BRIDGE_IN_RGXDEBUGMISCSETFWLOG_TAG
{
IMG_UINT32 ui32RGXFWLogType;
} __attribute__((packed)) PVRSRV_BRIDGE_IN_RGXDEBUGMISCSETFWLOG;
/* Bridge out structure for RGXDebugMiscSetFWLog */
typedef struct PVRSRV_BRIDGE_OUT_RGXDEBUGMISCSETFWLOG_TAG
{
PVRSRV_ERROR eError;
} __attribute__((packed)) PVRSRV_BRIDGE_OUT_RGXDEBUGMISCSETFWLOG;
/*******************************************
RGXDebugMiscDumpFreelistPageList
*******************************************/
/* Bridge in structure for RGXDebugMiscDumpFreelistPageList */
typedef struct PVRSRV_BRIDGE_IN_RGXDEBUGMISCDUMPFREELISTPAGELIST_TAG
{
IMG_UINT32 ui32EmptyStructPlaceholder;
} __attribute__((packed)) PVRSRV_BRIDGE_IN_RGXDEBUGMISCDUMPFREELISTPAGELIST;
/* Bridge out structure for RGXDebugMiscDumpFreelistPageList */
typedef struct PVRSRV_BRIDGE_OUT_RGXDEBUGMISCDUMPFREELISTPAGELIST_TAG
{
PVRSRV_ERROR eError;
} __attribute__((packed)) PVRSRV_BRIDGE_OUT_RGXDEBUGMISCDUMPFREELISTPAGELIST;
/*******************************************
PhysmemImportSecBuf
*******************************************/
/* Bridge in structure for PhysmemImportSecBuf */
typedef struct PVRSRV_BRIDGE_IN_PHYSMEMIMPORTSECBUF_TAG
{
IMG_DEVMEM_SIZE_T uiSize;
IMG_UINT32 ui32Log2Align;
PVRSRV_MEMALLOCFLAGS_T uiFlags;
} __attribute__((packed)) PVRSRV_BRIDGE_IN_PHYSMEMIMPORTSECBUF;
/* Bridge out structure for PhysmemImportSecBuf */
typedef struct PVRSRV_BRIDGE_OUT_PHYSMEMIMPORTSECBUF_TAG
{
IMG_HANDLE hPMRPtr;
IMG_UINT64 ui64SecBufHandle;
PVRSRV_ERROR eError;
} __attribute__((packed)) PVRSRV_BRIDGE_OUT_PHYSMEMIMPORTSECBUF;
/*******************************************
RGXDebugMiscSetHCSDeadline
*******************************************/
/* Bridge in structure for RGXDebugMiscSetHCSDeadline */
typedef struct PVRSRV_BRIDGE_IN_RGXDEBUGMISCSETHCSDEADLINE_TAG
{
IMG_UINT32 ui32RGXHCSDeadline;
} __attribute__((packed)) PVRSRV_BRIDGE_IN_RGXDEBUGMISCSETHCSDEADLINE;
/* Bridge out structure for RGXDebugMiscSetHCSDeadline */
typedef struct PVRSRV_BRIDGE_OUT_RGXDEBUGMISCSETHCSDEADLINE_TAG
{
PVRSRV_ERROR eError;
} __attribute__((packed)) PVRSRV_BRIDGE_OUT_RGXDEBUGMISCSETHCSDEADLINE;
/*******************************************
RGXDebugMiscSetOSidPriority
*******************************************/
/* Bridge in structure for RGXDebugMiscSetOSidPriority */
typedef struct PVRSRV_BRIDGE_IN_RGXDEBUGMISCSETOSIDPRIORITY_TAG
{
IMG_UINT32 ui32OSid;
IMG_UINT32 ui32Priority;
} __attribute__((packed)) PVRSRV_BRIDGE_IN_RGXDEBUGMISCSETOSIDPRIORITY;
/* Bridge out structure for RGXDebugMiscSetOSidPriority */
typedef struct PVRSRV_BRIDGE_OUT_RGXDEBUGMISCSETOSIDPRIORITY_TAG
{
PVRSRV_ERROR eError;
} __attribute__((packed)) PVRSRV_BRIDGE_OUT_RGXDEBUGMISCSETOSIDPRIORITY;
/*******************************************
RGXDebugMiscSetOSNewOnlineState
*******************************************/
/* Bridge in structure for RGXDebugMiscSetOSNewOnlineState */
typedef struct PVRSRV_BRIDGE_IN_RGXDEBUGMISCSETOSNEWONLINESTATE_TAG
{
IMG_UINT32 ui32OSid;
IMG_UINT32 ui32OSNewState;
} __attribute__((packed)) PVRSRV_BRIDGE_IN_RGXDEBUGMISCSETOSNEWONLINESTATE;
/* Bridge out structure for RGXDebugMiscSetOSNewOnlineState */
typedef struct PVRSRV_BRIDGE_OUT_RGXDEBUGMISCSETOSNEWONLINESTATE_TAG
{
PVRSRV_ERROR eError;
} __attribute__((packed)) PVRSRV_BRIDGE_OUT_RGXDEBUGMISCSETOSNEWONLINESTATE;
#endif /* COMMON_DEBUGMISC_BRIDGE_H */

372
drivers/staging/imgtec/rogue/generated/debugmisc_bridge/server_debugmisc_bridge.c
View File

@ -1,372 +0,0 @@
/*************************************************************************/ /*!
@File
@Title Server bridge for debugmisc
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Implements the server side of the bridge for debugmisc
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#include <stddef.h>
#include <linux/uaccess.h>
#include "img_defs.h"
#include "devicemem_server.h"
#include "debugmisc_server.h"
#include "pmr.h"
#include "physmem_tdsecbuf.h"
#include "common_debugmisc_bridge.h"
#include "allocmem.h"
#include "pvr_debug.h"
#include "connection_server.h"
#include "pvr_bridge.h"
#include "rgx_bridge.h"
#include "srvcore.h"
#include "handle.h"
#include <linux/slab.h>
/* ***************************************************************************
* Server-side bridge entry points
*/
static IMG_INT
PVRSRVBridgeDebugMiscSLCSetBypassState(IMG_UINT32 ui32DispatchTableEntry,
PVRSRV_BRIDGE_IN_DEBUGMISCSLCSETBYPASSSTATE *psDebugMiscSLCSetBypassStateIN,
PVRSRV_BRIDGE_OUT_DEBUGMISCSLCSETBYPASSSTATE *psDebugMiscSLCSetBypassStateOUT,
CONNECTION_DATA *psConnection)
{
psDebugMiscSLCSetBypassStateOUT->eError =
PVRSRVDebugMiscSLCSetBypassStateKM(psConnection, OSGetDevData(psConnection),
psDebugMiscSLCSetBypassStateIN->ui32Flags,
psDebugMiscSLCSetBypassStateIN->bIsBypassed);
return 0;
}
static IMG_INT
PVRSRVBridgeRGXDebugMiscSetFWLog(IMG_UINT32 ui32DispatchTableEntry,
PVRSRV_BRIDGE_IN_RGXDEBUGMISCSETFWLOG *psRGXDebugMiscSetFWLogIN,
PVRSRV_BRIDGE_OUT_RGXDEBUGMISCSETFWLOG *psRGXDebugMiscSetFWLogOUT,
CONNECTION_DATA *psConnection)
{
psRGXDebugMiscSetFWLogOUT->eError =
PVRSRVRGXDebugMiscSetFWLogKM(psConnection, OSGetDevData(psConnection),
psRGXDebugMiscSetFWLogIN->ui32RGXFWLogType);
return 0;
}
static IMG_INT
PVRSRVBridgeRGXDebugMiscDumpFreelistPageList(IMG_UINT32 ui32DispatchTableEntry,
PVRSRV_BRIDGE_IN_RGXDEBUGMISCDUMPFREELISTPAGELIST *psRGXDebugMiscDumpFreelistPageListIN,
PVRSRV_BRIDGE_OUT_RGXDEBUGMISCDUMPFREELISTPAGELIST *psRGXDebugMiscDumpFreelistPageListOUT,
CONNECTION_DATA *psConnection)
{
PVR_UNREFERENCED_PARAMETER(psRGXDebugMiscDumpFreelistPageListIN);
psRGXDebugMiscDumpFreelistPageListOUT->eError =
PVRSRVRGXDebugMiscDumpFreelistPageListKM(psConnection, OSGetDevData(psConnection)
);
return 0;
}
static IMG_INT
PVRSRVBridgePhysmemImportSecBuf(IMG_UINT32 ui32DispatchTableEntry,
PVRSRV_BRIDGE_IN_PHYSMEMIMPORTSECBUF *psPhysmemImportSecBufIN,
PVRSRV_BRIDGE_OUT_PHYSMEMIMPORTSECBUF *psPhysmemImportSecBufOUT,
CONNECTION_DATA *psConnection)
{
PMR * psPMRPtrInt = NULL;
psPhysmemImportSecBufOUT->eError =
PhysmemImportSecBuf(psConnection, OSGetDevData(psConnection),
psPhysmemImportSecBufIN->uiSize,
psPhysmemImportSecBufIN->ui32Log2Align,
psPhysmemImportSecBufIN->uiFlags,
&psPMRPtrInt,
&psPhysmemImportSecBufOUT->ui64SecBufHandle);
/* Exit early if bridged call fails */
if(psPhysmemImportSecBufOUT->eError != PVRSRV_OK)
{
goto PhysmemImportSecBuf_exit;
}
/* Lock over handle creation. */
LockHandle();
psPhysmemImportSecBufOUT->eError = PVRSRVAllocHandleUnlocked(psConnection->psHandleBase,
&psPhysmemImportSecBufOUT->hPMRPtr,
(void *) psPMRPtrInt,
PVRSRV_HANDLE_TYPE_PHYSMEM_PMR,
PVRSRV_HANDLE_ALLOC_FLAG_MULTI
,(PFN_HANDLE_RELEASE)&PMRUnrefPMR);
if (psPhysmemImportSecBufOUT->eError != PVRSRV_OK)
{
UnlockHandle();
goto PhysmemImportSecBuf_exit;
}
/* Release now we have created handles. */
UnlockHandle();
PhysmemImportSecBuf_exit:
if (psPhysmemImportSecBufOUT->eError != PVRSRV_OK)
{
if (psPMRPtrInt)
{
PMRUnrefPMR(psPMRPtrInt);
}
}
return 0;
}
static IMG_INT
PVRSRVBridgeRGXDebugMiscSetHCSDeadline(IMG_UINT32 ui32DispatchTableEntry,
PVRSRV_BRIDGE_IN_RGXDEBUGMISCSETHCSDEADLINE *psRGXDebugMiscSetHCSDeadlineIN,
PVRSRV_BRIDGE_OUT_RGXDEBUGMISCSETHCSDEADLINE *psRGXDebugMiscSetHCSDeadlineOUT,
CONNECTION_DATA *psConnection)
{
psRGXDebugMiscSetHCSDeadlineOUT->eError =
PVRSRVRGXDebugMiscSetHCSDeadlineKM(psConnection, OSGetDevData(psConnection),
psRGXDebugMiscSetHCSDeadlineIN->ui32RGXHCSDeadline);
return 0;
}
static IMG_INT
PVRSRVBridgeRGXDebugMiscSetOSidPriority(IMG_UINT32 ui32DispatchTableEntry,
PVRSRV_BRIDGE_IN_RGXDEBUGMISCSETOSIDPRIORITY *psRGXDebugMiscSetOSidPriorityIN,
PVRSRV_BRIDGE_OUT_RGXDEBUGMISCSETOSIDPRIORITY *psRGXDebugMiscSetOSidPriorityOUT,
CONNECTION_DATA *psConnection)
{
psRGXDebugMiscSetOSidPriorityOUT->eError =
PVRSRVRGXDebugMiscSetOSidPriorityKM(psConnection, OSGetDevData(psConnection),
psRGXDebugMiscSetOSidPriorityIN->ui32OSid,
psRGXDebugMiscSetOSidPriorityIN->ui32Priority);
return 0;
}
static IMG_INT
PVRSRVBridgeRGXDebugMiscSetOSNewOnlineState(IMG_UINT32 ui32DispatchTableEntry,
PVRSRV_BRIDGE_IN_RGXDEBUGMISCSETOSNEWONLINESTATE *psRGXDebugMiscSetOSNewOnlineStateIN,
PVRSRV_BRIDGE_OUT_RGXDEBUGMISCSETOSNEWONLINESTATE *psRGXDebugMiscSetOSNewOnlineStateOUT,
CONNECTION_DATA *psConnection)
{
psRGXDebugMiscSetOSNewOnlineStateOUT->eError =
PVRSRVRGXDebugMiscSetOSNewOnlineStateKM(psConnection, OSGetDevData(psConnection),
psRGXDebugMiscSetOSNewOnlineStateIN->ui32OSid,
psRGXDebugMiscSetOSNewOnlineStateIN->ui32OSNewState);
return 0;
}
/* ***************************************************************************
* Server bridge dispatch related glue
*/
static IMG_BOOL bUseLock = IMG_TRUE;
PVRSRV_ERROR InitDEBUGMISCBridge(void);
PVRSRV_ERROR DeinitDEBUGMISCBridge(void);
/*
* Register all DEBUGMISC functions with services
*/
PVRSRV_ERROR InitDEBUGMISCBridge(void)
{
SetDispatchTableEntry(PVRSRV_BRIDGE_DEBUGMISC, PVRSRV_BRIDGE_DEBUGMISC_DEBUGMISCSLCSETBYPASSSTATE, PVRSRVBridgeDebugMiscSLCSetBypassState,
NULL, bUseLock);
SetDispatchTableEntry(PVRSRV_BRIDGE_DEBUGMISC, PVRSRV_BRIDGE_DEBUGMISC_RGXDEBUGMISCSETFWLOG, PVRSRVBridgeRGXDebugMiscSetFWLog,
NULL, bUseLock);
SetDispatchTableEntry(PVRSRV_BRIDGE_DEBUGMISC, PVRSRV_BRIDGE_DEBUGMISC_RGXDEBUGMISCDUMPFREELISTPAGELIST, PVRSRVBridgeRGXDebugMiscDumpFreelistPageList,
NULL, bUseLock);
SetDispatchTableEntry(PVRSRV_BRIDGE_DEBUGMISC, PVRSRV_BRIDGE_DEBUGMISC_PHYSMEMIMPORTSECBUF, PVRSRVBridgePhysmemImportSecBuf,
NULL, bUseLock);
SetDispatchTableEntry(PVRSRV_BRIDGE_DEBUGMISC, PVRSRV_BRIDGE_DEBUGMISC_RGXDEBUGMISCSETHCSDEADLINE, PVRSRVBridgeRGXDebugMiscSetHCSDeadline,
NULL, bUseLock);
SetDispatchTableEntry(PVRSRV_BRIDGE_DEBUGMISC, PVRSRV_BRIDGE_DEBUGMISC_RGXDEBUGMISCSETOSIDPRIORITY, PVRSRVBridgeRGXDebugMiscSetOSidPriority,
NULL, bUseLock);
SetDispatchTableEntry(PVRSRV_BRIDGE_DEBUGMISC, PVRSRV_BRIDGE_DEBUGMISC_RGXDEBUGMISCSETOSNEWONLINESTATE, PVRSRVBridgeRGXDebugMiscSetOSNewOnlineState,
NULL, bUseLock);
return PVRSRV_OK;
}
/*
* Unregister all debugmisc functions with services
*/
PVRSRV_ERROR DeinitDEBUGMISCBridge(void)
{
return PVRSRV_OK;
}

122
drivers/staging/imgtec/rogue/generated/devicememhistory_bridge/client_devicememhistory_bridge.h
View File

@ -1,122 +0,0 @@
/*************************************************************************/ /*!
@File
@Title Client bridge header for devicememhistory
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Exports the client bridge functions for devicememhistory
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#ifndef CLIENT_DEVICEMEMHISTORY_BRIDGE_H
#define CLIENT_DEVICEMEMHISTORY_BRIDGE_H
#include "img_defs.h"
#include "pvrsrv_error.h"
#if defined(PVR_INDIRECT_BRIDGE_CLIENTS)
#include "pvr_bridge_client.h"
#include "pvr_bridge.h"
#endif
#include "common_devicememhistory_bridge.h"
IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgeDevicememHistoryMap(IMG_HANDLE hBridge,
IMG_DEV_VIRTADDR sDevVAddr,
IMG_DEVMEM_SIZE_T uiSize,
const IMG_CHAR *puiText);
IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgeDevicememHistoryUnmap(IMG_HANDLE hBridge,
IMG_DEV_VIRTADDR sDevVAddr,
IMG_DEVMEM_SIZE_T uiSize,
const IMG_CHAR *puiText);
IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgeDevicememHistoryMapNew(IMG_HANDLE hBridge,
IMG_HANDLE hPMR,
IMG_DEVMEM_SIZE_T uiOffset,
IMG_DEV_VIRTADDR sDevVAddr,
IMG_DEVMEM_SIZE_T uiSize,
const IMG_CHAR *puiText,
IMG_UINT32 ui32Log2PageSize,
IMG_UINT32 ui32AllocationIndex,
IMG_UINT32 *pui32AllocationIndexOut);
IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgeDevicememHistoryUnmapNew(IMG_HANDLE hBridge,
IMG_HANDLE hPMR,
IMG_DEVMEM_SIZE_T uiOffset,
IMG_DEV_VIRTADDR sDevVAddr,
IMG_DEVMEM_SIZE_T uiSize,
const IMG_CHAR *puiText,
IMG_UINT32 ui32Log2PageSize,
IMG_UINT32 ui32AllocationIndex,
IMG_UINT32 *pui32AllocationIndexOut);
IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgeDevicememHistoryMapVRange(IMG_HANDLE hBridge,
IMG_DEV_VIRTADDR sBaseDevVAddr,
IMG_UINT32 ui32ui32StartPage,
IMG_UINT32 ui32NumPages,
IMG_DEVMEM_SIZE_T uiAllocSize,
const IMG_CHAR *puiText,
IMG_UINT32 ui32Log2PageSize,
IMG_UINT32 ui32AllocationIndex,
IMG_UINT32 *pui32AllocationIndexOut);
IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgeDevicememHistoryUnmapVRange(IMG_HANDLE hBridge,
IMG_DEV_VIRTADDR sBaseDevVAddr,
IMG_UINT32 ui32ui32StartPage,
IMG_UINT32 ui32NumPages,
IMG_DEVMEM_SIZE_T uiAllocSize,
const IMG_CHAR *puiText,
IMG_UINT32 ui32Log2PageSize,
IMG_UINT32 ui32AllocationIndex,
IMG_UINT32 *pui32AllocationIndexOut);
IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgeDevicememHistorySparseChange(IMG_HANDLE hBridge,
IMG_HANDLE hPMR,
IMG_DEVMEM_SIZE_T uiOffset,
IMG_DEV_VIRTADDR sDevVAddr,
IMG_DEVMEM_SIZE_T uiSize,
const IMG_CHAR *puiText,
IMG_UINT32 ui32Log2PageSize,
IMG_UINT32 ui32AllocPageCount,
IMG_UINT32 *pui32AllocPageIndices,
IMG_UINT32 ui32FreePageCount,
IMG_UINT32 *pui32FreePageIndices,
IMG_UINT32 ui32AllocationIndex,
IMG_UINT32 *pui32AllocationIndexOut);
#endif /* CLIENT_DEVICEMEMHISTORY_BRIDGE_H */

242
drivers/staging/imgtec/rogue/generated/devicememhistory_bridge/client_devicememhistory_direct_bridge.c
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@ -1,242 +0,0 @@
/*************************************************************************/ /*!
@Title Direct client bridge for devicememhistory
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#include "client_devicememhistory_bridge.h"
#include "img_defs.h"
#include "pvr_debug.h"
/* Module specific includes */
#include "img_types.h"
#include "mm_common.h"
#include "devicemem_history_server.h"
IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgeDevicememHistoryMap(IMG_HANDLE hBridge,
IMG_DEV_VIRTADDR sDevVAddr,
IMG_DEVMEM_SIZE_T uiSize,
const IMG_CHAR *puiText)
{
PVRSRV_ERROR eError;
PVR_UNREFERENCED_PARAMETER(hBridge);
eError =
DevicememHistoryMapKM(
sDevVAddr,
uiSize,
puiText);
return eError;
}
IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgeDevicememHistoryUnmap(IMG_HANDLE hBridge,
IMG_DEV_VIRTADDR sDevVAddr,
IMG_DEVMEM_SIZE_T uiSize,
const IMG_CHAR *puiText)
{
PVRSRV_ERROR eError;
PVR_UNREFERENCED_PARAMETER(hBridge);
eError =
DevicememHistoryUnmapKM(
sDevVAddr,
uiSize,
puiText);
return eError;
}
IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgeDevicememHistoryMapNew(IMG_HANDLE hBridge,
IMG_HANDLE hPMR,
IMG_DEVMEM_SIZE_T uiOffset,
IMG_DEV_VIRTADDR sDevVAddr,
IMG_DEVMEM_SIZE_T uiSize,
const IMG_CHAR *puiText,
IMG_UINT32 ui32Log2PageSize,
IMG_UINT32 ui32AllocationIndex,
IMG_UINT32 *pui32AllocationIndexOut)
{
PVRSRV_ERROR eError;
PMR * psPMRInt;
PVR_UNREFERENCED_PARAMETER(hBridge);
psPMRInt = (PMR *) hPMR;
eError =
DevicememHistoryMapNewKM(
psPMRInt,
uiOffset,
sDevVAddr,
uiSize,
puiText,
ui32Log2PageSize,
ui32AllocationIndex,
pui32AllocationIndexOut);
return eError;
}
IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgeDevicememHistoryUnmapNew(IMG_HANDLE hBridge,
IMG_HANDLE hPMR,
IMG_DEVMEM_SIZE_T uiOffset,
IMG_DEV_VIRTADDR sDevVAddr,
IMG_DEVMEM_SIZE_T uiSize,
const IMG_CHAR *puiText,
IMG_UINT32 ui32Log2PageSize,
IMG_UINT32 ui32AllocationIndex,
IMG_UINT32 *pui32AllocationIndexOut)
{
PVRSRV_ERROR eError;
PMR * psPMRInt;
PVR_UNREFERENCED_PARAMETER(hBridge);
psPMRInt = (PMR *) hPMR;
eError =
DevicememHistoryUnmapNewKM(
psPMRInt,
uiOffset,
sDevVAddr,
uiSize,
puiText,
ui32Log2PageSize,
ui32AllocationIndex,
pui32AllocationIndexOut);
return eError;
}
IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgeDevicememHistoryMapVRange(IMG_HANDLE hBridge,
IMG_DEV_VIRTADDR sBaseDevVAddr,
IMG_UINT32 ui32ui32StartPage,
IMG_UINT32 ui32NumPages,
IMG_DEVMEM_SIZE_T uiAllocSize,
const IMG_CHAR *puiText,
IMG_UINT32 ui32Log2PageSize,
IMG_UINT32 ui32AllocationIndex,
IMG_UINT32 *pui32AllocationIndexOut)
{
PVRSRV_ERROR eError;
PVR_UNREFERENCED_PARAMETER(hBridge);
eError =
DevicememHistoryMapVRangeKM(
sBaseDevVAddr,
ui32ui32StartPage,
ui32NumPages,
uiAllocSize,
puiText,
ui32Log2PageSize,
ui32AllocationIndex,
pui32AllocationIndexOut);
return eError;
}
IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgeDevicememHistoryUnmapVRange(IMG_HANDLE hBridge,
IMG_DEV_VIRTADDR sBaseDevVAddr,
IMG_UINT32 ui32ui32StartPage,
IMG_UINT32 ui32NumPages,
IMG_DEVMEM_SIZE_T uiAllocSize,
const IMG_CHAR *puiText,
IMG_UINT32 ui32Log2PageSize,
IMG_UINT32 ui32AllocationIndex,
IMG_UINT32 *pui32AllocationIndexOut)
{
PVRSRV_ERROR eError;
PVR_UNREFERENCED_PARAMETER(hBridge);
eError =
DevicememHistoryUnmapVRangeKM(
sBaseDevVAddr,
ui32ui32StartPage,
ui32NumPages,
uiAllocSize,
puiText,
ui32Log2PageSize,
ui32AllocationIndex,
pui32AllocationIndexOut);
return eError;
}
IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgeDevicememHistorySparseChange(IMG_HANDLE hBridge,
IMG_HANDLE hPMR,
IMG_DEVMEM_SIZE_T uiOffset,
IMG_DEV_VIRTADDR sDevVAddr,
IMG_DEVMEM_SIZE_T uiSize,
const IMG_CHAR *puiText,
IMG_UINT32 ui32Log2PageSize,
IMG_UINT32 ui32AllocPageCount,
IMG_UINT32 *pui32AllocPageIndices,
IMG_UINT32 ui32FreePageCount,
IMG_UINT32 *pui32FreePageIndices,
IMG_UINT32 ui32AllocationIndex,
IMG_UINT32 *pui32AllocationIndexOut)
{
PVRSRV_ERROR eError;
PMR * psPMRInt;
PVR_UNREFERENCED_PARAMETER(hBridge);
psPMRInt = (PMR *) hPMR;
eError =
DevicememHistorySparseChangeKM(
psPMRInt,
uiOffset,
sDevVAddr,
uiSize,
puiText,
ui32Log2PageSize,
ui32AllocPageCount,
pui32AllocPageIndices,
ui32FreePageCount,
pui32FreePageIndices,
ui32AllocationIndex,
pui32AllocationIndexOut);
return eError;
}

230
drivers/staging/imgtec/rogue/generated/devicememhistory_bridge/common_devicememhistory_bridge.h
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@ -1,230 +0,0 @@
/*************************************************************************/ /*!
@File
@Title Common bridge header for devicememhistory
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Declares common defines and structures used by both the client
and server side of the bridge for devicememhistory
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#ifndef COMMON_DEVICEMEMHISTORY_BRIDGE_H
#define COMMON_DEVICEMEMHISTORY_BRIDGE_H
#include <powervr/mem_types.h>
#include "img_types.h"
#include "pvrsrv_error.h"
#include "img_types.h"
#include "mm_common.h"
#define PVRSRV_BRIDGE_DEVICEMEMHISTORY_CMD_FIRST 0
#define PVRSRV_BRIDGE_DEVICEMEMHISTORY_DEVICEMEMHISTORYMAP PVRSRV_BRIDGE_DEVICEMEMHISTORY_CMD_FIRST+0
#define PVRSRV_BRIDGE_DEVICEMEMHISTORY_DEVICEMEMHISTORYUNMAP PVRSRV_BRIDGE_DEVICEMEMHISTORY_CMD_FIRST+1
#define PVRSRV_BRIDGE_DEVICEMEMHISTORY_DEVICEMEMHISTORYMAPNEW PVRSRV_BRIDGE_DEVICEMEMHISTORY_CMD_FIRST+2
#define PVRSRV_BRIDGE_DEVICEMEMHISTORY_DEVICEMEMHISTORYUNMAPNEW PVRSRV_BRIDGE_DEVICEMEMHISTORY_CMD_FIRST+3
#define PVRSRV_BRIDGE_DEVICEMEMHISTORY_DEVICEMEMHISTORYMAPVRANGE PVRSRV_BRIDGE_DEVICEMEMHISTORY_CMD_FIRST+4
#define PVRSRV_BRIDGE_DEVICEMEMHISTORY_DEVICEMEMHISTORYUNMAPVRANGE PVRSRV_BRIDGE_DEVICEMEMHISTORY_CMD_FIRST+5
#define PVRSRV_BRIDGE_DEVICEMEMHISTORY_DEVICEMEMHISTORYSPARSECHANGE PVRSRV_BRIDGE_DEVICEMEMHISTORY_CMD_FIRST+6
#define PVRSRV_BRIDGE_DEVICEMEMHISTORY_CMD_LAST (PVRSRV_BRIDGE_DEVICEMEMHISTORY_CMD_FIRST+6)
/*******************************************
DevicememHistoryMap
*******************************************/
/* Bridge in structure for DevicememHistoryMap */
typedef struct PVRSRV_BRIDGE_IN_DEVICEMEMHISTORYMAP_TAG
{
IMG_DEV_VIRTADDR sDevVAddr;
IMG_DEVMEM_SIZE_T uiSize;
const IMG_CHAR * puiText;
} __attribute__((packed)) PVRSRV_BRIDGE_IN_DEVICEMEMHISTORYMAP;
/* Bridge out structure for DevicememHistoryMap */
typedef struct PVRSRV_BRIDGE_OUT_DEVICEMEMHISTORYMAP_TAG
{
PVRSRV_ERROR eError;
} __attribute__((packed)) PVRSRV_BRIDGE_OUT_DEVICEMEMHISTORYMAP;
/*******************************************
DevicememHistoryUnmap
*******************************************/
/* Bridge in structure for DevicememHistoryUnmap */
typedef struct PVRSRV_BRIDGE_IN_DEVICEMEMHISTORYUNMAP_TAG
{
IMG_DEV_VIRTADDR sDevVAddr;
IMG_DEVMEM_SIZE_T uiSize;
const IMG_CHAR * puiText;
} __attribute__((packed)) PVRSRV_BRIDGE_IN_DEVICEMEMHISTORYUNMAP;
/* Bridge out structure for DevicememHistoryUnmap */
typedef struct PVRSRV_BRIDGE_OUT_DEVICEMEMHISTORYUNMAP_TAG
{
PVRSRV_ERROR eError;
} __attribute__((packed)) PVRSRV_BRIDGE_OUT_DEVICEMEMHISTORYUNMAP;
/*******************************************
DevicememHistoryMapNew
*******************************************/
/* Bridge in structure for DevicememHistoryMapNew */
typedef struct PVRSRV_BRIDGE_IN_DEVICEMEMHISTORYMAPNEW_TAG
{
IMG_HANDLE hPMR;
IMG_DEVMEM_SIZE_T uiOffset;
IMG_DEV_VIRTADDR sDevVAddr;
IMG_DEVMEM_SIZE_T uiSize;
const IMG_CHAR * puiText;
IMG_UINT32 ui32Log2PageSize;
IMG_UINT32 ui32AllocationIndex;
} __attribute__((packed)) PVRSRV_BRIDGE_IN_DEVICEMEMHISTORYMAPNEW;
/* Bridge out structure for DevicememHistoryMapNew */
typedef struct PVRSRV_BRIDGE_OUT_DEVICEMEMHISTORYMAPNEW_TAG
{
IMG_UINT32 ui32AllocationIndexOut;
PVRSRV_ERROR eError;
} __attribute__((packed)) PVRSRV_BRIDGE_OUT_DEVICEMEMHISTORYMAPNEW;
/*******************************************
DevicememHistoryUnmapNew
*******************************************/
/* Bridge in structure for DevicememHistoryUnmapNew */
typedef struct PVRSRV_BRIDGE_IN_DEVICEMEMHISTORYUNMAPNEW_TAG
{
IMG_HANDLE hPMR;
IMG_DEVMEM_SIZE_T uiOffset;
IMG_DEV_VIRTADDR sDevVAddr;
IMG_DEVMEM_SIZE_T uiSize;
const IMG_CHAR * puiText;
IMG_UINT32 ui32Log2PageSize;
IMG_UINT32 ui32AllocationIndex;
} __attribute__((packed)) PVRSRV_BRIDGE_IN_DEVICEMEMHISTORYUNMAPNEW;
/* Bridge out structure for DevicememHistoryUnmapNew */
typedef struct PVRSRV_BRIDGE_OUT_DEVICEMEMHISTORYUNMAPNEW_TAG
{
IMG_UINT32 ui32AllocationIndexOut;
PVRSRV_ERROR eError;
} __attribute__((packed)) PVRSRV_BRIDGE_OUT_DEVICEMEMHISTORYUNMAPNEW;
/*******************************************
DevicememHistoryMapVRange
*******************************************/
/* Bridge in structure for DevicememHistoryMapVRange */
typedef struct PVRSRV_BRIDGE_IN_DEVICEMEMHISTORYMAPVRANGE_TAG
{
IMG_DEV_VIRTADDR sBaseDevVAddr;
IMG_UINT32 ui32ui32StartPage;
IMG_UINT32 ui32NumPages;
IMG_DEVMEM_SIZE_T uiAllocSize;
const IMG_CHAR * puiText;
IMG_UINT32 ui32Log2PageSize;
IMG_UINT32 ui32AllocationIndex;
} __attribute__((packed)) PVRSRV_BRIDGE_IN_DEVICEMEMHISTORYMAPVRANGE;
/* Bridge out structure for DevicememHistoryMapVRange */
typedef struct PVRSRV_BRIDGE_OUT_DEVICEMEMHISTORYMAPVRANGE_TAG
{
IMG_UINT32 ui32AllocationIndexOut;
PVRSRV_ERROR eError;
} __attribute__((packed)) PVRSRV_BRIDGE_OUT_DEVICEMEMHISTORYMAPVRANGE;
/*******************************************
DevicememHistoryUnmapVRange
*******************************************/
/* Bridge in structure for DevicememHistoryUnmapVRange */
typedef struct PVRSRV_BRIDGE_IN_DEVICEMEMHISTORYUNMAPVRANGE_TAG
{
IMG_DEV_VIRTADDR sBaseDevVAddr;
IMG_UINT32 ui32ui32StartPage;
IMG_UINT32 ui32NumPages;
IMG_DEVMEM_SIZE_T uiAllocSize;
const IMG_CHAR * puiText;
IMG_UINT32 ui32Log2PageSize;
IMG_UINT32 ui32AllocationIndex;
} __attribute__((packed)) PVRSRV_BRIDGE_IN_DEVICEMEMHISTORYUNMAPVRANGE;
/* Bridge out structure for DevicememHistoryUnmapVRange */
typedef struct PVRSRV_BRIDGE_OUT_DEVICEMEMHISTORYUNMAPVRANGE_TAG
{
IMG_UINT32 ui32AllocationIndexOut;
PVRSRV_ERROR eError;
} __attribute__((packed)) PVRSRV_BRIDGE_OUT_DEVICEMEMHISTORYUNMAPVRANGE;
/*******************************************
DevicememHistorySparseChange
*******************************************/
/* Bridge in structure for DevicememHistorySparseChange */
typedef struct PVRSRV_BRIDGE_IN_DEVICEMEMHISTORYSPARSECHANGE_TAG
{
IMG_HANDLE hPMR;
IMG_DEVMEM_SIZE_T uiOffset;
IMG_DEV_VIRTADDR sDevVAddr;
IMG_DEVMEM_SIZE_T uiSize;
const IMG_CHAR * puiText;
IMG_UINT32 ui32Log2PageSize;
IMG_UINT32 ui32AllocPageCount;
IMG_UINT32 * pui32AllocPageIndices;
IMG_UINT32 ui32FreePageCount;
IMG_UINT32 * pui32FreePageIndices;
IMG_UINT32 ui32AllocationIndex;
} __attribute__((packed)) PVRSRV_BRIDGE_IN_DEVICEMEMHISTORYSPARSECHANGE;
/* Bridge out structure for DevicememHistorySparseChange */
typedef struct PVRSRV_BRIDGE_OUT_DEVICEMEMHISTORYSPARSECHANGE_TAG
{
IMG_UINT32 ui32AllocationIndexOut;
PVRSRV_ERROR eError;
} __attribute__((packed)) PVRSRV_BRIDGE_OUT_DEVICEMEMHISTORYSPARSECHANGE;
#endif /* COMMON_DEVICEMEMHISTORY_BRIDGE_H */

1003
drivers/staging/imgtec/rogue/generated/devicememhistory_bridge/server_devicememhistory_bridge.c
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File diff suppressed because it is too large Load Diff

127
drivers/staging/imgtec/rogue/generated/dmabuf_bridge/common_dmabuf_bridge.h
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@ -1,127 +0,0 @@
/*************************************************************************/ /*!
@File
@Title Common bridge header for dmabuf
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Declares common defines and structures used by both the client
and server side of the bridge for dmabuf
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#ifndef COMMON_DMABUF_BRIDGE_H
#define COMMON_DMABUF_BRIDGE_H
#include <powervr/mem_types.h>
#include "img_types.h"
#include "pvrsrv_error.h"
#include "pvrsrv_memallocflags.h"
#define PVRSRV_BRIDGE_DMABUF_CMD_FIRST 0
#define PVRSRV_BRIDGE_DMABUF_PHYSMEMIMPORTDMABUF PVRSRV_BRIDGE_DMABUF_CMD_FIRST+0
#define PVRSRV_BRIDGE_DMABUF_PHYSMEMEXPORTDMABUF PVRSRV_BRIDGE_DMABUF_CMD_FIRST+1
#define PVRSRV_BRIDGE_DMABUF_PHYSMEMIMPORTSPARSEDMABUF PVRSRV_BRIDGE_DMABUF_CMD_FIRST+2
#define PVRSRV_BRIDGE_DMABUF_CMD_LAST (PVRSRV_BRIDGE_DMABUF_CMD_FIRST+2)
/*******************************************
PhysmemImportDmaBuf
*******************************************/
/* Bridge in structure for PhysmemImportDmaBuf */
typedef struct PVRSRV_BRIDGE_IN_PHYSMEMIMPORTDMABUF_TAG
{
IMG_INT ifd;
PVRSRV_MEMALLOCFLAGS_T uiFlags;
} __attribute__((packed)) PVRSRV_BRIDGE_IN_PHYSMEMIMPORTDMABUF;
/* Bridge out structure for PhysmemImportDmaBuf */
typedef struct PVRSRV_BRIDGE_OUT_PHYSMEMIMPORTDMABUF_TAG
{
IMG_HANDLE hPMRPtr;
IMG_DEVMEM_SIZE_T uiSize;
IMG_DEVMEM_ALIGN_T sAlign;
PVRSRV_ERROR eError;
} __attribute__((packed)) PVRSRV_BRIDGE_OUT_PHYSMEMIMPORTDMABUF;
/*******************************************
PhysmemExportDmaBuf
*******************************************/
/* Bridge in structure for PhysmemExportDmaBuf */
typedef struct PVRSRV_BRIDGE_IN_PHYSMEMEXPORTDMABUF_TAG
{
IMG_HANDLE hPMR;
} __attribute__((packed)) PVRSRV_BRIDGE_IN_PHYSMEMEXPORTDMABUF;
/* Bridge out structure for PhysmemExportDmaBuf */
typedef struct PVRSRV_BRIDGE_OUT_PHYSMEMEXPORTDMABUF_TAG
{
IMG_INT iFd;
PVRSRV_ERROR eError;
} __attribute__((packed)) PVRSRV_BRIDGE_OUT_PHYSMEMEXPORTDMABUF;
/*******************************************
PhysmemImportSparseDmaBuf
*******************************************/
/* Bridge in structure for PhysmemImportSparseDmaBuf */
typedef struct PVRSRV_BRIDGE_IN_PHYSMEMIMPORTSPARSEDMABUF_TAG
{
IMG_INT ifd;
PVRSRV_MEMALLOCFLAGS_T uiFlags;
IMG_DEVMEM_SIZE_T uiChunkSize;
IMG_UINT32 ui32NumPhysChunks;
IMG_UINT32 ui32NumVirtChunks;
IMG_UINT32 * pui32MappingTable;
} __attribute__((packed)) PVRSRV_BRIDGE_IN_PHYSMEMIMPORTSPARSEDMABUF;
/* Bridge out structure for PhysmemImportSparseDmaBuf */
typedef struct PVRSRV_BRIDGE_OUT_PHYSMEMIMPORTSPARSEDMABUF_TAG
{
IMG_HANDLE hPMRPtr;
IMG_DEVMEM_SIZE_T uiSize;
IMG_DEVMEM_ALIGN_T sAlign;
PVRSRV_ERROR eError;
} __attribute__((packed)) PVRSRV_BRIDGE_OUT_PHYSMEMIMPORTSPARSEDMABUF;
#endif /* COMMON_DMABUF_BRIDGE_H */

392
drivers/staging/imgtec/rogue/generated/dmabuf_bridge/server_dmabuf_bridge.c
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@ -1,392 +0,0 @@
/*************************************************************************/ /*!
@File
@Title Server bridge for dmabuf
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Implements the server side of the bridge for dmabuf
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#include <stddef.h>
#include <linux/uaccess.h>
#include "osfunc.h"
#include "img_defs.h"
#include "physmem_dmabuf.h"
#include "pmr.h"
#include "common_dmabuf_bridge.h"
#include "allocmem.h"
#include "pvr_debug.h"
#include "connection_server.h"
#include "pvr_bridge.h"
#include "rgx_bridge.h"
#include "srvcore.h"
#include "handle.h"
#include <linux/slab.h>
/* ***************************************************************************
* Server-side bridge entry points
*/
static IMG_INT
PVRSRVBridgePhysmemImportDmaBuf(IMG_UINT32 ui32DispatchTableEntry,
PVRSRV_BRIDGE_IN_PHYSMEMIMPORTDMABUF *psPhysmemImportDmaBufIN,
PVRSRV_BRIDGE_OUT_PHYSMEMIMPORTDMABUF *psPhysmemImportDmaBufOUT,
CONNECTION_DATA *psConnection)
{
PMR * psPMRPtrInt = NULL;
psPhysmemImportDmaBufOUT->eError =
PhysmemImportDmaBuf(psConnection, OSGetDevData(psConnection),
psPhysmemImportDmaBufIN->ifd,
psPhysmemImportDmaBufIN->uiFlags,
&psPMRPtrInt,
&psPhysmemImportDmaBufOUT->uiSize,
&psPhysmemImportDmaBufOUT->sAlign);
/* Exit early if bridged call fails */
if(psPhysmemImportDmaBufOUT->eError != PVRSRV_OK)
{
goto PhysmemImportDmaBuf_exit;
}
/* Lock over handle creation. */
LockHandle();
psPhysmemImportDmaBufOUT->eError = PVRSRVAllocHandleUnlocked(psConnection->psHandleBase,
&psPhysmemImportDmaBufOUT->hPMRPtr,
(void *) psPMRPtrInt,
PVRSRV_HANDLE_TYPE_PHYSMEM_PMR,
PVRSRV_HANDLE_ALLOC_FLAG_MULTI
,(PFN_HANDLE_RELEASE)&PMRUnrefPMR);
if (psPhysmemImportDmaBufOUT->eError != PVRSRV_OK)
{
UnlockHandle();
goto PhysmemImportDmaBuf_exit;
}
/* Release now we have created handles. */
UnlockHandle();
PhysmemImportDmaBuf_exit:
if (psPhysmemImportDmaBufOUT->eError != PVRSRV_OK)
{
if (psPMRPtrInt)
{
PMRUnrefPMR(psPMRPtrInt);
}
}
return 0;
}
static IMG_INT
PVRSRVBridgePhysmemExportDmaBuf(IMG_UINT32 ui32DispatchTableEntry,
PVRSRV_BRIDGE_IN_PHYSMEMEXPORTDMABUF *psPhysmemExportDmaBufIN,
PVRSRV_BRIDGE_OUT_PHYSMEMEXPORTDMABUF *psPhysmemExportDmaBufOUT,
CONNECTION_DATA *psConnection)
{
IMG_HANDLE hPMR = psPhysmemExportDmaBufIN->hPMR;
PMR * psPMRInt = NULL;
/* Lock over handle lookup. */
LockHandle();
{
/* Look up the address from the handle */
psPhysmemExportDmaBufOUT->eError =
PVRSRVLookupHandleUnlocked(psConnection->psHandleBase,
(void **) &psPMRInt,
hPMR,
PVRSRV_HANDLE_TYPE_PHYSMEM_PMR,
IMG_TRUE);
if(psPhysmemExportDmaBufOUT->eError != PVRSRV_OK)
{
UnlockHandle();
goto PhysmemExportDmaBuf_exit;
}
}
/* Release now we have looked up handles. */
UnlockHandle();
psPhysmemExportDmaBufOUT->eError =
PhysmemExportDmaBuf(psConnection, OSGetDevData(psConnection),
psPMRInt,
&psPhysmemExportDmaBufOUT->iFd);
PhysmemExportDmaBuf_exit:
/* Lock over handle lookup cleanup. */
LockHandle();
{
/* Unreference the previously looked up handle */
if(psPMRInt)
{
PVRSRVReleaseHandleUnlocked(psConnection->psHandleBase,
hPMR,
PVRSRV_HANDLE_TYPE_PHYSMEM_PMR);
}
}
/* Release now we have cleaned up look up handles. */
UnlockHandle();
return 0;
}
static IMG_INT
PVRSRVBridgePhysmemImportSparseDmaBuf(IMG_UINT32 ui32DispatchTableEntry,
PVRSRV_BRIDGE_IN_PHYSMEMIMPORTSPARSEDMABUF *psPhysmemImportSparseDmaBufIN,
PVRSRV_BRIDGE_OUT_PHYSMEMIMPORTSPARSEDMABUF *psPhysmemImportSparseDmaBufOUT,
CONNECTION_DATA *psConnection)
{
IMG_UINT32 *ui32MappingTableInt = NULL;
PMR * psPMRPtrInt = NULL;
IMG_UINT32 ui32NextOffset = 0;
IMG_BYTE *pArrayArgsBuffer = NULL;
#if !defined(INTEGRITY_OS)
IMG_BOOL bHaveEnoughSpace = IMG_FALSE;
#endif
IMG_UINT32 ui32BufferSize =
(psPhysmemImportSparseDmaBufIN->ui32NumPhysChunks * sizeof(IMG_UINT32)) +
0;
if (ui32BufferSize != 0)
{
#if !defined(INTEGRITY_OS)
/* Try to use remainder of input buffer for copies if possible, word-aligned for safety. */
IMG_UINT32 ui32InBufferOffset = PVR_ALIGN(sizeof(*psPhysmemImportSparseDmaBufIN), sizeof(unsigned long));
IMG_UINT32 ui32InBufferExcessSize = ui32InBufferOffset >= PVRSRV_MAX_BRIDGE_IN_SIZE ? 0 :
PVRSRV_MAX_BRIDGE_IN_SIZE - ui32InBufferOffset;
bHaveEnoughSpace = ui32BufferSize <= ui32InBufferExcessSize;
if (bHaveEnoughSpace)
{
IMG_BYTE *pInputBuffer = (IMG_BYTE *)psPhysmemImportSparseDmaBufIN;
pArrayArgsBuffer = &pInputBuffer[ui32InBufferOffset]; }
else
#endif
{
pArrayArgsBuffer = OSAllocMemNoStats(ui32BufferSize);
if(!pArrayArgsBuffer)
{
psPhysmemImportSparseDmaBufOUT->eError = PVRSRV_ERROR_OUT_OF_MEMORY;
goto PhysmemImportSparseDmaBuf_exit;
}
}
}
if (psPhysmemImportSparseDmaBufIN->ui32NumPhysChunks != 0)
{
ui32MappingTableInt = (IMG_UINT32*)(((IMG_UINT8 *)pArrayArgsBuffer) + ui32NextOffset);
ui32NextOffset += psPhysmemImportSparseDmaBufIN->ui32NumPhysChunks * sizeof(IMG_UINT32);
}
/* Copy the data over */
if (psPhysmemImportSparseDmaBufIN->ui32NumPhysChunks * sizeof(IMG_UINT32) > 0)
{
if ( OSCopyFromUser(NULL, ui32MappingTableInt, psPhysmemImportSparseDmaBufIN->pui32MappingTable, psPhysmemImportSparseDmaBufIN->ui32NumPhysChunks * sizeof(IMG_UINT32)) != PVRSRV_OK )
{
psPhysmemImportSparseDmaBufOUT->eError = PVRSRV_ERROR_INVALID_PARAMS;
goto PhysmemImportSparseDmaBuf_exit;
}
}
psPhysmemImportSparseDmaBufOUT->eError =
PhysmemImportSparseDmaBuf(psConnection, OSGetDevData(psConnection),
psPhysmemImportSparseDmaBufIN->ifd,
psPhysmemImportSparseDmaBufIN->uiFlags,
psPhysmemImportSparseDmaBufIN->uiChunkSize,
psPhysmemImportSparseDmaBufIN->ui32NumPhysChunks,
psPhysmemImportSparseDmaBufIN->ui32NumVirtChunks,
ui32MappingTableInt,
&psPMRPtrInt,
&psPhysmemImportSparseDmaBufOUT->uiSize,
&psPhysmemImportSparseDmaBufOUT->sAlign);
/* Exit early if bridged call fails */
if(psPhysmemImportSparseDmaBufOUT->eError != PVRSRV_OK)
{
goto PhysmemImportSparseDmaBuf_exit;
}
/* Lock over handle creation. */
LockHandle();
psPhysmemImportSparseDmaBufOUT->eError = PVRSRVAllocHandleUnlocked(psConnection->psHandleBase,
&psPhysmemImportSparseDmaBufOUT->hPMRPtr,
(void *) psPMRPtrInt,
PVRSRV_HANDLE_TYPE_PHYSMEM_PMR,
PVRSRV_HANDLE_ALLOC_FLAG_MULTI
,(PFN_HANDLE_RELEASE)&PMRUnrefPMR);
if (psPhysmemImportSparseDmaBufOUT->eError != PVRSRV_OK)
{
UnlockHandle();
goto PhysmemImportSparseDmaBuf_exit;
}
/* Release now we have created handles. */
UnlockHandle();
PhysmemImportSparseDmaBuf_exit:
if (psPhysmemImportSparseDmaBufOUT->eError != PVRSRV_OK)
{
if (psPMRPtrInt)
{
PMRUnrefPMR(psPMRPtrInt);
}
}
/* Allocated space should be equal to the last updated offset */
PVR_ASSERT(ui32BufferSize == ui32NextOffset);
#if defined(INTEGRITY_OS)
if(pArrayArgsBuffer)
#else
if(!bHaveEnoughSpace && pArrayArgsBuffer)
#endif
OSFreeMemNoStats(pArrayArgsBuffer);
return 0;
}
/* ***************************************************************************
* Server bridge dispatch related glue
*/
static IMG_BOOL bUseLock = IMG_TRUE;
PVRSRV_ERROR InitDMABUFBridge(void);
PVRSRV_ERROR DeinitDMABUFBridge(void);
/*
* Register all DMABUF functions with services
*/
PVRSRV_ERROR InitDMABUFBridge(void)
{
SetDispatchTableEntry(PVRSRV_BRIDGE_DMABUF, PVRSRV_BRIDGE_DMABUF_PHYSMEMIMPORTDMABUF, PVRSRVBridgePhysmemImportDmaBuf,
NULL, bUseLock);
SetDispatchTableEntry(PVRSRV_BRIDGE_DMABUF, PVRSRV_BRIDGE_DMABUF_PHYSMEMEXPORTDMABUF, PVRSRVBridgePhysmemExportDmaBuf,
NULL, bUseLock);
SetDispatchTableEntry(PVRSRV_BRIDGE_DMABUF, PVRSRV_BRIDGE_DMABUF_PHYSMEMIMPORTSPARSEDMABUF, PVRSRVBridgePhysmemImportSparseDmaBuf,
NULL, bUseLock);
return PVRSRV_OK;
}
/*
* Unregister all dmabuf functions with services
*/
PVRSRV_ERROR DeinitDMABUFBridge(void)
{
return PVRSRV_OK;
}

78
drivers/staging/imgtec/rogue/generated/htbuffer_bridge/client_htbuffer_bridge.h
View File

@ -1,78 +0,0 @@
/*************************************************************************/ /*!
@File
@Title Client bridge header for htbuffer
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@Description Exports the client bridge functions for htbuffer
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#ifndef CLIENT_HTBUFFER_BRIDGE_H
#define CLIENT_HTBUFFER_BRIDGE_H
#include "img_defs.h"
#include "pvrsrv_error.h"
#if defined(PVR_INDIRECT_BRIDGE_CLIENTS)
#include "pvr_bridge_client.h"
#include "pvr_bridge.h"
#endif
#include "common_htbuffer_bridge.h"
IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgeHTBConfigure(IMG_HANDLE hBridge,
IMG_UINT32 ui32NameSize,
const IMG_CHAR *puiName,
IMG_UINT32 ui32BufferSize);
IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgeHTBControl(IMG_HANDLE hBridge,
IMG_UINT32 ui32NumGroups,
IMG_UINT32 *pui32GroupEnable,
IMG_UINT32 ui32LogLevel,
IMG_UINT32 ui32EnablePID,
IMG_UINT32 ui32LogMode,
IMG_UINT32 ui32OpMode);
IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgeHTBLog(IMG_HANDLE hBridge,
IMG_UINT32 ui32PID,
IMG_UINT32 ui32TimeStamp,
IMG_UINT32 ui32SF,
IMG_UINT32 ui32NumArgs,
IMG_UINT32 *pui32Args);
#endif /* CLIENT_HTBUFFER_BRIDGE_H */

115
drivers/staging/imgtec/rogue/generated/htbuffer_bridge/client_htbuffer_direct_bridge.c
View File

@ -1,115 +0,0 @@
/*************************************************************************/ /*!
@Title Direct client bridge for htbuffer
@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
@License Dual MIT/GPLv2
The contents of this file are subject to the MIT license as set out below.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
Alternatively, the contents of this file may be used under the terms of
the GNU General Public License Version 2 ("GPL") in which case the provisions
of GPL are applicable instead of those above.
If you wish to allow use of your version of this file only under the terms of
GPL, and not to allow others to use your version of this file under the terms
of the MIT license, indicate your decision by deleting the provisions above
and replace them with the notice and other provisions required by GPL as set
out in the file called "GPL-COPYING" included in this distribution. If you do
not delete the provisions above, a recipient may use your version of this file
under the terms of either the MIT license or GPL.
This License is also included in this distribution in the file called
"MIT-COPYING".
EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/ /**************************************************************************/
#include "client_htbuffer_bridge.h"
#include "img_defs.h"
#include "pvr_debug.h"
/* Module specific includes */
#include "devicemem_typedefs.h"
#include "htbserver.h"
IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgeHTBConfigure(IMG_HANDLE hBridge,
IMG_UINT32 ui32NameSize,
const IMG_CHAR *puiName,
IMG_UINT32 ui32BufferSize)
{
PVRSRV_ERROR eError;
PVR_UNREFERENCED_PARAMETER(hBridge);
eError =
HTBConfigureKM(
ui32NameSize,
puiName,
ui32BufferSize);
return eError;
}
IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgeHTBControl(IMG_HANDLE hBridge,
IMG_UINT32 ui32NumGroups,
IMG_UINT32 *pui32GroupEnable,
IMG_UINT32 ui32LogLevel,
IMG_UINT32 ui32EnablePID,
IMG_UINT32 ui32LogMode,
IMG_UINT32 ui32OpMode)
{
PVRSRV_ERROR eError;
PVR_UNREFERENCED_PARAMETER(hBridge);
eError =
HTBControlKM(
ui32NumGroups,
pui32GroupEnable,
ui32LogLevel,
ui32EnablePID,
ui32LogMode,
ui32OpMode);
return eError;
}
IMG_INTERNAL PVRSRV_ERROR IMG_CALLCONV BridgeHTBLog(IMG_HANDLE hBridge,
IMG_UINT32 ui32PID,
IMG_UINT32 ui32TimeStamp,
IMG_UINT32 ui32SF,
IMG_UINT32 ui32NumArgs,
IMG_UINT32 *pui32Args)
{
PVRSRV_ERROR eError;
PVR_UNREFERENCED_PARAMETER(hBridge);
eError =
HTBLogKM(
ui32PID,
ui32TimeStamp,
ui32SF,
ui32NumArgs,
pui32Args);
return eError;
}

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