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accel/ivpu: Convert hw_ip_gen/btrs_gen to enum types
Change the hw_ip_gen and btrs_gen members of struct ivpu_device, and their accessors, from u32/int to enum vpu_hw_ip/enum vpu_hw_btrs, and drop the default: labels from the switch statements in ivpu_hw_ip.c that dispatch on them. Switching on the real enum types lets the compiler treat these switches as exhaustive at compile time, so a missing case for a new generation now warns instead of silently hitting default:. This compile-time guarantee holds because ivpu_ip_gen_init() now fails probe on an unrecognized PCI device ID instead of leaving these fields at 0, so the switches never see an unhandled value. Signed-off-by: Dawid Osuchowski <dawid.osuchowski@linux.intel.com> Reviewed-by: Karol Wachowski <karol.wachowski@linux.intel.com> Reviewed-by: Andrzej Kacprowski <andrzej.kacprowski@linux.intel.com> Reviewed-by: Jeff Hugo <jeff.hugo@oss.qualcomm.com> Signed-off-by: Karol Wachowski <karol.wachowski@linux.intel.com> Link: https://patch.msgid.link/20261001110401.2866557-3-dawid.osuchowski@linux.intel.com
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@ -31,17 +31,9 @@
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#define PCI_DEVICE_ID_WCL 0xfd3e
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#define PCI_DEVICE_ID_NVL 0xd71d
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#define IVPU_HW_IP_37XX 37
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#define IVPU_HW_IP_40XX 40
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#define IVPU_HW_IP_50XX 50
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#define IVPU_HW_IP_60XX 60
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#define IVPU_HW_IP_REV_LNL_B0 4
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#define IVPU_HW_IP_REV_NVL_A0 0
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#define IVPU_HW_BTRS_MTL 1
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#define IVPU_HW_BTRS_LNL 2
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#define IVPU_GLOBAL_CONTEXT_MMU_SSID 0
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/* SSID 1 is used by the VPU to represent reserved context */
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#define IVPU_RESERVED_CONTEXT_MMU_SSID 1
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@ -107,6 +99,18 @@
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ivpu_dbg(vdev, MISC, "Using WA: " #wa_name "\n"); \
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} while (0)
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enum vpu_hw_ip {
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IVPU_HW_IP_37XX = 37,
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IVPU_HW_IP_40XX = 40,
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IVPU_HW_IP_50XX = 50,
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IVPU_HW_IP_60XX = 60,
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};
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enum vpu_hw_btrs {
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IVPU_HW_BTRS_MTL = 1,
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IVPU_HW_BTRS_LNL = 2,
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};
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struct ivpu_wa_table {
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bool punit_disabled;
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bool clear_runtime_mem;
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@ -136,8 +140,8 @@ struct ivpu_device {
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struct drm_device drm;
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void __iomem *regb;
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void __iomem *regv;
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u32 hw_ip_gen;
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u32 btrs_gen;
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enum vpu_hw_ip hw_ip_gen;
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enum vpu_hw_btrs btrs_gen;
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u32 platform;
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u32 irq;
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@ -259,12 +263,12 @@ static inline u16 ivpu_device_id(struct ivpu_device *vdev)
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return to_pci_dev(vdev->drm.dev)->device;
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}
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static inline int ivpu_hw_ip_gen(struct ivpu_device *vdev)
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static inline enum vpu_hw_ip ivpu_hw_ip_gen(struct ivpu_device *vdev)
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{
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return vdev->hw_ip_gen;
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}
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static inline int ivpu_hw_btrs_gen(struct ivpu_device *vdev)
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static inline enum vpu_hw_btrs ivpu_hw_btrs_gen(struct ivpu_device *vdev)
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{
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return vdev->btrs_gen;
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}
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@ -688,7 +688,7 @@ static void pwr_island_delay_set(struct ivpu_device *vdev)
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post2 = 0;
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status = high ? 46 : 3;
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break;
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default:
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case IVPU_HW_IP_60XX:
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post = high ? 198 : 17;
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post1 = 0;
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post2 = high ? 198 : 17;
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@ -801,10 +801,15 @@ static void ivpu_hw_ip_tbu_mmu_enable_40xx(struct ivpu_device *vdev)
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void ivpu_hw_ip_tbu_mmu_enable(struct ivpu_device *vdev)
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{
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if (ivpu_hw_ip_gen(vdev) == IVPU_HW_IP_37XX)
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switch (ivpu_hw_ip_gen(vdev)) {
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case IVPU_HW_IP_37XX:
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return ivpu_hw_ip_tbu_mmu_enable_37xx(vdev);
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else
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case IVPU_HW_IP_40XX:
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case IVPU_HW_IP_50XX:
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case IVPU_HW_IP_60XX:
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return ivpu_hw_ip_tbu_mmu_enable_40xx(vdev);
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}
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}
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static inline u64 get_entry_point_addr(struct ivpu_device *vdev)
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@ -940,8 +945,9 @@ int ivpu_hw_ip_soc_cpu_boot(struct ivpu_device *vdev)
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ret = soc_cpu_boot_40xx(vdev);
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break;
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default:
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case IVPU_HW_IP_60XX:
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ret = soc_cpu_boot_60xx(vdev);
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break;
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}
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if (ret)
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