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arm64: dts: qcom: sm8550: move dp0 data-lanes to SoC dtsi

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The connection between the QMP Combo PHY and the DisplayPort
controller is fixed in SoC, so move the data-lanes property
in the SoC dtsi.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250822-topic-x1e80100-4lanes-v3-4-5363acad9e32@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Neil Armstrong 2025-08-22 17:56:52 +02:00 committed by Bjorn Andersson
parent 7b8849178e
commit bdd235f2df
4 changed files with 1 additions and 12 deletions
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4
arch/arm64/boot/dts/qcom/sm8550-hdk.dts
View File

@ -1002,10 +1002,6 @@ &mdss_dp0 {
status = "okay";
};
&mdss_dp0_out {
data-lanes = <0 1>;
};
&pcie0 {
wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;

4
arch/arm64/boot/dts/qcom/sm8550-mtp.dts
View File

@ -738,10 +738,6 @@ &mdss_dp0 {
status = "okay";
};
&mdss_dp0_out {
data-lanes = <0 1>;
};
&pcie0 {
wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;

4
arch/arm64/boot/dts/qcom/sm8550-qrd.dts
View File

@ -857,10 +857,6 @@ &mdss_dp0 {
status = "okay";
};
&mdss_dp0_out {
data-lanes = <0 1>;
};
&pcie0 {
wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;

1
arch/arm64/boot/dts/qcom/sm8550.dtsi
View File

@ -3795,6 +3795,7 @@ mdss_dp0_in: endpoint {
port@1 {
reg = <1>;
mdss_dp0_out: endpoint {
data-lanes = <0 1>;
remote-endpoint = <&usb_dp_qmpphy_dp_in>;
};
};