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arm64: dts: ti: k3-j7200-evm*: Add bootph-* properties
Adds bootph-* properties to the leaf nodes to enable bootloaders to utilise them. Following adds bootph-* to: - pmic regulator for enabling AVS Support - main_uart0, mcu_uart0(DM), wkup_uart0(TIFS) for Traces - mmc0, mmc1, usb0, ospi0, hbmc for enabling various bootmodes. Reviewed-by: Aniket Limaye <a-limaye@ti.com> Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Link: https://lore.kernel.org/r/20241024-b4-upstream-bootph-all-v6-12-2af90e3a4fe7@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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@ -129,6 +129,7 @@ J721E_WKUP_IOPAD(0x94, PIN_OUTPUT, 0) /* (E21) MCU_UART0_RTSn */
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J721E_WKUP_IOPAD(0x8c, PIN_INPUT, 0) /* (D20) MCU_UART0_RXD */
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J721E_WKUP_IOPAD(0x88, PIN_OUTPUT, 0) /* (D19) MCU_UART0_TXD */
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>;
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bootph-all;
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};
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wkup_uart0_pins_default: wkup-uart0-default-pins {
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@ -136,6 +137,7 @@ wkup_uart0_pins_default: wkup-uart0-default-pins {
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J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (B14) WKUP_UART0_RXD */
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J721E_WKUP_IOPAD(0x4c, PIN_OUTPUT, 0) /* (A14) WKUP_UART0_TXD */
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>;
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bootph-all;
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};
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mcu_cpsw_pins_default: mcu-cpsw-default-pins {
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@ -204,6 +206,7 @@ J721E_IOPAD(0xb4, PIN_OUTPUT, 0) /* (T17) UART0_TXD */
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J721E_IOPAD(0xc0, PIN_INPUT, 2) /* (W3) SPI0_CS0.UART0_CTSn */
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J721E_IOPAD(0xc4, PIN_OUTPUT, 2) /* (U5) SPI0_CS1.UART0_RTSn */
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>;
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bootph-all;
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};
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main_uart1_pins_default: main-uart1-default-pins {
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@ -238,6 +241,7 @@ J721E_IOPAD(0xf0, PIN_INPUT, 0) /* (N20) MMC1_DAT2 */
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J721E_IOPAD(0xec, PIN_INPUT, 0) /* (N19) MMC1_DAT3 */
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J721E_IOPAD(0xe4, PIN_INPUT, 8) /* (V1) TIMER_IO0.MMC1_SDCD */
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>;
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bootph-all;
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};
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vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
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@ -259,6 +263,7 @@ main_usbss0_pins_default: main-usbss0-default-pins {
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pinctrl-single,pins = <
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J721E_IOPAD(0x04, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */
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>;
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bootph-all;
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};
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};
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@ -267,12 +272,14 @@ &wkup_uart0 {
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status = "reserved";
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pinctrl-names = "default";
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pinctrl-0 = <&wkup_uart0_pins_default>;
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bootph-all;
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};
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&mcu_uart0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&mcu_uart0_pins_default>;
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bootph-all;
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};
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&main_uart0 {
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@ -281,6 +288,7 @@ &main_uart0 {
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power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
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pinctrl-names = "default";
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pinctrl-0 = <&main_uart0_pins_default>;
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bootph-all;
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};
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&main_uart1 {
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@ -379,6 +387,7 @@ &main_sdhci0 {
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/* eMMC */
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status = "okay";
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non-removable;
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bootph-all;
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ti,driver-strength-ohm = <50>;
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disable-wp;
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};
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@ -390,6 +399,7 @@ &main_sdhci1 {
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pinctrl-names = "default";
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vmmc-supply = <&vdd_mmc1>;
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vqmmc-supply = <&vdd_sd_dv>;
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bootph-all;
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ti,driver-strength-ohm = <50>;
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disable-wp;
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};
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@ -401,11 +411,13 @@ &serdes_ln_ctrl {
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&usb_serdes_mux {
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idle-states = <1>; /* USB0 to SERDES lane 3 */
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bootph-all;
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};
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&usbss0 {
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pinctrl-names = "default";
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pinctrl-0 = <&main_usbss0_pins_default>;
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bootph-all;
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ti,vbus-divider;
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ti,usb2-only;
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};
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@ -413,6 +425,7 @@ &usbss0 {
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&usb0 {
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dr_mode = "otg";
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maximum-speed = "high-speed";
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bootph-all;
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};
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&tscadc0 {
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@ -121,6 +121,7 @@ J721E_WKUP_IOPAD(0x20, PIN_INPUT, 1) /* (B8) MCU_OSPI0_D5.MCU_HYPERBUS0_DQ5 */
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J721E_WKUP_IOPAD(0x24, PIN_INPUT, 1) /* (A8) MCU_OSPI0_D6.MCU_HYPERBUS0_DQ6 */
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J721E_WKUP_IOPAD(0x28, PIN_INPUT, 1) /* (A7) MCU_OSPI0_D7.MCU_HYPERBUS0_DQ7 */
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>;
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bootph-all;
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};
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mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
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@ -137,6 +138,7 @@ J721E_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* MCU_OSPI0_D6 */
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J721E_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* MCU_OSPI0_D7 */
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J721E_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* MCU_OSPI0_DQS */
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>;
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bootph-all;
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};
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};
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@ -146,6 +148,7 @@ wkup_i2c0_pins_default: wkup-i2c0-default-pins {
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J721E_WKUP_IOPAD(0x98, PIN_INPUT_PULLUP, 0) /* (F20) WKUP_I2C0_SCL */
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J721E_WKUP_IOPAD(0x9c, PIN_INPUT_PULLUP, 0) /* (H21) WKUP_I2C0_SDA */
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>;
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bootph-all;
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};
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};
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@ -186,6 +189,7 @@ &hbmc {
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flash@0,0 {
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compatible = "cypress,hyperflash", "cfi-flash";
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reg = <0x00 0x00 0x4000000>;
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bootph-all;
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partitions {
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compatible = "fixed-partitions";
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@ -347,6 +351,7 @@ bucka1: buck1 {
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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bootph-all;
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};
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bucka2: buck2 {
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@ -520,6 +525,7 @@ partition@800000 {
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partition@3fc0000 {
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label = "ospi.phypattern";
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reg = <0x3fc0000 0x40000>;
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bootph-all;
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};
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};
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};
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