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- Add infrastructure to be able to debug the microcode loader in a guest
- Refresh Intel old microcode revisions -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEzv7L6UO9uDPlPSfHEsHwGGHeVUoFAmjWZagACgkQEsHwGGHe VUp6IRAAo2g06L8UduzPiUcD46ZV218Z3O8ydrrm4FlJBvq/sm0SBx0u6MES9I84 RrXSKfPbR8ds/ony44dX/o6/ztckAnTw6Mh7/Np43syjsF+9aRNcdeQ0CevD5f1a JdTdfcEtL1FikFPo250GfUTE8HsuqYxkRIW6VYnHaA3FO7SFJ2StyewKYfS7IYfg JN5JM4It9JEQZ0vwZM9GJjvycypDXLFJ0rYoY0Zqkumlx0w8Q1mzafbPuL3129L9 7RO5uJ5aEZPAzVgnpzG5gd/T+xMovfZwkpw7wYDmB+ftML7C4Hvq4BRkT6As9OAD j39RfPyXJsMmF5TEUBrwQ8vGNVrwvALl+dLZZMb4CEz9OryeYNJHP0GzFZnivYvi i0pPUzUNHe7Ex8a4m7XZjDRYSl+RSm13EowuM5uMViRwzTbmT+Rya0EsoybsNXOo vQnXRS74cwr5DVI+A6hnE9r0hR0c+TaHbDAAKJQkja6WXFi7Gr18VZyOASrl0w29 bQ6SDtY9UeV1oNVcnGNRo1DREoWURGbG54M7YIOqhbQNIE4ezgxfrXijGSHYIHED sotvcAeb8NPIqjbPsjZ5kD3aNzl3PkW13d2zjikxht0wCyKui390qUcm3qCAmBug s25imHvGLu4sXWqztoNLeq3o4dp9CtKXaHgni9WlQyBHIpIhH54= =mxlm -----END PGP SIGNATURE----- Merge tag 'x86_microcode_for_v6.18_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 microcode loading updates from Borislav Petkov: - Add infrastructure to be able to debug the microcode loader in a guest - Refresh Intel old microcode revisions * tag 'x86_microcode_for_v6.18_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/microcode: Add microcode loader debugging functionality x86/microcode: Add microcode= cmdline parsing x86/microcode/intel: Refresh the revisions that determine old_microcode
This commit is contained in:
Linus Torvalds
commit
bd91417a96
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@ -3767,8 +3767,16 @@
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mga= [HW,DRM]
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microcode.force_minrev= [X86]
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Format: <bool>
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microcode= [X86] Control the behavior of the microcode loader.
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Available options, comma separated:
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base_rev=X - with <X> with format: <u32>
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Set the base microcode revision of each thread when in
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debug mode.
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dis_ucode_ldr: disable the microcode loader
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force_minrev:
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Enable or disable the microcode minimal revision
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enforcement for the runtime microcode loader.
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@ -1321,7 +1321,7 @@ config MICROCODE_LATE_LOADING
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use this at your own risk. Late loading taints the kernel unless the
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microcode header indicates that it is safe for late loading via the
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minimal revision check. This minimal revision check can be enforced on
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the kernel command line with "microcode.minrev=Y".
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the kernel command line with "microcode=force_minrev".
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config MICROCODE_LATE_FORCE_MINREV
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bool "Enforce late microcode loading minimal revision check"
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@ -1337,10 +1337,22 @@ config MICROCODE_LATE_FORCE_MINREV
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revision check fails.
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This minimal revision check can also be controlled via the
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"microcode.minrev" parameter on the kernel command line.
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"microcode=force_minrev" parameter on the kernel command line.
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If unsure say Y.
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config MICROCODE_DBG
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bool "Enable microcode loader debugging"
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default n
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depends on MICROCODE
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help
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Enable code which allows for debugging the microcode loader in
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a guest. Meaning the patch loading is simulated but everything else
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related to patch parsing and handling is done as on baremetal with
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the purpose of debugging solely the software side of things.
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You almost certainly want to say n here.
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config X86_MSR
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tristate "/dev/cpu/*/msr - Model-specific register support"
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help
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@ -269,15 +269,6 @@ static bool verify_sha256_digest(u32 patch_id, u32 cur_rev, const u8 *data, unsi
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return true;
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}
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static u32 get_patch_level(void)
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{
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u32 rev, dummy __always_unused;
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native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
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return rev;
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}
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static union cpuid_1_eax ucode_rev_to_cpuid(unsigned int val)
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{
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union zen_patch_rev p;
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@ -295,6 +286,30 @@ static union cpuid_1_eax ucode_rev_to_cpuid(unsigned int val)
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return c;
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}
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static u32 get_patch_level(void)
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{
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u32 rev, dummy __always_unused;
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if (IS_ENABLED(CONFIG_MICROCODE_DBG)) {
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int cpu = smp_processor_id();
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if (!microcode_rev[cpu]) {
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if (!base_rev)
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base_rev = cpuid_to_ucode_rev(bsp_cpuid_1_eax);
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microcode_rev[cpu] = base_rev;
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ucode_dbg("CPU%d, base_rev: 0x%x\n", cpu, base_rev);
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}
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return microcode_rev[cpu];
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}
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native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
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return rev;
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}
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static u16 find_equiv_id(struct equiv_cpu_table *et, u32 sig)
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{
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unsigned int i;
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@ -324,13 +339,13 @@ static bool verify_container(const u8 *buf, size_t buf_size)
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u32 cont_magic;
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if (buf_size <= CONTAINER_HDR_SZ) {
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pr_debug("Truncated microcode container header.\n");
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ucode_dbg("Truncated microcode container header.\n");
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return false;
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}
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cont_magic = *(const u32 *)buf;
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if (cont_magic != UCODE_MAGIC) {
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pr_debug("Invalid magic value (0x%08x).\n", cont_magic);
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ucode_dbg("Invalid magic value (0x%08x).\n", cont_magic);
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return false;
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}
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@ -355,8 +370,8 @@ static bool verify_equivalence_table(const u8 *buf, size_t buf_size)
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cont_type = hdr[1];
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if (cont_type != UCODE_EQUIV_CPU_TABLE_TYPE) {
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pr_debug("Wrong microcode container equivalence table type: %u.\n",
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cont_type);
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ucode_dbg("Wrong microcode container equivalence table type: %u.\n",
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cont_type);
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return false;
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}
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@ -365,7 +380,7 @@ static bool verify_equivalence_table(const u8 *buf, size_t buf_size)
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equiv_tbl_len = hdr[2];
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if (equiv_tbl_len < sizeof(struct equiv_cpu_entry) ||
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buf_size < equiv_tbl_len) {
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pr_debug("Truncated equivalence table.\n");
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ucode_dbg("Truncated equivalence table.\n");
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return false;
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}
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@ -385,7 +400,7 @@ static bool __verify_patch_section(const u8 *buf, size_t buf_size, u32 *sh_psize
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const u32 *hdr;
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if (buf_size < SECTION_HDR_SIZE) {
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pr_debug("Truncated patch section.\n");
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ucode_dbg("Truncated patch section.\n");
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return false;
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}
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@ -394,13 +409,13 @@ static bool __verify_patch_section(const u8 *buf, size_t buf_size, u32 *sh_psize
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p_size = hdr[1];
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if (p_type != UCODE_UCODE_TYPE) {
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pr_debug("Invalid type field (0x%x) in container file section header.\n",
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p_type);
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ucode_dbg("Invalid type field (0x%x) in container file section header.\n",
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p_type);
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return false;
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}
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if (p_size < sizeof(struct microcode_header_amd)) {
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pr_debug("Patch of size %u too short.\n", p_size);
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ucode_dbg("Patch of size %u too short.\n", p_size);
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return false;
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}
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@ -477,12 +492,12 @@ static int verify_patch(const u8 *buf, size_t buf_size, u32 *patch_size)
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* size sh_psize, as the section claims.
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*/
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if (buf_size < sh_psize) {
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pr_debug("Patch of size %u truncated.\n", sh_psize);
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ucode_dbg("Patch of size %u truncated.\n", sh_psize);
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return -1;
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}
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if (!__verify_patch_size(sh_psize, buf_size)) {
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pr_debug("Per-family patch size mismatch.\n");
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ucode_dbg("Per-family patch size mismatch.\n");
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return -1;
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}
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@ -496,6 +511,9 @@ static int verify_patch(const u8 *buf, size_t buf_size, u32 *patch_size)
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proc_id = mc_hdr->processor_rev_id;
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patch_fam = 0xf + (proc_id >> 12);
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ucode_dbg("Patch-ID 0x%08x: family: 0x%x\n", mc_hdr->patch_id, patch_fam);
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if (patch_fam != family)
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return 1;
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@ -566,9 +584,14 @@ static size_t parse_container(u8 *ucode, size_t size, struct cont_desc *desc)
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}
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mc = (struct microcode_amd *)(buf + SECTION_HDR_SIZE);
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ucode_dbg("patch_id: 0x%x\n", mc->hdr.patch_id);
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if (mc_patch_matches(mc, eq_id)) {
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desc->psize = patch_size;
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desc->mc = mc;
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ucode_dbg(" match: size: %d\n", patch_size);
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}
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skip:
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@ -639,8 +662,14 @@ static bool __apply_microcode_amd(struct microcode_amd *mc, u32 *cur_rev,
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invlpg(p_addr_end);
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}
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if (IS_ENABLED(CONFIG_MICROCODE_DBG))
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microcode_rev[smp_processor_id()] = mc->hdr.patch_id;
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/* verify patch application was successful */
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*cur_rev = get_patch_level();
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ucode_dbg("updated rev: 0x%x\n", *cur_rev);
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if (*cur_rev != mc->hdr.patch_id)
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return false;
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@ -1026,7 +1055,7 @@ static int verify_and_add_patch(u8 family, u8 *fw, unsigned int leftover,
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patch->patch_id = mc_hdr->patch_id;
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patch->equiv_cpu = proc_id;
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pr_debug("%s: Adding patch_id: 0x%08x, proc_id: 0x%04x\n",
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ucode_dbg("%s: Adding patch_id: 0x%08x, proc_id: 0x%04x\n",
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__func__, patch->patch_id, proc_id);
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/* ... and add to cache. */
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@ -1169,7 +1198,7 @@ static enum ucode_state request_microcode_amd(int cpu, struct device *device)
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snprintf(fw_name, sizeof(fw_name), "amd-ucode/microcode_amd_fam%.2xh.bin", c->x86);
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if (request_firmware_direct(&fw, (const char *)fw_name, device)) {
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pr_debug("failed to load file %s\n", fw_name);
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ucode_dbg("failed to load file %s\n", fw_name);
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goto out;
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}
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@ -43,10 +43,19 @@
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#include "internal.h"
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static struct microcode_ops *microcode_ops;
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static bool dis_ucode_ldr = false;
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static bool dis_ucode_ldr;
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bool force_minrev = IS_ENABLED(CONFIG_MICROCODE_LATE_FORCE_MINREV);
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module_param(force_minrev, bool, S_IRUSR | S_IWUSR);
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/*
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* Those below should be behind CONFIG_MICROCODE_DBG ifdeffery but in
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* order to not uglify the code with ifdeffery and use IS_ENABLED()
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* instead, leave them in. When microcode debugging is not enabled,
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* those are meaningless anyway.
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*/
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/* base microcode revision for debugging */
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u32 base_rev;
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u32 microcode_rev[NR_CPUS] = {};
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/*
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* Synchronization.
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@ -119,20 +128,48 @@ bool __init microcode_loader_disabled(void)
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* overwritten.
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*/
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if (!cpuid_feature() ||
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native_cpuid_ecx(1) & BIT(31) ||
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((native_cpuid_ecx(1) & BIT(31)) &&
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!IS_ENABLED(CONFIG_MICROCODE_DBG)) ||
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amd_check_current_patch_level())
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dis_ucode_ldr = true;
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return dis_ucode_ldr;
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}
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static void early_parse_cmdline(void)
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{
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char cmd_buf[64] = {};
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char *s, *p = cmd_buf;
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if (cmdline_find_option(boot_command_line, "microcode", cmd_buf, sizeof(cmd_buf)) > 0) {
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while ((s = strsep(&p, ","))) {
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if (IS_ENABLED(CONFIG_MICROCODE_DBG)) {
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if (strstr(s, "base_rev=")) {
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/* advance to the option arg */
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strsep(&s, "=");
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if (kstrtouint(s, 16, &base_rev)) { ; }
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}
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}
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if (!strcmp("force_minrev", s))
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force_minrev = true;
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if (!strcmp(s, "dis_ucode_ldr"))
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dis_ucode_ldr = true;
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}
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}
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/* old, compat option */
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if (cmdline_find_option_bool(boot_command_line, "dis_ucode_ldr") > 0)
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dis_ucode_ldr = true;
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}
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void __init load_ucode_bsp(void)
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{
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unsigned int cpuid_1_eax;
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bool intel = true;
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if (cmdline_find_option_bool(boot_command_line, "dis_ucode_ldr") > 0)
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dis_ucode_ldr = true;
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early_parse_cmdline();
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if (microcode_loader_disabled())
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return;
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@ -67,9 +67,8 @@
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{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x55, .steppings = 0x0008, .driver_data = 0x1000191 },
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{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x55, .steppings = 0x0010, .driver_data = 0x2007006 },
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{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x55, .steppings = 0x0020, .driver_data = 0x3000010 },
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{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x55, .steppings = 0x0040, .driver_data = 0x4003605 },
|
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{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x55, .steppings = 0x0080, .driver_data = 0x5003707 },
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{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x55, .steppings = 0x0800, .driver_data = 0x7002904 },
|
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{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x55, .steppings = 0x0080, .driver_data = 0x5003901 },
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{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x55, .steppings = 0x0800, .driver_data = 0x7002b01 },
|
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{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x56, .steppings = 0x0004, .driver_data = 0x1c },
|
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{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x56, .steppings = 0x0008, .driver_data = 0x700001c },
|
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{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x56, .steppings = 0x0010, .driver_data = 0xf00001a },
|
||||
|
|
@ -81,51 +80,62 @@
|
|||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x5f, .steppings = 0x0002, .driver_data = 0x3e },
|
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{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x66, .steppings = 0x0008, .driver_data = 0x2a },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x6a, .steppings = 0x0020, .driver_data = 0xc0002f0 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x6a, .steppings = 0x0040, .driver_data = 0xd0003e7 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x6c, .steppings = 0x0002, .driver_data = 0x10002b0 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x6a, .steppings = 0x0040, .driver_data = 0xd000404 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x6c, .steppings = 0x0002, .driver_data = 0x10002d0 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x7a, .steppings = 0x0002, .driver_data = 0x42 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x7a, .steppings = 0x0100, .driver_data = 0x24 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x7e, .steppings = 0x0020, .driver_data = 0xc6 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x7a, .steppings = 0x0100, .driver_data = 0x26 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x7e, .steppings = 0x0020, .driver_data = 0xca },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x8a, .steppings = 0x0002, .driver_data = 0x33 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x8c, .steppings = 0x0002, .driver_data = 0xb8 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x8c, .steppings = 0x0004, .driver_data = 0x38 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x8d, .steppings = 0x0002, .driver_data = 0x52 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x8c, .steppings = 0x0002, .driver_data = 0xbc },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x8c, .steppings = 0x0004, .driver_data = 0x3c },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x8d, .steppings = 0x0002, .driver_data = 0x56 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x8e, .steppings = 0x0200, .driver_data = 0xf6 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x8e, .steppings = 0x0400, .driver_data = 0xf6 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x8e, .steppings = 0x0800, .driver_data = 0xf6 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x8e, .steppings = 0x1000, .driver_data = 0xfc },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x8f, .steppings = 0x0100, .driver_data = 0x2c000390 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x8f, .steppings = 0x0080, .driver_data = 0x2b000603 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x8f, .steppings = 0x0040, .driver_data = 0x2c000390 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x8f, .steppings = 0x0020, .driver_data = 0x2c000390 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x8f, .steppings = 0x0010, .driver_data = 0x2c000390 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x8e, .steppings = 0x1000, .driver_data = 0x100 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x8f, .steppings = 0x0010, .driver_data = 0x2c0003f7 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x8f, .steppings = 0x0020, .driver_data = 0x2c0003f7 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x8f, .steppings = 0x0040, .driver_data = 0x2c0003f7 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x8f, .steppings = 0x0080, .driver_data = 0x2b000639 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x8f, .steppings = 0x0100, .driver_data = 0x2c0003f7 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x96, .steppings = 0x0002, .driver_data = 0x1a },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x97, .steppings = 0x0004, .driver_data = 0x37 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x97, .steppings = 0x0020, .driver_data = 0x37 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xbf, .steppings = 0x0004, .driver_data = 0x37 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xbf, .steppings = 0x0020, .driver_data = 0x37 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x9a, .steppings = 0x0008, .driver_data = 0x435 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x9a, .steppings = 0x0010, .driver_data = 0x435 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x97, .steppings = 0x0004, .driver_data = 0x3a },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x97, .steppings = 0x0020, .driver_data = 0x3a },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x9a, .steppings = 0x0008, .driver_data = 0x437 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x9a, .steppings = 0x0010, .driver_data = 0x437 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x9c, .steppings = 0x0001, .driver_data = 0x24000026 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x9e, .steppings = 0x0200, .driver_data = 0xf8 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x9e, .steppings = 0x0400, .driver_data = 0xf8 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x9e, .steppings = 0x0400, .driver_data = 0xfa },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x9e, .steppings = 0x0800, .driver_data = 0xf6 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x9e, .steppings = 0x1000, .driver_data = 0xf8 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x9e, .steppings = 0x2000, .driver_data = 0x100 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xa5, .steppings = 0x0004, .driver_data = 0xfc },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xa5, .steppings = 0x0008, .driver_data = 0xfc },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xa5, .steppings = 0x0020, .driver_data = 0xfc },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xa6, .steppings = 0x0001, .driver_data = 0xfe },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xa6, .steppings = 0x0002, .driver_data = 0xfc },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xa7, .steppings = 0x0002, .driver_data = 0x62 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xaa, .steppings = 0x0010, .driver_data = 0x20 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xb7, .steppings = 0x0002, .driver_data = 0x12b },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xba, .steppings = 0x0004, .driver_data = 0x4123 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xba, .steppings = 0x0008, .driver_data = 0x4123 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xba, .steppings = 0x0100, .driver_data = 0x4123 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xbe, .steppings = 0x0001, .driver_data = 0x1a },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xcf, .steppings = 0x0004, .driver_data = 0x21000283 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xcf, .steppings = 0x0002, .driver_data = 0x21000283 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0x9e, .steppings = 0x2000, .driver_data = 0x104 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xa5, .steppings = 0x0004, .driver_data = 0x100 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xa5, .steppings = 0x0008, .driver_data = 0x100 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xa5, .steppings = 0x0020, .driver_data = 0x100 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xa6, .steppings = 0x0001, .driver_data = 0x102 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xa6, .steppings = 0x0002, .driver_data = 0x100 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xa7, .steppings = 0x0002, .driver_data = 0x64 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xaa, .steppings = 0x0010, .driver_data = 0x24 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xad, .steppings = 0x0002, .driver_data = 0xa0000d1 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xaf, .steppings = 0x0008, .driver_data = 0x3000341 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xb5, .steppings = 0x0001, .driver_data = 0xa },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xb7, .steppings = 0x0002, .driver_data = 0x12f },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xb7, .steppings = 0x0010, .driver_data = 0x12f },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xba, .steppings = 0x0004, .driver_data = 0x4128 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xba, .steppings = 0x0008, .driver_data = 0x4128 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xba, .steppings = 0x0100, .driver_data = 0x4128 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xbd, .steppings = 0x0002, .driver_data = 0x11f },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xbe, .steppings = 0x0001, .driver_data = 0x1d },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xbf, .steppings = 0x0004, .driver_data = 0x3a },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xbf, .steppings = 0x0020, .driver_data = 0x3a },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xbf, .steppings = 0x0040, .driver_data = 0x3a },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xbf, .steppings = 0x0080, .driver_data = 0x3a },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xc5, .steppings = 0x0004, .driver_data = 0x118 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xc6, .steppings = 0x0004, .driver_data = 0x118 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xc6, .steppings = 0x0010, .driver_data = 0x118 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xca, .steppings = 0x0004, .driver_data = 0x118 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xcf, .steppings = 0x0002, .driver_data = 0x210002a9 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0x6, .model = 0xcf, .steppings = 0x0004, .driver_data = 0x210002a9 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0xf, .model = 0x00, .steppings = 0x0080, .driver_data = 0x12 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0xf, .model = 0x00, .steppings = 0x0400, .driver_data = 0x15 },
|
||||
{ .flags = X86_CPU_ID_FLAG_ENTRY_VALID, .vendor = X86_VENDOR_INTEL, .family = 0xf, .model = 0x01, .steppings = 0x0004, .driver_data = 0x2e },
|
||||
|
|
|
|||
|
|
@ -44,6 +44,9 @@ struct early_load_data {
|
|||
|
||||
extern struct early_load_data early_data;
|
||||
extern struct ucode_cpu_info ucode_cpu_info[];
|
||||
extern u32 microcode_rev[NR_CPUS];
|
||||
extern u32 base_rev;
|
||||
|
||||
struct cpio_data find_microcode_in_initrd(const char *path);
|
||||
|
||||
#define MAX_UCODE_COUNT 128
|
||||
|
|
@ -122,4 +125,10 @@ static inline void reload_ucode_intel(void) { }
|
|||
static inline struct microcode_ops *init_intel_microcode(void) { return NULL; }
|
||||
#endif /* !CONFIG_CPU_SUP_INTEL */
|
||||
|
||||
#define ucode_dbg(fmt, ...) \
|
||||
({ \
|
||||
if (IS_ENABLED(CONFIG_MICROCODE_DBG)) \
|
||||
pr_info(fmt, ##__VA_ARGS__); \
|
||||
})
|
||||
|
||||
#endif /* _X86_MICROCODE_INTERNAL_H */
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user