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dt-bindings: clock: Convert axis,artpec6-clkctrl to DT schema
Convert the Axis ARTPEC-6 clock controller to DT schema format. It's a straight forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250521004647.1792464-1-robh@kernel.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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* Clock bindings for Axis ARTPEC-6 chip
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The bindings are based on the clock provider binding in
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Documentation/devicetree/bindings/clock/clock-bindings.txt
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External clocks:
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----------------
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There are two external inputs to the main clock controller which should be
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provided using the common clock bindings.
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- "sys_refclk": External 50 Mhz oscillator (required)
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- "i2s_refclk": Alternate audio reference clock (optional).
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Main clock controller
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---------------------
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Required properties:
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- #clock-cells: Should be <1>
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See dt-bindings/clock/axis,artpec6-clkctrl.h for the list of valid identifiers.
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- compatible: Should be "axis,artpec6-clkctrl"
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- reg: Must contain the base address and length of the system controller
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- clocks: Must contain a phandle entry for each clock in clock-names
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- clock-names: Must include the external oscillator ("sys_refclk"). Optional
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ones are the audio reference clock ("i2s_refclk") and the audio fractional
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dividers ("frac_clk0" and "frac_clk1").
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Examples:
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ext_clk: ext_clk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <50000000>;
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};
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clkctrl: clkctrl@f8000000 {
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#clock-cells = <1>;
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compatible = "axis,artpec6-clkctrl";
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reg = <0xf8000000 0x48>;
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clocks = <&ext_clk>;
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clock-names = "sys_refclk";
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};
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/axis,artpec6-clkctrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Axis ARTPEC-6 clock controller
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maintainers:
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- Lars Persson <lars.persson@axis.com>
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properties:
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compatible:
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const: axis,artpec6-clkctrl
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reg:
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maxItems: 1
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"#clock-cells":
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const: 1
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clocks:
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minItems: 1
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items:
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- description: external 50 MHz oscillator.
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- description: optional audio reference clock.
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- description: fractional audio clock divider 0.
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- description: fractional audio clock divider 1.
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clock-names:
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minItems: 1
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items:
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- const: sys_refclk
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- const: i2s_refclk
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- const: frac_clk0
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- const: frac_clk1
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required:
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- compatible
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- reg
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- "#clock-cells"
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- clocks
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- clock-names
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additionalProperties: false
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examples:
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- |
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clock-controller@f8000000 {
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compatible = "axis,artpec6-clkctrl";
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reg = <0xf8000000 0x48>;
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#clock-cells = <1>;
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clocks = <&ext_clk>;
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clock-names = "sys_refclk";
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};
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