drm/xe/cri: Enable I2C controller

Enable I2C controller for Crescent Island and while at it, rely on
has_i2c flag instead of manual platform checks.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patch.msgid.link/20251128084414.306265-1-raag.jadav@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
This commit is contained in:
Raag Jadav 2025-11-28 14:14:14 +05:30 committed by Matt Roper
parent 6601e0714b
commit bd5840819a
4 changed files with 7 additions and 1 deletions

View File

@ -304,6 +304,8 @@ struct xe_device {
u8 has_heci_cscfi:1;
/** @info.has_heci_gscfi: device has heci gscfi */
u8 has_heci_gscfi:1;
/** @info.has_i2c: Device has I2C controller */
u8 has_i2c:1;
/** @info.has_late_bind: Device has firmware late binding support */
u8 has_late_bind:1;
/** @info.has_llc: Device has a shared CPU+GPU last level cache */

View File

@ -319,7 +319,7 @@ int xe_i2c_probe(struct xe_device *xe)
struct xe_i2c *i2c;
int ret;
if (xe->info.platform != XE_BATTLEMAGE)
if (!xe->info.has_i2c)
return 0;
if (IS_SRIOV_VF(xe))

View File

@ -367,6 +367,7 @@ static const struct xe_device_desc bmg_desc = {
.has_mbx_power_limits = true,
.has_gsc_nvm = 1,
.has_heci_cscfi = 1,
.has_i2c = true,
.has_late_bind = true,
.has_sriov = true,
.has_mem_copy_instr = true,
@ -412,6 +413,7 @@ static const struct xe_device_desc cri_desc = {
.dma_mask_size = 52,
.has_display = false,
.has_flat_ccs = false,
.has_i2c = true,
.has_mbx_power_limits = true,
.has_mert = true,
.has_sriov = true,
@ -678,6 +680,7 @@ static int xe_info_init_early(struct xe_device *xe,
xe->info.has_gsc_nvm = desc->has_gsc_nvm;
xe->info.has_heci_gscfi = desc->has_heci_gscfi;
xe->info.has_heci_cscfi = desc->has_heci_cscfi;
xe->info.has_i2c = desc->has_i2c;
xe->info.has_late_bind = desc->has_late_bind;
xe->info.has_llc = desc->has_llc;
xe->info.has_mert = desc->has_mert;

View File

@ -44,6 +44,7 @@ struct xe_device_desc {
u8 has_gsc_nvm:1;
u8 has_heci_gscfi:1;
u8 has_heci_cscfi:1;
u8 has_i2c:1;
u8 has_late_bind:1;
u8 has_llc:1;
u8 has_mbx_power_limits:1;