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venus: firmware: Correct reset bit

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The reset bit for A9SS reset register is BIT(4) and for XTSS_SW_RESET
it is BIT(0). Use the defines for those reset bits.

Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
This commit is contained in:
Stanimir Varbanov 2022-10-05 11:37:28 +03:00
parent 15886e59cb
commit bd32d0851c
1 changed files with 4 additions and 2 deletions
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6
drivers/media/platform/qcom/venus/firmware.c
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@ -68,9 +68,11 @@ int venus_set_hw_state(struct venus_core *core, bool resume)
venus_reset_cpu(core);
} else {
if (IS_V6(core))
writel(1, core->wrapper_tz_base + WRAPPER_TZ_XTSS_SW_RESET);
writel(WRAPPER_XTSS_SW_RESET_BIT,
core->wrapper_tz_base + WRAPPER_TZ_XTSS_SW_RESET);
else
writel(1, core->wrapper_base + WRAPPER_A9SS_SW_RESET);
writel(WRAPPER_A9SS_SW_RESET_BIT,
core->wrapper_base + WRAPPER_A9SS_SW_RESET);
}
return 0;