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Qualcomm Arm64 DeviceTree fixes for v6.10
This marks the PSHOLD node on SC8280XP as reserved, to resolve a regression where a reset is triggered instead of a clean shutdown. Also on SC8280XP the touchscreen properties are adjusted to make it properly described on CRD and make it work on the Lenovo Thinkpad X13s. Corrects the LLCC definitions on SC8180X and QDU1000 to allow these drivers and their dependencies to probe. X1 Elite CRD is given more CMA space, to avoid running out during boot, as PCIe SMMU is not accessible. Audio configuration is corrected, on the same. SM6115 SDHC is given an IOMMU stream, to avoid access issues. Lastly the EL2 non-secure physical timer interrupt on SA8775P is corrected from its previous incorrect value. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmaDbysVHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FjB4P/i8+CZGdqXeUbfX+QuRKr91W9m7H NIdya6FZ6bg3RhmrLLlhmyG3iVVQNYvZ1mjAsK43xtnOU2DX/OMrNAUAdmagC5cI VfjPGlHKbGmK5rfDfxYNRocszo/zh4CFQQmVElsBSaZyi1pPkfOWnUZjTzlAetS4 FMbrDjJyFDPxhzdhPZWyAEAd6eeYMbpEeXOB0NZGdsv3ncfg311cBy2MHEn052J9 lAOexSfhw1hNTMPSfjK/8OKQiAKuA5DWUxZL+/7/5P72zB0GZUCzDJABRRlaWjsM d8eJenuHpluRZxSTtmw5uSmBjbKUW6Q3lhMNeVIcxDhyaMNq2Asw3LIiJFAXQmB3 goQek5Lc33VRAdnw6Vfphzy2nUBAeT5YBl+aGJb8cVR12BKWN0JiVVm1/Ewxd23j GcfKTsLSMI1ZPOsjNgtoqa8O6y76vX1c0+Vn5GvG/8iSa5qlzattMD7hWra5erll MhlOr3OikH1rhTTlJNc6WPJwmYbnf4DAemUyzvF9oIXZf5J05ljDW7KUBJyFH7ip oIfi6JNsuABcDmT2vMFofw2jJwbo6wb1bxUoTYDITRy45GOs44pZAfuxFz5Z0vST kGeqqi4xz3JhNTSLDf50ahJBOHapg5C1c+OSZ22muLGl/7Hzpmd2FhdI85e1+arL TcF+8NCZBkpcraLa =rkld -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmaL9IAACgkQYKtH/8kJ UifKORAAmbEROkWShKsTmVk9sl863SUqu3wPOyFUgY0Dw+xsUZum5yk1mxeuJCaE 3o5EzRerPwAyEcMw3jWXIYmKvwP4ocIMo7FVKLqD4icEteufM6uq03AeTMfkWi6v J97zXSrl7lxr3hRnb5NvKm/gUakuHThRAUkzPxccHrgJz2bMbqD/Jz/lKUw+boip Yjw/bk0rz+otSEk5uwG39lDP5eJgukH5cAMBo4YnmAd2KKr56TNPjqRCu2XGNHnU HnJnw8v9iar3imUH7RlM6XBbdd2YDAe9nAcgHZ11ACVaO9eYtsLVHA4Ms6p3zUPE kVtW8NcObc6MDLABc2x5J4lposaPuuVRquchlaPE7UTSidqkq2jvTcME40Mse+lp MfoMhHN35FDtogYFVjvD4dmB1Q0bY74YPl9xa+NuymORJcft/Y3dAbInmsRhBdiC ifK892Z76m7eob+ul7egNeY2uDitoSpY8GKL41EG98G+u/g93J/kv9wjO0o2JH62 RDJge8FY38noqLK3GIk3BIXq9730N+Tau9HGn/Lpqt8JWEAbTcgAH/wjXmKl/GkU zFSgyRTbiyOx8tLsW9RF3D/YMPyzyhyAnwz03llX+iFXIws4o2LSGQ2u6ESsAXxP BQ+XOj2WxGpaRMN8XIrgV08+TZwP6MkqaNK0PRSRAr+JEpRNVio= =R3Mv -----END PGP SIGNATURE----- Merge tag 'qcom-arm64-fixes-for-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes Qualcomm Arm64 DeviceTree fixes for v6.10 This marks the PSHOLD node on SC8280XP as reserved, to resolve a regression where a reset is triggered instead of a clean shutdown. Also on SC8280XP the touchscreen properties are adjusted to make it properly described on CRD and make it work on the Lenovo Thinkpad X13s. Corrects the LLCC definitions on SC8180X and QDU1000 to allow these drivers and their dependencies to probe. X1 Elite CRD is given more CMA space, to avoid running out during boot, as PCIe SMMU is not accessible. Audio configuration is corrected, on the same. SM6115 SDHC is given an IOMMU stream, to avoid access issues. Lastly the EL2 non-secure physical timer interrupt on SA8775P is corrected from its previous incorrect value. * tag 'qcom-arm64-fixes-for-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: arm64: dts: qcom: qdu1000: Fix LLCC reg property arm64: dts: qcom: sm6115: add iommu for sdhc_1 arm64: dts: qcom: x1e80100-crd: fix DAI used for headset recording arm64: dts: qcom: x1e80100-crd: fix WCD audio codec TX port mapping arm64: dts: qcom: sc8280xp-crd: use external pull up for touch reset arm64: dts: qcom: sc8280xp-x13s: fix touchscreen power on arm64: dts: qcom: x1e80100: Fix PCIe 6a reg offsets and add MHI arm64: dts: qcom: sa8775p: Correct IRQ number of EL2 non-secure physical timer arm64: dts: qcom: sc8280xp: Set status = "reserved" on PSHOLD arm64: dts: qcom: x1e80100-*: Allocate some CMA buffers arm64: dts: qcom: sc8180x: Fix LLCC reg property again Link: https://lore.kernel.org/r/20240702030913.340814-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
bcec291967
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@ -1459,9 +1459,23 @@ gem_noc: interconnect@19100000 {
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system-cache-controller@19200000 {
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compatible = "qcom,qdu1000-llcc";
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reg = <0 0x19200000 0 0xd80000>,
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reg = <0 0x19200000 0 0x80000>,
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<0 0x19300000 0 0x80000>,
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<0 0x19600000 0 0x80000>,
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<0 0x19700000 0 0x80000>,
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<0 0x19a00000 0 0x80000>,
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<0 0x19b00000 0 0x80000>,
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<0 0x19e00000 0 0x80000>,
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<0 0x19f00000 0 0x80000>,
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<0 0x1a200000 0 0x80000>;
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reg-names = "llcc0_base",
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"llcc1_base",
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"llcc2_base",
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"llcc3_base",
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"llcc4_base",
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"llcc5_base",
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"llcc6_base",
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"llcc7_base",
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"llcc_broadcast_base";
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interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
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};
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@ -3605,7 +3605,7 @@ arch_timer: timer {
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interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 12 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
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<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
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};
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pcie0: pcie@1c00000 {
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@ -2647,11 +2647,14 @@ usb_sec_dpphy: dp-phy@88ef200 {
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system-cache-controller@9200000 {
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compatible = "qcom,sc8180x-llcc";
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reg = <0 0x09200000 0 0x50000>, <0 0x09280000 0 0x50000>,
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<0 0x09300000 0 0x50000>, <0 0x09380000 0 0x50000>,
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<0 0x09600000 0 0x50000>;
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reg = <0 0x09200000 0 0x58000>, <0 0x09280000 0 0x58000>,
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<0 0x09300000 0 0x58000>, <0 0x09380000 0 0x58000>,
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<0 0x09400000 0 0x58000>, <0 0x09480000 0 0x58000>,
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<0 0x09500000 0 0x58000>, <0 0x09580000 0 0x58000>,
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<0 0x09600000 0 0x58000>;
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reg-names = "llcc0_base", "llcc1_base", "llcc2_base",
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"llcc3_base", "llcc_broadcast_base";
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"llcc3_base", "llcc4_base", "llcc5_base",
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"llcc6_base", "llcc7_base", "llcc_broadcast_base";
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interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
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};
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@ -977,8 +977,7 @@ int-n-pins {
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reset-n-pins {
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pins = "gpio99";
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function = "gpio";
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output-high;
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drive-strength = <16>;
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bias-disable;
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};
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};
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@ -655,15 +655,16 @@ &i2c4 {
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status = "okay";
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/* FIXME: verify */
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touchscreen@10 {
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compatible = "hid-over-i2c";
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compatible = "elan,ekth5015m", "elan,ekth6915";
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reg = <0x10>;
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hid-descr-addr = <0x1>;
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interrupts-extended = <&tlmm 175 IRQ_TYPE_LEVEL_LOW>;
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vdd-supply = <&vreg_misc_3p3>;
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vddl-supply = <&vreg_s10b>;
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reset-gpios = <&tlmm 99 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
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no-reset-on-power-off;
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vcc33-supply = <&vreg_misc_3p3>;
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vccio-supply = <&vreg_misc_3p3>;
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pinctrl-names = "default";
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pinctrl-0 = <&ts0_default>;
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@ -1496,8 +1497,8 @@ int-n-pins {
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reset-n-pins {
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pins = "gpio99";
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function = "gpio";
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output-high;
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drive-strength = <16>;
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drive-strength = <2>;
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bias-disable;
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};
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};
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@ -4623,6 +4623,8 @@ tsens0: thermal-sensor@c263000 {
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restart@c264000 {
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compatible = "qcom,pshold";
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reg = <0 0x0c264000 0 0x4>;
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/* TZ seems to block access */
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status = "reserved";
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};
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tsens1: thermal-sensor@c265000 {
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@ -1090,6 +1090,7 @@ sdhc_1: mmc@4744000 {
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power-domains = <&rpmpd SM6115_VDDCX>;
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operating-points-v2 = <&sdhc1_opp_table>;
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iommus = <&apps_smmu 0x00c0 0x0>;
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interconnects = <&system_noc MASTER_SDCC_1 RPM_ALWAYS_TAG
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&bimc SLAVE_EBI_CH0 RPM_ALWAYS_TAG>,
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<&bimc MASTER_AMPSS_M0 RPM_ALWAYS_TAG
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@ -49,6 +49,15 @@ chosen {
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stdout-path = "serial0:115200n8";
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};
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reserved-memory {
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linux,cma {
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compatible = "shared-dma-pool";
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size = <0x0 0x8000000>;
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reusable;
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linux,cma-default;
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};
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};
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sound {
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compatible = "qcom,x1e80100-sndcard";
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model = "X1E80100-CRD";
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@ -93,7 +102,7 @@ cpu {
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};
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codec {
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sound-dai = <&wcd938x 1>, <&swr2 0>, <&lpass_txmacro 0>;
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sound-dai = <&wcd938x 1>, <&swr2 1>, <&lpass_txmacro 0>;
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};
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platform {
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@ -744,7 +753,7 @@ &swr2 {
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wcd_tx: codec@0,3 {
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compatible = "sdw20217010d00";
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reg = <0 3>;
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qcom,tx-port-mapping = <1 1 2 3>;
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qcom,tx-port-mapping = <2 2 3 4>;
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};
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};
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@ -23,6 +23,15 @@ chosen {
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stdout-path = "serial0:115200n8";
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};
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reserved-memory {
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linux,cma {
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compatible = "shared-dma-pool";
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size = <0x0 0x8000000>;
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reusable;
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linux,cma-default;
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};
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};
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vph_pwr: vph-pwr-regulator {
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compatible = "regulator-fixed";
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@ -2737,15 +2737,17 @@ pcie6a: pci@1bf8000 {
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device_type = "pci";
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compatible = "qcom,pcie-x1e80100";
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reg = <0 0x01bf8000 0 0x3000>,
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<0 0x70000000 0 0xf1d>,
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<0 0x70000f20 0 0xa8>,
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<0 0x70000000 0 0xf20>,
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<0 0x70000f40 0 0xa8>,
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<0 0x70001000 0 0x1000>,
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<0 0x70100000 0 0x100000>;
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<0 0x70100000 0 0x100000>,
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<0 0x01bfb000 0 0x1000>;
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reg-names = "parf",
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"dbi",
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"elbi",
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"atu",
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"config";
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"config",
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"mhi";
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#address-cells = <3>;
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#size-cells = <2>;
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ranges = <0x01000000 0 0x00000000 0 0x70200000 0 0x100000>,
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