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arm64: dts: rockchip: Add rk3588 OTP node

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Add DT node for Rockchip RK3588/RK3588S OTP memory.

Co-developed-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Tested-by: Vincent Legoll <vincent.legoll@gmail.com>
[moved cpu-version subnode down, to be sorted by address]
Link: https://lore.kernel.org/r/20230504200648.1119866-9-cristian.ciocaltea@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Cristian Ciocaltea 2023-05-04 23:06:48 +03:00 committed by Heiko Stuebner
parent d211665c5a
commit bcac467b7c
1 changed files with 54 additions and 0 deletions
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54
arch/arm64/boot/dts/rockchip/rk3588s.dtsi
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@ -1839,6 +1839,60 @@ spi4: spi@fecb0000 {
status = "disabled";
};
otp: efuse@fecc0000 {
compatible = "rockchip,rk3588-otp";
reg = <0x0 0xfecc0000 0x0 0x400>;
clocks = <&cru CLK_OTPC_NS>, <&cru PCLK_OTPC_NS>,
<&cru CLK_OTP_PHY_G>, <&cru CLK_OTPC_ARB>;
clock-names = "otp", "apb_pclk", "phy", "arb";
resets = <&cru SRST_OTPC_NS>, <&cru SRST_P_OTPC_NS>,
<&cru SRST_OTPC_ARB>;
reset-names = "otp", "apb", "arb";
#address-cells = <1>;
#size-cells = <1>;
cpu_code: cpu-code@2 {
reg = <0x02 0x2>;
};
otp_id: id@7 {
reg = <0x07 0x10>;
};
cpub0_leakage: cpu-leakage@17 {
reg = <0x17 0x1>;
};
cpub1_leakage: cpu-leakage@18 {
reg = <0x18 0x1>;
};
cpul_leakage: cpu-leakage@19 {
reg = <0x19 0x1>;
};
log_leakage: log-leakage@1a {
reg = <0x1a 0x1>;
};
gpu_leakage: gpu-leakage@1b {
reg = <0x1b 0x1>;
};
otp_cpu_version: cpu-version@1c {
reg = <0x1c 0x1>;
bits = <3 3>;
};
npu_leakage: npu-leakage@28 {
reg = <0x28 0x1>;
};
codec_leakage: codec-leakage@29 {
reg = <0x29 0x1>;
};
};
dmac2: dma-controller@fed10000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x0 0xfed10000 0x0 0x4000>;