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wifi: iwlwifi: pcie: relocate finish_nic_init logic to gen1_2
Refactor finish_nic_init by moving its logic to the gen1_2 transport layer. Prepares for future gen3 support. Signed-off-by: Itamar Shalev <itamar.shalev@intel.com> Signed-off-by: Miri Korenblit <miriam.rachel.korenblit@intel.com> Link: https://patch.msgid.link/20250826184046.9fcc48d81435.I13403938219765b79c299ea081e8373d0e007785@changeid
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14a4aca568
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@ -3,7 +3,6 @@
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* Copyright (C) 2003-2014, 2018-2022, 2024-2025 Intel Corporation
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* Copyright (C) 2015-2016 Intel Deutschland GmbH
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*/
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/export.h>
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@ -13,6 +12,7 @@
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#include "iwl-debug.h"
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#include "iwl-prph.h"
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#include "iwl-fh.h"
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#include "pcie/gen1_2/internal.h"
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void iwl_write8(struct iwl_trans *trans, u32 ofs, u8 val)
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{
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@ -396,94 +396,9 @@ int iwl_dump_fh(struct iwl_trans *trans, char **buf)
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return 0;
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}
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#define IWL_HOST_MON_BLOCK_PEMON 0x00
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#define IWL_HOST_MON_BLOCK_HIPM 0x22
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#define IWL_HOST_MON_BLOCK_PEMON_VEC0 0x00
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#define IWL_HOST_MON_BLOCK_PEMON_VEC1 0x01
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#define IWL_HOST_MON_BLOCK_PEMON_WFPM 0x06
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static void iwl_dump_host_monitor_block(struct iwl_trans *trans,
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u32 block, u32 vec, u32 iter)
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{
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int i;
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IWL_ERR(trans, "Host monitor block 0x%x vector 0x%x\n", block, vec);
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iwl_write32(trans, CSR_MONITOR_CFG_REG, (block << 8) | vec);
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for (i = 0; i < iter; i++)
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IWL_ERR(trans, " value [iter %d]: 0x%08x\n",
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i, iwl_read32(trans, CSR_MONITOR_STATUS_REG));
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}
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static void iwl_dump_host_monitor(struct iwl_trans *trans)
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{
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switch (trans->mac_cfg->device_family) {
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case IWL_DEVICE_FAMILY_22000:
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case IWL_DEVICE_FAMILY_AX210:
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IWL_ERR(trans, "CSR_RESET = 0x%x\n",
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iwl_read32(trans, CSR_RESET));
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iwl_dump_host_monitor_block(trans, IWL_HOST_MON_BLOCK_PEMON,
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IWL_HOST_MON_BLOCK_PEMON_VEC0, 15);
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iwl_dump_host_monitor_block(trans, IWL_HOST_MON_BLOCK_PEMON,
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IWL_HOST_MON_BLOCK_PEMON_VEC1, 15);
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iwl_dump_host_monitor_block(trans, IWL_HOST_MON_BLOCK_PEMON,
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IWL_HOST_MON_BLOCK_PEMON_WFPM, 15);
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iwl_dump_host_monitor_block(trans, IWL_HOST_MON_BLOCK_HIPM,
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IWL_HOST_MON_BLOCK_PEMON_VEC0, 1);
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break;
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default:
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/* not supported yet */
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return;
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}
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}
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int iwl_finish_nic_init(struct iwl_trans *trans)
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{
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const struct iwl_mac_cfg *mac_cfg = trans->mac_cfg;
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u32 poll_ready;
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int err;
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if (mac_cfg->bisr_workaround) {
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/* ensure the TOP FSM isn't still in previous reset */
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mdelay(2);
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}
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/*
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* Set "initialization complete" bit to move adapter from
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* D0U* --> D0A* (powered-up active) state.
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*/
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if (mac_cfg->device_family >= IWL_DEVICE_FAMILY_BZ) {
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iwl_set_bit(trans, CSR_GP_CNTRL,
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CSR_GP_CNTRL_REG_FLAG_BZ_MAC_ACCESS_REQ |
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CSR_GP_CNTRL_REG_FLAG_MAC_INIT);
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poll_ready = CSR_GP_CNTRL_REG_FLAG_MAC_STATUS;
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} else {
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iwl_set_bit(trans, CSR_GP_CNTRL,
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CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
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poll_ready = CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY;
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}
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if (mac_cfg->device_family == IWL_DEVICE_FAMILY_8000)
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udelay(2);
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/*
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* Wait for clock stabilization; once stabilized, access to
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* device-internal resources is supported, e.g. iwl_write_prph()
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* and accesses to uCode SRAM.
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*/
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err = iwl_poll_bits(trans, CSR_GP_CNTRL, poll_ready, 25000);
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if (err < 0) {
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IWL_DEBUG_INFO(trans, "Failed to wake NIC\n");
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iwl_dump_host_monitor(trans);
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}
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if (mac_cfg->bisr_workaround) {
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/* ensure BISR shift has finished */
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udelay(200);
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}
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return err < 0 ? err : 0;
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return iwl_pcie_gen1_2_finish_nic_init(trans);
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}
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IWL_EXPORT_SYMBOL(iwl_finish_nic_init);
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@ -1105,6 +1105,7 @@ int iwl_pcie_alloc_dma_ptr(struct iwl_trans *trans,
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struct iwl_dma_ptr *ptr, size_t size);
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void iwl_pcie_free_dma_ptr(struct iwl_trans *trans, struct iwl_dma_ptr *ptr);
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void iwl_pcie_apply_destination(struct iwl_trans *trans);
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int iwl_pcie_gen1_2_finish_nic_init(struct iwl_trans *trans);
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/* transport gen 2 exported functions */
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int iwl_trans_pcie_gen2_start_fw(struct iwl_trans *trans,
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@ -32,6 +32,46 @@
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#include "pcie/iwl-context-info-v2.h"
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#include "pcie/utils.h"
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#define IWL_HOST_MON_BLOCK_PEMON 0x00
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#define IWL_HOST_MON_BLOCK_HIPM 0x22
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#define IWL_HOST_MON_BLOCK_PEMON_VEC0 0x00
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#define IWL_HOST_MON_BLOCK_PEMON_VEC1 0x01
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#define IWL_HOST_MON_BLOCK_PEMON_WFPM 0x06
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static void iwl_dump_host_monitor_block(struct iwl_trans *trans,
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u32 block, u32 vec, u32 iter)
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{
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int i;
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IWL_ERR(trans, "Host monitor block 0x%x vector 0x%x\n", block, vec);
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iwl_write32(trans, CSR_MONITOR_CFG_REG, (block << 8) | vec);
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for (i = 0; i < iter; i++)
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IWL_ERR(trans, " value [iter %d]: 0x%08x\n",
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i, iwl_read32(trans, CSR_MONITOR_STATUS_REG));
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}
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static void iwl_pcie_dump_host_monitor(struct iwl_trans *trans)
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{
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switch (trans->mac_cfg->device_family) {
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case IWL_DEVICE_FAMILY_22000:
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case IWL_DEVICE_FAMILY_AX210:
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IWL_ERR(trans, "CSR_RESET = 0x%x\n",
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iwl_read32(trans, CSR_RESET));
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iwl_dump_host_monitor_block(trans, IWL_HOST_MON_BLOCK_PEMON,
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IWL_HOST_MON_BLOCK_PEMON_VEC0, 15);
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iwl_dump_host_monitor_block(trans, IWL_HOST_MON_BLOCK_PEMON,
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IWL_HOST_MON_BLOCK_PEMON_VEC1, 15);
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iwl_dump_host_monitor_block(trans, IWL_HOST_MON_BLOCK_PEMON,
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IWL_HOST_MON_BLOCK_PEMON_WFPM, 15);
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iwl_dump_host_monitor_block(trans, IWL_HOST_MON_BLOCK_HIPM,
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IWL_HOST_MON_BLOCK_PEMON_VEC0, 1);
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break;
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default:
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return;
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}
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}
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/* extended range in FW SRAM */
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#define IWL_FW_MEM_EXTENDED_START 0x40000
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#define IWL_FW_MEM_EXTENDED_END 0x57FFF
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@ -4271,3 +4311,52 @@ int iwl_pci_gen1_2_probe(struct pci_dev *pdev,
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iwl_trans_pcie_free(iwl_trans);
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return ret;
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}
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int iwl_pcie_gen1_2_finish_nic_init(struct iwl_trans *trans)
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{
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const struct iwl_mac_cfg *mac_cfg = trans->mac_cfg;
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u32 poll_ready;
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int err;
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if (mac_cfg->bisr_workaround) {
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/* ensure the TOP FSM isn't still in previous reset */
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mdelay(2);
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}
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/*
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* Set "initialization complete" bit to move adapter from
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* D0U* --> D0A* (powered-up active) state.
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*/
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if (mac_cfg->device_family >= IWL_DEVICE_FAMILY_BZ) {
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iwl_set_bit(trans, CSR_GP_CNTRL,
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CSR_GP_CNTRL_REG_FLAG_BZ_MAC_ACCESS_REQ |
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CSR_GP_CNTRL_REG_FLAG_MAC_INIT);
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poll_ready = CSR_GP_CNTRL_REG_FLAG_MAC_STATUS;
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} else {
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iwl_set_bit(trans, CSR_GP_CNTRL,
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CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
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poll_ready = CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY;
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}
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if (mac_cfg->device_family == IWL_DEVICE_FAMILY_8000)
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udelay(2);
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/*
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* Wait for clock stabilization; once stabilized, access to
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* device-internal resources is supported, e.g. iwl_write_prph()
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* and accesses to uCode SRAM.
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*/
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err = iwl_poll_bits(trans, CSR_GP_CNTRL, poll_ready, 25000);
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if (err < 0) {
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IWL_DEBUG_INFO(trans, "Failed to wake NIC\n");
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iwl_pcie_dump_host_monitor(trans);
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}
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if (mac_cfg->bisr_workaround) {
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/* ensure BISR shift has finished */
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udelay(200);
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}
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return err;
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}
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