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riscv: add support for sysctl unaligned_enabled control

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This sysctl tuning option allows the user to disable misaligned access
handling globally on the system. This will also be used by misaligned
detection code to temporarily disable misaligned access handling.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Björn Töpel <bjorn@rivosinc.com>
Link: https://lore.kernel.org/r/20231004151405.521596-6-cleger@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
This commit is contained in:
Clément Léger 2023-10-04 17:14:02 +02:00 committed by Palmer Dabbelt
parent 7c586a555a
commit bc38f61313
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2 changed files with 10 additions and 0 deletions
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1
arch/riscv/Kconfig
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@ -638,6 +638,7 @@ config THREAD_SIZE_ORDER
config RISCV_MISALIGNED
bool "Support misaligned load/store traps for kernel and userspace"
select SYSCTL_ARCH_UNALIGN_ALLOW
default y
help
Say Y here if you want the kernel to embed support for misaligned

9
arch/riscv/kernel/traps_misaligned.c
View File

@ -396,6 +396,9 @@ union reg_data {
u64 data_u64;
};
/* sysctl hooks */
int unaligned_enabled __read_mostly = 1; /* Enabled by default */
int handle_misaligned_load(struct pt_regs *regs)
{
union reg_data val;
@ -406,6 +409,9 @@ int handle_misaligned_load(struct pt_regs *regs)
perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, addr);
if (!unaligned_enabled)
return -1;
if (get_insn(regs, epc, &insn))
return -1;
@ -502,6 +508,9 @@ int handle_misaligned_store(struct pt_regs *regs)
perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, addr);
if (!unaligned_enabled)
return -1;
if (get_insn(regs, epc, &insn))
return -1;