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drm/i915/display: Generalize intel_hdmi_dsc_get_num_slices helper
Refactor intel_hdmi_dsc_get_num_slices to remove dependency on intel_crtc_state structure by accepting display mode and output format as parameters instead. This makes the function reusable for mode_valid cases where crtc_state is not present. Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Link: https://patch.msgid.link/20260805035027.3473398-3-ankit.k.nautiyal@intel.com
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@ -4282,7 +4282,9 @@ intel_dp_pcon_dsc_enc_slices(struct intel_dp *intel_dp,
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int pcon_max_slices = drm_dp_pcon_dsc_max_slices(intel_dp->pcon_dsc_dpcd);
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int pcon_max_slice_width = drm_dp_pcon_dsc_max_slice_width(intel_dp->pcon_dsc_dpcd);
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return intel_hdmi_dsc_get_num_slices(crtc_state, pcon_max_slices,
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return intel_hdmi_dsc_get_num_slices(&crtc_state->hw.adjusted_mode,
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crtc_state->output_format,
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pcon_max_slices,
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pcon_max_slice_width,
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hdmi_max_slices, hdmi_throughput);
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}
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@ -3216,7 +3216,8 @@ int intel_hdmi_dsc_get_slice_height(int vactive)
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* intel_hdmi_dsc_get_num_slices - get no. of dsc slices based on dsc encoder
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* and dsc decoder capabilities
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*
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* @crtc_state: intel crtc_state
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* @mode: drm_display_mode for which num of slices are needed
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* @output_format : pipe output format
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* @src_max_slices: maximum slices supported by the DSC encoder
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* @src_max_slice_width: maximum slice width supported by DSC encoder
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* @hdmi_max_slices: maximum slices supported by sink DSC decoder
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@ -3226,7 +3227,8 @@ int intel_hdmi_dsc_get_slice_height(int vactive)
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* and decoder.
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*/
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int
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intel_hdmi_dsc_get_num_slices(const struct intel_crtc_state *crtc_state,
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intel_hdmi_dsc_get_num_slices(const struct drm_display_mode *mode,
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enum intel_output_format output_format,
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int src_max_slices, int src_max_slice_width,
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int hdmi_max_slices, int hdmi_throughput)
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{
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@ -3248,7 +3250,7 @@ intel_hdmi_dsc_get_num_slices(const struct intel_crtc_state *crtc_state,
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int max_throughput; /* max clock freq. in khz per slice */
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int max_slice_width;
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int slice_width;
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int pixel_clock = crtc_state->hw.adjusted_mode.crtc_clock;
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int pixel_clock = mode->crtc_clock;
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if (!hdmi_throughput)
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return 0;
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@ -3259,8 +3261,8 @@ intel_hdmi_dsc_get_num_slices(const struct intel_crtc_state *crtc_state,
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* for 4:4:4 is 1.0. Multiplying these factors by 10 and later
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* dividing adjusted clock value by 10.
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*/
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if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR444 ||
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crtc_state->output_format == INTEL_OUTPUT_FORMAT_RGB)
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if (output_format == INTEL_OUTPUT_FORMAT_YCBCR444 ||
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output_format == INTEL_OUTPUT_FORMAT_RGB)
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kslice_adjust = 10;
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else
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kslice_adjust = 5;
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@ -3315,7 +3317,7 @@ intel_hdmi_dsc_get_num_slices(const struct intel_crtc_state *crtc_state,
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else
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return 0;
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slice_width = DIV_ROUND_UP(crtc_state->hw.adjusted_mode.hdisplay, target_slices);
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slice_width = DIV_ROUND_UP(mode->hdisplay, target_slices);
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if (slice_width >= max_slice_width)
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min_slices = target_slices + 1;
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} while (slice_width >= max_slice_width);
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@ -13,6 +13,7 @@ enum intel_output_format;
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enum port;
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struct drm_connector;
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struct drm_connector_state;
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struct drm_display_mode;
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struct drm_encoder;
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struct intel_connector;
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struct intel_crtc_state;
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@ -56,7 +57,8 @@ int intel_hdmi_tmds_clock(int clock, int bpc, enum intel_output_format sink_form
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int intel_hdmi_dsc_get_bpp(int src_fractional_bpp, int slice_width,
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int num_slices, enum intel_output_format output_format,
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bool hdmi_all_bpp, int hdmi_max_chunk_bytes);
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int intel_hdmi_dsc_get_num_slices(const struct intel_crtc_state *crtc_state,
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int intel_hdmi_dsc_get_num_slices(const struct drm_display_mode *mode,
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enum intel_output_format output_format,
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int src_max_slices, int src_max_slice_width,
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int hdmi_max_slices, int hdmi_throughput);
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int intel_hdmi_dsc_get_slice_height(int vactive);
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