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modify dm9000 for info_sdk
This commit is contained in:
lyx
parent
320c438262
commit
bb72dacc65
104
arch/arm/mach-rk2818/board-infosdk.c
Normal file → Executable file
104
arch/arm/mach-rk2818/board-infosdk.c
Normal file → Executable file
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@ -37,6 +37,7 @@
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#include <linux/mtd/nand.h>
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#include <linux/mtd/partitions.h>
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#include <linux/dm9000.h>
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#include "devices.h"
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@ -448,11 +449,104 @@ struct rk2818bl_info rk2818_bl_info = {
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.pw_iomux = GPIOF34_UART3_SEL_NAME,
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};
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/********************************************************
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* dm9000 net work devices
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* author:lyx
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********************************************************/
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#ifdef CONFIG_DM9000
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/*
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GPIOA5_FLASHCS1_SEL_NAME IOMUXB_FLASH_CS1
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GPIOA6_FLASHCS2_SEL_NAME IOMUXB_FLASH_CS2
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GPIOA7_FLASHCS3_SEL_NAME IOMUXB_FLASH_CS3
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GPIOE_SPI1_FLASH_SEL1_NAME IOMUXA_FLASH_CS45
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GPIOE_SPI1_FLASH_SEL_NAME IOMUXA_FLASH_CS67
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*/
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#define DM9000_USE_NAND_CS 1 //cs can be 1,2,3,4,5,6 or 7
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#define DM9000_CS_IOMUX_NAME GPIOA5_FLASHCS1_SEL_NAME
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#define DM9000_CS_IOMUX_MODE IOMUXB_FLASH_CS1
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#define DM9000_NET_INT_PIN RK2818_PIN_PE2
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#define DM9000_INT_IOMUX_NAME GPIOA23_UART2_SEL_NAME
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#define DM9000_INT_IOMUX_MODE IOMUXB_GPIO0_A23
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#define DM9000_INT_INIT_VALUE GPIOPullDown
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#define DM9000_IRQ IRQF_TRIGGER_HIGH
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#define DM9000_IO_ADDR (RK2818_NANDC_PHYS + 0x800 + DM9000_USE_NAND_CS*0x100 + 0x8)
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#define DM9000_DATA_ADDR (RK2818_NANDC_PHYS + 0x800 + DM9000_USE_NAND_CS*0x100 + 0x4)
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int dm9k_gpio_set(void)
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{
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//cs
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rk2818_mux_api_set(DM9000_CS_IOMUX_NAME, DM9000_CS_IOMUX_MODE);
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//int
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rk2818_mux_api_set(DM9000_INT_IOMUX_NAME, DM9000_INT_IOMUX_MODE);
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if (gpio_request(DM9000_NET_INT_PIN, "dm9000 interrupt")) {
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gpio_free(DM9000_NET_INT_PIN);
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rk2818_mux_api_mode_resume(DM9000_INT_IOMUX_NAME);
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rk2818_mux_api_mode_resume(DM9000_CS_IOMUX_NAME);
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printk("[fun:%s line:%d], request gpio for net interrupt fail\n", __func__,__LINE__);
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return -1;
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}
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gpio_pull_updown(DM9000_NET_INT_PIN, DM9000_INT_INIT_VALUE);
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gpio_direction_input(DM9000_NET_INT_PIN);
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return 0;
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}
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int dm9k_gpio_free(void)
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{
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gpio_free(DM9000_NET_INT_PIN);
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rk2818_mux_api_mode_resume(DM9000_INT_IOMUX_NAME);
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rk2818_mux_api_mode_resume(DM9000_CS_IOMUX_NAME);
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return 0;
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}
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int dm9k_get_gpio_irq(void)
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{
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return gpio_to_irq(DM9000_NET_INT_PIN);
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}
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static struct resource dm9k_resource[] = {
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[0] = {
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.start = DM9000_IO_ADDR,
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.end = DM9000_IO_ADDR + 3,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = DM9000_DATA_ADDR,
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.end = DM9000_DATA_ADDR + 3,
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.flags = IORESOURCE_MEM,
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},
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[2] = {
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.start = DM9000_NET_INT_PIN,
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.end = DM9000_NET_INT_PIN,
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.flags = IORESOURCE_IRQ | DM9000_IRQ,
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}
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};
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/* for the moment we limit ourselves to 8bit IO until some
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* better IO routines can be written and tested
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*/
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struct dm9000_plat_data dm9k_platdata = {
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.flags = DM9000_PLATF_8BITONLY,
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.io_init = dm9k_gpio_set,
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.io_deinit = dm9k_gpio_free,
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.get_irq_num = dm9k_get_gpio_irq,
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};
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struct platform_device rk2818_device_dm9k = {
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.name = "dm9000",
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.id = 0,
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.num_resources = ARRAY_SIZE(dm9k_resource),
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.resource = dm9k_resource,
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.dev = {
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.platform_data = &dm9k_platdata,
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}
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};
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#endif
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static struct platform_device *devices[] __initdata = {
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&rk2818_device_uart1,
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#ifdef CONFIG_DM9000
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&rk2818_device_dm9k,
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#endif
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#ifdef CONFIG_I2C0_RK2818
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&rk2818_device_i2c0,
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#endif
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@ -480,6 +574,10 @@ static struct platform_device *devices[] __initdata = {
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#ifdef CONFIG_MTD_NAND_RK2818
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&rk2818_nand_device,
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#endif
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#ifdef CONFIG_DM9000
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&rk2818_device_dm9k,
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#endif
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#ifdef CONFIG_DWC_OTG
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&rk2818_device_dwc_otg,
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#endif
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166
arch/arm/mach-rk2818/board-midsdk.c
Normal file → Executable file
166
arch/arm/mach-rk2818/board-midsdk.c
Normal file → Executable file
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@ -443,109 +443,99 @@ struct rk2818bl_info rk2818_bl_info = {
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.pw_iomux = GPIOA23_UART2_SEL_NAME,
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};
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/********************************************************
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* dm9000 net work devices
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* author:lyx
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********************************************************/
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#ifdef CONFIG_DM9000
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#define NET_INT_PIN RK2818_PIN_PE2
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/*dm9000 gpio set*/
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/*
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GPIOA5_FLASHCS1_SEL_NAME IOMUXB_FLASH_CS1
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GPIOA6_FLASHCS2_SEL_NAME IOMUXB_FLASH_CS2
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GPIOA7_FLASHCS3_SEL_NAME IOMUXB_FLASH_CS3
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GPIOE_SPI1_FLASH_SEL1_NAME IOMUXA_FLASH_CS45
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GPIOE_SPI1_FLASH_SEL_NAME IOMUXA_FLASH_CS67
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*/
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#define DM9000_USE_NAND_CS 1 //cs can be 1,2,3,4,5,6 or 7
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#define DM9000_CS_IOMUX_NAME GPIOA5_FLASHCS1_SEL_NAME
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#define DM9000_CS_IOMUX_MODE IOMUXB_FLASH_CS1
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#define DM9000_NET_INT_PIN RK2818_PIN_PE2
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#define DM9000_INT_IOMUX_NAME GPIOE_SPI1_FLASH_SEL1_NAME
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#define DM9000_INT_IOMUX_MODE IOMUXA_GPIO1_A12
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#define DM9000_INT_INIT_VALUE GPIOPullDown
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#define DM9000_IRQ IRQF_TRIGGER_HIGH
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#define DM9000_IO_ADDR (RK2818_NANDC_PHYS + 0x800 + DM9000_USE_NAND_CS*0x100 + 0x8)
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#define DM9000_DATA_ADDR (RK2818_NANDC_PHYS + 0x800 + DM9000_USE_NAND_CS*0x100 + 0x4)
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int dm9k_gpio_set(void)
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{
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//cs
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#ifdef CONFIG_DM9000_CHIP_SELECT
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switch (CONFIG_DM9000_CHIP_SELECT) {
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case 1:
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rk2818_mux_api_set(GPIOA5_FLASHCS1_SEL_NAME, IOMUXB_FLASH_CS1);
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break;
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case 2:
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rk2818_mux_api_set(GPIOA6_FLASHCS2_SEL_NAME, IOMUXB_FLASH_CS2);
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break;
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case 3:
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rk2818_mux_api_set(GPIOA7_FLASHCS3_SEL_NAME, IOMUXB_FLASH_CS3);
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break;
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case 4:
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case 5:
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rk2818_mux_api_set(GPIOE_SPI1_FLASH_SEL1_NAME, IOMUXA_FLASH_CS45);
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break;
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case 6:
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case 7:
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rk2818_mux_api_set(GPIOE_SPI1_FLASH_SEL_NAME, IOMUXA_FLASH_CS67);
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break;
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default:
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break;
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}
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#endif
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rk2818_mux_api_set(DM9000_CS_IOMUX_NAME, DM9000_CS_IOMUX_MODE);
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//int
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rk2818_mux_api_set(GPIOE_SPI1_FLASH_SEL1_NAME, IOMUXA_GPIO1_A12);
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if (gpio_request(NET_INT_PIN, "dm9000 interrupt")) {
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gpio_free(NET_INT_PIN);
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rk2818_mux_api_mode_resume(GPIOA1_HOSTDATA17_SEL_NAME);
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rk2818_mux_api_set(DM9000_INT_IOMUX_NAME, DM9000_INT_IOMUX_MODE);
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if (gpio_request(DM9000_NET_INT_PIN, "dm9000 interrupt")) {
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gpio_free(DM9000_NET_INT_PIN);
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rk2818_mux_api_mode_resume(DM9000_INT_IOMUX_NAME);
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rk2818_mux_api_mode_resume(DM9000_CS_IOMUX_NAME);
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printk("[fun:%s line:%d], request gpio for net interrupt fail\n", __func__,__LINE__);
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goto err;
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return -1;
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}
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gpio_pull_updown(NET_INT_PIN, GPIOPullDown);
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gpio_direction_input(NET_INT_PIN);
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return 0;
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err:
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gpio_pull_updown(DM9000_NET_INT_PIN, DM9000_INT_INIT_VALUE);
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gpio_direction_input(DM9000_NET_INT_PIN);
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#ifdef CONFIG_DM9000_CHIP_SELECT
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switch (CONFIG_DM9000_CHIP_SELECT) {
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case 1:
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rk2818_mux_api_mode_resume(GPIOA5_FLASHCS1_SEL_NAME);
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break;
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case 2:
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rk2818_mux_api_mode_resume(GPIOA6_FLASHCS2_SEL_NAME);
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break;
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case 3:
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rk2818_mux_api_mode_resume(GPIOA7_FLASHCS3_SEL_NAME);
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break;
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case 4:
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case 5:
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rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL1_NAME);
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break;
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case 6:
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case 7:
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rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL_NAME);
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break;
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default:
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break;
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}
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#endif
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return -1;
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return 0;
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}
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void dm9k_gpio_free(void)
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int dm9k_gpio_free(void)
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{
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gpio_free(NET_INT_PIN);
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rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL1_NAME);
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#ifdef CONFIG_DM9000_CHIP_SELECT
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switch (CONFIG_DM9000_CHIP_SELECT) {
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case 1:
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rk2818_mux_api_mode_resume(GPIOA5_FLASHCS1_SEL_NAME);
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break;
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case 2:
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rk2818_mux_api_mode_resume(GPIOA6_FLASHCS2_SEL_NAME);
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break;
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case 3:
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rk2818_mux_api_mode_resume(GPIOA7_FLASHCS3_SEL_NAME);
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break;
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case 4:
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case 5:
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rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL1_NAME);
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break;
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case 6:
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case 7:
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rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL_NAME);
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break;
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default:
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break;
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}
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#endif
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gpio_free(DM9000_NET_INT_PIN);
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rk2818_mux_api_mode_resume(DM9000_INT_IOMUX_NAME);
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rk2818_mux_api_mode_resume(DM9000_CS_IOMUX_NAME);
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return 0;
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}
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int dm9k_get_gpio_irq(void)
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{
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return gpio_to_irq(DM9000_NET_INT_PIN);
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}
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struct dm9000_plat_data dm9k_platdata = {
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static struct resource dm9k_resource[] = {
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[0] = {
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.start = DM9000_IO_ADDR,
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.end = DM9000_IO_ADDR + 3,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = DM9000_DATA_ADDR,
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.end = DM9000_DATA_ADDR + 3,
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.flags = IORESOURCE_MEM,
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},
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[2] = {
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.start = DM9000_NET_INT_PIN,
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.end = DM9000_NET_INT_PIN,
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.flags = IORESOURCE_IRQ | DM9000_IRQ,
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}
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};
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/* for the moment we limit ourselves to 8bit IO until some
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* better IO routines can be written and tested
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*/
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struct dm9000_plat_data dm9k_platdata = {
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.flags = DM9000_PLATF_8BITONLY,
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.pin_int = NET_INT_PIN,
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.net_gpio_set = dm9k_gpio_set,
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.net_gpio_free = dm9k_gpio_free,
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.io_init = dm9k_gpio_set,
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.io_deinit = dm9k_gpio_free,
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.get_irq_num = dm9k_get_gpio_irq,
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};
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struct platform_device rk2818_device_dm9k = {
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.name = "dm9000",
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.id = 0,
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.num_resources = ARRAY_SIZE(dm9k_resource),
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.resource = dm9k_resource,
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.dev = {
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.platform_data = &dm9k_platdata,
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}
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};
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#endif
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@ -449,108 +449,99 @@ struct rk2818bl_info rk2818_bl_info = {
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.pw_iomux = GPIOF34_UART3_SEL_NAME,
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};
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/********************************************************
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* dm9000 net work devices
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* author:lyx
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********************************************************/
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#ifdef CONFIG_DM9000
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#define NET_INT_PIN RK2818_PIN_PA1
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/*dm9000 gpio set*/
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/*
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GPIOA5_FLASHCS1_SEL_NAME IOMUXB_FLASH_CS1
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GPIOA6_FLASHCS2_SEL_NAME IOMUXB_FLASH_CS2
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GPIOA7_FLASHCS3_SEL_NAME IOMUXB_FLASH_CS3
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GPIOE_SPI1_FLASH_SEL1_NAME IOMUXA_FLASH_CS45
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GPIOE_SPI1_FLASH_SEL_NAME IOMUXA_FLASH_CS67
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*/
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#define DM9000_USE_NAND_CS 1 //cs can be 1,2,3,4,5,6 or 7
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#define DM9000_CS_IOMUX_NAME GPIOA5_FLASHCS1_SEL_NAME
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#define DM9000_CS_IOMUX_MODE IOMUXB_FLASH_CS1
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#define DM9000_NET_INT_PIN RK2818_PIN_PA1
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#define DM9000_INT_IOMUX_NAME GPIOA1_HOSTDATA17_SEL_NAME
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#define DM9000_INT_IOMUX_MODE IOMUXB_GPIO0_A1
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#define DM9000_INT_INIT_VALUE GPIOPullDown
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#define DM9000_IRQ IRQF_TRIGGER_HIGH
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#define DM9000_IO_ADDR (RK2818_NANDC_PHYS + 0x800 + DM9000_USE_NAND_CS*0x100 + 0x8)
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#define DM9000_DATA_ADDR (RK2818_NANDC_PHYS + 0x800 + DM9000_USE_NAND_CS*0x100 + 0x4)
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int dm9k_gpio_set(void)
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{
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//cs
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#ifdef CONFIG_DM9000_CHIP_SELECT
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switch (CONFIG_DM9000_CHIP_SELECT) {
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case 1:
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rk2818_mux_api_set(GPIOA5_FLASHCS1_SEL_NAME, IOMUXB_FLASH_CS1);
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break;
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case 2:
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rk2818_mux_api_set(GPIOA6_FLASHCS2_SEL_NAME, IOMUXB_FLASH_CS2);
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break;
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case 3:
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rk2818_mux_api_set(GPIOA7_FLASHCS3_SEL_NAME, IOMUXB_FLASH_CS3);
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break;
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case 4:
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case 5:
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rk2818_mux_api_set(GPIOE_SPI1_FLASH_SEL1_NAME, IOMUXA_FLASH_CS45);
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break;
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case 6:
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case 7:
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rk2818_mux_api_set(GPIOE_SPI1_FLASH_SEL_NAME, IOMUXA_FLASH_CS67);
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break;
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default:
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break;
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}
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#endif
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rk2818_mux_api_set(DM9000_CS_IOMUX_NAME, DM9000_CS_IOMUX_MODE);
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//int
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rk2818_mux_api_set(GPIOA1_HOSTDATA17_SEL_NAME, IOMUXB_GPIO0_A1);
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if (gpio_request(NET_INT_PIN, "dm9000 interrupt")) {
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gpio_free(NET_INT_PIN);
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rk2818_mux_api_mode_resume(GPIOA1_HOSTDATA17_SEL_NAME);
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rk2818_mux_api_set(DM9000_INT_IOMUX_NAME, DM9000_INT_IOMUX_MODE);
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if (gpio_request(DM9000_NET_INT_PIN, "dm9000 interrupt")) {
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gpio_free(DM9000_NET_INT_PIN);
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rk2818_mux_api_mode_resume(DM9000_INT_IOMUX_NAME);
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rk2818_mux_api_mode_resume(DM9000_CS_IOMUX_NAME);
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printk("[fun:%s line:%d], request gpio for net interrupt fail\n", __func__,__LINE__);
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goto err;
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return -1;
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}
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gpio_pull_updown(NET_INT_PIN, GPIOPullDown);
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gpio_direction_input(NET_INT_PIN);
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gpio_pull_updown(DM9000_NET_INT_PIN, DM9000_INT_INIT_VALUE);
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gpio_direction_input(DM9000_NET_INT_PIN);
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return 0;
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||||
|
||||
err:
|
||||
#ifdef CONFIG_DM9000_CHIP_SELECT
|
||||
switch (CONFIG_DM9000_CHIP_SELECT) {
|
||||
case 1:
|
||||
rk2818_mux_api_mode_resume(GPIOA5_FLASHCS1_SEL_NAME);
|
||||
break;
|
||||
case 2:
|
||||
rk2818_mux_api_mode_resume(GPIOA6_FLASHCS2_SEL_NAME);
|
||||
break;
|
||||
case 3:
|
||||
rk2818_mux_api_mode_resume(GPIOA7_FLASHCS3_SEL_NAME);
|
||||
break;
|
||||
case 4:
|
||||
case 5:
|
||||
rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL1_NAME);
|
||||
break;
|
||||
case 6:
|
||||
case 7:
|
||||
rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL_NAME);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
return -1;
|
||||
}
|
||||
void dm9k_gpio_free(void)
|
||||
int dm9k_gpio_free(void)
|
||||
{
|
||||
gpio_free(NET_INT_PIN);
|
||||
rk2818_mux_api_mode_resume(GPIOA1_HOSTDATA17_SEL_NAME);
|
||||
#ifdef CONFIG_DM9000_CHIP_SELECT
|
||||
switch (CONFIG_DM9000_CHIP_SELECT) {
|
||||
case 1:
|
||||
rk2818_mux_api_mode_resume(GPIOA5_FLASHCS1_SEL_NAME);
|
||||
break;
|
||||
case 2:
|
||||
rk2818_mux_api_mode_resume(GPIOA6_FLASHCS2_SEL_NAME);
|
||||
break;
|
||||
case 3:
|
||||
rk2818_mux_api_mode_resume(GPIOA7_FLASHCS3_SEL_NAME);
|
||||
break;
|
||||
case 4:
|
||||
case 5:
|
||||
rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL1_NAME);
|
||||
break;
|
||||
case 6:
|
||||
case 7:
|
||||
rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL_NAME);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
gpio_free(DM9000_NET_INT_PIN);
|
||||
rk2818_mux_api_mode_resume(DM9000_INT_IOMUX_NAME);
|
||||
rk2818_mux_api_mode_resume(DM9000_CS_IOMUX_NAME);
|
||||
return 0;
|
||||
}
|
||||
int dm9k_get_gpio_irq(void)
|
||||
{
|
||||
return gpio_to_irq(DM9000_NET_INT_PIN);
|
||||
}
|
||||
|
||||
static struct resource dm9k_resource[] = {
|
||||
[0] = {
|
||||
.start = DM9000_IO_ADDR,
|
||||
.end = DM9000_IO_ADDR + 3,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = DM9000_DATA_ADDR,
|
||||
.end = DM9000_DATA_ADDR + 3,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[2] = {
|
||||
.start = DM9000_NET_INT_PIN,
|
||||
.end = DM9000_NET_INT_PIN,
|
||||
.flags = IORESOURCE_IRQ | DM9000_IRQ,
|
||||
}
|
||||
|
||||
};
|
||||
|
||||
/* for the moment we limit ourselves to 8bit IO until some
|
||||
* better IO routines can be written and tested
|
||||
*/
|
||||
struct dm9000_plat_data dm9k_platdata = {
|
||||
.flags = DM9000_PLATF_8BITONLY,
|
||||
.pin_int = NET_INT_PIN,
|
||||
.net_gpio_set = dm9k_gpio_set,
|
||||
.net_gpio_free = dm9k_gpio_free,
|
||||
.io_init = dm9k_gpio_set,
|
||||
.io_deinit = dm9k_gpio_free,
|
||||
.get_irq_num = dm9k_get_gpio_irq,
|
||||
};
|
||||
|
||||
struct platform_device rk2818_device_dm9k = {
|
||||
.name = "dm9000",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(dm9k_resource),
|
||||
.resource = dm9k_resource,
|
||||
.dev = {
|
||||
.platform_data = &dm9k_platdata,
|
||||
}
|
||||
};
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -616,108 +616,99 @@ struct rk2818bl_info rk2818_bl_info = {
|
|||
.pw_iomux = GPIOF34_UART3_SEL_NAME,
|
||||
};
|
||||
|
||||
/********************************************************
|
||||
* dm9000 net work devices
|
||||
* author:lyx
|
||||
********************************************************/
|
||||
#ifdef CONFIG_DM9000
|
||||
#define NET_INT_PIN RK2818_PIN_PA1
|
||||
/*dm9000 gpio set*/
|
||||
/*
|
||||
GPIOA5_FLASHCS1_SEL_NAME IOMUXB_FLASH_CS1
|
||||
GPIOA6_FLASHCS2_SEL_NAME IOMUXB_FLASH_CS2
|
||||
GPIOA7_FLASHCS3_SEL_NAME IOMUXB_FLASH_CS3
|
||||
GPIOE_SPI1_FLASH_SEL1_NAME IOMUXA_FLASH_CS45
|
||||
GPIOE_SPI1_FLASH_SEL_NAME IOMUXA_FLASH_CS67
|
||||
*/
|
||||
#define DM9000_USE_NAND_CS 1 //cs can be 1,2,3,4,5,6 or 7
|
||||
#define DM9000_CS_IOMUX_NAME GPIOA5_FLASHCS1_SEL_NAME
|
||||
#define DM9000_CS_IOMUX_MODE IOMUXB_FLASH_CS1
|
||||
#define DM9000_NET_INT_PIN RK2818_PIN_PA1
|
||||
#define DM9000_INT_IOMUX_NAME GPIOA1_HOSTDATA17_SEL_NAME
|
||||
#define DM9000_INT_IOMUX_MODE IOMUXB_GPIO0_A1
|
||||
#define DM9000_INT_INIT_VALUE GPIOPullDown
|
||||
#define DM9000_IRQ IRQF_TRIGGER_HIGH
|
||||
#define DM9000_IO_ADDR (RK2818_NANDC_PHYS + 0x800 + DM9000_USE_NAND_CS*0x100 + 0x8)
|
||||
#define DM9000_DATA_ADDR (RK2818_NANDC_PHYS + 0x800 + DM9000_USE_NAND_CS*0x100 + 0x4)
|
||||
|
||||
int dm9k_gpio_set(void)
|
||||
{
|
||||
//cs
|
||||
#ifdef CONFIG_DM9000_CHIP_SELECT
|
||||
switch (CONFIG_DM9000_CHIP_SELECT) {
|
||||
case 1:
|
||||
rk2818_mux_api_set(GPIOA5_FLASHCS1_SEL_NAME, IOMUXB_FLASH_CS1);
|
||||
break;
|
||||
case 2:
|
||||
rk2818_mux_api_set(GPIOA6_FLASHCS2_SEL_NAME, IOMUXB_FLASH_CS2);
|
||||
break;
|
||||
case 3:
|
||||
rk2818_mux_api_set(GPIOA7_FLASHCS3_SEL_NAME, IOMUXB_FLASH_CS3);
|
||||
break;
|
||||
case 4:
|
||||
case 5:
|
||||
rk2818_mux_api_set(GPIOE_SPI1_FLASH_SEL1_NAME, IOMUXA_FLASH_CS45);
|
||||
break;
|
||||
case 6:
|
||||
case 7:
|
||||
rk2818_mux_api_set(GPIOE_SPI1_FLASH_SEL_NAME, IOMUXA_FLASH_CS67);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
rk2818_mux_api_set(DM9000_CS_IOMUX_NAME, DM9000_CS_IOMUX_MODE);
|
||||
|
||||
//int
|
||||
rk2818_mux_api_set(GPIOA1_HOSTDATA17_SEL_NAME, IOMUXB_GPIO0_A1);
|
||||
if (gpio_request(NET_INT_PIN, "dm9000 interrupt")) {
|
||||
gpio_free(NET_INT_PIN);
|
||||
rk2818_mux_api_mode_resume(GPIOA1_HOSTDATA17_SEL_NAME);
|
||||
printk("[fun:%s line:%d], request gpio for net interrupt fail\n", __func__,__LINE__);
|
||||
goto err;
|
||||
}
|
||||
gpio_pull_updown(NET_INT_PIN, GPIOPullDown);
|
||||
gpio_direction_input(NET_INT_PIN);
|
||||
return 0;
|
||||
err:
|
||||
rk2818_mux_api_set(DM9000_INT_IOMUX_NAME, DM9000_INT_IOMUX_MODE);
|
||||
|
||||
#ifdef CONFIG_DM9000_CHIP_SELECT
|
||||
switch (CONFIG_DM9000_CHIP_SELECT) {
|
||||
case 1:
|
||||
rk2818_mux_api_mode_resume(GPIOA5_FLASHCS1_SEL_NAME);
|
||||
break;
|
||||
case 2:
|
||||
rk2818_mux_api_mode_resume(GPIOA6_FLASHCS2_SEL_NAME);
|
||||
break;
|
||||
case 3:
|
||||
rk2818_mux_api_mode_resume(GPIOA7_FLASHCS3_SEL_NAME);
|
||||
break;
|
||||
case 4:
|
||||
case 5:
|
||||
rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL1_NAME);
|
||||
break;
|
||||
case 6:
|
||||
case 7:
|
||||
rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL_NAME);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
return -1;
|
||||
if (gpio_request(DM9000_NET_INT_PIN, "dm9000 interrupt")) {
|
||||
gpio_free(DM9000_NET_INT_PIN);
|
||||
rk2818_mux_api_mode_resume(DM9000_INT_IOMUX_NAME);
|
||||
rk2818_mux_api_mode_resume(DM9000_CS_IOMUX_NAME);
|
||||
printk("[fun:%s line:%d], request gpio for net interrupt fail\n", __func__,__LINE__);
|
||||
|
||||
return -1;
|
||||
}
|
||||
gpio_pull_updown(DM9000_NET_INT_PIN, DM9000_INT_INIT_VALUE);
|
||||
gpio_direction_input(DM9000_NET_INT_PIN);
|
||||
|
||||
return 0;
|
||||
}
|
||||
void dm9k_gpio_free(void)
|
||||
int dm9k_gpio_free(void)
|
||||
{
|
||||
gpio_free(NET_INT_PIN);
|
||||
rk2818_mux_api_mode_resume(GPIOA1_HOSTDATA17_SEL_NAME);
|
||||
#ifdef CONFIG_DM9000_CHIP_SELECT
|
||||
switch (CONFIG_DM9000_CHIP_SELECT) {
|
||||
case 1:
|
||||
rk2818_mux_api_mode_resume(GPIOA5_FLASHCS1_SEL_NAME);
|
||||
break;
|
||||
case 2:
|
||||
rk2818_mux_api_mode_resume(GPIOA6_FLASHCS2_SEL_NAME);
|
||||
break;
|
||||
case 3:
|
||||
rk2818_mux_api_mode_resume(GPIOA7_FLASHCS3_SEL_NAME);
|
||||
break;
|
||||
case 4:
|
||||
case 5:
|
||||
rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL1_NAME);
|
||||
break;
|
||||
case 6:
|
||||
case 7:
|
||||
rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL_NAME);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
gpio_free(DM9000_NET_INT_PIN);
|
||||
rk2818_mux_api_mode_resume(DM9000_INT_IOMUX_NAME);
|
||||
rk2818_mux_api_mode_resume(DM9000_CS_IOMUX_NAME);
|
||||
return 0;
|
||||
}
|
||||
int dm9k_get_gpio_irq(void)
|
||||
{
|
||||
return gpio_to_irq(DM9000_NET_INT_PIN);
|
||||
}
|
||||
|
||||
static struct resource dm9k_resource[] = {
|
||||
[0] = {
|
||||
.start = DM9000_IO_ADDR,
|
||||
.end = DM9000_IO_ADDR + 3,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = DM9000_DATA_ADDR,
|
||||
.end = DM9000_DATA_ADDR + 3,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[2] = {
|
||||
.start = DM9000_NET_INT_PIN,
|
||||
.end = DM9000_NET_INT_PIN,
|
||||
.flags = IORESOURCE_IRQ | DM9000_IRQ,
|
||||
}
|
||||
|
||||
};
|
||||
|
||||
/* for the moment we limit ourselves to 8bit IO until some
|
||||
* better IO routines can be written and tested
|
||||
*/
|
||||
struct dm9000_plat_data dm9k_platdata = {
|
||||
.flags = DM9000_PLATF_8BITONLY,
|
||||
.pin_int = NET_INT_PIN,
|
||||
.net_gpio_set = dm9k_gpio_set,
|
||||
.net_gpio_free = dm9k_gpio_free,
|
||||
.io_init = dm9k_gpio_set,
|
||||
.io_deinit = dm9k_gpio_free,
|
||||
.get_irq_num = dm9k_get_gpio_irq,
|
||||
};
|
||||
|
||||
struct platform_device rk2818_device_dm9k = {
|
||||
.name = "dm9000",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(dm9k_resource),
|
||||
.resource = dm9k_resource,
|
||||
.dev = {
|
||||
.platform_data = &dm9k_platdata,
|
||||
}
|
||||
};
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -27,7 +27,6 @@
|
|||
#include <linux/mtd/nand.h>
|
||||
#include <linux/mtd/partitions.h>
|
||||
|
||||
#include <linux/dm9000.h>
|
||||
#include <mach/gpio.h>
|
||||
#include <mach/rk2818_nand.h>
|
||||
#include <mach/iomux.h>
|
||||
|
|
@ -322,47 +321,6 @@ struct platform_device rk2818_soc_camera_pdrv = {
|
|||
};
|
||||
#endif
|
||||
|
||||
//net device
|
||||
/* DM9000 */
|
||||
#ifdef CONFIG_DM9000
|
||||
#ifdef CONFIG_DM9000_CHIP_SELECT
|
||||
#define DM9000_CS CONFIG_DM9000_CHIP_SELECT
|
||||
#else
|
||||
#define DM9000_CS 1
|
||||
#endif
|
||||
static struct resource dm9k_resource[] = {
|
||||
[0] = {
|
||||
.start = RK2818_NANDC_PHYS + 0x800 + (DM9000_CS*0x100 + 0x8), //nand_cs1+nand_cmd
|
||||
.end = RK2818_NANDC_PHYS + 0x800 + (DM9000_CS*0x100 + 0x8) + 3,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = RK2818_NANDC_PHYS + 0x800 + (DM9000_CS*0x100 + 0x4), //nand_cs1+nand_data
|
||||
.end = RK2818_NANDC_PHYS + 0x800 + (DM9000_CS*0x100 + 0x4) + 3,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[2] = {
|
||||
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
|
||||
}
|
||||
};
|
||||
|
||||
/* for the moment we limit ourselves to 8bit IO until some
|
||||
* better IO routines can be written and tested
|
||||
*/
|
||||
|
||||
//dm9k_platdata.flags = DM9000_PLATF_8BITONLY;
|
||||
|
||||
struct platform_device rk2818_device_dm9k = {
|
||||
.name = "dm9000",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(dm9k_resource),
|
||||
.resource = dm9k_resource,
|
||||
.dev = {
|
||||
.platform_data = &dm9k_platdata,
|
||||
}
|
||||
};
|
||||
#endif
|
||||
|
||||
/*ADC*/
|
||||
static struct resource rk2818_adc_resource[] = {
|
||||
{
|
||||
|
|
|
|||
|
|
@ -37,8 +37,6 @@ extern struct platform_device rk2818_device_sdmmc0;
|
|||
extern struct platform_device rk2818_device_sdmmc1;
|
||||
extern struct rk2818_sdmmc_platform_data default_sdmmc0_data;
|
||||
extern struct rk2818_sdmmc_platform_data default_sdmmc1_data;
|
||||
extern struct platform_device rk2818_device_dm9k;
|
||||
extern struct dm9000_plat_data dm9k_platdata;
|
||||
extern struct platform_device rk2818_device_i2s;
|
||||
extern struct platform_device rk2818_device_pmem;
|
||||
extern struct platform_device rk2818_device_pmem_dsp;
|
||||
|
|
|
|||
8
drivers/net/Kconfig
Normal file → Executable file
8
drivers/net/Kconfig
Normal file → Executable file
|
|
@ -957,14 +957,6 @@ choice
|
|||
tristate "DM9000 with NOR Interface"
|
||||
endchoice
|
||||
endif
|
||||
|
||||
config DM9000_CHIP_SELECT
|
||||
int "the number of nandc chip select for DM9000"
|
||||
depends on DM9000_USE_NAND_CONTROL
|
||||
default 1
|
||||
help
|
||||
select the cs for dm9000
|
||||
|
||||
|
||||
config DM9000_FORCE_SIMPLE_PHY_POLL
|
||||
bool "Force simple NSR based PHY polling"
|
||||
|
|
|
|||
|
|
@ -1228,13 +1228,8 @@ dm9000_open(struct net_device *dev)
|
|||
|
||||
irqflags |= IRQF_SHARED;
|
||||
|
||||
#ifndef CONFIG_MACH_RK2818MID
|
||||
if (request_irq(dev->irq, dm9000_interrupt, IRQF_TRIGGER_HIGH, dev->name, dev))
|
||||
return -EAGAIN;
|
||||
#else
|
||||
if (request_irq(dev->irq, dm9000_interrupt, irqflags, dev->name, dev))
|
||||
return -EAGAIN;
|
||||
#endif
|
||||
|
||||
/* Initialize DM9000 board */
|
||||
dm9000_reset(db);
|
||||
|
|
@ -1515,34 +1510,20 @@ dm9000_probe(struct platform_device *pdev)
|
|||
/* fill in parameters for net-dev structure */
|
||||
ndev->base_addr = (unsigned long)db->io_addr;
|
||||
|
||||
#if 0
|
||||
rk2818_mux_api_set(GPIOA5_FLASHCS1_SEL_NAME, IOMUXB_FLASH_CS1);
|
||||
|
||||
#ifdef CONFIG_MACH_RK2818MID
|
||||
rk2818_mux_api_set(GPIOE_SPI1_FLASH_SEL1_NAME, IOMUXA_GPIO1_A12);
|
||||
ndev->irq = gpio_to_irq(db->irq_res->start);
|
||||
#else
|
||||
rk2818_mux_api_set(GPIOA1_HOSTDATA17_SEL_NAME, IOMUXB_GPIO0_A1);
|
||||
if (gpio_request(db->irq_res->start, "dm9000 interrupt")) {
|
||||
gpio_free(db->irq_res->start);
|
||||
dev_err(db->dev, "failed to request gpio\n");
|
||||
ret = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
gpio_pull_updown(db->irq_res->start, GPIOPullDown);
|
||||
ndev->irq = gpio_to_irq(db->irq_res->start);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
if (pdata->net_gpio_set) {
|
||||
if (pdata->net_gpio_set()) {
|
||||
//io init for dm9000 , modify by lyx@20100809
|
||||
if (pdata && pdata->io_init) {
|
||||
if (pdata->io_init()) {
|
||||
ret = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
}
|
||||
|
||||
ndev->irq = gpio_to_irq(pdata->pin_int);
|
||||
|
||||
if (pdata && pdata->get_irq_num) {
|
||||
ndev->irq = pdata->get_irq_num();
|
||||
}
|
||||
else {
|
||||
ndev->irq = db->irq_res->start;
|
||||
}
|
||||
|
||||
/* ensure at least we have a default set of IO routines */
|
||||
dm9000_set_io(db, iosize);
|
||||
|
||||
|
|
@ -1735,6 +1716,11 @@ static int __devexit
|
|||
dm9000_drv_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct net_device *ndev = platform_get_drvdata(pdev);
|
||||
struct dm9000_plat_data *pdata = pdev->dev.platform_data;
|
||||
|
||||
//deinit io for dm9000
|
||||
if (pdata && pdata->io_deinit)
|
||||
pdata->io_deinit();
|
||||
|
||||
platform_set_drvdata(pdev, NULL);
|
||||
|
||||
|
|
|
|||
7
include/linux/dm9000.h
Normal file → Executable file
7
include/linux/dm9000.h
Normal file → Executable file
|
|
@ -29,11 +29,10 @@ struct dm9000_plat_data {
|
|||
unsigned int flags;
|
||||
unsigned char dev_addr[6];
|
||||
|
||||
unsigned int pin_int;
|
||||
//gpio init&deinit
|
||||
int (*net_gpio_set)(void);
|
||||
void (*net_gpio_free)(void);
|
||||
|
||||
int (*io_init)(void);
|
||||
int (*io_deinit)(void);
|
||||
int (*get_irq_num)(void);
|
||||
|
||||
/* allow replacement IO routines */
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user