From bb497bef8b20fcb6e07c05cbf66a6d637fbd9735 Mon Sep 17 00:00:00 2001 From: Vivek Aknurwar Date: Thu, 1 Oct 2020 23:28:15 +0530 Subject: [PATCH] clk: qcom: Add WARN_CLK support for PLL, RCG and Branch clocks Add support for WARN_CLK to dump the clock registers and calltrace in case of failure in the kernel message. Change-Id: If7452aaa02cc50deafd6f3721921f66cad9ab932 Signed-off-by: Taniya Das Signed-off-by: Vivek Aknurwar Signed-off-by: Mike Tipton --- drivers/clk/qcom/clk-alpha-pll.c | 3 +-- drivers/clk/qcom/clk-branch.c | 8 +++----- drivers/clk/qcom/clk-rcg2.c | 7 +++---- 3 files changed, 7 insertions(+), 11 deletions(-) diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c index 4c1a9b69f1ee..12af0275e809 100644 --- a/drivers/clk/qcom/clk-alpha-pll.c +++ b/drivers/clk/qcom/clk-alpha-pll.c @@ -202,7 +202,6 @@ static int wait_for_pll(struct clk_alpha_pll *pll, u32 mask, bool inverse, u32 val; int count; int ret; - const char *name = clk_hw_get_name(&pll->clkr.hw); ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); if (ret) @@ -220,7 +219,7 @@ static int wait_for_pll(struct clk_alpha_pll *pll, u32 mask, bool inverse, udelay(1); } - WARN(1, "%s failed to %s!\n", name, action); + WARN_CLK(&pll->clkr.hw, 1, "%s failed to %s!\n", action); return -ETIMEDOUT; } diff --git a/drivers/clk/qcom/clk-branch.c b/drivers/clk/qcom/clk-branch.c index adfd271dc827..31e588a6054f 100644 --- a/drivers/clk/qcom/clk-branch.c +++ b/drivers/clk/qcom/clk-branch.c @@ -72,8 +72,6 @@ static int clk_branch_wait(const struct clk_branch *br, bool enabling, bool (check_halt)(const struct clk_branch *, bool)) { bool voted = br->halt_check & BRANCH_VOTED; - const char *name = qcom_clk_hw_get_name(&br->clkr.hw); - /* * Skip checking halt bit if we're explicitly ignoring the bit or the * clock is in hardware gated mode @@ -93,7 +91,7 @@ static int clk_branch_wait(const struct clk_branch *br, bool enabling, return 0; udelay(1); } - WARN(1, "%s status stuck at 'o%s'", name, + WARN_CLK((struct clk_hw *)&br->clkr.hw, 1, "status stuck at 'o%s'", enabling ? "ff" : "n"); return -EBUSY; } @@ -191,7 +189,7 @@ static void clk_branch2_list_registers(struct seq_file *f, struct clk_hw *hw) for (i = 0; i < size; i++) { regmap_read(br->clkr.regmap, br->halt_reg + data[i].offset, &val); - seq_printf(f, "%20s: 0x%.8x\n", data[i].name, val); + clock_debug_output(f, "%20s: 0x%.8x\n", data[i].name, val); } if ((br->halt_check & BRANCH_HALT_VOTED) && @@ -201,7 +199,7 @@ static void clk_branch2_list_registers(struct seq_file *f, struct clk_hw *hw) for (i = 0; i < size; i++) { regmap_read(br->clkr.regmap, rclk->enable_reg + data1[i].offset, &val); - seq_printf(f, "%20s: 0x%.8x\n", + clock_debug_output(f, "%20s: 0x%.8x\n", data1[i].name, val); } } diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c index 633ca37d89f1..7f116b064013 100644 --- a/drivers/clk/qcom/clk-rcg2.c +++ b/drivers/clk/qcom/clk-rcg2.c @@ -112,7 +112,6 @@ static int update_config(struct clk_rcg2 *rcg) int count, ret; u32 cmd; struct clk_hw *hw = &rcg->clkr.hw; - const char *name = clk_hw_get_name(hw); ret = regmap_update_bits(rcg->clkr.regmap, rcg->cmd_rcgr + CMD_REG, CMD_UPDATE, CMD_UPDATE); @@ -129,7 +128,7 @@ static int update_config(struct clk_rcg2 *rcg) udelay(1); } - WARN(1, "%s: rcg didn't update its configuration.", name); + WARN_CLK(hw, 1, "rcg didn't update its configuration."); return -EBUSY; } @@ -164,7 +163,7 @@ static int clk_rcg2_set_force_enable(struct clk_hw *hw) udelay(1); } - WARN(1, "%s: rcg didn't turn on.", clk_hw_get_name(hw)); + WARN_CLK(hw, 1, "rcg didn't turn on."); return ret; } @@ -489,7 +488,7 @@ static void clk_rcg2_list_registers(struct seq_file *f, struct clk_hw *hw) for (i = 0; data[i].name != NULL; i++) { regmap_read(rcg->clkr.regmap, (rcg->cmd_rcgr + data[i].offset), &val); - seq_printf(f, "%20s: 0x%.8x\n", data[i].name, val); + clock_debug_output(f, "%20s: 0x%.8x\n", data[i].name, val); } }