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dt-bindings: clock: Convert HiSilicon clocks to DT schema
Convert the HiSilicon Hi6220/Hi3660/Hi3670 clock bindings to DT schema format. Rearrange the binding documents splitting out the stub clock binding from everything else. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Wei Xu <xuwei5@hisilicon.com> Link: https://patch.msgid.link/20261001212051.2227941-1-robh@kernel.org Signed-off-by: Brian Masney <bmasney@redhat.com>
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* Hisilicon Hi3660 Clock Controller
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The Hi3660 clock controller generates and supplies clock to various
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controllers within the Hi3660 SoC.
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Required Properties:
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- compatible: the compatible should be one of the following strings to
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indicate the clock controller functionality.
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- "hisilicon,hi3660-crgctrl"
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- "hisilicon,hi3660-pctrl"
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- "hisilicon,hi3660-pmuctrl"
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- "hisilicon,hi3660-sctrl"
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- "hisilicon,hi3660-iomcu"
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- "hisilicon,hi3660-stub-clk"
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- reg: physical base address of the controller and length of memory mapped
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region.
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- #clock-cells: should be 1.
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Optional Properties:
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- mboxes: Phandle to the mailbox for sending message to MCU.
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(See: ../mailbox/hisilicon,hi3660-mailbox.txt for more info)
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Each clock is assigned an identifier and client nodes use this identifier
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to specify the clock which they consume.
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All these identifier could be found in <dt-bindings/clock/hi3660-clock.h>.
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Examples:
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crg_ctrl: clock-controller@fff35000 {
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compatible = "hisilicon,hi3660-crgctrl", "syscon";
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reg = <0x0 0xfff35000 0x0 0x1000>;
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#clock-cells = <1>;
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};
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uart0: serial@fdf02000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x0 0xfdf02000 0x0 0x1000>;
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interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&crg_ctrl HI3660_CLK_MUX_UART0>,
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<&crg_ctrl HI3660_PCLK>;
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clock-names = "uartclk", "apb_pclk";
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};
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@ -1,43 +0,0 @@
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* Hisilicon Hi3670 Clock Controller
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The Hi3670 clock controller generates and supplies clock to various
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controllers within the Hi3670 SoC.
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Required Properties:
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- compatible: the compatible should be one of the following strings to
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indicate the clock controller functionality.
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- "hisilicon,hi3670-crgctrl"
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- "hisilicon,hi3670-pctrl"
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- "hisilicon,hi3670-pmuctrl"
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- "hisilicon,hi3670-sctrl"
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- "hisilicon,hi3670-iomcu"
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- "hisilicon,hi3670-media1-crg"
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- "hisilicon,hi3670-media2-crg"
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- reg: physical base address of the controller and length of memory mapped
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region.
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- #clock-cells: should be 1.
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Each clock is assigned an identifier and client nodes use this identifier
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to specify the clock which they consume.
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All these identifier could be found in <dt-bindings/clock/hi3670-clock.h>.
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Examples:
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crg_ctrl: clock-controller@fff35000 {
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compatible = "hisilicon,hi3670-crgctrl", "syscon";
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reg = <0x0 0xfff35000 0x0 0x1000>;
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#clock-cells = <1>;
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};
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uart0: serial@fdf02000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x0 0xfdf02000 0x0 0x1000>;
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interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&crg_ctrl HI3670_CLK_GATE_UART0>,
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<&crg_ctrl HI3670_PCLK>;
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clock-names = "uartclk", "apb_pclk";
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};
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* Hisilicon Hi6220 Clock Controller
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Clock control registers reside in different Hi6220 system controllers,
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please refer the following document to know more about the binding rules
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for these system controllers:
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Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml
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Required Properties:
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- compatible: the compatible should be one of the following strings to
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indicate the clock controller functionality.
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- "hisilicon,hi6220-acpu-sctrl"
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- "hisilicon,hi6220-aoctrl"
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- "hisilicon,hi6220-sysctrl"
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- "hisilicon,hi6220-mediactrl"
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- "hisilicon,hi6220-pmctrl"
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- "hisilicon,hi6220-stub-clk"
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- reg: physical base address of the controller and length of memory mapped
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region.
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- #clock-cells: should be 1.
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Optional Properties:
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- hisilicon,hi6220-clk-sram: phandle to the syscon managing the SoC internal sram;
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the driver need use the sram to pass parameters for frequency change.
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- mboxes: use the label reference for the mailbox as the first parameter, the
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second parameter is the channel number.
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Example 1:
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sys_ctrl: sys_ctrl@f7030000 {
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compatible = "hisilicon,hi6220-sysctrl", "syscon";
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reg = <0x0 0xf7030000 0x0 0x2000>;
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#clock-cells = <1>;
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};
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Example 2:
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stub_clock: stub_clock {
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compatible = "hisilicon,hi6220-stub-clk";
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hisilicon,hi6220-clk-sram = <&sram>;
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#clock-cells = <1>;
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mboxes = <&mailbox 1>;
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};
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Each clock is assigned an identifier and client nodes use this identifier
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to specify the clock which they consume.
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All these identifier could be found in <dt-bindings/clock/hi6220-clock.h>.
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@ -0,0 +1,51 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/hisilicon,clocks.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Hisilicon Hi6220/Hi3660/Hi3670 Clock Controllers
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maintainers:
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- Wei Xu <xuwei5@hisilicon.com>
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description: >
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The Hi3670 clock controller generates and supplies clock to various
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controllers within the Hi3670 SoC.
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All these identifiers can be found in:
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dt-bindings/clock/hi3660-clock.h.
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dt-bindings/clock/hi3670-clock.h.
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dt-bindings/clock/hi6220-clock.h.
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properties:
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compatible:
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items:
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- enum:
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- hisilicon,hi3660-crgctrl
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- hisilicon,hi3660-pctrl
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- hisilicon,hi3660-pmuctrl
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- hisilicon,hi3660-sctrl
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- hisilicon,hi3660-iomcu
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- hisilicon,hi3670-crgctrl
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- hisilicon,hi3670-pctrl
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- hisilicon,hi3670-pmuctrl
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- hisilicon,hi3670-sctrl
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- hisilicon,hi3670-iomcu
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- hisilicon,hi3670-media1-crg
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- hisilicon,hi3670-media2-crg
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- hisilicon,hi6220-acpu-sctrl
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- const: syscon
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reg:
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maxItems: 1
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'#clock-cells':
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const: 1
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required:
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- compatible
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- reg
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- '#clock-cells'
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additionalProperties: false
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/hisilicon,hi6220-stub-clk.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Hisilicon Stub Clock Controller
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maintainers:
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- Wei Xu <xuwei5@hisilicon.com>
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description: >
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Each clock is assigned an identifier and client nodes use this identifier
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to specify the clock which they consume.
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All these identifiers can be found in:
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dt-bindings/clock/hi3660-clock.h.
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dt-bindings/clock/hi6220-clock.h.
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properties:
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compatible:
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enum:
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- hisilicon,hi3660-stub-clk
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- hisilicon,hi6220-stub-clk
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reg:
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maxItems: 1
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'#clock-cells':
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const: 1
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hisilicon,hi6220-clk-sram:
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description:
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syscon managing the SoC internal SRAM; driver needs the SRAM to pass
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parameters for frequency change.
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$ref: /schemas/types.yaml#/definitions/phandle
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mboxes:
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maxItems: 1
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mbox-names:
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const: mbox-tx
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required:
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- compatible
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- '#clock-cells'
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- mboxes
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additionalProperties: false
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