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arm64: dts: imx8mp: Add DT overlays for DH i.MX8M Plus DHCOM SoM and boards
Add DT overlays to support DH i.MX8M Plus DHCOM SoM variants and carrier board expansion modules. The following DT overlays are implemented: - SoM: - DH 660-x00 SoM with 1xRMII PHY - DH 660-x00 SoM with 2xRMII PHY - PDK2: - DH 505-200 Display board in edge connector X12 via direct LVDS - DH 531-100 SPI/I2C board in header X21 - DH 531-200 SPI/I2C board in header X22 - DH 560-200 Display board in edge connector X12 - PDK3: - DH 505-200 Display board in edge connector X36 via direct LVDS - DH 531-100 SPI/I2C board in header X40 - DH 531-200 SPI/I2C board in header X41 - DH 560-300 Display board in edge connector X36 - EA muRata 2AE M.2 A/E-Key card in connector X20 - NXP SPF-29853-C1 MINISASTOCSI with OV5640 sensor in connector X31 - NXP SPF-29853-C1 MINISASTOCSI with OV5640 sensor in connector X29 - PicoITX: - DH 626-100 Display board in edge connector X2 Signed-off-by: Marek Vasut <marex@nabladev.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
This commit is contained in:
Marek Vasut
Frank Li
parent
596d0f9f4f
commit
bb020f383c
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@ -243,9 +243,118 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-data-modul-edm-sbc.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-debix-model-a.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-debix-som-a-bmb-08.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-drc02.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk2.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk3.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-picoitx.dtb
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imx8mp-dhcom-pdk2-overlay-505-200-x12-ch101olhlwh-dtbs := \
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imx8mp-dhcom-pdk2.dtb \
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imx8mp-dhcom-pdk2-overlay-505-200-x12-ch101olhlwh.dtbo
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imx8mp-dhcom-pdk2-overlay-531-100-x21-dtbs := \
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imx8mp-dhcom-pdk2.dtb \
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imx8mp-dhcom-pdk2-overlay-531-100-x21.dtbo
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imx8mp-dhcom-pdk2-overlay-531-100-x22-dtbs := \
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imx8mp-dhcom-pdk2.dtb \
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imx8mp-dhcom-pdk2-overlay-531-100-x22.dtbo
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imx8mp-dhcom-pdk2-overlay-560-300-x12-dtbs := \
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imx8mp-dhcom-pdk2.dtb \
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imx8mp-dhcom-pdk2-overlay-560-300-x12.dtbo
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imx8mp-dhcom-pdk2-overlay-eth1xfast-dtbs := \
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imx8mp-dhcom-pdk2.dtb \
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imx8mp-dhcom-som-overlay-eth1xfast.dtbo
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imx8mp-dhcom-pdk2-overlay-eth2xfast-dtbs := \
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imx8mp-dhcom-pdk2.dtb \
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imx8mp-dhcom-som-overlay-eth2xfast.dtbo \
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imx8mp-dhcom-pdk-overlay-eth2xfast.dtbo
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imx8mp-dhcom-pdk3-overlay-505-200-x36-ch101olhlwh-dtbs := \
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imx8mp-dhcom-pdk3.dtb \
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imx8mp-dhcom-pdk3-overlay-505-200-x36-ch101olhlwh.dtbo
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imx8mp-dhcom-pdk3-overlay-531-100-x40-dtbs := \
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imx8mp-dhcom-pdk3.dtb \
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imx8mp-dhcom-pdk3-overlay-531-100-x40.dtbo
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imx8mp-dhcom-pdk3-overlay-531-100-x41-dtbs := \
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imx8mp-dhcom-pdk3.dtb \
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imx8mp-dhcom-pdk3-overlay-531-100-x41.dtbo
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imx8mp-dhcom-pdk3-overlay-560-300-x36-dtbs := \
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imx8mp-dhcom-pdk3.dtb \
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imx8mp-dhcom-pdk3-overlay-560-300-x36.dtbo
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imx8mp-dhcom-pdk3-overlay-732-100-x36-dtbs := \
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imx8mp-dhcom-pdk3.dtb \
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imx8mp-dhcom-pdk3-overlay-732-100-x36.dtbo
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imx8mp-dhcom-pdk3-overlay-ea-murata-2ae-x20-dtbs := \
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imx8mp-dhcom-pdk3.dtb \
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imx8mp-dhcom-pdk3-overlay-ea-murata-2ae-x20.dtbo
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imx8mp-dhcom-pdk3-overlay-eth1xfast-dtbs := \
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imx8mp-dhcom-pdk3.dtb \
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imx8mp-dhcom-som-overlay-eth1xfast.dtbo
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imx8mp-dhcom-pdk3-overlay-eth2xfast-dtbs := \
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imx8mp-dhcom-pdk3.dtb \
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imx8mp-dhcom-som-overlay-eth2xfast.dtbo \
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imx8mp-dhcom-pdk-overlay-eth2xfast.dtbo
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imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640-x29-dtbs := \
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imx8mp-dhcom-pdk3.dtb \
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imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640-x29.dtbo
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imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640-x31-dtbs := \
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imx8mp-dhcom-pdk3.dtb \
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imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640-x31.dtbo
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-som-overlay-eth1xfast.dtbo \
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imx8mp-dhcom-som-overlay-eth2xfast.dtbo
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk-overlay-eth2xfast.dtbo
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk2.dtb \
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imx8mp-dhcom-pdk2-overlay-505-200-x12-ch101olhlwh.dtb \
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imx8mp-dhcom-pdk2-overlay-505-200-x12-ch101olhlwh.dtbo \
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imx8mp-dhcom-pdk2-overlay-531-100-x21.dtb \
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imx8mp-dhcom-pdk2-overlay-531-100-x21.dtbo \
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imx8mp-dhcom-pdk2-overlay-531-100-x22.dtb \
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imx8mp-dhcom-pdk2-overlay-531-100-x22.dtbo \
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imx8mp-dhcom-pdk2-overlay-560-300-x12.dtb \
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imx8mp-dhcom-pdk2-overlay-560-300-x12.dtbo \
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imx8mp-dhcom-pdk2-overlay-eth1xfast.dtb \
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imx8mp-dhcom-pdk2-overlay-eth2xfast.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk3.dtb \
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imx8mp-dhcom-pdk3-overlay-505-200-x36-ch101olhlwh.dtb \
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imx8mp-dhcom-pdk3-overlay-505-200-x36-ch101olhlwh.dtbo \
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imx8mp-dhcom-pdk3-overlay-531-100-x40.dtb \
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imx8mp-dhcom-pdk3-overlay-531-100-x40.dtbo \
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imx8mp-dhcom-pdk3-overlay-531-100-x41.dtb \
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imx8mp-dhcom-pdk3-overlay-531-100-x41.dtbo \
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imx8mp-dhcom-pdk3-overlay-560-300-x36.dtb \
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imx8mp-dhcom-pdk3-overlay-560-300-x36.dtbo \
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imx8mp-dhcom-pdk3-overlay-732-100-x36.dtb \
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imx8mp-dhcom-pdk3-overlay-732-100-x36.dtbo \
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imx8mp-dhcom-pdk3-overlay-ea-murata-2ae-x20.dtb \
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imx8mp-dhcom-pdk3-overlay-ea-murata-2ae-x20.dtbo \
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imx8mp-dhcom-pdk3-overlay-eth1xfast.dtb \
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imx8mp-dhcom-pdk3-overlay-eth2xfast.dtb \
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imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640-x29.dtb \
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imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640-x29.dtbo \
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imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640-x31.dtb \
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imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640-x31.dtbo
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imx8mp-dhcom-picoitx-overlay-626-100-x2-ch101olhlwh-dtbs := \
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imx8mp-dhcom-picoitx.dtb \
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imx8mp-dhcom-picoitx-overlay-626-100-x2-ch101olhlwh.dtbo
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-picoitx.dtb \
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imx8mp-dhcom-picoitx-overlay-626-100-x2-ch101olhlwh.dtb \
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imx8mp-dhcom-picoitx-overlay-626-100-x2-ch101olhlwh.dtbo
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-edm-g-wb.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-frdm.dtb
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@ -0,0 +1,37 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (C) 2022-2026 Marek Vasut
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*/
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&display_bl {
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pwms = <&pwm1 0 5000000 0>;
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};
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&i2c_dhpdk_panel {
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#address-cells = <1>;
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#size-cells = <0>;
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touch_lvds: touchscreen@41 {
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compatible = "ilitek,ili251x";
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reg = <0x41>;
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reset-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
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touchscreen-size-x = <16384>;
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touchscreen-size-y = <9600>;
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touchscreen-inverted-x;
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touchscreen-inverted-y;
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};
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eeprom@50 {
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compatible = "atmel,24c04";
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reg = <0x50>;
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pagesize = <16>;
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};
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};
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&panel {
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compatible = "chefree,ch101olhlwh-002";
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};
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&pwm1 {
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status = "okay";
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};
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@ -0,0 +1,33 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (C) 2024-2026 Marek Vasut
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*/
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#include <dt-bindings/clock/imx8mp-clock.h>
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&media_blk_ctrl {
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/*
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* Sys PLL3 supplies TC9595 RefClk
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* Audio PLL2 supplies MEDIA_DISP1_PIX (DSI)
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* Video PLL1 supplies MEDIA_DISP2_PIX (LVDS)
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*/
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assigned-clocks = <&clk IMX8MP_CLK_MEDIA_AXI>,
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<&clk IMX8MP_CLK_MEDIA_APB>,
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<&clk IMX8MP_CLK_MEDIA_DISP1_PIX>,
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<&clk IMX8MP_CLK_MEDIA_DISP2_PIX>,
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<&clk IMX8MP_AUDIO_PLL2>,
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<&clk IMX8MP_VIDEO_PLL1>;
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assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>,
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<&clk IMX8MP_SYS_PLL1_800M>,
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<&clk IMX8MP_AUDIO_PLL2_OUT>,
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<&clk IMX8MP_VIDEO_PLL1_OUT>;
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assigned-clock-rates = <500000000>, <200000000>,
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<0>, <0>, <0>, <0>;
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};
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&tc_bridge {
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assigned-clocks = <&clk IMX8MP_CLK_CLKOUT2_SEL>,
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<&clk IMX8MP_CLK_CLKOUT2>,
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<&clk IMX8MP_SYS_PLL3_OUT>;
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assigned-clock-parents = <&clk IMX8MP_SYS_PLL3_OUT>;
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};
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@ -0,0 +1,31 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (C) 2023-2026 Marek Vasut
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/pwm/pwm.h>
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#include "imx8mp-dhcom-overlay-panel-clock.dtsi"
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&{/} {
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display_bl: display-bl {
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compatible = "pwm-backlight";
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brightness-levels = <0 16 22 30 40 55 75 102 138 188 255>;
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default-brightness-level = <8>;
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enable-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; /* GPIO G */
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status = "okay";
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};
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panel: panel {
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backlight = <&display_bl>;
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power-supply = <®_vdd_3p3v_awo>;
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port {
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panel_in: endpoint {
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};
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};
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};
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};
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@ -0,0 +1,35 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (C) 2022-2026 Marek Vasut
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*/
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#include "imx8mp-dhcom-overlay-panel-common.dtsi"
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&lcdif1 {
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status = "okay";
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};
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&mipi_dsi {
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status = "okay";
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};
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&panel_in {
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remote-endpoint = <&tc_bridge_out>;
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};
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&tc_bridge {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@1 {
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reg = <1>;
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tc_bridge_out: endpoint {
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remote-endpoint = <&panel_in>;
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};
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};
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};
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};
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@ -0,0 +1,53 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* Copyright (C) 2022-2026 Marek Vasut
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*/
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/clock/imx8mp-clock.h>
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#include "imx8mp-dhcom-overlay-panel-dpi.dtsi"
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&{/} {
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led {
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led-0 {
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/* LED5 GPIO conflicts with Touchscreen IRQ GPIO-E */
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status = "disabled";
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};
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};
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};
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&i2c_dhpdk_panel {
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#address-cells = <1>;
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#size-cells = <0>;
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touchscreen@38 {
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compatible = "edt,edt-ft5406";
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reg = <0x38>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_dhcom_e>;
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/* Touchscreen IRQ GPIO-E conflicts with LED5 GPIO */
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interrupt-parent = <&gpio5>;
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interrupts = <22 IRQ_TYPE_EDGE_FALLING>; /* GPIO E */
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};
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};
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&display_bl {
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pwms = <&pwm1 0 5000000 PWM_POLARITY_INVERTED>;
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};
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&mipi_dsi {
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/*
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* This is DSIM PLL frequency, DSI HS clock lane frequency
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* is half of the "samsung,burst-clock-frequency" value.
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*/
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samsung,burst-clock-frequency = <500000000>;
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};
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&panel {
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compatible = "edt,etm0700g0edh6";
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};
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&pwm1 {
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status = "okay";
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};
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@ -0,0 +1,22 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (C) 2023-2026 Marek Vasut
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*/
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#include "imx8mp-dhcom-overlay-panel-common.dtsi"
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&ldb_lvds_ch0 {
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remote-endpoint = <&panel_in>;
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};
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&lcdif2 {
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status = "okay";
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};
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&lvds_bridge {
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status = "okay";
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};
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&panel_in {
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remote-endpoint = <&ldb_lvds_ch0>;
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};
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@ -0,0 +1,10 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* Copyright (C) 2023-2026 Marek Vasut
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*/
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/dts-v1/;
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/plugin/;
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ðphypdk { /* Micrel KSZ9131RNXI */
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status = "disabled";
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};
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@ -0,0 +1,40 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (C) 2022-2026 Marek Vasut
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*/
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/dts-v1/;
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/plugin/;
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#include "imx8mp-dhcom-overlay-panel-lvds.dtsi"
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#include "imx8mp-dhcom-overlay-panel-ch101olhlwh.dtsi"
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&{/} {
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gpio-keys {
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button-1 {
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/* BUTTON1 GPIO conflicts with Touchscreen RESET GPIO-B */
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status = "disabled";
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};
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};
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led {
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led-2 {
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/* LED7 GPIO conflicts with Touchscreen IRQ GPIO-H */
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status = "disabled";
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};
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};
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};
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&media_blk_ctrl {
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/*
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* The Chefree CH101OLHLWH-002 panel requires 71.1 MHz LVDS clock.
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* Set IMX8MP_VIDEO_PLL1 to 497.7 MHz , since 497.7 MHz / 7 = 71.1 MHz .
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*/
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assigned-clock-rates = <500000000>, <200000000>, <0>, <0>, <0>, <497700000>;
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};
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|
||||
&touch_lvds {
|
||||
pinctrl-0 = <&pinctrl_dhcom_b &pinctrl_dhcom_h>;
|
||||
pinctrl-names = "default";
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
|
||||
};
|
||||
|
|
@ -0,0 +1,32 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
||||
/*
|
||||
* Copyright (C) 2022-2026 Marek Vasut
|
||||
*/
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
&ecspi1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "okay";
|
||||
|
||||
eeprom@0 {
|
||||
compatible = "microchip,25aa010a", "atmel,at25";
|
||||
reg = <0>;
|
||||
address-width = <8>;
|
||||
pagesize = <16>;
|
||||
size = <128>;
|
||||
spi-max-frequency = <5000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c5 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
eeprom@56 {
|
||||
compatible = "atmel,24c04";
|
||||
reg = <0x56>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,32 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
||||
/*
|
||||
* Copyright (C) 2022-2026 Marek Vasut
|
||||
*/
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
&ecspi2 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "okay";
|
||||
|
||||
eeprom@0 {
|
||||
compatible = "microchip,25aa010a", "atmel,at25";
|
||||
reg = <0>;
|
||||
address-width = <8>;
|
||||
pagesize = <16>;
|
||||
size = <128>;
|
||||
spi-max-frequency = <5000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c4 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
eeprom@56 {
|
||||
compatible = "atmel,24c04";
|
||||
reg = <0x56>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,25 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
||||
/*
|
||||
* Copyright (C) 2022-2026 Marek Vasut
|
||||
*/
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "imx8mp-dhcom-overlay-panel-etm0700g0edh6.dtsi"
|
||||
#include "imx8mp-pinfunc.h"
|
||||
|
||||
&{/} {
|
||||
led {
|
||||
led-0 {
|
||||
/* LED5 GPIO conflicts with Touchscreen IRQ GPIO-E */
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl_dhcom_e {
|
||||
fsl,pins = <
|
||||
/* GPIO_E */
|
||||
MX8MP_IOMUXC_UART1_RXD__GPIO5_IO22 0x40000000
|
||||
>;
|
||||
};
|
||||
|
|
@ -152,7 +152,7 @@ codec_dai: simple-audio-card,codec {
|
|||
};
|
||||
};
|
||||
|
||||
&i2c5 {
|
||||
i2c_dhpdk_panel: &i2c5 {
|
||||
sgtl5000: codec@a {
|
||||
compatible = "fsl,sgtl5000";
|
||||
reg = <0x0a>;
|
||||
|
|
|
|||
|
|
@ -0,0 +1,53 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (C) 2022-2026 Marek Vasut
|
||||
*/
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "imx8mp-dhcom-overlay-panel-lvds.dtsi"
|
||||
#include "imx8mp-dhcom-overlay-panel-ch101olhlwh.dtsi"
|
||||
#include "imx8mp-pinfunc.h"
|
||||
|
||||
&{/} {
|
||||
gpio-keys {
|
||||
button-1 {
|
||||
/* TA2 GPIO conflicts with Touchscreen RESET GPIO-B */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
button-2 {
|
||||
/* TA3 GPIO conflicts with Touchscreen IRQ GPIO-C */
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
led {
|
||||
led-2 {
|
||||
/* LED2 GPIO conflicts with BL-ON1 GPIO-G */
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&media_blk_ctrl {
|
||||
/*
|
||||
* The Chefree CH101OLHLWH-002 panel requires 71.1 MHz LVDS clock.
|
||||
* Set IMX8MP_VIDEO_PLL1 to 497.7 MHz , since 497.7 MHz / 7 = 71.1 MHz .
|
||||
*/
|
||||
assigned-clock-rates = <500000000>, <200000000>, <0>, <0>, <0>, <497700000>;
|
||||
};
|
||||
|
||||
&pinctrl_dhcom_c {
|
||||
fsl,pins = <
|
||||
/* GPIO_C */
|
||||
MX8MP_IOMUXC_SAI3_MCLK__GPIO5_IO02 0x40000000
|
||||
>;
|
||||
};
|
||||
|
||||
&touch_lvds {
|
||||
pinctrl-0 = <&pinctrl_dhcom_b &pinctrl_dhcom_c>;
|
||||
pinctrl-names = "default";
|
||||
interrupt-parent = <&gpio5>;
|
||||
interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
|
||||
};
|
||||
|
|
@ -0,0 +1,32 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
||||
/*
|
||||
* Copyright (C) 2023-2026 Marek Vasut
|
||||
*/
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
&ecspi1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "okay";
|
||||
|
||||
eeprom@0 {
|
||||
compatible = "microchip,25aa010a", "atmel,at25";
|
||||
reg = <0>;
|
||||
address-width = <8>;
|
||||
pagesize = <16>;
|
||||
size = <128>;
|
||||
spi-max-frequency = <5000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2cmuxed0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
eeprom@56 {
|
||||
compatible = "atmel,24c04";
|
||||
reg = <0x56>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,32 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
||||
/*
|
||||
* Copyright (C) 2023-2026 Marek Vasut
|
||||
*/
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
&ecspi2 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "okay";
|
||||
|
||||
eeprom@0 {
|
||||
compatible = "microchip,25aa010a", "atmel,at25";
|
||||
reg = <0>;
|
||||
address-width = <8>;
|
||||
pagesize = <16>;
|
||||
size = <128>;
|
||||
spi-max-frequency = <5000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c4 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
eeprom@56 {
|
||||
compatible = "atmel,24c04";
|
||||
reg = <0x56>;
|
||||
pagesize = <16>;
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,24 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
||||
/*
|
||||
* Copyright (C) 2023-2026 Marek Vasut
|
||||
*/
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "imx8mp-dhcom-overlay-panel-etm0700g0edh6.dtsi"
|
||||
|
||||
&{/} {
|
||||
gpio-keys {
|
||||
button-3 {
|
||||
/* TA4 GPIO conflicts with Touchscreen IRQ GPIO-E */
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
led {
|
||||
led-2 {
|
||||
/* LED2 GPIO conflicts with BL-ON1 GPIO-G */
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,36 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (C) 2024-2026 Marek Vasut
|
||||
*/
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "imx8mp-dhcom-overlay-panel-clock.dtsi"
|
||||
|
||||
&lcdif1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mipi_dsi {
|
||||
samsung,burst-clock-frequency = <1000000000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&tc_bridge {
|
||||
assigned-clock-rates = <26000000>, <26000000>, <416000000>;
|
||||
toshiba,hpd-pin = <0>;
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
|
||||
endpoint {
|
||||
toshiba,pre-emphasis = /bits/ 8 <1 1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,56 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
||||
/*
|
||||
* Copyright (C) 2023-2026 Marek Vasut
|
||||
*/
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include <dt-bindings/clock/imx8mp-clock.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
/* This DTO requires HI00106 SoM variant. */
|
||||
|
||||
&{/} {
|
||||
led {
|
||||
led-0 {
|
||||
/* LED0 GPIO conflicts with #SDIO_RST GPIO-D */
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
assigned-clocks = <&clk IMX8MP_CLK_UART3>;
|
||||
assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
|
||||
assigned-clock-rates = <80000000>;
|
||||
|
||||
bluetooth {
|
||||
compatible = "cypress,cyw4373a0-bt";
|
||||
max-speed = <4000000>;
|
||||
};
|
||||
};
|
||||
|
||||
/* SD slot */
|
||||
&usdhc2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc2>;
|
||||
broken-cd;
|
||||
cap-power-off-card;
|
||||
keep-power-in-suspend;
|
||||
non-removable;
|
||||
vmmc-supply = <&buck4>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
wifi@1 { /* muRata 2AE */
|
||||
compatible = "cypress,cyw4373-fmac", "brcm,bcm4329-fmac";
|
||||
reg = <1>;
|
||||
/*
|
||||
* The "host-wake" interrupt output is by default not
|
||||
* connected to the SoC, but can be connected on to
|
||||
* SoC pin on the carrier board.
|
||||
*/
|
||||
reset-gpios = <&gpio4 27 GPIO_ACTIVE_LOW>; /* GPIO D */
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,32 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
||||
/*
|
||||
* Copyright (C) 2023-2026 Marek Vasut
|
||||
*/
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640.dtsi"
|
||||
|
||||
&mipi_csi_1 {
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
mipi_csi0_ep: endpoint {
|
||||
remote-endpoint = <&ov5640_to_mipi_csi2>;
|
||||
clock-lanes = <0>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&ov5640 {
|
||||
powerdown-gpios = <&csi2exp 1 GPIO_ACTIVE_HIGH>;
|
||||
reset-gpios = <&csi2exp 0 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
|
@ -0,0 +1,32 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
||||
/*
|
||||
* Copyright (C) 2023-2026 Marek Vasut
|
||||
*/
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "imx8mp-dhcom-pdk3-overlay-nxp-spf-29853-c1-ov5640.dtsi"
|
||||
|
||||
&mipi_csi_0 {
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
mipi_csi0_ep: endpoint {
|
||||
remote-endpoint = <&ov5640_to_mipi_csi2>;
|
||||
clock-lanes = <0>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&ov5640 {
|
||||
powerdown-gpios = <&csi2exp 2 GPIO_ACTIVE_HIGH>;
|
||||
reset-gpios = <&csi2exp 3 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
|
@ -0,0 +1,64 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
||||
/*
|
||||
* Copyright (C) 2023-2026 Marek Vasut
|
||||
*/
|
||||
|
||||
#include <dt-bindings/clock/imx8mp-clock.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
&{/} {
|
||||
camera0_1v5_pwr: regulator-camera0-1v5 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "camera0-1v5-reg";
|
||||
regulator-min-microvolt = <1500000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
camera0_1v8_pwr: regulator-camera0-1v8 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "camera0-1v8-reg";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
camera0_2v8_pwr: regulator-camera0-2v8 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "camera0-2v8-reg";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
&i2cmuxed0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
ov5640: camera@3c {
|
||||
compatible = "ovti,ov5640";
|
||||
reg = <0x3c>;
|
||||
clocks = <&clk IMX8MP_CLK_CLKOUT1>;
|
||||
clock-names = "xclk";
|
||||
assigned-clocks = <&clk IMX8MP_CLK_CLKOUT1_SEL>,
|
||||
<&clk IMX8MP_CLK_CLKOUT1>;
|
||||
assigned-clock-parents = <&clk IMX8MP_CLK_24M>;
|
||||
assigned-clock-rates = <24000000>, <24000000>;
|
||||
AVDD-supply = <&camera0_2v8_pwr>;
|
||||
DOVDD-supply = <&camera0_1v8_pwr>;
|
||||
DVDD-supply = <&camera0_1v5_pwr>;
|
||||
|
||||
port {
|
||||
ov5640_to_mipi_csi2: endpoint {
|
||||
remote-endpoint = <&mipi_csi0_ep>;
|
||||
clock-lanes = <0>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&isi_0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -165,7 +165,7 @@ i2c-mux@70 {
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
i2cmuxed0: i2c@0 {
|
||||
i2c_dhpdk_panel: i2cmuxed0: i2c@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
|
|
|
|||
|
|
@ -0,0 +1,77 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (C) 2024-2026 Marek Vasut
|
||||
*/
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "imx8mp-dhcom-overlay-panel-dpi.dtsi"
|
||||
#include "imx8mp-dhcom-overlay-panel-ch101olhlwh.dtsi"
|
||||
#include "imx8mp-pinfunc.h"
|
||||
|
||||
&{/} {
|
||||
lvds-encoder {
|
||||
compatible = "onnn,fin3385", "lvds-encoder";
|
||||
pclk-sample = <1>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
lvds_bridge_in: endpoint {
|
||||
remote-endpoint = <&tc_bridge_out>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
lvds_bridge_out: endpoint {
|
||||
remote-endpoint = <&panel_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mipi_dsi {
|
||||
/*
|
||||
* This is DSIM PLL frequency, DSI HS clock lane frequency
|
||||
* is half of the "samsung,burst-clock-frequency" value.
|
||||
*/
|
||||
samsung,burst-clock-frequency = <900000000>;
|
||||
};
|
||||
|
||||
&panel_in {
|
||||
remote-endpoint = <&lvds_bridge_out>;
|
||||
};
|
||||
|
||||
&tc_bridge_out {
|
||||
remote-endpoint = <&lvds_bridge_in>;
|
||||
};
|
||||
|
||||
&touch_lvds {
|
||||
pinctrl-0 = <&pinctrl_dhcom_b &pinctrl_dhcom_h>;
|
||||
pinctrl-names = "default";
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
/*
|
||||
* The following DHCOM GPIOs are used on this board.
|
||||
* Therefore, they have been removed from the list below.
|
||||
* B: Touch controller #RESET
|
||||
* H: Touch controller IRQ
|
||||
* I: Yellow led
|
||||
*/
|
||||
pinctrl-0 = <&pinctrl_dhcom_a &pinctrl_dhcom_c &pinctrl_dhcom_d
|
||||
&pinctrl_dhcom_e &pinctrl_dhcom_f &pinctrl_dhcom_g
|
||||
&pinctrl_dhcom_j &pinctrl_dhcom_k &pinctrl_dhcom_l
|
||||
&pinctrl_dhcom_m &pinctrl_dhcom_n &pinctrl_dhcom_o
|
||||
&pinctrl_dhcom_p &pinctrl_dhcom_q &pinctrl_dhcom_r
|
||||
&pinctrl_dhcom_s &pinctrl_dhcom_int>;
|
||||
};
|
||||
|
|
@ -114,6 +114,9 @@ &hdmi_tx_phy {
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c_dhpdk_panel: &i2c5 {
|
||||
};
|
||||
|
||||
&irqsteer_hdmi {
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -0,0 +1,85 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
||||
/*
|
||||
* Copyright (C) 2023-2026 Marek Vasut
|
||||
*/
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include <dt-bindings/clock/imx8mp-clock.h>
|
||||
|
||||
&eqos { /* First ethernet */
|
||||
pinctrl-0 = <&pinctrl_eqos_rmii>;
|
||||
phy-handle = <ðphy0f>;
|
||||
phy-mode = "rmii";
|
||||
|
||||
assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>,
|
||||
<&clk IMX8MP_SYS_PLL2_100M>,
|
||||
<&clk IMX8MP_SYS_PLL2_50M>;
|
||||
assigned-clock-rates = <0>, <100000000>, <50000000>;
|
||||
};
|
||||
|
||||
ðphy0g { /* Micrel KSZ9131RNXI */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ðphy0f { /* SMSC LAN8740Ai */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&fec { /* Second ethernet -- HS connector not populated on 1x RMII PHY SoM */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* No HS connector on this SoM variant, so no HDMI, PCIe and only USB HS. */
|
||||
|
||||
&hdmi_blk_ctrl {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&hdmi_pvi {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&hdmi_tx {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&hdmi_tx_phy {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&irqsteer_hdmi {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&lcdif3 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pcie_phy {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pcie {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* No WiFi/BT chipset on this SoM variant. */
|
||||
&uart2 {
|
||||
bluetooth {
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
&usb_dwc3_0 {
|
||||
maximum-speed = "high-speed";
|
||||
};
|
||||
|
||||
&usb_dwc3_1 {
|
||||
maximum-speed = "high-speed";
|
||||
};
|
||||
|
||||
/* No WiFi/BT chipset on this SoM variant. */
|
||||
&usdhc1 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -0,0 +1,29 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
|
||||
/*
|
||||
* Copyright (C) 2023-2026 Marek Vasut
|
||||
*/
|
||||
#include "imx8mp-dhcom-som-overlay-eth1xfast.dtso"
|
||||
|
||||
/* Dual RMII 100/Full Fast ethernet on this SoM variant. */
|
||||
|
||||
ðphy1f { /* SMSC LAN8740Ai */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&fec { /* Second ethernet */
|
||||
pinctrl-0 = <&pinctrl_fec_rmii>;
|
||||
phy-handle = <ðphy1f>;
|
||||
phy-mode = "rmii";
|
||||
status = "okay";
|
||||
|
||||
assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>,
|
||||
<&clk IMX8MP_SYS_PLL2_100M>,
|
||||
<&clk IMX8MP_SYS_PLL2_50M>,
|
||||
<&clk IMX8MP_SYS_PLL2_50M>;
|
||||
assigned-clock-rates = <0>, <100000000>, <50000000>, <0>;
|
||||
};
|
||||
|
||||
/* Resistive touch controller not populated on this one SoM variant. */
|
||||
&touch_som {
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -1,6 +1,6 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright (C) 2021-2022 Marek Vasut <marex@denx.de>
|
||||
* Copyright (C) 2021-2026 Marek Vasut
|
||||
*/
|
||||
|
||||
#include "imx8mp.dtsi"
|
||||
|
|
@ -398,7 +398,7 @@ channel@7 { /* Voltage over AIN3 and GND. */
|
|||
};
|
||||
};
|
||||
|
||||
touchscreen@49 {
|
||||
touch_som: touchscreen@49 {
|
||||
compatible = "ti,tsc2004";
|
||||
reg = <0x49>;
|
||||
interrupts-extended = <&gpio4 0 IRQ_TYPE_EDGE_FALLING>;
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user