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drm/amdgpu/vce1: Workaround PLL timeout on FirePro W9000
Sometimes the VCE PLL times out waiting for CTLACK/CTLACK2. When it happens, the VCE still works, but much slower. Observed on a Tahiti GPU, but not all: - FirePro W9000 has the issue - Radeon R9 280X not affected - Radeon HD 7990 not affected As a workaround, on the affected chip just don't put the VCE PLL in sleep mode. Leaving the VCE PLL in bypass mode or reset mode both work. Using bypass mode is simpler. Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1918,6 +1918,14 @@ static int si_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk)
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~VCEPLL_BYPASS_EN_MASK);
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if (!evclk || !ecclk) {
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/*
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* On some chips, the PLL takes way too long to get out of
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* sleep mode, causing a timeout waiting on CTLACK/CTLACK2.
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* Leave the PLL running in bypass mode.
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*/
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if (adev->pdev->device == 0x6780)
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return 0;
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/* Keep the Bypass mode, put PLL to sleep */
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WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, VCEPLL_SLEEP_MASK,
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~VCEPLL_SLEEP_MASK);
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