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perf/x86/amd/core: Fix reloading events for SVM
Commit1018faa6cf("perf/x86/kvm: Fix Host-Only/Guest-Only counting with SVM disabled") addresses an issue in which the Host-Only bit in the counter control registers needs to be masked off when SVM is not enabled. The events need to be reloaded whenever SVM is enabled or disabled for a CPU and this requires the PERF_CTL registers to be reprogrammed using {enable,disable}_all(). However, PerfMonV2 variants of these functions do not reprogram the PERF_CTL registers. Hence, the legacy enable_all() function should also be called. Fixes:9622e67e39("perf/x86/amd/core: Add PerfMonV2 counter control") Reported-by: Like Xu <likexu@tencent.com> Signed-off-by: Sandipan Das <sandipan.das@amd.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/20220518084327.464005-1-sandipan.das@amd.com
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@ -1472,6 +1472,24 @@ __init int amd_pmu_init(void)
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return 0;
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return 0;
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}
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}
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static inline void amd_pmu_reload_virt(void)
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{
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if (x86_pmu.version >= 2) {
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/*
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* Clear global enable bits, reprogram the PERF_CTL
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* registers with updated perf_ctr_virt_mask and then
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* set global enable bits once again
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*/
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amd_pmu_v2_disable_all();
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amd_pmu_enable_all(0);
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amd_pmu_v2_enable_all(0);
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return;
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}
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amd_pmu_disable_all();
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amd_pmu_enable_all(0);
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}
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void amd_pmu_enable_virt(void)
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void amd_pmu_enable_virt(void)
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{
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{
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struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
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struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
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@ -1479,8 +1497,7 @@ void amd_pmu_enable_virt(void)
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cpuc->perf_ctr_virt_mask = 0;
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cpuc->perf_ctr_virt_mask = 0;
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/* Reload all events */
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/* Reload all events */
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amd_pmu_disable_all();
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amd_pmu_reload_virt();
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x86_pmu_enable_all(0);
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}
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}
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EXPORT_SYMBOL_GPL(amd_pmu_enable_virt);
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EXPORT_SYMBOL_GPL(amd_pmu_enable_virt);
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@ -1497,7 +1514,6 @@ void amd_pmu_disable_virt(void)
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cpuc->perf_ctr_virt_mask = AMD64_EVENTSEL_HOSTONLY;
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cpuc->perf_ctr_virt_mask = AMD64_EVENTSEL_HOSTONLY;
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/* Reload all events */
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/* Reload all events */
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amd_pmu_disable_all();
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amd_pmu_reload_virt();
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x86_pmu_enable_all(0);
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}
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}
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EXPORT_SYMBOL_GPL(amd_pmu_disable_virt);
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EXPORT_SYMBOL_GPL(amd_pmu_disable_virt);
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