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ASoC: rockchip: i2s-tdm: Clean code
Change-Id: Ib4af14213873dac609d195976bd639bd6270e419 Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
This commit is contained in:
Sugar Zhang
Tao Huang
parent
bd60226a17
commit
baddcc7c35
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@ -254,8 +254,8 @@ static void rockchip_snd_xfer_reset_deassert(struct rk_i2s_tdm_dev *i2s_tdm,
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}
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/*
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* to make sure tx/rx reset at the same time when clk_trcm > 0
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* if not, will lead lrck is abnormal.
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* make sure both tx and rx are reset at the same time for sync lrck
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* when clk_trcm > 0
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*/
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static void rockchip_snd_xfer_sync_reset(struct rk_i2s_tdm_dev *i2s_tdm)
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{
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@ -455,7 +455,6 @@ static int rockchip_i2s_tdm_set_fmt(struct snd_soc_dai *cpu_dai,
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mask = I2S_CKR_MSS_MASK;
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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case SND_SOC_DAIFMT_CBS_CFS:
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/* Set source clock in Master mode */
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val = I2S_CKR_MSS_MASTER;
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i2s_tdm->is_master_mode = true;
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break;
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@ -473,10 +472,10 @@ static int rockchip_i2s_tdm_set_fmt(struct snd_soc_dai *cpu_dai,
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mask = I2S_CKR_CKP_MASK;
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switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
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case SND_SOC_DAIFMT_NB_NF:
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val = I2S_CKR_CKP_NEG;
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val = I2S_CKR_CKP_NORMAL;
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break;
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case SND_SOC_DAIFMT_IB_NF:
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val = I2S_CKR_CKP_POS;
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val = I2S_CKR_CKP_INVERTED;
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break;
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default:
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ret = -EINVAL;
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@ -651,7 +650,6 @@ static int rockchip_i2s_tdm_calibrate_mclk(struct rk_i2s_tdm_dev *i2s_tdm,
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{
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struct clk *mclk_root;
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struct clk *mclk_parent;
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/* It's 256 times higher than a high sample rate */
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unsigned int mclk_parent_freq;
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int ret;
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@ -687,22 +685,12 @@ static int rockchip_i2s_tdm_calibrate_mclk(struct rk_i2s_tdm_dev *i2s_tdm,
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}
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ret = clk_set_parent(mclk_parent, mclk_root);
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if (ret < 0) {
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dev_err(i2s_tdm->dev, "parent: %s set root: %s failed: %d\n",
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__clk_get_name(mclk_parent),
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__clk_get_name(mclk_root),
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ret);
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if (ret)
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goto out;
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}
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ret = clk_set_rate(mclk_parent, mclk_parent_freq);
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if (ret < 0) {
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dev_err(i2s_tdm->dev, "parent: %s set freq: %d failed: %d\n",
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__clk_get_name(mclk_parent),
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mclk_parent_freq,
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ret);
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if (ret)
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goto out;
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}
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out:
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return ret;
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@ -726,24 +714,14 @@ static int rockchip_i2s_tdm_set_mclk(struct rk_i2s_tdm_dev *i2s_tdm,
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}
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ret = clk_set_rate(i2s_tdm->mclk_tx, i2s_tdm->mclk_tx_freq);
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if (ret < 0) {
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dev_err(i2s_tdm->dev,
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"Set mclk_tx: %s freq: %d failed: %d\n",
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__clk_get_name(i2s_tdm->mclk_tx),
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i2s_tdm->mclk_tx_freq, ret);
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if (ret)
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goto err;
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}
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ret = clk_set_rate(i2s_tdm->mclk_rx, i2s_tdm->mclk_rx_freq);
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if (ret < 0) {
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dev_err(i2s_tdm->dev,
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"Set mclk_rx: %s freq: %d failed: %d\n",
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__clk_get_name(i2s_tdm->mclk_rx),
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i2s_tdm->mclk_rx_freq, ret);
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if (ret)
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goto err;
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}
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/* Using mclk_rx is ok. */
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/* mclk_rx is also ok. */
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*mclk = i2s_tdm->mclk_tx;
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} else {
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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@ -755,12 +733,8 @@ static int rockchip_i2s_tdm_set_mclk(struct rk_i2s_tdm_dev *i2s_tdm,
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}
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ret = clk_set_rate(*mclk, mclk_freq);
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if (ret < 0) {
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dev_err(i2s_tdm->dev, "Set mclk_%s: %s freq: %d failed: %d\n",
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substream->stream ? "rx" : "tx",
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__clk_get_name(*mclk), mclk_freq, ret);
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if (ret)
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goto err;
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}
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}
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return 0;
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@ -769,6 +743,131 @@ static int rockchip_i2s_tdm_set_mclk(struct rk_i2s_tdm_dev *i2s_tdm,
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return ret;
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}
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static int rockchip_i2s_io_multiplex(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct rk_i2s_tdm_dev *i2s_tdm = to_info(dai);
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int usable_chs = MULTIPLEX_CH_MAX;
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unsigned int val = 0;
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if (!i2s_tdm->io_multiplex)
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return 0;
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if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
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struct snd_pcm_str *playback_str =
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&substream->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK];
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if (playback_str->substream_opened) {
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regmap_read(i2s_tdm->regmap, I2S_TXCR, &val);
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val &= I2S_TXCR_CSR_MASK;
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usable_chs = MULTIPLEX_CH_MAX - to_ch_num(val);
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}
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regmap_read(i2s_tdm->regmap, I2S_RXCR, &val);
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val &= I2S_RXCR_CSR_MASK;
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if (to_ch_num(val) > usable_chs) {
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dev_err(i2s_tdm->dev,
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"Capture chs(%d) > usable chs(%d)\n",
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to_ch_num(val), usable_chs);
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return -EINVAL;
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}
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switch (val) {
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case I2S_CHN_4:
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val = I2S_IO_6CH_OUT_4CH_IN;
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break;
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case I2S_CHN_6:
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val = I2S_IO_4CH_OUT_6CH_IN;
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break;
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case I2S_CHN_8:
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val = I2S_IO_2CH_OUT_8CH_IN;
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break;
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default:
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val = I2S_IO_8CH_OUT_2CH_IN;
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break;
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}
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} else {
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struct snd_pcm_str *capture_str =
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&substream->pcm->streams[SNDRV_PCM_STREAM_CAPTURE];
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if (capture_str->substream_opened) {
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regmap_read(i2s_tdm->regmap, I2S_RXCR, &val);
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val &= I2S_RXCR_CSR_MASK;
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usable_chs = MULTIPLEX_CH_MAX - to_ch_num(val);
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}
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regmap_read(i2s_tdm->regmap, I2S_TXCR, &val);
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val &= I2S_TXCR_CSR_MASK;
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if (to_ch_num(val) > usable_chs) {
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dev_err(i2s_tdm->dev,
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"Playback chs(%d) > usable chs(%d)\n",
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to_ch_num(val), usable_chs);
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return -EINVAL;
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}
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switch (val) {
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case I2S_CHN_4:
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val = I2S_IO_4CH_OUT_6CH_IN;
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break;
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case I2S_CHN_6:
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val = I2S_IO_6CH_OUT_4CH_IN;
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break;
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case I2S_CHN_8:
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val = I2S_IO_8CH_OUT_2CH_IN;
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break;
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default:
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val = I2S_IO_2CH_OUT_8CH_IN;
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break;
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}
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}
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val <<= i2s_tdm->soc_data->grf_shift;
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val |= (I2S_IO_DIRECTION_MASK << i2s_tdm->soc_data->grf_shift) << 16;
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regmap_write(i2s_tdm->grf, i2s_tdm->soc_data->grf_reg_offset, val);
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return 0;
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}
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static int rockchip_i2s_trcm_mode(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai,
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unsigned int div_bclk,
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unsigned int div_lrck,
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unsigned int fmt)
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{
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struct rk_i2s_tdm_dev *i2s_tdm = to_info(dai);
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if (!i2s_tdm->clk_trcm)
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return 0;
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spin_lock(&i2s_tdm->lock);
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if (atomic_read(&i2s_tdm->refcount))
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rockchip_i2s_tdm_xfer_pause(substream, i2s_tdm);
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regmap_update_bits(i2s_tdm->regmap, I2S_CLKDIV,
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I2S_CLKDIV_TXM_MASK | I2S_CLKDIV_RXM_MASK,
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I2S_CLKDIV_TXM(div_bclk) | I2S_CLKDIV_RXM(div_bclk));
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regmap_update_bits(i2s_tdm->regmap, I2S_CKR,
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I2S_CKR_TSD_MASK | I2S_CKR_RSD_MASK,
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I2S_CKR_TSD(div_lrck) | I2S_CKR_RSD(div_lrck));
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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regmap_update_bits(i2s_tdm->regmap, I2S_TXCR,
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I2S_TXCR_VDW_MASK | I2S_TXCR_CSR_MASK,
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fmt);
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else
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regmap_update_bits(i2s_tdm->regmap, I2S_RXCR,
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I2S_RXCR_VDW_MASK | I2S_RXCR_CSR_MASK,
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fmt);
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if (atomic_read(&i2s_tdm->refcount))
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rockchip_i2s_tdm_xfer_resume(substream, i2s_tdm);
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spin_unlock(&i2s_tdm->lock);
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return 0;
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}
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static int rockchip_i2s_tdm_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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@ -833,23 +932,12 @@ static int rockchip_i2s_tdm_hw_params(struct snd_pcm_substream *substream,
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val |= I2S_CHN_2;
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break;
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default:
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dev_err(i2s_tdm->dev, "invalid channel: %d\n",
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params_channels(params));
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ret = -EINVAL;
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goto err;
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}
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if (i2s_tdm->clk_trcm) {
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spin_lock(&i2s_tdm->lock);
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if (atomic_read(&i2s_tdm->refcount))
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rockchip_i2s_tdm_xfer_pause(substream, i2s_tdm);
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regmap_update_bits(i2s_tdm->regmap, I2S_CLKDIV,
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I2S_CLKDIV_TXM_MASK | I2S_CLKDIV_RXM_MASK,
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I2S_CLKDIV_TXM(div_bclk) | I2S_CLKDIV_RXM(div_bclk));
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regmap_update_bits(i2s_tdm->regmap, I2S_CKR,
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I2S_CKR_TSD_MASK | I2S_CKR_RSD_MASK,
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I2S_CKR_TSD(div_lrck) | I2S_CKR_RSD(div_lrck));
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rockchip_i2s_trcm_mode(substream, dai, div_bclk, div_lrck, val);
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} else if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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regmap_update_bits(i2s_tdm->regmap, I2S_CLKDIV,
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I2S_CLKDIV_TXM_MASK,
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@ -857,6 +945,9 @@ static int rockchip_i2s_tdm_hw_params(struct snd_pcm_substream *substream,
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regmap_update_bits(i2s_tdm->regmap, I2S_CKR,
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I2S_CKR_TSD_MASK,
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I2S_CKR_TSD(div_lrck));
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regmap_update_bits(i2s_tdm->regmap, I2S_TXCR,
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I2S_TXCR_VDW_MASK | I2S_TXCR_CSR_MASK,
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val);
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} else {
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regmap_update_bits(i2s_tdm->regmap, I2S_CLKDIV,
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I2S_CLKDIV_RXM_MASK,
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@ -864,109 +955,12 @@ static int rockchip_i2s_tdm_hw_params(struct snd_pcm_substream *substream,
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regmap_update_bits(i2s_tdm->regmap, I2S_CKR,
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I2S_CKR_RSD_MASK,
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I2S_CKR_RSD(div_lrck));
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}
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if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
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regmap_update_bits(i2s_tdm->regmap, I2S_RXCR,
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I2S_RXCR_VDW_MASK | I2S_RXCR_CSR_MASK,
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val);
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else
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regmap_update_bits(i2s_tdm->regmap, I2S_TXCR,
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I2S_TXCR_VDW_MASK | I2S_TXCR_CSR_MASK,
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val);
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if (i2s_tdm->io_multiplex) {
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int usable_chs = MULTIPLEX_CH_MAX;
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if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
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struct snd_pcm_str *playback_str =
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&substream->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK];
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if (playback_str->substream_opened) {
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regmap_read(i2s_tdm->regmap, I2S_TXCR, &val);
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val &= I2S_TXCR_CSR_MASK;
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usable_chs = MULTIPLEX_CH_MAX - to_ch_num(val);
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}
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regmap_read(i2s_tdm->regmap, I2S_RXCR, &val);
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val &= I2S_RXCR_CSR_MASK;
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if (to_ch_num(val) > usable_chs) {
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dev_err(i2s_tdm->dev,
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"Capture chs(%d) > usable chs(%d)\n",
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to_ch_num(val), usable_chs);
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ret = -EINVAL;
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goto err;
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}
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switch (val) {
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case I2S_CHN_4:
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val = I2S_IO_6CH_OUT_4CH_IN;
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break;
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case I2S_CHN_6:
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val = I2S_IO_4CH_OUT_6CH_IN;
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break;
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case I2S_CHN_8:
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val = I2S_IO_2CH_OUT_8CH_IN;
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break;
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default:
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val = I2S_IO_8CH_OUT_2CH_IN;
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break;
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}
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} else {
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struct snd_pcm_str *capture_str =
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&substream->pcm->streams[SNDRV_PCM_STREAM_CAPTURE];
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if (capture_str->substream_opened) {
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regmap_read(i2s_tdm->regmap, I2S_RXCR, &val);
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val &= I2S_RXCR_CSR_MASK;
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usable_chs = MULTIPLEX_CH_MAX - to_ch_num(val);
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}
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regmap_read(i2s_tdm->regmap, I2S_TXCR, &val);
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val &= I2S_TXCR_CSR_MASK;
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if (to_ch_num(val) > usable_chs) {
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dev_err(i2s_tdm->dev,
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"Playback chs(%d) > usable chs(%d)\n",
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to_ch_num(val), usable_chs);
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ret = -EINVAL;
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goto err;
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}
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switch (val) {
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case I2S_CHN_4:
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val = I2S_IO_4CH_OUT_6CH_IN;
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break;
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case I2S_CHN_6:
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val = I2S_IO_6CH_OUT_4CH_IN;
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break;
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case I2S_CHN_8:
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val = I2S_IO_8CH_OUT_2CH_IN;
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break;
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default:
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val = I2S_IO_2CH_OUT_8CH_IN;
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break;
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}
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}
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val <<= i2s_tdm->soc_data->grf_shift;
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val |= (I2S_IO_DIRECTION_MASK << i2s_tdm->soc_data->grf_shift) << 16;
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regmap_write(i2s_tdm->grf, i2s_tdm->soc_data->grf_reg_offset, val);
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}
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regmap_update_bits(i2s_tdm->regmap, I2S_DMACR, I2S_DMACR_TDL_MASK,
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I2S_DMACR_TDL(16));
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regmap_update_bits(i2s_tdm->regmap, I2S_DMACR, I2S_DMACR_RDL_MASK,
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I2S_DMACR_RDL(16));
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if (i2s_tdm->clk_trcm) {
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if (atomic_read(&i2s_tdm->refcount))
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rockchip_i2s_tdm_xfer_resume(substream, i2s_tdm);
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spin_unlock(&i2s_tdm->lock);
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}
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return 0;
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ret = rockchip_i2s_io_multiplex(substream, dai);
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err:
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return ret;
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@ -1316,10 +1310,8 @@ static int rockchip_i2s_tdm_dai_prepare(struct platform_device *pdev,
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|
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*soc_dai = devm_kmemdup(&pdev->dev, &rockchip_i2s_tdm_dai,
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sizeof(rockchip_i2s_tdm_dai), GFP_KERNEL);
|
||||
if (!(*soc_dai)) {
|
||||
dev_err(&pdev->dev, "Failed to duplicate i2s_tdm_dai\n");
|
||||
if (!(*soc_dai))
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -1480,7 +1472,7 @@ static int rockchip_i2s_tdm_probe(struct platform_device *pdev)
|
|||
int val;
|
||||
|
||||
ret = rockchip_i2s_tdm_dai_prepare(pdev, &soc_dai);
|
||||
if (ret < 0)
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
i2s_tdm = devm_kzalloc(&pdev->dev, sizeof(*i2s_tdm), GFP_KERNEL);
|
||||
|
|
@ -1623,6 +1615,10 @@ static int rockchip_i2s_tdm_probe(struct platform_device *pdev)
|
|||
goto err_pm_disable;
|
||||
}
|
||||
|
||||
regmap_update_bits(i2s_tdm->regmap, I2S_DMACR, I2S_DMACR_TDL_MASK,
|
||||
I2S_DMACR_TDL(16));
|
||||
regmap_update_bits(i2s_tdm->regmap, I2S_DMACR, I2S_DMACR_RDL_MASK,
|
||||
I2S_DMACR_RDL(16));
|
||||
regmap_update_bits(i2s_tdm->regmap, I2S_CKR,
|
||||
I2S_CKR_TRCM_MASK, i2s_tdm->clk_trcm);
|
||||
|
||||
|
|
|
|||
|
|
@ -101,8 +101,8 @@
|
|||
#define I2S_CKR_MSS_SLAVE (1 << I2S_CKR_MSS_SHIFT)
|
||||
#define I2S_CKR_MSS_MASK (1 << I2S_CKR_MSS_SHIFT)
|
||||
#define I2S_CKR_CKP_SHIFT 26
|
||||
#define I2S_CKR_CKP_NEG (0 << I2S_CKR_CKP_SHIFT)
|
||||
#define I2S_CKR_CKP_POS (1 << I2S_CKR_CKP_SHIFT)
|
||||
#define I2S_CKR_CKP_NORMAL (0 << I2S_CKR_CKP_SHIFT)
|
||||
#define I2S_CKR_CKP_INVERTED (1 << I2S_CKR_CKP_SHIFT)
|
||||
#define I2S_CKR_CKP_MASK (1 << I2S_CKR_CKP_SHIFT)
|
||||
#define I2S_CKR_RLP_SHIFT 25
|
||||
#define I2S_CKR_RLP_NORMAL (0 << I2S_CKR_RLP_SHIFT)
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user