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ARM: dts: aspeed: santabarbara: Add AMD APML interface support
Enable AMD APML related features - add amd sbrmi node for SoC power reading - add amd sbtsi node for SoC temperature reading - rename the P0_I3C_APML_ALERT_L GPIO to align with the naming convention expected by the AMD APML tool Signed-off-by: Fred Chen <fredchen.openbmc@gmail.com> Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
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@ -329,6 +329,20 @@ gpio@26 {
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};
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};
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&i2c3 {
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status = "okay";
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sbrmi@3c {
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compatible = "amd,sbrmi";
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reg = <0x3c>;
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};
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sbtsi@4c {
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compatible = "amd,sbtsi";
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reg = <0x4c>;
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};
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};
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&i2c4 {
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status = "okay";
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@ -1755,7 +1769,7 @@ &sgpiom0 {
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"P12V_SCM_ADC_ALERT","",
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"CPU0_REGS_I2C_ALERT_N","",
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"FM_RTC_ALERT_N","",
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"APML_CPU0_ALERT_R_N","",
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"P0_I3C_APML_ALERT_L","",
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/*J0-J3 line 144-151*/
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"SMB_RJ45_FIO_TMP_ALERT","",
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"FM_SMB_ALERT_MCIO_0A_N","",
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