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dt-bindings: powerpc: Convert fsl/pmc.txt to YAML
This patch rewrites pmc.txt into YAML format. Descriptive texts are expanded or shortened in a few places to better fit today's conventions. The list of compatible strings (and combinations of them) is based on existing device trees in arch/powerpc as well as compatible strings already mentioned in the plain-text version of the binding. One thing I didn't handle are soc-clk@... nodes as seen in arch/powerpc/boot/dts/fsl/pq3-power.dtsi. They are also ignored by Linux drivers. Signed-off-by: J. Neuschäfer <j.ne@posteo.net> Link: https://lore.kernel.org/r/20250417-fslpmc-yaml-v3-1-b3eccd389176@posteo.net Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
This commit is contained in:
J. Neuschäfer
Rob Herring (Arm)
parent
2ed7553b90
commit
ba127016c0
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* Power Management Controller
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Properties:
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- compatible: "fsl,<chip>-pmc".
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"fsl,mpc8349-pmc" should be listed for any chip whose PMC is
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compatible. "fsl,mpc8313-pmc" should also be listed for any chip
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whose PMC is compatible, and implies deep-sleep capability.
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"fsl,mpc8548-pmc" should be listed for any chip whose PMC is
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compatible. "fsl,mpc8536-pmc" should also be listed for any chip
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whose PMC is compatible, and implies deep-sleep capability.
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"fsl,mpc8641d-pmc" should be listed for any chip whose PMC is
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compatible; all statements below that apply to "fsl,mpc8548-pmc" also
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apply to "fsl,mpc8641d-pmc".
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Compatibility does not include bit assignments in SCCR/PMCDR/DEVDISR; these
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bit assignments are indicated via the sleep specifier in each device's
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sleep property.
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- reg: For devices compatible with "fsl,mpc8349-pmc", the first resource
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is the PMC block, and the second resource is the Clock Configuration
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block.
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For devices compatible with "fsl,mpc8548-pmc", the first resource
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is a 32-byte block beginning with DEVDISR.
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- interrupts: For "fsl,mpc8349-pmc"-compatible devices, the first
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resource is the PMC block interrupt.
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- fsl,mpc8313-wakeup-timer: For "fsl,mpc8313-pmc"-compatible devices,
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this is a phandle to an "fsl,gtm" node on which timer 4 can be used as
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a wakeup source from deep sleep.
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Sleep specifiers:
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fsl,mpc8349-pmc: Sleep specifiers consist of one cell. For each bit
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that is set in the cell, the corresponding bit in SCCR will be saved
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and cleared on suspend, and restored on resume. This sleep controller
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supports disabling and resuming devices at any time.
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fsl,mpc8536-pmc: Sleep specifiers consist of three cells, the third of
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which will be ORed into PMCDR upon suspend, and cleared from PMCDR
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upon resume. The first two cells are as described for fsl,mpc8578-pmc.
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This sleep controller only supports disabling devices during system
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sleep, or permanently.
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fsl,mpc8548-pmc: Sleep specifiers consist of one or two cells, the
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first of which will be ORed into DEVDISR (and the second into
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DEVDISR2, if present -- this cell should be zero or absent if the
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hardware does not have DEVDISR2) upon a request for permanent device
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disabling. This sleep controller does not support configuring devices
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to disable during system sleep (unless supported by another compatible
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match), or dynamically.
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Example:
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power@b00 {
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compatible = "fsl,mpc8313-pmc", "fsl,mpc8349-pmc";
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reg = <0xb00 0x100 0xa00 0x100>;
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interrupts = <80 8>;
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};
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152
Documentation/devicetree/bindings/powerpc/fsl/pmc.yaml
Normal file
152
Documentation/devicetree/bindings/powerpc/fsl/pmc.yaml
Normal file
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@ -0,0 +1,152 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/powerpc/fsl/pmc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Power Management Controller
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maintainers:
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- J. Neuschäfer <j.ne@posteo.net>
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description: |
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The Power Management Controller in several MPC8xxx SoCs helps save power by
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controlling chip-wide low-power states as well as peripheral clock gating.
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Sleep of peripheral devices is configured by the `sleep` property, for
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example `sleep = <&pmc 0x00000030>`. Any cells after the &pmc phandle are
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called a sleep specifier.
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For "fsl,mpc8349-pmc", sleep specifiers consist of one cell. For each bit that
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is set in the cell, the corresponding bit in SCCR will be saved and cleared
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on suspend, and restored on resume. This sleep controller supports disabling
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and resuming devices at any time.
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For "fsl,mpc8536-pmc", sleep specifiers consist of three cells, the third of
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which will be ORed into PMCDR upon suspend, and cleared from PMCDR upon
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resume. The first two cells are as described for fsl,mpc8548-pmc. This
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sleep controller only supports disabling devices during system sleep, or
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permanently.
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For "fsl,mpc8548-pmc" or "fsl,mpc8641d-pmc", Sleep specifiers consist of one
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or two cells, the first of which will be ORed into DEVDISR (and the second
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into DEVDISR2, if present -- this cell should be zero or absent if the
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hardware does not have DEVDISR2) upon a request for permanent device
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disabling. This sleep controller does not support configuring devices to
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disable during system sleep (unless supported by another compatible match),
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or dynamically.
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properties:
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compatible:
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oneOf:
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- items:
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- const: fsl,mpc8315-pmc
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- const: fsl,mpc8313-pmc
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- const: fsl,mpc8349-pmc
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- items:
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- enum:
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- fsl,mpc8313-pmc
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- fsl,mpc8323-pmc
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- fsl,mpc8360-pmc
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- fsl,mpc8377-pmc
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- fsl,mpc8378-pmc
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- fsl,mpc8379-pmc
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- const: fsl,mpc8349-pmc
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- items:
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- const: fsl,p1022-pmc
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- const: fsl,mpc8536-pmc
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- const: fsl,mpc8548-pmc
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- items:
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- enum:
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- fsl,mpc8536-pmc
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- fsl,mpc8568-pmc
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- fsl,mpc8569-pmc
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- const: fsl,mpc8548-pmc
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- enum:
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- fsl,mpc8548-pmc
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- fsl,mpc8641d-pmc
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description: |
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"fsl,mpc8349-pmc" should be listed for any chip whose PMC is
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compatible. "fsl,mpc8313-pmc" should also be listed for any chip
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whose PMC is compatible, and implies deep-sleep capability.
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"fsl,mpc8548-pmc" should be listed for any chip whose PMC is
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compatible. "fsl,mpc8536-pmc" should also be listed for any chip
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whose PMC is compatible, and implies deep-sleep capability.
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"fsl,mpc8641d-pmc" should be listed for any chip whose PMC is
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compatible; all statements below that apply to "fsl,mpc8548-pmc" also
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apply to "fsl,mpc8641d-pmc".
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Compatibility does not include bit assignments in SCCR/PMCDR/DEVDISR; these
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bit assignments are indicated via the sleep specifier in each device's
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sleep property.
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reg:
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minItems: 1
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maxItems: 2
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interrupts:
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maxItems: 1
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fsl,mpc8313-wakeup-timer:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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For "fsl,mpc8313-pmc"-compatible devices, this is a phandle to an
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"fsl,gtm" node on which timer 4 can be used as a wakeup source from deep
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sleep.
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allOf:
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- if:
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properties:
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compatible:
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contains:
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const: fsl,mpc8349-pmc
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then:
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properties:
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reg:
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items:
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- description: PMC block
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- description: Clock Configuration block
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- if:
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properties:
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compatible:
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contains:
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enum:
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- fsl,mpc8548-pmc
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- fsl,mpc8641d-pmc
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then:
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properties:
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reg:
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items:
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- description: 32-byte block beginning with DEVDISR
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required:
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- compatible
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- reg
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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pmc: power@b00 {
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compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc";
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reg = <0xb00 0x100>, <0xa00 0x100>;
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interrupts = <80 IRQ_TYPE_LEVEL_LOW>;
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};
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- |
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power@e0070 {
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compatible = "fsl,mpc8548-pmc";
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reg = <0xe0070 0x20>;
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};
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...
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