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drm/panel: samsung: Add shared test key helpers
Several Samsung display controllers use identical commands to enable and disable their three levels of test keys. The drivers currently duplicate these commands in local macros. Move the commands to typed helpers in a private Samsung DSI header and use them from the drivers which already identify the commands by their test key level. Assisted-by: LLM Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: David Heidelberg <david@ixit.cz> Signed-off-by: Linus Walleij <linusw@kernel.org> Link: https://patch.msgid.link/20260903-drm-panels-sofef0-v1-1-9e841645beba@kernel.org
This commit is contained in:
parent
5052ea2e6b
commit
b990db9a01
38
drivers/gpu/drm/panel/panel-samsung-dsi.h
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38
drivers/gpu/drm/panel/panel-samsung-dsi.h
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@ -0,0 +1,38 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef _PANEL_SAMSUNG_DSI_H
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#define _PANEL_SAMSUNG_DSI_H
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#include <drm/drm_mipi_dsi.h>
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static inline void samsung_dsi_test_key_on_lvl1(struct mipi_dsi_multi_context *ctx)
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{
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mipi_dsi_dcs_write_seq_multi(ctx, 0x9f, 0xa5, 0xa5);
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}
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static inline void samsung_dsi_test_key_off_lvl1(struct mipi_dsi_multi_context *ctx)
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{
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mipi_dsi_dcs_write_seq_multi(ctx, 0x9f, 0x5a, 0x5a);
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}
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static inline void samsung_dsi_test_key_on_lvl2(struct mipi_dsi_multi_context *ctx)
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{
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mipi_dsi_dcs_write_seq_multi(ctx, 0xf0, 0x5a, 0x5a);
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}
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static inline void samsung_dsi_test_key_off_lvl2(struct mipi_dsi_multi_context *ctx)
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{
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mipi_dsi_dcs_write_seq_multi(ctx, 0xf0, 0xa5, 0xa5);
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}
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static inline void samsung_dsi_test_key_on_lvl3(struct mipi_dsi_multi_context *ctx)
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{
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mipi_dsi_dcs_write_seq_multi(ctx, 0xfc, 0x5a, 0x5a);
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}
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static inline void samsung_dsi_test_key_off_lvl3(struct mipi_dsi_multi_context *ctx)
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{
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mipi_dsi_dcs_write_seq_multi(ctx, 0xfc, 0xa5, 0xa5);
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}
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#endif /* _PANEL_SAMSUNG_DSI_H */
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@ -20,6 +20,8 @@
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#include <drm/drm_panel.h>
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#include <drm/drm_probe_helper.h>
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#include "panel-samsung-dsi.h"
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#define MCS_ELVSS_ON 0xb1
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struct samsung_s6e3fc2x01 {
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@ -41,19 +43,6 @@ struct samsung_s6e3fc2x01 *to_samsung_s6e3fc2x01(struct drm_panel *panel)
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return container_of(panel, struct samsung_s6e3fc2x01, panel);
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}
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#define s6e3fc2x01_test_key_on_lvl1(ctx) \
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mipi_dsi_dcs_write_seq_multi(ctx, 0x9f, 0xa5, 0xa5)
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#define s6e3fc2x01_test_key_off_lvl1(ctx) \
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mipi_dsi_dcs_write_seq_multi(ctx, 0x9f, 0x5a, 0x5a)
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#define s6e3fc2x01_test_key_on_lvl2(ctx) \
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mipi_dsi_dcs_write_seq_multi(ctx, 0xf0, 0x5a, 0x5a)
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#define s6e3fc2x01_test_key_off_lvl2(ctx) \
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mipi_dsi_dcs_write_seq_multi(ctx, 0xf0, 0xa5, 0xa5)
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#define s6e3fc2x01_test_key_on_lvl3(ctx) \
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mipi_dsi_dcs_write_seq_multi(ctx, 0xfc, 0x5a, 0x5a)
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#define s6e3fc2x01_test_key_off_lvl3(ctx) \
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mipi_dsi_dcs_write_seq_multi(ctx, 0xfc, 0xa5, 0xa5)
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static void s6e3fc2x01_reset(struct samsung_s6e3fc2x01 *ctx)
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{
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gpiod_set_value_cansleep(ctx->reset_gpio, 1);
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@ -66,7 +55,7 @@ static int s6e3fc2x01_on(struct samsung_s6e3fc2x01 *ctx)
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{
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struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi };
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s6e3fc2x01_test_key_on_lvl1(&dsi_ctx);
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samsung_dsi_test_key_on_lvl1(&dsi_ctx);
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mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
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@ -75,64 +64,64 @@ static int s6e3fc2x01_on(struct samsung_s6e3fc2x01 *ctx)
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x0a);
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mipi_dsi_usleep_range(&dsi_ctx, 10000, 11000);
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s6e3fc2x01_test_key_off_lvl1(&dsi_ctx);
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samsung_dsi_test_key_off_lvl1(&dsi_ctx);
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s6e3fc2x01_test_key_on_lvl2(&dsi_ctx);
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samsung_dsi_test_key_on_lvl2(&dsi_ctx);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x01);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xcd, 0x01);
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s6e3fc2x01_test_key_off_lvl2(&dsi_ctx);
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samsung_dsi_test_key_off_lvl2(&dsi_ctx);
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mipi_dsi_usleep_range(&dsi_ctx, 15000, 16000);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x0f);
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mipi_dsi_usleep_range(&dsi_ctx, 10000, 11000);
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s6e3fc2x01_test_key_on_lvl1(&dsi_ctx);
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samsung_dsi_test_key_on_lvl1(&dsi_ctx);
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mipi_dsi_dcs_set_tear_on_multi(&dsi_ctx, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
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s6e3fc2x01_test_key_off_lvl1(&dsi_ctx);
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samsung_dsi_test_key_off_lvl1(&dsi_ctx);
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s6e3fc2x01_test_key_on_lvl2(&dsi_ctx);
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samsung_dsi_test_key_on_lvl2(&dsi_ctx);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xeb, 0x17,
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0x41, 0x92,
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0x0e, 0x10,
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0x82, 0x5a);
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s6e3fc2x01_test_key_off_lvl2(&dsi_ctx);
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samsung_dsi_test_key_off_lvl2(&dsi_ctx);
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/* Column & Page Address Setting */
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mipi_dsi_dcs_set_column_address_multi(&dsi_ctx, 0x0000, 0x0437);
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mipi_dsi_dcs_set_page_address_multi(&dsi_ctx, 0x0000, 0x0923);
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/* Horizontal & Vertical sync Setting */
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s6e3fc2x01_test_key_on_lvl2(&dsi_ctx);
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samsung_dsi_test_key_on_lvl2(&dsi_ctx);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x09);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe8, 0x10, 0x30);
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s6e3fc2x01_test_key_off_lvl2(&dsi_ctx);
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samsung_dsi_test_key_off_lvl2(&dsi_ctx);
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s6e3fc2x01_test_key_on_lvl3(&dsi_ctx);
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samsung_dsi_test_key_on_lvl3(&dsi_ctx);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x01);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe3, 0x88);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x07);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xed, 0x67);
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s6e3fc2x01_test_key_off_lvl3(&dsi_ctx);
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samsung_dsi_test_key_off_lvl3(&dsi_ctx);
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s6e3fc2x01_test_key_on_lvl2(&dsi_ctx);
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samsung_dsi_test_key_on_lvl2(&dsi_ctx);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x07);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb7, 0x01);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x08);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb7, 0x12);
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s6e3fc2x01_test_key_off_lvl2(&dsi_ctx);
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samsung_dsi_test_key_off_lvl2(&dsi_ctx);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x20);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_POWER_SAVE, 0x00);
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mipi_dsi_usleep_range(&dsi_ctx, 1000, 2000);
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s6e3fc2x01_test_key_on_lvl2(&dsi_ctx);
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samsung_dsi_test_key_on_lvl2(&dsi_ctx);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_ELVSS_ON, 0x00, 0x01);
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s6e3fc2x01_test_key_off_lvl2(&dsi_ctx);
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samsung_dsi_test_key_off_lvl2(&dsi_ctx);
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s6e3fc2x01_test_key_on_lvl2(&dsi_ctx);
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samsung_dsi_test_key_on_lvl2(&dsi_ctx);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb3, 0x00, 0xc1);
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s6e3fc2x01_test_key_off_lvl2(&dsi_ctx);
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samsung_dsi_test_key_off_lvl2(&dsi_ctx);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x78);
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mipi_dsi_usleep_range(&dsi_ctx, 10000, 11000);
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@ -140,14 +129,14 @@ static int s6e3fc2x01_on(struct samsung_s6e3fc2x01 *ctx)
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x81, 0x90);
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mipi_dsi_usleep_range(&dsi_ctx, 10000, 11000);
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s6e3fc2x01_test_key_on_lvl2(&dsi_ctx);
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samsung_dsi_test_key_on_lvl2(&dsi_ctx);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x02);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_ELVSS_ON, 0xc6, 0x00, 0x00,
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0x21, 0xed, 0x02, 0x08, 0x06, 0xc1, 0x27,
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0xfc, 0xdc, 0xe4, 0x00, 0xd9, 0xe6, 0xe7,
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0x00, 0xfc, 0xff, 0xea);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_ELVSS_ON, 0x00, 0x00);
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s6e3fc2x01_test_key_off_lvl2(&dsi_ctx);
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samsung_dsi_test_key_off_lvl2(&dsi_ctx);
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mipi_dsi_usleep_range(&dsi_ctx, 10000, 11000);
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@ -159,9 +148,9 @@ static int s6e3fc2x01_enable(struct drm_panel *panel)
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struct samsung_s6e3fc2x01 *ctx = to_samsung_s6e3fc2x01(panel);
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struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi };
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s6e3fc2x01_test_key_on_lvl1(&dsi_ctx);
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samsung_dsi_test_key_on_lvl1(&dsi_ctx);
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mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);
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s6e3fc2x01_test_key_off_lvl1(&dsi_ctx);
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samsung_dsi_test_key_off_lvl1(&dsi_ctx);
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return dsi_ctx.accum_err;
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}
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@ -170,27 +159,27 @@ static int s6e3fc2x01_off(struct samsung_s6e3fc2x01 *ctx)
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{
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struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi };
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s6e3fc2x01_test_key_on_lvl1(&dsi_ctx);
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samsung_dsi_test_key_on_lvl1(&dsi_ctx);
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mipi_dsi_dcs_set_display_off_multi(&dsi_ctx);
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mipi_dsi_usleep_range(&dsi_ctx, 10000, 11000);
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s6e3fc2x01_test_key_on_lvl2(&dsi_ctx);
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samsung_dsi_test_key_on_lvl2(&dsi_ctx);
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mipi_dsi_usleep_range(&dsi_ctx, 16000, 17000);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x50);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb9, 0x82);
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s6e3fc2x01_test_key_off_lvl2(&dsi_ctx);
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samsung_dsi_test_key_off_lvl2(&dsi_ctx);
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mipi_dsi_usleep_range(&dsi_ctx, 16000, 17000);
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mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx);
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s6e3fc2x01_test_key_off_lvl1(&dsi_ctx);
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samsung_dsi_test_key_off_lvl1(&dsi_ctx);
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s6e3fc2x01_test_key_on_lvl2(&dsi_ctx);
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samsung_dsi_test_key_on_lvl2(&dsi_ctx);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x05);
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mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf4, 0x01);
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s6e3fc2x01_test_key_off_lvl2(&dsi_ctx);
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samsung_dsi_test_key_off_lvl2(&dsi_ctx);
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mipi_dsi_msleep(&dsi_ctx, 160);
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return dsi_ctx.accum_err;
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@ -16,6 +16,8 @@
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#include <drm/drm_probe_helper.h>
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#include <drm/drm_panel.h>
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#include "panel-samsung-dsi.h"
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struct s6e3ha8 {
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struct drm_panel panel;
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struct mipi_dsi_device *dsi;
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@ -36,18 +38,6 @@ struct s6e3ha8 *to_s6e3ha8_amb577px01_wqhd(struct drm_panel *panel)
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return container_of(panel, struct s6e3ha8, panel);
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}
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#define s6e3ha8_test_key_on_lvl2(ctx) \
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mipi_dsi_dcs_write_seq_multi(ctx, 0xf0, 0x5a, 0x5a)
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#define s6e3ha8_test_key_off_lvl2(ctx) \
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mipi_dsi_dcs_write_seq_multi(ctx, 0xf0, 0xa5, 0xa5)
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#define s6e3ha8_test_key_on_lvl3(ctx) \
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mipi_dsi_dcs_write_seq_multi(ctx, 0xfc, 0x5a, 0x5a)
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#define s6e3ha8_test_key_off_lvl3(ctx) \
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mipi_dsi_dcs_write_seq_multi(ctx, 0xfc, 0xa5, 0xa5)
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#define s6e3ha8_test_key_on_lvl1(ctx) \
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mipi_dsi_dcs_write_seq_multi(ctx, 0x9f, 0xa5, 0xa5)
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#define s6e3ha8_test_key_off_lvl1(ctx) \
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mipi_dsi_dcs_write_seq_multi(ctx, 0x9f, 0x5a, 0x5a)
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#define s6e3ha8_afc_off(ctx) \
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mipi_dsi_dcs_write_seq_multi(ctx, 0xe2, 0x00, 0x00)
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@ -68,26 +58,26 @@ static int s6e3ha8_amb577px01_wqhd_on(struct s6e3ha8 *priv)
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dsi->mode_flags |= MIPI_DSI_MODE_LPM;
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s6e3ha8_test_key_on_lvl1(&ctx);
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samsung_dsi_test_key_on_lvl1(&ctx);
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s6e3ha8_test_key_on_lvl2(&ctx);
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samsung_dsi_test_key_on_lvl2(&ctx);
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mipi_dsi_compression_mode_multi(&ctx, true);
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s6e3ha8_test_key_off_lvl2(&ctx);
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samsung_dsi_test_key_off_lvl2(&ctx);
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mipi_dsi_dcs_exit_sleep_mode_multi(&ctx);
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usleep_range(5000, 6000);
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s6e3ha8_test_key_on_lvl2(&ctx);
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samsung_dsi_test_key_on_lvl2(&ctx);
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mipi_dsi_dcs_write_seq_multi(&ctx, 0xf2, 0x13);
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s6e3ha8_test_key_off_lvl2(&ctx);
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samsung_dsi_test_key_off_lvl2(&ctx);
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usleep_range(10000, 11000);
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s6e3ha8_test_key_on_lvl2(&ctx);
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samsung_dsi_test_key_on_lvl2(&ctx);
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mipi_dsi_dcs_write_seq_multi(&ctx, 0xf2, 0x13);
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s6e3ha8_test_key_off_lvl2(&ctx);
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samsung_dsi_test_key_off_lvl2(&ctx);
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/* OMOK setting 1 (Initial setting) - Scaler Latch Setting Guide */
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s6e3ha8_test_key_on_lvl2(&ctx);
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samsung_dsi_test_key_on_lvl2(&ctx);
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mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x07);
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/* latch setting 1 : Scaler on/off & address setting & PPS setting -> Image update latch */
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mipi_dsi_dcs_write_seq_multi(&ctx, 0xf2, 0x3c, 0x10);
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@ -98,31 +88,31 @@ static int s6e3ha8_amb577px01_wqhd_on(struct s6e3ha8 *priv)
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mipi_dsi_dcs_write_seq_multi(&ctx, 0x2a, 0x00, 0x00, 0x05, 0x9f); /* CASET */
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mipi_dsi_dcs_write_seq_multi(&ctx, 0x2b, 0x00, 0x00, 0x0b, 0x8f); /* PASET */
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mipi_dsi_dcs_write_seq_multi(&ctx, 0xba, 0x01); /* scaler setup : scaler off */
|
||||
s6e3ha8_test_key_off_lvl2(&ctx);
|
||||
samsung_dsi_test_key_off_lvl2(&ctx);
|
||||
|
||||
mipi_dsi_dcs_write_seq_multi(&ctx, 0x35, 0x00); /* TE Vsync ON */
|
||||
|
||||
s6e3ha8_test_key_on_lvl2(&ctx);
|
||||
samsung_dsi_test_key_on_lvl2(&ctx);
|
||||
mipi_dsi_dcs_write_seq_multi(&ctx, 0xed, 0x4c); /* ERR_FG */
|
||||
s6e3ha8_test_key_off_lvl2(&ctx);
|
||||
samsung_dsi_test_key_off_lvl2(&ctx);
|
||||
|
||||
s6e3ha8_test_key_on_lvl3(&ctx);
|
||||
samsung_dsi_test_key_on_lvl3(&ctx);
|
||||
/* FFC Setting 897.6Mbps */
|
||||
mipi_dsi_dcs_write_seq_multi(&ctx, 0xc5, 0x0d, 0x10, 0xb4, 0x3e, 0x01);
|
||||
s6e3ha8_test_key_off_lvl3(&ctx);
|
||||
samsung_dsi_test_key_off_lvl3(&ctx);
|
||||
|
||||
s6e3ha8_test_key_on_lvl2(&ctx);
|
||||
samsung_dsi_test_key_on_lvl2(&ctx);
|
||||
mipi_dsi_dcs_write_seq_multi(&ctx, 0xb9,
|
||||
0x00, 0xb0, 0x81, 0x09, 0x00, 0x00, 0x00,
|
||||
0x11, 0x03); /* TSP HSYNC Setting */
|
||||
s6e3ha8_test_key_off_lvl2(&ctx);
|
||||
samsung_dsi_test_key_off_lvl2(&ctx);
|
||||
|
||||
s6e3ha8_test_key_on_lvl2(&ctx);
|
||||
samsung_dsi_test_key_on_lvl2(&ctx);
|
||||
mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x03);
|
||||
mipi_dsi_dcs_write_seq_multi(&ctx, 0xf6, 0x43);
|
||||
s6e3ha8_test_key_off_lvl2(&ctx);
|
||||
samsung_dsi_test_key_off_lvl2(&ctx);
|
||||
|
||||
s6e3ha8_test_key_on_lvl2(&ctx);
|
||||
samsung_dsi_test_key_on_lvl2(&ctx);
|
||||
/* Brightness condition set */
|
||||
mipi_dsi_dcs_write_seq_multi(&ctx, 0xca,
|
||||
0x07, 0x00, 0x00, 0x00, 0x80, 0x80, 0x80,
|
||||
|
|
@ -138,9 +128,9 @@ static int s6e3ha8_amb577px01_wqhd_on(struct s6e3ha8 *priv)
|
|||
0x10); /* MPS/ELVSS Setting */
|
||||
mipi_dsi_dcs_write_seq_multi(&ctx, 0xf4, 0xeb, 0x28); /* VINT */
|
||||
mipi_dsi_dcs_write_seq_multi(&ctx, 0xf7, 0x03); /* Gamma, LTPS(AID) update */
|
||||
s6e3ha8_test_key_off_lvl2(&ctx);
|
||||
samsung_dsi_test_key_off_lvl2(&ctx);
|
||||
|
||||
s6e3ha8_test_key_off_lvl1(&ctx);
|
||||
samsung_dsi_test_key_off_lvl1(&ctx);
|
||||
|
||||
return ctx.accum_err;
|
||||
}
|
||||
|
|
@ -151,9 +141,9 @@ static int s6e3ha8_enable(struct drm_panel *panel)
|
|||
struct mipi_dsi_device *dsi = priv->dsi;
|
||||
struct mipi_dsi_multi_context ctx = { .dsi = dsi };
|
||||
|
||||
s6e3ha8_test_key_on_lvl1(&ctx);
|
||||
samsung_dsi_test_key_on_lvl1(&ctx);
|
||||
mipi_dsi_dcs_set_display_on_multi(&ctx);
|
||||
s6e3ha8_test_key_off_lvl1(&ctx);
|
||||
samsung_dsi_test_key_off_lvl1(&ctx);
|
||||
|
||||
return ctx.accum_err;
|
||||
}
|
||||
|
|
@ -164,14 +154,14 @@ static int s6e3ha8_disable(struct drm_panel *panel)
|
|||
struct mipi_dsi_device *dsi = priv->dsi;
|
||||
struct mipi_dsi_multi_context ctx = { .dsi = dsi };
|
||||
|
||||
s6e3ha8_test_key_on_lvl1(&ctx);
|
||||
samsung_dsi_test_key_on_lvl1(&ctx);
|
||||
mipi_dsi_dcs_set_display_off_multi(&ctx);
|
||||
s6e3ha8_test_key_off_lvl1(&ctx);
|
||||
samsung_dsi_test_key_off_lvl1(&ctx);
|
||||
mipi_dsi_msleep(&ctx, 20);
|
||||
|
||||
s6e3ha8_test_key_on_lvl2(&ctx);
|
||||
samsung_dsi_test_key_on_lvl2(&ctx);
|
||||
s6e3ha8_afc_off(&ctx);
|
||||
s6e3ha8_test_key_off_lvl2(&ctx);
|
||||
samsung_dsi_test_key_off_lvl2(&ctx);
|
||||
|
||||
mipi_dsi_msleep(&ctx, 160);
|
||||
|
||||
|
|
@ -200,9 +190,9 @@ static int s6e3ha8_amb577px01_wqhd_prepare(struct drm_panel *panel)
|
|||
|
||||
drm_dsc_pps_payload_pack(&pps, &priv->dsc);
|
||||
|
||||
s6e3ha8_test_key_on_lvl1(&ctx);
|
||||
samsung_dsi_test_key_on_lvl1(&ctx);
|
||||
mipi_dsi_picture_parameter_set_multi(&ctx, &pps);
|
||||
s6e3ha8_test_key_off_lvl1(&ctx);
|
||||
samsung_dsi_test_key_off_lvl1(&ctx);
|
||||
|
||||
mipi_dsi_msleep(&ctx, 28);
|
||||
|
||||
|
|
|
|||
|
|
@ -17,6 +17,8 @@
|
|||
#include <drm/drm_panel.h>
|
||||
#include <drm/drm_probe_helper.h>
|
||||
|
||||
#include "panel-samsung-dsi.h"
|
||||
|
||||
struct s6e8fc0_ctx {
|
||||
struct drm_panel panel;
|
||||
struct mipi_dsi_device *dsi;
|
||||
|
|
@ -45,20 +47,11 @@ static void s6e8fc0_m1906f9_reset(struct s6e8fc0_ctx *ctx)
|
|||
usleep_range(10000, 11000);
|
||||
}
|
||||
|
||||
#define s6e8fc0_test_key_on_lvl2(ctx) \
|
||||
mipi_dsi_dcs_write_seq_multi(ctx, 0xf0, 0x5a, 0x5a)
|
||||
#define s6e8fc0_test_key_off_lvl2(ctx) \
|
||||
mipi_dsi_dcs_write_seq_multi(ctx, 0xf0, 0xa5, 0xa5)
|
||||
#define s6e8fc0_test_key_on_lvl3(ctx) \
|
||||
mipi_dsi_dcs_write_seq_multi(ctx, 0xfc, 0x5a, 0x5a)
|
||||
#define s6e8fc0_test_key_off_lvl3(ctx) \
|
||||
mipi_dsi_dcs_write_seq_multi(ctx, 0xfc, 0xa5, 0xa5)
|
||||
|
||||
static int s6e8fc0_m1906f9_on(struct s6e8fc0_ctx *ctx)
|
||||
{
|
||||
struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi };
|
||||
|
||||
s6e8fc0_test_key_on_lvl3(&dsi_ctx);
|
||||
samsung_dsi_test_key_on_lvl3(&dsi_ctx);
|
||||
|
||||
mipi_dsi_dcs_set_display_brightness_multi(&dsi_ctx, 0x0000);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_CONTROL_DISPLAY,
|
||||
|
|
@ -71,15 +64,15 @@ static int s6e8fc0_m1906f9_on(struct s6e8fc0_ctx *ctx)
|
|||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xed,
|
||||
0xe4, 0x08, 0x96, 0xa4, 0x2a, 0x72, 0xe2,
|
||||
0xca, 0x00);
|
||||
s6e8fc0_test_key_off_lvl3(&dsi_ctx);
|
||||
s6e8fc0_test_key_on_lvl2(&dsi_ctx);
|
||||
s6e8fc0_test_key_on_lvl3(&dsi_ctx);
|
||||
samsung_dsi_test_key_off_lvl3(&dsi_ctx);
|
||||
samsung_dsi_test_key_on_lvl2(&dsi_ctx);
|
||||
samsung_dsi_test_key_on_lvl3(&dsi_ctx);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe1, 0x93);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x05, 0xf4);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf4, 0x03);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xed, 0x01, 0x81, 0x04);
|
||||
s6e8fc0_test_key_off_lvl2(&dsi_ctx);
|
||||
s6e8fc0_test_key_off_lvl3(&dsi_ctx);
|
||||
samsung_dsi_test_key_off_lvl2(&dsi_ctx);
|
||||
samsung_dsi_test_key_off_lvl3(&dsi_ctx);
|
||||
|
||||
return dsi_ctx.accum_err;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -18,6 +18,8 @@
|
|||
#include <drm/drm_panel.h>
|
||||
#include <drm/drm_probe_helper.h>
|
||||
|
||||
#include "panel-samsung-dsi.h"
|
||||
|
||||
struct sofef00_panel {
|
||||
struct drm_panel panel;
|
||||
struct mipi_dsi_device *dsi;
|
||||
|
|
@ -37,11 +39,6 @@ struct sofef00_panel *to_sofef00_panel(struct drm_panel *panel)
|
|||
return container_of(panel, struct sofef00_panel, panel);
|
||||
}
|
||||
|
||||
#define sofef00_test_key_on_lvl2(ctx) \
|
||||
mipi_dsi_dcs_write_seq_multi(ctx, 0xf0, 0x5a, 0x5a)
|
||||
#define sofef00_test_key_off_lvl2(ctx) \
|
||||
mipi_dsi_dcs_write_seq_multi(ctx, 0xf0, 0xa5, 0xa5)
|
||||
|
||||
static void sofef00_panel_reset(struct sofef00_panel *ctx)
|
||||
{
|
||||
gpiod_set_value_cansleep(ctx->reset_gpio, 0);
|
||||
|
|
@ -62,14 +59,14 @@ static int sofef00_panel_on(struct sofef00_panel *ctx)
|
|||
mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
|
||||
mipi_dsi_usleep_range(&dsi_ctx, 10000, 11000);
|
||||
|
||||
sofef00_test_key_on_lvl2(&dsi_ctx);
|
||||
samsung_dsi_test_key_on_lvl2(&dsi_ctx);
|
||||
mipi_dsi_dcs_set_tear_on_multi(&dsi_ctx, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
|
||||
sofef00_test_key_off_lvl2(&dsi_ctx);
|
||||
samsung_dsi_test_key_off_lvl2(&dsi_ctx);
|
||||
|
||||
sofef00_test_key_on_lvl2(&dsi_ctx);
|
||||
samsung_dsi_test_key_on_lvl2(&dsi_ctx);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x07);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb6, 0x12);
|
||||
sofef00_test_key_off_lvl2(&dsi_ctx);
|
||||
samsung_dsi_test_key_off_lvl2(&dsi_ctx);
|
||||
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x20);
|
||||
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_POWER_SAVE, 0x00);
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user