github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-05-22 06:01:53 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

irqchip/riscv-aplic: Add support for hart indexes

Browse Source 
RISC-V APLIC specification defines "hart index" in:

  https://github.com/riscv/riscv-aia

Within a given interrupt domain, each of the domain’s harts has a unique
index number in the range 0 to 2^14 − 1 (= 16,383). The index number a
domain associates with a hart may or may not have any relationship to the
unique hart identifier (“hart ID”) that the RISC-V Privileged Architecture
assigns to the hart. Two different interrupt domains may employ entirely
different index numbers for the same set of harts.

Further, this document says in "4.5 Memory-mapped control region for an
interrupt domain":

The array of IDC structures may include some for potential hart index
numbers that are not actual hart index numbers in the domain. For example,
the first IDC structure is always for hart index 0, but 0 is not
necessarily a valid index number for any hart in the domain.

Support arbitrary hart indices specified in an optional APLIC property
"riscv,hart-indexes" which is specified as an array of u32 elements, one
per interrupt target. If this property is not specified, fallback to use
logical hart indices within the domain.

Signed-off-by: Vladimir Kondratiev <vladimir.kondratiev@mobileye.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/all/20250129091637.1667279-3-vladimir.kondratiev@mobileye.com
This commit is contained in:
Vladimir Kondratiev 2025-01-29 11:16:37 +02:00 committed by Thomas Gleixner
parent c057b6e421
commit b93afe8a3a
1 changed files with 21 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

24
drivers/irqchip/irq-riscv-aplic-direct.c
View File

@ -31,7 +31,7 @@ struct aplic_direct {
};
struct aplic_idc {
unsigned int hart_index;
u32 hart_index;
void __iomem *regs;
struct aplic_direct *direct;
};
@ -219,6 +219,20 @@ static int aplic_direct_parse_parent_hwirq(struct device *dev, u32 index,
return 0;
}
static int aplic_direct_get_hart_index(struct device *dev, u32 logical_index,
u32 *hart_index)
{
const char *prop_hart_index = "riscv,hart-indexes";
struct device_node *np = to_of_node(dev->fwnode);
if (!np || !of_property_present(np, prop_hart_index)) {
*hart_index = logical_index;
return 0;
}
return of_property_read_u32_index(np, prop_hart_index, logical_index, hart_index);
}
int aplic_direct_setup(struct device *dev, void __iomem *regs)
{
int i, j, rc, cpu, current_cpu, setup_count = 0;
@ -265,8 +279,12 @@ int aplic_direct_setup(struct device *dev, void __iomem *regs)
cpumask_set_cpu(cpu, &direct->lmask);
idc = per_cpu_ptr(&aplic_idcs, cpu);
idc->hart_index = i;
idc->regs = priv->regs + APLIC_IDC_BASE + i * APLIC_IDC_SIZE;
rc = aplic_direct_get_hart_index(dev, i, &idc->hart_index);
if (rc) {
dev_warn(dev, "hart index not found for IDC%d\n", i);
continue;
}
idc->regs = priv->regs + APLIC_IDC_BASE + idc->hart_index * APLIC_IDC_SIZE;
idc->direct = direct;
aplic_idc_set_delivery(idc, true);