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mmc: dw_mmc: Remove id and ctype from dw_mci_slot
There is only one slot support, id should be zero. So no need to keep it in track as long as ctype associated. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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1a1936f808
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b8cc1e8066
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@ -282,7 +282,7 @@ static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command *cmd)
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* until the voltage change is all done.
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*/
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clk_en_a = mci_readl(host, CLKENA);
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clk_en_a &= ~(SDMMC_CLKEN_LOW_PWR << slot->id);
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clk_en_a &= ~SDMMC_CLKEN_LOW_PWR;
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mci_writel(host, CLKENA, clk_en_a);
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mci_send_cmd(slot, SDMMC_CMD_UPD_CLK |
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SDMMC_CMD_PRV_DAT_WAIT, 0);
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@ -911,7 +911,7 @@ static int dw_mci_get_cd(struct mmc_host *mmc)
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} else if (gpio_cd >= 0)
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present = gpio_cd;
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else
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present = (mci_readl(slot->host, CDETECT) & (1 << slot->id))
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present = (mci_readl(slot->host, CDETECT) & BIT(0))
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== 0 ? 1 : 0;
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spin_lock_bh(&host->lock);
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@ -1173,8 +1173,8 @@ static void dw_mci_setup_bus(struct dw_mci_slot *slot, bool force_clkinit)
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/* Silent the verbose log if calling from PM context */
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if (!force_clkinit)
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dev_info(&host->mmc->class_dev,
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"Bus speed (slot %d) = %dHz (slot req %dHz, actual %dHZ div = %d)\n",
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slot->id, host->bus_hz, clock,
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"Bus speed = %dHz (slot req %dHz, actual %dHZ div = %d)\n",
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host->bus_hz, clock,
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div ? ((host->bus_hz / div) >> 1) :
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host->bus_hz, div);
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@ -1201,9 +1201,9 @@ static void dw_mci_setup_bus(struct dw_mci_slot *slot, bool force_clkinit)
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mci_send_cmd(slot, sdmmc_cmd_bits, 0);
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/* enable clock; only low power if no SDIO */
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clk_en_a = SDMMC_CLKEN_ENABLE << slot->id;
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clk_en_a = SDMMC_CLKEN_ENABLE;
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if (!test_bit(DW_MMC_CARD_NO_LOW_PWR, &host->flags))
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clk_en_a |= SDMMC_CLKEN_LOW_PWR << slot->id;
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clk_en_a |= SDMMC_CLKEN_LOW_PWR;
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mci_writel(host, CLKENA, clk_en_a);
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/* inform CIU */
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@ -1218,7 +1218,7 @@ static void dw_mci_setup_bus(struct dw_mci_slot *slot, bool force_clkinit)
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host->current_speed = clock;
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/* Set the current slot bus width */
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mci_writel(host, CTYPE, (slot->ctype << slot->id));
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mci_writel(host, CTYPE, host->ctype);
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}
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static void dw_mci_set_data_timeout(struct dw_mci *host,
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@ -1386,14 +1386,14 @@ static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
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switch (ios->bus_width) {
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case MMC_BUS_WIDTH_4:
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slot->ctype = SDMMC_CTYPE_4BIT;
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slot->host->ctype = SDMMC_CTYPE_4BIT;
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break;
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case MMC_BUS_WIDTH_8:
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slot->ctype = SDMMC_CTYPE_8BIT;
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slot->host->ctype = SDMMC_CTYPE_8BIT;
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break;
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default:
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/* set default 1 bit mode */
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slot->ctype = SDMMC_CTYPE_1BIT;
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slot->host->ctype = SDMMC_CTYPE_1BIT;
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}
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regs = mci_readl(slot->host, UHS_REG);
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@ -1402,9 +1402,9 @@ static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
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if (ios->timing == MMC_TIMING_MMC_DDR52 ||
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ios->timing == MMC_TIMING_UHS_DDR50 ||
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ios->timing == MMC_TIMING_MMC_HS400)
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regs |= ((0x1 << slot->id) << 16);
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regs |= BIT(16);
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else
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regs &= ~((0x1 << slot->id) << 16);
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regs &= ~BIT(16);
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mci_writel(slot->host, UHS_REG, regs);
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slot->host->timing = ios->timing;
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@ -1427,7 +1427,7 @@ static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
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}
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set_bit(DW_MMC_CARD_NEED_INIT, &slot->host->flags);
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regs = mci_readl(slot->host, PWREN);
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regs |= (1 << slot->id);
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regs |= BIT(0);
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mci_writel(slot->host, PWREN, regs);
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break;
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case MMC_POWER_ON:
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@ -1446,7 +1446,7 @@ static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
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mmc_regulator_disable_vqmmc(mmc);
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regs = mci_readl(slot->host, PWREN);
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regs &= ~(1 << slot->id);
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regs &= ~BIT(0);
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mci_writel(slot->host, PWREN, regs);
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/* Reset our state machine after powering off */
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dw_mci_ctrl_reset(slot->host, SDMMC_CTRL_ALL_RESET_FLAGS);
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@ -1479,7 +1479,7 @@ static int dw_mci_switch_voltage(struct mmc_host *mmc, struct mmc_ios *ios)
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struct dw_mci *host = slot->host;
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const struct dw_mci_drv_data *drv_data = host->drv_data;
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u32 uhs;
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u32 v18 = SDMMC_UHS_18V << slot->id;
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u32 v18 = SDMMC_UHS_18V;
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int ret;
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if (drv_data && drv_data->switch_voltage)
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@ -1521,7 +1521,7 @@ static int dw_mci_get_ro(struct mmc_host *mmc)
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read_only = gpio_ro;
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else
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read_only =
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mci_readl(slot->host, WRTPRT) & (1 << slot->id) ? 1 : 0;
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mci_readl(slot->host, WRTPRT) & BIT(0) ? 1 : 0;
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dev_dbg(&mmc->class_dev, "card is %s\n",
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read_only ? "read-only" : "read-write");
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@ -1555,10 +1555,10 @@ static void dw_mci_hw_reset(struct mmc_host *mmc)
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* tRSTH >= 1us: RST_n high period
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*/
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reset = mci_readl(host, RST_N);
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reset &= ~(SDMMC_RST_HWACTIVE << slot->id);
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reset &= ~SDMMC_RST_HWACTIVE;
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mci_writel(host, RST_N, reset);
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usleep_range(1, 2);
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reset |= SDMMC_RST_HWACTIVE << slot->id;
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reset |= SDMMC_RST_HWACTIVE;
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mci_writel(host, RST_N, reset);
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usleep_range(200, 300);
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}
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@ -1566,7 +1566,7 @@ static void dw_mci_hw_reset(struct mmc_host *mmc)
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static void dw_mci_prepare_sdio_irq(struct dw_mci_slot *slot, bool prepare)
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{
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struct dw_mci *host = slot->host;
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const u32 clken_low_pwr = SDMMC_CLKEN_LOW_PWR << slot->id;
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const u32 clken_low_pwr = SDMMC_CLKEN_LOW_PWR;
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u32 clk_en_a_old;
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u32 clk_en_a;
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@ -2927,8 +2927,7 @@ static int dw_mci_init_slot(struct dw_mci *host)
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return -ENOMEM;
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slot = mmc_priv(mmc);
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slot->id = 0;
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slot->sdio_id = host->sdio_id0 + slot->id;
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slot->sdio_id = host->sdio_id0;
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host->mmc = mmc;
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slot->host = host;
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host->slot = slot;
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@ -129,6 +129,7 @@ struct dw_mci_dma_slave {
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* @dto_timer: Timer for broken data transfer over scheme.
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* @mmc: The mmc_host representing this dw_mci.
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* @flags: Random state bits associated with the host.
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* @ctype: Card type for this host.
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*
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* Locking
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* =======
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@ -249,6 +250,7 @@ struct dw_mci {
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#define DW_MMC_CARD_NO_LOW_PWR 2
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#define DW_MMC_CARD_NO_USE_HOLD 3
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#define DW_MMC_CARD_NEEDS_POLL 4
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u32 ctype;
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};
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/* DMA ops for Internal/External DMAC interface */
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@ -553,7 +555,6 @@ static inline int dw_mci_runtime_resume(struct device *device) { return -EOPNOTS
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/**
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* struct dw_mci_slot - MMC slot state
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* @host: The MMC controller this slot is using.
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* @ctype: Card type for this slot.
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* @mrq: mmc_request currently being processed or waiting to be
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* processed, or NULL when the slot is idle.
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* @queue_node: List node for placing this node in the @queue list of
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@ -561,21 +562,17 @@ static inline int dw_mci_runtime_resume(struct device *device) { return -EOPNOTS
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* @clock: Clock rate configured by set_ios(). Protected by host->lock.
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* @__clk_old: The last clock value that was requested from core.
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* Keeping track of this helps us to avoid spamming the console.
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* @id: Number of this slot.
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* @sdio_id: Number of this slot in the SDIO interrupt registers.
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*/
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struct dw_mci_slot {
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struct dw_mci *host;
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u32 ctype;
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struct mmc_request *mrq;
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struct list_head queue_node;
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unsigned int clock;
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unsigned int __clk_old;
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int id;
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int sdio_id;
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};
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