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crypto: qat - rename and relocate timer logic

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Rename adf_gen4_timer.c to adf_timer.c and adf_gen4_timer.h to
adf_timer.h to make the files generation-agnostic. This includes
renaming the start() and stop() timer APIs and macro definitions
to be generic, allowing for reuse across different device
generations.
This does not introduce any functional changes.

Signed-off-by: George Abraham P <george.abraham.p@intel.com>
Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
George Abraham P 2025-04-30 12:34:43 +01:00 committed by Herbert Xu
parent ce026b35b7
commit b8ca438062
5 changed files with 21 additions and 21 deletions
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6
drivers/crypto/intel/qat/qat_420xx/adf_420xx_hw_data.c
View File

@ -15,9 +15,9 @@
#include <adf_gen4_pfvf.h>
#include <adf_gen4_pm.h>
#include <adf_gen4_ras.h>
#include <adf_gen4_timer.h>
#include <adf_gen4_tl.h>
#include <adf_gen4_vf_mig.h>
#include <adf_timer.h>
#include "adf_420xx_hw_data.h"
#include "icp_qat_hw.h"
@ -468,8 +468,8 @@ void adf_init_hw_data_420xx(struct adf_hw_device_data *hw_data, u32 dev_id)
hw_data->enable_pm = adf_gen4_enable_pm;
hw_data->handle_pm_interrupt = adf_gen4_handle_pm_interrupt;
hw_data->dev_config = adf_gen4_dev_config;
hw_data->start_timer = adf_gen4_timer_start;
hw_data->stop_timer = adf_gen4_timer_stop;
hw_data->start_timer = adf_timer_start;
hw_data->stop_timer = adf_timer_stop;
hw_data->get_hb_clock = adf_gen4_get_heartbeat_clock;
hw_data->num_hb_ctrs = ADF_NUM_HB_CNT_PER_AE;
hw_data->clock_frequency = ADF_420XX_AE_FREQ;

6
drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c
View File

@ -15,9 +15,9 @@
#include <adf_gen4_pfvf.h>
#include <adf_gen4_pm.h>
#include "adf_gen4_ras.h"
#include <adf_gen4_timer.h>
#include <adf_gen4_tl.h>
#include <adf_gen4_vf_mig.h>
#include <adf_timer.h>
#include "adf_4xxx_hw_data.h"
#include "icp_qat_hw.h"
@ -454,8 +454,8 @@ void adf_init_hw_data_4xxx(struct adf_hw_device_data *hw_data, u32 dev_id)
hw_data->enable_pm = adf_gen4_enable_pm;
hw_data->handle_pm_interrupt = adf_gen4_handle_pm_interrupt;
hw_data->dev_config = adf_gen4_dev_config;
hw_data->start_timer = adf_gen4_timer_start;
hw_data->stop_timer = adf_gen4_timer_stop;
hw_data->start_timer = adf_timer_start;
hw_data->stop_timer = adf_timer_stop;
hw_data->get_hb_clock = adf_gen4_get_heartbeat_clock;
hw_data->num_hb_ctrs = ADF_NUM_HB_CNT_PER_AE;
hw_data->clock_frequency = ADF_4XXX_AE_FREQ;

2
drivers/crypto/intel/qat/qat_common/Makefile
View File

@ -19,7 +19,6 @@ intel_qat-y := adf_accel_engine.o \
adf_gen4_hw_data.o \
adf_gen4_pm.o \
adf_gen4_ras.o \
adf_gen4_timer.o \
adf_gen4_vf_mig.o \
adf_hw_arbiter.o \
adf_init.o \
@ -30,6 +29,7 @@ intel_qat-y := adf_accel_engine.o \
adf_sysfs.o \
adf_sysfs_ras_counters.o \
adf_sysfs_rl.o \
adf_timer.o \
adf_transport.o \
qat_algs.o \
qat_algs_send.o \

18
drivers/crypto/intel/qat/qat_common/adf_gen4_timer.c → drivers/crypto/intel/qat/qat_common/adf_timer.c
View File

@ -12,9 +12,9 @@
#include "adf_admin.h"
#include "adf_accel_devices.h"
#include "adf_common_drv.h"
#include "adf_gen4_timer.h"
#include "adf_timer.h"
#define ADF_GEN4_TIMER_PERIOD_MS 200
#define ADF_DEFAULT_TIMER_PERIOD_MS 200
/* This periodic update is used to trigger HB, RL & TL fw events */
static void work_handler(struct work_struct *work)
@ -27,16 +27,16 @@ static void work_handler(struct work_struct *work)
accel_dev = timer_ctx->accel_dev;
adf_misc_wq_queue_delayed_work(&timer_ctx->work_ctx,
msecs_to_jiffies(ADF_GEN4_TIMER_PERIOD_MS));
msecs_to_jiffies(ADF_DEFAULT_TIMER_PERIOD_MS));
time_periods = div_u64(ktime_ms_delta(ktime_get_real(), timer_ctx->initial_ktime),
ADF_GEN4_TIMER_PERIOD_MS);
ADF_DEFAULT_TIMER_PERIOD_MS);
if (adf_send_admin_tim_sync(accel_dev, time_periods))
dev_err(&GET_DEV(accel_dev), "Failed to synchronize qat timer\n");
}
int adf_gen4_timer_start(struct adf_accel_dev *accel_dev)
int adf_timer_start(struct adf_accel_dev *accel_dev)
{
struct adf_timer *timer_ctx;
@ -50,13 +50,13 @@ int adf_gen4_timer_start(struct adf_accel_dev *accel_dev)
INIT_DELAYED_WORK(&timer_ctx->work_ctx, work_handler);
adf_misc_wq_queue_delayed_work(&timer_ctx->work_ctx,
msecs_to_jiffies(ADF_GEN4_TIMER_PERIOD_MS));
msecs_to_jiffies(ADF_DEFAULT_TIMER_PERIOD_MS));
return 0;
}
EXPORT_SYMBOL_GPL(adf_gen4_timer_start);
EXPORT_SYMBOL_GPL(adf_timer_start);
void adf_gen4_timer_stop(struct adf_accel_dev *accel_dev)
void adf_timer_stop(struct adf_accel_dev *accel_dev)
{
struct adf_timer *timer_ctx = accel_dev->timer;
@ -68,4 +68,4 @@ void adf_gen4_timer_stop(struct adf_accel_dev *accel_dev)
kfree(timer_ctx);
accel_dev->timer = NULL;
}
EXPORT_SYMBOL_GPL(adf_gen4_timer_stop);
EXPORT_SYMBOL_GPL(adf_timer_stop);

10
drivers/crypto/intel/qat/qat_common/adf_gen4_timer.h → drivers/crypto/intel/qat/qat_common/adf_timer.h
View File

@ -1,8 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* Copyright(c) 2023 Intel Corporation */
#ifndef ADF_GEN4_TIMER_H_
#define ADF_GEN4_TIMER_H_
#ifndef ADF_TIMER_H_
#define ADF_TIMER_H_
#include <linux/ktime.h>
#include <linux/workqueue.h>
@ -15,7 +15,7 @@ struct adf_timer {
ktime_t initial_ktime;
};
int adf_gen4_timer_start(struct adf_accel_dev *accel_dev);
void adf_gen4_timer_stop(struct adf_accel_dev *accel_dev);
int adf_timer_start(struct adf_accel_dev *accel_dev);
void adf_timer_stop(struct adf_accel_dev *accel_dev);
#endif /* ADF_GEN4_TIMER_H_ */
#endif /* ADF_TIMER_H_ */