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Merge branch 'net-stmmac-replace-speed_mode_2500-method'

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Russell King says:

====================
net: stmmac: replace speed_mode_2500() method

This series replaces the speed_mode_2500() method with a new method
that is more flexible, allowing the platform glue driver to populate
phylink's supported_interfaces and set the PHY-side interface mode.

The only user of this method is currently dwmac-intel, which we
update to use this new method.
====================

Link: https://patch.msgid.link/aBNe0Vt81vmqVCma@shell.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Jakub Kicinski 2025-05-02 18:25:11 -07:00
commit b88c382bed
4 changed files with 49 additions and 44 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

33
drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c
View File

@ -284,25 +284,28 @@ static void intel_serdes_powerdown(struct net_device *ndev, void *intel_data)
}
}
static void intel_speed_mode_2500(struct net_device *ndev, void *intel_data)
static void tgl_get_interfaces(struct stmmac_priv *priv, void *bsp_priv,
unsigned long *interfaces)
{
struct intel_priv_data *intel_priv = intel_data;
struct stmmac_priv *priv = netdev_priv(ndev);
int serdes_phy_addr = 0;
u32 data = 0;
serdes_phy_addr = intel_priv->mdio_adhoc_addr;
struct intel_priv_data *intel_priv = bsp_priv;
phy_interface_t interface;
int data;
/* Determine the link speed mode: 2.5Gbps/1Gbps */
data = mdiobus_read(priv->mii, serdes_phy_addr,
SERDES_GCR);
data = mdiobus_read(priv->mii, intel_priv->mdio_adhoc_addr, SERDES_GCR);
if (data < 0)
return;
if (((data & SERDES_LINK_MODE_MASK) >> SERDES_LINK_MODE_SHIFT) ==
SERDES_LINK_MODE_2G5) {
if (FIELD_GET(SERDES_LINK_MODE_MASK, data) == SERDES_LINK_MODE_2G5) {
dev_info(priv->device, "Link Speed Mode: 2.5Gbps\n");
priv->plat->phy_interface = PHY_INTERFACE_MODE_2500BASEX;
priv->plat->mdio_bus_data->default_an_inband = false;
interface = PHY_INTERFACE_MODE_2500BASEX;
} else {
interface = PHY_INTERFACE_MODE_SGMII;
}
__set_bit(interface, interfaces);
priv->plat->phy_interface = interface;
}
/* Program PTP Clock Frequency for different variant of
@ -929,7 +932,7 @@ static int tgl_common_data(struct pci_dev *pdev,
plat->rx_queues_to_use = 6;
plat->tx_queues_to_use = 4;
plat->clk_ptp_rate = 204800000;
plat->speed_mode_2500 = intel_speed_mode_2500;
plat->get_interfaces = tgl_get_interfaces;
plat->safety_feat_cfg->tsoee = 1;
plat->safety_feat_cfg->mrxpee = 0;
@ -948,7 +951,6 @@ static int tgl_sgmii_phy0_data(struct pci_dev *pdev,
struct plat_stmmacenet_data *plat)
{
plat->bus_id = 1;
plat->phy_interface = PHY_INTERFACE_MODE_SGMII;
plat->serdes_powerup = intel_serdes_powerup;
plat->serdes_powerdown = intel_serdes_powerdown;
return tgl_common_data(pdev, plat);
@ -962,7 +964,6 @@ static int tgl_sgmii_phy1_data(struct pci_dev *pdev,
struct plat_stmmacenet_data *plat)
{
plat->bus_id = 2;
plat->phy_interface = PHY_INTERFACE_MODE_SGMII;
plat->serdes_powerup = intel_serdes_powerup;
plat->serdes_powerdown = intel_serdes_powerdown;
return tgl_common_data(pdev, plat);
@ -976,7 +977,6 @@ static int adls_sgmii_phy0_data(struct pci_dev *pdev,
struct plat_stmmacenet_data *plat)
{
plat->bus_id = 1;
plat->phy_interface = PHY_INTERFACE_MODE_SGMII;
/* SerDes power up and power down are done in BIOS for ADL */
@ -991,7 +991,6 @@ static int adls_sgmii_phy1_data(struct pci_dev *pdev,
struct plat_stmmacenet_data *plat)
{
plat->bus_id = 2;
plat->phy_interface = PHY_INTERFACE_MODE_SGMII;
/* SerDes power up and power down are done in BIOS for ADL */

1
drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h
View File

@ -21,7 +21,6 @@
#define SERDES_RATE_MASK GENMASK(9, 8)
#define SERDES_PCLK_MASK GENMASK(14, 12) /* PCLK rate to PHY */
#define SERDES_LINK_MODE_MASK GENMASK(2, 1)
#define SERDES_LINK_MODE_SHIFT 1
#define SERDES_PWR_ST_SHIFT 4
#define SERDES_PWR_ST_P0 0x0
#define SERDES_PWR_ST_P3 0x3

56
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
View File

@ -1258,20 +1258,22 @@ static int stmmac_init_phy(struct net_device *dev)
static int stmmac_phy_setup(struct stmmac_priv *priv)
{
struct stmmac_mdio_bus_data *mdio_bus_data;
int mode = priv->plat->phy_interface;
struct phylink_config *config;
struct fwnode_handle *fwnode;
struct phylink_pcs *pcs;
struct phylink *phylink;
priv->phylink_config.dev = &priv->dev->dev;
priv->phylink_config.type = PHYLINK_NETDEV;
priv->phylink_config.mac_managed_pm = true;
config = &priv->phylink_config;
config->dev = &priv->dev->dev;
config->type = PHYLINK_NETDEV;
config->mac_managed_pm = true;
/* Stmmac always requires an RX clock for hardware initialization */
priv->phylink_config.mac_requires_rxc = true;
config->mac_requires_rxc = true;
if (!(priv->plat->flags & STMMAC_FLAG_RX_CLK_RUNS_IN_LPI))
priv->phylink_config.eee_rx_clk_stop_enable = true;
config->eee_rx_clk_stop_enable = true;
/* Set the default transmit clock stop bit based on the platform glue */
priv->tx_lpi_clk_stop = priv->plat->flags &
@ -1279,13 +1281,22 @@ static int stmmac_phy_setup(struct stmmac_priv *priv)
mdio_bus_data = priv->plat->mdio_bus_data;
if (mdio_bus_data)
priv->phylink_config.default_an_inband =
mdio_bus_data->default_an_inband;
config->default_an_inband = mdio_bus_data->default_an_inband;
/* Set the platform/firmware specified interface mode. Note, phylink
* deals with the PHY interface mode, not the MAC interface mode.
/* Get the PHY interface modes (at the PHY end of the link) that
* are supported by the platform.
*/
__set_bit(mode, priv->phylink_config.supported_interfaces);
if (priv->plat->get_interfaces)
priv->plat->get_interfaces(priv, priv->plat->bsp_priv,
config->supported_interfaces);
/* Set the platform/firmware specified interface mode if the
* supported interfaces have not already been provided using
* phy_interface as a last resort.
*/
if (phy_interface_empty(config->supported_interfaces))
__set_bit(priv->plat->phy_interface,
config->supported_interfaces);
/* If we have an xpcs, it defines which PHY interfaces are supported. */
if (priv->hw->xpcs)
@ -1294,29 +1305,27 @@ static int stmmac_phy_setup(struct stmmac_priv *priv)
pcs = priv->hw->phylink_pcs;
if (pcs)
phy_interface_or(priv->phylink_config.supported_interfaces,
priv->phylink_config.supported_interfaces,
phy_interface_or(config->supported_interfaces,
config->supported_interfaces,
pcs->supported_interfaces);
if (priv->dma_cap.eee) {
/* Assume all supported interfaces also support LPI */
memcpy(priv->phylink_config.lpi_interfaces,
priv->phylink_config.supported_interfaces,
sizeof(priv->phylink_config.lpi_interfaces));
memcpy(config->lpi_interfaces, config->supported_interfaces,
sizeof(config->lpi_interfaces));
/* All full duplex speeds above 100Mbps are supported */
priv->phylink_config.lpi_capabilities = ~(MAC_1000FD - 1) |
MAC_100FD;
priv->phylink_config.lpi_timer_default = eee_timer * 1000;
priv->phylink_config.eee_enabled_default = true;
config->lpi_capabilities = ~(MAC_1000FD - 1) | MAC_100FD;
config->lpi_timer_default = eee_timer * 1000;
config->eee_enabled_default = true;
}
fwnode = priv->plat->port_node;
if (!fwnode)
fwnode = dev_fwnode(priv->device);
phylink = phylink_create(&priv->phylink_config, fwnode,
mode, &stmmac_phylink_mac_ops);
phylink = phylink_create(config, fwnode, priv->plat->phy_interface,
&stmmac_phylink_mac_ops);
if (IS_ERR(phylink))
return PTR_ERR(phylink);
@ -7727,9 +7736,6 @@ int stmmac_dvr_probe(struct device *device,
goto error_mdio_register;
}
if (priv->plat->speed_mode_2500)
priv->plat->speed_mode_2500(ndev, priv->plat->bsp_priv);
ret = stmmac_pcs_setup(ndev);
if (ret)
goto error_pcs_setup;

3
include/linux/stmmac.h
View File

@ -233,13 +233,14 @@ struct plat_stmmacenet_data {
u8 tx_sched_algorithm;
struct stmmac_rxq_cfg rx_queues_cfg[MTL_MAX_RX_QUEUES];
struct stmmac_txq_cfg tx_queues_cfg[MTL_MAX_TX_QUEUES];
void (*get_interfaces)(struct stmmac_priv *priv, void *bsp_priv,
unsigned long *interfaces);
int (*set_clk_tx_rate)(void *priv, struct clk *clk_tx_i,
phy_interface_t interface, int speed);
void (*fix_mac_speed)(void *priv, int speed, unsigned int mode);
int (*fix_soc_reset)(void *priv, void __iomem *ioaddr);
int (*serdes_powerup)(struct net_device *ndev, void *priv);
void (*serdes_powerdown)(struct net_device *ndev, void *priv);
void (*speed_mode_2500)(struct net_device *ndev, void *priv);
int (*mac_finish)(struct net_device *ndev,
void *priv,
unsigned int mode,