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https://github.com/torvalds/linux.git
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Merge remote-tracking branch 'lsk/v3.10/topic/arm64-misc' into linux-linaro-lsk
This commit is contained in:
Mark Brown
commit
b86b64d182
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@ -63,7 +63,7 @@ static inline int atomic_add_return(int i, atomic_t *v)
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int result;
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asm volatile("// atomic_add_return\n"
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"1: ldaxr %w0, %2\n"
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"1: ldxr %w0, %2\n"
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" add %w0, %w0, %w3\n"
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" stlxr %w1, %w0, %2\n"
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" cbnz %w1, 1b"
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@ -71,6 +71,7 @@ static inline int atomic_add_return(int i, atomic_t *v)
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: "Ir" (i)
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: "memory");
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smp_mb();
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return result;
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}
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@ -94,7 +95,7 @@ static inline int atomic_sub_return(int i, atomic_t *v)
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int result;
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asm volatile("// atomic_sub_return\n"
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"1: ldaxr %w0, %2\n"
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"1: ldxr %w0, %2\n"
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" sub %w0, %w0, %w3\n"
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" stlxr %w1, %w0, %2\n"
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" cbnz %w1, 1b"
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@ -102,6 +103,7 @@ static inline int atomic_sub_return(int i, atomic_t *v)
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: "Ir" (i)
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: "memory");
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smp_mb();
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return result;
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}
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@ -110,17 +112,20 @@ static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new)
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unsigned long tmp;
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int oldval;
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smp_mb();
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asm volatile("// atomic_cmpxchg\n"
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"1: ldaxr %w1, %2\n"
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"1: ldxr %w1, %2\n"
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" cmp %w1, %w3\n"
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" b.ne 2f\n"
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" stlxr %w0, %w4, %2\n"
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" stxr %w0, %w4, %2\n"
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" cbnz %w0, 1b\n"
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"2:"
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: "=&r" (tmp), "=&r" (oldval), "+Q" (ptr->counter)
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: "Ir" (old), "r" (new)
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: "cc");
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smp_mb();
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return oldval;
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}
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@ -194,7 +199,7 @@ static inline long atomic64_add_return(long i, atomic64_t *v)
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unsigned long tmp;
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asm volatile("// atomic64_add_return\n"
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"1: ldaxr %0, %2\n"
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"1: ldxr %0, %2\n"
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" add %0, %0, %3\n"
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" stlxr %w1, %0, %2\n"
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" cbnz %w1, 1b"
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@ -202,6 +207,7 @@ static inline long atomic64_add_return(long i, atomic64_t *v)
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: "Ir" (i)
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: "memory");
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smp_mb();
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return result;
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}
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@ -225,7 +231,7 @@ static inline long atomic64_sub_return(long i, atomic64_t *v)
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unsigned long tmp;
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asm volatile("// atomic64_sub_return\n"
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"1: ldaxr %0, %2\n"
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"1: ldxr %0, %2\n"
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" sub %0, %0, %3\n"
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" stlxr %w1, %0, %2\n"
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" cbnz %w1, 1b"
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@ -233,6 +239,7 @@ static inline long atomic64_sub_return(long i, atomic64_t *v)
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: "Ir" (i)
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: "memory");
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smp_mb();
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return result;
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}
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@ -241,17 +248,20 @@ static inline long atomic64_cmpxchg(atomic64_t *ptr, long old, long new)
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long oldval;
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unsigned long res;
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smp_mb();
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asm volatile("// atomic64_cmpxchg\n"
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"1: ldaxr %1, %2\n"
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"1: ldxr %1, %2\n"
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" cmp %1, %3\n"
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" b.ne 2f\n"
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" stlxr %w0, %4, %2\n"
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" stxr %w0, %4, %2\n"
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" cbnz %w0, 1b\n"
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"2:"
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: "=&r" (res), "=&r" (oldval), "+Q" (ptr->counter)
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: "Ir" (old), "r" (new)
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: "cc");
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smp_mb();
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return oldval;
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}
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@ -263,11 +273,12 @@ static inline long atomic64_dec_if_positive(atomic64_t *v)
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unsigned long tmp;
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asm volatile("// atomic64_dec_if_positive\n"
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"1: ldaxr %0, %2\n"
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"1: ldxr %0, %2\n"
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" subs %0, %0, #1\n"
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" b.mi 2f\n"
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" stlxr %w1, %0, %2\n"
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" cbnz %w1, 1b\n"
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" dmb ish\n"
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"2:"
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: "=&r" (result), "=&r" (tmp), "+Q" (v->counter)
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:
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@ -29,7 +29,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size
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switch (size) {
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case 1:
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asm volatile("// __xchg1\n"
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"1: ldaxrb %w0, %2\n"
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"1: ldxrb %w0, %2\n"
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" stlxrb %w1, %w3, %2\n"
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" cbnz %w1, 1b\n"
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: "=&r" (ret), "=&r" (tmp), "+Q" (*(u8 *)ptr)
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@ -38,7 +38,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size
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break;
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case 2:
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asm volatile("// __xchg2\n"
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"1: ldaxrh %w0, %2\n"
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"1: ldxrh %w0, %2\n"
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" stlxrh %w1, %w3, %2\n"
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" cbnz %w1, 1b\n"
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: "=&r" (ret), "=&r" (tmp), "+Q" (*(u16 *)ptr)
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@ -47,7 +47,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size
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break;
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case 4:
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asm volatile("// __xchg4\n"
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"1: ldaxr %w0, %2\n"
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"1: ldxr %w0, %2\n"
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" stlxr %w1, %w3, %2\n"
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" cbnz %w1, 1b\n"
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: "=&r" (ret), "=&r" (tmp), "+Q" (*(u32 *)ptr)
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@ -56,7 +56,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size
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break;
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case 8:
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asm volatile("// __xchg8\n"
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"1: ldaxr %0, %2\n"
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"1: ldxr %0, %2\n"
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" stlxr %w1, %3, %2\n"
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" cbnz %w1, 1b\n"
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: "=&r" (ret), "=&r" (tmp), "+Q" (*(u64 *)ptr)
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@ -67,6 +67,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size
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BUILD_BUG();
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}
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smp_mb();
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return ret;
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}
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@ -24,10 +24,11 @@
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#define __futex_atomic_op(insn, ret, oldval, uaddr, tmp, oparg) \
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asm volatile( \
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"1: ldaxr %w1, %2\n" \
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"1: ldxr %w1, %2\n" \
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insn "\n" \
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"2: stlxr %w3, %w0, %2\n" \
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" cbnz %w3, 1b\n" \
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" dmb ish\n" \
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"3:\n" \
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" .pushsection .fixup,\"ax\"\n" \
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" .align 2\n" \
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@ -111,11 +112,12 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
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return -EFAULT;
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asm volatile("// futex_atomic_cmpxchg_inatomic\n"
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"1: ldaxr %w1, %2\n"
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"1: ldxr %w1, %2\n"
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" sub %w3, %w1, %w4\n"
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" cbnz %w3, 3f\n"
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"2: stlxr %w3, %w5, %2\n"
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" cbnz %w3, 1b\n"
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" dmb ish\n"
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"3:\n"
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" .pushsection .fixup,\"ax\"\n"
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"4: mov %w0, %w6\n"
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@ -38,12 +38,13 @@ __kuser_cmpxchg64: // 0xffff0f60
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.inst 0xe92d00f0 // push {r4, r5, r6, r7}
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.inst 0xe1c040d0 // ldrd r4, r5, [r0]
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.inst 0xe1c160d0 // ldrd r6, r7, [r1]
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.inst 0xe1b20e9f // 1: ldaexd r0, r1, [r2]
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.inst 0xe1b20f9f // 1: ldrexd r0, r1, [r2]
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.inst 0xe0303004 // eors r3, r0, r4
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.inst 0x00313005 // eoreqs r3, r1, r5
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.inst 0x01a23e96 // stlexdeq r3, r6, [r2]
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.inst 0x03330001 // teqeq r3, #1
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.inst 0x0afffff9 // beq 1b
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.inst 0xf57ff05b // dmb ish
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.inst 0xe2730000 // rsbs r0, r3, #0
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.inst 0xe8bd00f0 // pop {r4, r5, r6, r7}
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.inst 0xe12fff1e // bx lr
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@ -55,11 +56,12 @@ __kuser_memory_barrier: // 0xffff0fa0
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.align 5
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__kuser_cmpxchg: // 0xffff0fc0
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.inst 0xe1923e9f // 1: ldaex r3, [r2]
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.inst 0xe1923f9f // 1: ldrex r3, [r2]
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.inst 0xe0533000 // subs r3, r3, r0
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.inst 0x01823e91 // stlexeq r3, r1, [r2]
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.inst 0x03330001 // teqeq r3, #1
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.inst 0x0afffffa // beq 1b
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.inst 0xf57ff05b // dmb ish
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.inst 0xe2730000 // rsbs r0, r3, #0
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.inst 0xe12fff1e // bx lr
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@ -46,11 +46,12 @@ ENTRY( \name )
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mov x2, #1
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add x1, x1, x0, lsr #3 // Get word offset
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lsl x4, x2, x3 // Create mask
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1: ldaxr x2, [x1]
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1: ldxr x2, [x1]
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lsr x0, x2, x3 // Save old value of bit
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\instr x2, x2, x4 // toggle bit
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stlxr w5, x2, [x1]
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cbnz w5, 1b
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dmb ish
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and x0, x0, #1
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3: ret
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ENDPROC(\name )
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