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arm64: dts: imx8mq: Add the clocks and the latencies for the A53 cores
The clocks and their latencies will be used by cpufreq-dt. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -87,6 +87,8 @@ A53_0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x0>;
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clock-latency = <61036>; /* two CLK32 periods */
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clocks = <&clk IMX8MQ_CLK_ARM>;
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enable-method = "psci";
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next-level-cache = <&A53_L2>;
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};
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@ -95,6 +97,8 @@ A53_1: cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x1>;
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clock-latency = <61036>; /* two CLK32 periods */
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clocks = <&clk IMX8MQ_CLK_ARM>;
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enable-method = "psci";
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next-level-cache = <&A53_L2>;
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};
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@ -103,6 +107,8 @@ A53_2: cpu@2 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x2>;
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clock-latency = <61036>; /* two CLK32 periods */
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clocks = <&clk IMX8MQ_CLK_ARM>;
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enable-method = "psci";
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next-level-cache = <&A53_L2>;
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};
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@ -111,6 +117,8 @@ A53_3: cpu@3 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x3>;
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clock-latency = <61036>; /* two CLK32 periods */
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clocks = <&clk IMX8MQ_CLK_ARM>;
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enable-method = "psci";
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next-level-cache = <&A53_L2>;
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};
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