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power: reset: at91-sama5d2_shdwc: add support for sama7g5

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Add support for SAMA7G5 by adding proper struct reg_config structure
and since SAMA7G5 is not currently on LPDDR setups the commit also
avoid the mapping of DDR controller.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
This commit is contained in:
Claudiu Beznea 2020-12-16 14:57:33 +02:00 committed by Sebastian Reichel
parent fe487c75a4
commit b7e15bd0c1
1 changed files with 54 additions and 18 deletions
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72
drivers/power/reset/at91-sama5d2_shdwc.c
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@ -78,9 +78,15 @@ struct pmc_reg_config {
u8 mckr;
};
struct ddrc_reg_config {
u32 type_offset;
u32 type_mask;
};
struct reg_config {
struct shdwc_reg_config shdwc;
struct pmc_reg_config pmc;
struct ddrc_reg_config ddrc;
};
struct shdwc {
@ -262,6 +268,10 @@ static const struct reg_config sama5d2_reg_config = {
.pmc = {
.mckr = 0x30,
},
.ddrc = {
.type_offset = AT91_DDRSDRC_MDR,
.type_mask = AT91_DDRSDRC_MD
},
};
static const struct reg_config sam9x60_reg_config = {
@ -275,6 +285,23 @@ static const struct reg_config sam9x60_reg_config = {
.pmc = {
.mckr = 0x28,
},
.ddrc = {
.type_offset = AT91_DDRSDRC_MDR,
.type_mask = AT91_DDRSDRC_MD
},
};
static const struct reg_config sama7g5_reg_config = {
.shdwc = {
.wkup_pin_input = 0,
.mr_rtcwk_shift = 17,
.mr_rttwk_shift = 16,
.sr_rtcwk_shift = 5,
.sr_rttwk_shift = 4,
},
.pmc = {
.mckr = 0x28,
},
};
static const struct of_device_id at91_shdwc_of_match[] = {
@ -285,6 +312,10 @@ static const struct of_device_id at91_shdwc_of_match[] = {
{
.compatible = "microchip,sam9x60-shdwc",
.data = &sam9x60_reg_config,
},
{
.compatible = "microchip,sama7g5-shdwc",
.data = &sama7g5_reg_config,
}, {
/*sentinel*/
}
@ -294,6 +325,7 @@ MODULE_DEVICE_TABLE(of, at91_shdwc_of_match);
static const struct of_device_id at91_pmc_ids[] = {
{ .compatible = "atmel,sama5d2-pmc" },
{ .compatible = "microchip,sam9x60-pmc" },
{ .compatible = "microchip,sama7g5-pmc" },
{ /* Sentinel. */ }
};
@ -355,30 +387,34 @@ static int __init at91_shdwc_probe(struct platform_device *pdev)
goto clk_disable;
}
np = of_find_compatible_node(NULL, NULL, "atmel,sama5d3-ddramc");
if (!np) {
ret = -ENODEV;
goto unmap;
}
if (at91_shdwc->rcfg->ddrc.type_mask) {
np = of_find_compatible_node(NULL, NULL,
"atmel,sama5d3-ddramc");
if (!np) {
ret = -ENODEV;
goto unmap;
}
at91_shdwc->mpddrc_base = of_iomap(np, 0);
of_node_put(np);
at91_shdwc->mpddrc_base = of_iomap(np, 0);
of_node_put(np);
if (!at91_shdwc->mpddrc_base) {
ret = -ENOMEM;
goto unmap;
if (!at91_shdwc->mpddrc_base) {
ret = -ENOMEM;
goto unmap;
}
ddr_type = readl(at91_shdwc->mpddrc_base +
at91_shdwc->rcfg->ddrc.type_offset) &
at91_shdwc->rcfg->ddrc.type_mask;
if (ddr_type != AT91_DDRSDRC_MD_LPDDR2 &&
ddr_type != AT91_DDRSDRC_MD_LPDDR3) {
iounmap(at91_shdwc->mpddrc_base);
at91_shdwc->mpddrc_base = NULL;
}
}
pm_power_off = at91_poweroff;
ddr_type = readl(at91_shdwc->mpddrc_base + AT91_DDRSDRC_MDR) &
AT91_DDRSDRC_MD;
if (ddr_type != AT91_DDRSDRC_MD_LPDDR2 &&
ddr_type != AT91_DDRSDRC_MD_LPDDR3) {
iounmap(at91_shdwc->mpddrc_base);
at91_shdwc->mpddrc_base = NULL;
}
return 0;
unmap: