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soc/tegra: Changes for v6.18-rc1

Browse Source 
NVMEM cells are added for Tegra114. These contain calibration data for
 sensors and USB.
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Merge tag 'tegra-for-6.18-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers

soc/tegra: Changes for v6.18-rc1

NVMEM cells are added for Tegra114. These contain calibration data for
sensors and USB.

* tag 'tegra-for-6.18-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: fuse: Add Tegra114 nvmem cells and fuse lookups

Link: https://lore.kernel.org/r/20250914063927.89981-2-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2025-09-15 16:21:00 +02:00
commit b7c0fe1654
1 changed files with 122 additions and 0 deletions
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122
drivers/soc/tegra/fuse/fuse-tegra30.c
View File

@ -117,6 +117,124 @@ const struct tegra_fuse_soc tegra30_fuse_soc = {
#endif
#ifdef CONFIG_ARCH_TEGRA_114_SOC
static const struct nvmem_cell_info tegra114_fuse_cells[] = {
{
.name = "tsensor-cpu1",
.offset = 0x084,
.bytes = 4,
.bit_offset = 0,
.nbits = 32,
}, {
.name = "tsensor-cpu2",
.offset = 0x088,
.bytes = 4,
.bit_offset = 0,
.nbits = 32,
}, {
.name = "tsensor-common",
.offset = 0x08c,
.bytes = 4,
.bit_offset = 0,
.nbits = 32,
}, {
.name = "tsensor-cpu0",
.offset = 0x098,
.bytes = 4,
.bit_offset = 0,
.nbits = 32,
}, {
.name = "xusb-pad-calibration",
.offset = 0x0f0,
.bytes = 4,
.bit_offset = 0,
.nbits = 32,
}, {
.name = "tsensor-cpu3",
.offset = 0x12c,
.bytes = 4,
.bit_offset = 0,
.nbits = 32,
}, {
.name = "tsensor-gpu",
.offset = 0x154,
.bytes = 4,
.bit_offset = 0,
.nbits = 32,
}, {
.name = "tsensor-mem0",
.offset = 0x158,
.bytes = 4,
.bit_offset = 0,
.nbits = 32,
}, {
.name = "tsensor-mem1",
.offset = 0x15c,
.bytes = 4,
.bit_offset = 0,
.nbits = 32,
}, {
.name = "tsensor-pllx",
.offset = 0x160,
.bytes = 4,
.bit_offset = 0,
.nbits = 32,
},
};
static const struct nvmem_cell_lookup tegra114_fuse_lookups[] = {
{
.nvmem_name = "fuse",
.cell_name = "xusb-pad-calibration",
.dev_id = "7009f000.padctl",
.con_id = "calibration",
}, {
.nvmem_name = "fuse",
.cell_name = "tsensor-common",
.dev_id = "700e2000.thermal-sensor",
.con_id = "common",
}, {
.nvmem_name = "fuse",
.cell_name = "tsensor-cpu0",
.dev_id = "700e2000.thermal-sensor",
.con_id = "cpu0",
}, {
.nvmem_name = "fuse",
.cell_name = "tsensor-cpu1",
.dev_id = "700e2000.thermal-sensor",
.con_id = "cpu1",
}, {
.nvmem_name = "fuse",
.cell_name = "tsensor-cpu2",
.dev_id = "700e2000.thermal-sensor",
.con_id = "cpu2",
}, {
.nvmem_name = "fuse",
.cell_name = "tsensor-cpu3",
.dev_id = "700e2000.thermal-sensor",
.con_id = "cpu3",
}, {
.nvmem_name = "fuse",
.cell_name = "tsensor-mem0",
.dev_id = "700e2000.thermal-sensor",
.con_id = "mem0",
}, {
.nvmem_name = "fuse",
.cell_name = "tsensor-mem1",
.dev_id = "700e2000.thermal-sensor",
.con_id = "mem1",
}, {
.nvmem_name = "fuse",
.cell_name = "tsensor-gpu",
.dev_id = "700e2000.thermal-sensor",
.con_id = "gpu",
}, {
.nvmem_name = "fuse",
.cell_name = "tsensor-pllx",
.dev_id = "700e2000.thermal-sensor",
.con_id = "pllx",
},
};
static const struct tegra_fuse_info tegra114_fuse_info = {
.read = tegra30_fuse_read,
.size = 0x2a0,
@ -127,6 +245,10 @@ const struct tegra_fuse_soc tegra114_fuse_soc = {
.init = tegra30_fuse_init,
.speedo_init = tegra114_init_speedo_data,
.info = &tegra114_fuse_info,
.lookups = tegra114_fuse_lookups,
.num_lookups = ARRAY_SIZE(tegra114_fuse_lookups),
.cells = tegra114_fuse_cells,
.num_cells = ARRAY_SIZE(tegra114_fuse_cells),
.soc_attr_group = &tegra_soc_attr_group,
.clk_suspend_on = false,
};